Five-path UART one-way efficient data transmission method in Linux embedded system

Abstract

The invention relates to a five-path UART (Universal Asynchronous Receiver / Transmitter) one-way efficient data transmission method in a Linux embedded system, aiming at overcoming the defects of traditional serial port communication in the aspects of efficient data transmission and physical security. According to the method, efficient and safe transmission of data is realized through multi-channel UART parallel transmission and a photoelectric isolation technology. A sending end carries out preprocessing, subpackaging and FEC forward error correction coding on file data, and distributes a data packet to five UART channels for sending through dynamic load distribution. And a receiving end receives the data through shared memory and multi-task parallel processing, and performs data combination and verification to ensure the integrity and consistency of the data. The system comprises a sending end, a receiving end, a photoelectric isolation module and a software module, supports DMA transmission, memory sharing and dynamic load distribution, and has the advantages of high transmission efficiency and high safety.

Description

Technical Field

[0001] The present invention relates to the technical field of embedded data transmission, and in particular to a 5-channel UART unidirectional high-efficiency data transmission method in a Linux embedded system. Background Art

[0002] With the widespread application of embedded systems in fields such as industrial control and national defense security, the demand for data transmission security and reliability continues to increase. Traditional serial communication primarily relies on a single UART channel for data transmission. However, in scenarios requiring high data throughput and one-way data isolation, this traditional approach suffers from low transmission efficiency and poor physical security. Especially in applications with high security requirements, physical one-way data transmission becomes an effective solution. Currently, most commonly used one-way communication devices are single-channel and cannot efficiently handle multiple parallel transmissions. To this end, a five-channel UART one-way efficient data transmission method based on a Linux embedded system is proposed. Through multi-channel UART parallel transmission and optoelectronic isolation technology, efficient and secure data transmission is achieved. Summary of the Invention

[0003] The object of the present invention is to provide a 5-way UART unidirectional efficient data transmission method in a Linux embedded system, which can solve the problems in the above background technology.

[0004] A 5-channel UART unidirectional efficient data transmission method in a Linux embedded system includes a sending end and a receiving end at the hardware level, wherein the sending end includes a sending program and the receiving end includes a user-end receiving program. The specific steps are as follows:

[0005] Sending end:

[0006] S1. Initially, the sending program calculates the sending interval based on the file size to be transferred and the current network conditions;

[0007] S2. Preprocessing the file data, including file information packaging and data content subpackaging;

[0008] S3. Convolutionally encode the data packet using FEC (forward error correction) technology;

[0009] S4. Create the sending control task and create five sending tasks;

[0010] S5. The control task periodically obtains the load indicators of the five tasks to dynamically allocate the data packets to be sent. The five sending tasks execute in a loop. Each time a sending task is completed, the next cycle is delayed after the sending interval. When the data packet is sent, the sending end ends the transmission;

[0011] The receiving end synchronously receives the data sent by the sending end:

[0012] S6. When the sender sends data to the receiver, the receiver's program requests shared memory space from the Linux embedded system.

[0013] S7. The receiving end creates a receiving end control task and five receiving tasks;

[0014] S8. The receiving task parses the received data and sends it to the receiving control task, and then the receiving task loops again;

[0015] S9. The receiving end control task performs combined verification on the parsed data;

[0016] S10. Complete the data transmission after all the combined data are stored in the shared memory space.

[0017] Further,

[0018] The file data preprocessing includes file information packaging and data content subpackaging, specifically:

[0019] The file information package encapsulates the file name, file data length, and file MDS summary into a package, and adds additional information: a frame header to identify the start of the package, a packet data length indicating the current packet length, a frame trailer indicating the end of the package, a packet sequence number set to 0, and a CRC32 checksum to verify the integrity of the packet data;

[0020] Data content subpackaging is to divide the file data into N packets to obtain data packets, and then add a frame header, packet data length, frame tail, packet sequence number from 1 to N, and CRC32 check value to the data packets.

[0021] Further,

[0022] The control task of the sending end is specifically: regularly and dynamically monitoring the load intensity of all sending tasks, and dynamically allocating data to be sent according to the load conditions of the sending tasks.

[0023] Further,

[0024] The transmitting end is also configured with a UART transmitting driver, and the transmitting task steps are specifically as follows:

[0025] S60. Receive the data to be sent assigned by the end of the sending end control task;

[0026] S61. Call UART send driver;

[0027] S62. After delaying the sending time interval, go to S60.

[0028] Further,

[0029] The receiving end is also configured with a UART receiving driver, and the specific steps of its receiving task are:

[0030] S90 calls the UART receiving driver whose receiving end corresponds to the UART channel where the transmitting end sends data;

[0031] S91. Receive data through the UART channel;

[0032] S92. Perform convolutional code decoding;

[0033] S93. Check the data, including the header, footer, and CRC32 checksum.

[0034] S94. Parsing data, including extracting the packet number, packet data length, packet data content, and parsing the file name, file length, and MDS summary value for a special packet with a packet number of zero;

[0035] S95. Send the parsed data to the receiving end control task, and go to S90.

[0036] Further,

[0037] The receiving end control tasks are specifically:

[0038] S100. The receiving end control task receives the data content sent by the receiving task, including the packet sequence number, packet data length, packet data content, file name, file length and MDS summary value;

[0039] S101. Create a file based on the obtained file name;

[0040] S102. Combine the data into file data according to the packet sequence number, packet data length and packet data content;

[0041] S103. Verify the combined file data, and the verification content is:

[0042] The packet sequence number must increase from 0 to N, and there must be no loss in the middle;

[0043] The combined file data length is equal to the file length of the received file;

[0044] The MDS summary value of the combined file data is equal to the received MDS summary value;

[0045] S104. Save the combined file.

[0046] Further,

[0047] The sending time interval is the sum of the data transmission time, the receiving end processing time and the time margin. The time margin should be the preset value of the sending program.

[0048] Further,

[0049] The transmitting end and the receiving end respectively deploy a UART transmitting driver and a UART receiving driver for managing and operating data transmission on the UART channel.

[0050] Further,

[0051] The hardware layer includes:

[0052] Transmitter hardware module: includes 5 UART channels and Tx pin;

[0053] Receiver hardware module: includes 5 UART channels and Rx pins;

[0054] Optoelectronic isolation module: connects the transmitter and receiver to ensure physical one-way transmission;

[0055] Software modules, including user programs and kernel drivers, support DMA transfer, shared memory and dynamic load distribution.

[0056] The present invention has the beneficial effects:

[0057] 1. This invention significantly improves data transmission throughput by transmitting data in parallel through five UART channels. Compared to traditional single-channel UART transmission, multi-channel parallel processing can effectively reduce data transmission time, making it particularly suitable for scenarios with large data volumes and improving overall system efficiency.

[0058] 2. Through the optoelectronic isolation module, the present invention realizes physical unidirectional transmission of data, ensuring that data can only be transmitted from the sending end to the receiving end, preventing the reverse transmission of the signal. This is particularly important in application scenarios with high security requirements, and effectively prevents data leakage and tampering.

[0059] 3. The transmitter control task monitors the load of each UART channel in real time and dynamically distributes data packets based on load intensity. This dynamic load balancing mechanism ensures balanced load across each UART channel, avoiding transmission delays or data loss caused by overloading a single channel, further improving system stability and reliability.

[0060] 4. Efficiency of shared memory and DMA transmission: The receiving end reduces the overhead of data copying and reduces the CPU load through shared memory and DMA (direct memory access) technology.

[0061] 5. After receiving data, the receiver ensures data integrity and consistency through multiple verification mechanisms, including CRC32, packet sequence number, file length, and MDS digest checks. If a packet is lost or a verification failure is detected, the system promptly notifies the sender to resend the packet, further improving data transmission reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] Figure 1 This is a logical flow diagram of the present invention;

[0063] Figure 2 This is a schematic diagram of the sending task process;

[0064] Figure 3 This is a schematic diagram of the receiving task process;

[0065] Figure 4 Schematic diagram of the hardware architecture of the system of the present invention;

[0066] Figure 5 Schematic diagram of the soft armor architecture of the system of the present invention. DETAILED DESCRIPTION

[0067] The present invention will be further described in detail below with reference to the embodiments and the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0068] Example 1

[0069] See also Figures 1 to 5 As shown,

[0070] A 5-channel UART unidirectional efficient data transmission method in a Linux embedded system includes a sending end and a receiving end at the hardware level, wherein the sending end includes a sending program and the receiving end includes a user-end receiving program. The specific steps are as follows:

[0071] Sending end:

[0072] S1. Initially, the sending program calculates the sending interval based on the file size to be transferred and the current network conditions;

[0073] S2. Preprocessing the file data, including file information packaging and data content subpackaging;

[0074] S3. Convolutionally encode the data packet using FEC (forward error correction) technology;

[0075] S4. Create the sending control task and create five sending tasks;

[0076] S5. The control task periodically obtains the load indicators of the five tasks to dynamically allocate the data packets to be sent. The five sending tasks execute in a loop. Each time a sending task is completed, the next cycle is delayed after the sending interval. When the data packet is sent, the sending end ends the transmission;

[0077] The receiving end synchronously receives the data sent by the sending end:

[0078] S6. When the sender sends data to the receiver, the receiver's program requests shared memory space from the Linux embedded system.

[0079] S7. The receiving end creates a receiving end control task and five receiving tasks;

[0080] S8. The receiving task parses the received data and sends it to the receiving control task, and then the receiving task loops again;

[0081] S9. The receiving end control task performs combined verification on the parsed data;

[0082] S10. Complete the data transmission after all the combined data are stored in the shared memory space.

[0083] This method relies on the hardware architecture in the embedded system and the software architecture in the hardware architecture. The sending end, receiving end, and optoelectronic unidirectional isolation are the hardware parts. The sending program and UART sending driver are deployed in the sending end, and the receiving program and UART receiving driver are deployed in the receiving end. The method is executed through the joint action between the software architecture and the hardware architecture.

[0084] Each of the five sending tasks or the five receiving tasks created by the sending end and the receiving end corresponds one-to-one to a channel of the sending end or the receiving end.

[0085] Further,

[0086] The file data preprocessing includes file information packaging and data content subpackaging, specifically:

[0087] The file information package encapsulates the file name, file data length, and file MDS summary into a package, and adds additional information: a frame header to identify the start of the package, a packet data length indicating the current packet length, a frame trailer indicating the end of the package, a packet sequence number set to zero, and a CRC32 checksum for verifying the integrity of the packet data.

[0088] Data content subpackaging is to divide the file data into N packets to obtain data packets, and then add a frame header, packet data length, frame tail, packet sequence number from 1 to N, and CRC32 check value to the data packets.

[0089] In one embodiment,

[0090] File information package: The file information package includes information such as the file name, file length, and MDS summary. For example, the file name is "example.txt", the file length is 1MB, and the MDS summary is "d41d8cd98f00b204e9800998ecf8427e".

[0091] When encapsulating a packet, add a frame header (such as 0xAA), packet data length (such as 20 bytes), frame tail (such as 0x55), packet sequence number (0), and CRC32 checksum (such as 0x12345678).

[0092] Data content subcontracting:

[0093] File data is divided into multiple data packets. For example, a 1MB file is divided into 100 data packets, and each data packet is 10KB in size.

[0094] Add a frame header (such as 0xAA), packet data length (such as 10KB), frame tail (such as 0x55), packet sequence number (from 1 to 100), and CRC32 check value (such as 0x87654321) to each data packet.

[0095] Sending of data packets:

[0096] The sender control task dynamically allocates data packets based on the load. For example, UART channel 1 sends packets 1 to 20, UART channel 2 sends packets 21 to 40, and so on.

[0097] After each sending task completes sending a data packet, it delays for 10ms and waits for the next sending.

[0098] Further,

[0099] The control task of the sending end is specifically: regularly and dynamically monitoring the load intensity of all sending tasks, and dynamically allocating data to be sent according to the load conditions of the sending tasks.

[0100] In one embodiment, dynamic load allocation of the transmitter control task is key to ensuring efficient transmission of the five UART channels, as follows:

[0101] Load monitoring:

[0102] The sender control task regularly monitors the load of the five sending tasks and obtains the load indicators of each task, such as the packet sending rate and buffer usage.

[0103] Dynamic allocation:

[0104] Data packets are dynamically allocated based on the load of each sending task. Tasks with higher loads are allocated fewer data packets, while tasks with lower loads are allocated more data packets, ensuring a balanced load on each UART channel.

[0105] For example, if the load on the UART0 channel is high, the transmitter control task will reduce the number of packets allocated to UART0 and allocate more packets to the UART1 to UART4 channels with lower loads.

[0106] Load Balancing:

[0107] Dynamic load distribution ensures balanced load on each UART channel, preventing data transmission delay or loss caused by overload of a certain channel.

[0108] Further,

[0109] The transmitting end is also configured with a UART transmitting driver, and the transmitting task steps are specifically as follows:

[0110] S60. Receive the data to be sent assigned by the end of the sending end control task;

[0111] S61. Call UART send driver;

[0112] S62. After delaying the sending time interval, go to S60.

[0113] The main function of calling the UART send driver is to realize communication with the hardware, management of the UART channel and data transmission.

[0114] Further,

[0115] The receiving end is also configured with a UART receiving driver, and the specific steps of its receiving task are:

[0116] S90 calls the UART receiving driver whose receiving end corresponds to the UART channel where the transmitting end sends data;

[0117] S91. Receive data through the UART channel;

[0118] S92. Perform convolutional code decoding;

[0119] S93. Check the data, including the header, footer, and CRC32 checksum.

[0120] S94. Parsing data, including extracting the packet number, packet data length, packet data content, and parsing the file name, file length, and MDS summary value for a special packet with a packet number of zero;

[0121] S95. Send the parsed data to the receiving end control task, and go to S90.

[0122] Further,

[0123] The receiving end control tasks are specifically:

[0124] S100. The receiving end control task receives the data content sent by the receiving task, including the packet sequence number, packet data length, packet data content, file name, file length and MDS summary value;

[0125] S101. Create a file based on the obtained file name;

[0126] S102. Combine the data into file data according to the packet sequence number, packet data length and packet data content;

[0127] S103. Verify the combined file data;

[0128] S104. Save the combined file.

[0129] In one embodiment, the verification content of the combined file data is:

[0130] The sequence numbers of the combined file data packets must increase from 0 to N, and there must be no loss in the middle;

[0131] The combined file data length is equal to the file length of the received file;

[0132] The MDS summary value of the combined file data is equal to the received MDS summary value;

[0133] If a data packet is found to be lost or verification fails, the receiving control task will notify the sending end to resend the lost or erroneous data packet.

[0134] For example: verify the combined file data to ensure that the packet numbers are continuous from 0 to 100 without loss, the file length is 1MB, and the MD5 digest value is "d41d8cd98f00b204e9800998ecf8427e". If the verification passes, save the file as "example.txt". If the verification fails, discard the file and notify the sender to resend it.

[0135] Further,

[0136] The sending time interval is the sum of the data transmission time, the receiving end processing time and the time margin. The time margin should be the preset value of the sending program.

[0137] Further,

[0138] The transmitting end and the receiving end respectively deploy a UART transmitting driver and a UART receiving driver for managing and operating data transmission on the UART channel.

[0139] In one embodiment, a UART channel register is configured in the UART receiving driver to support a data receiving mode; and a DMA controller is configured to achieve efficient data reception.

[0140] In terms of data reception, the UART receive driver reads data from the UART receive buffer and transfers it to the shared memory via DMA, reducing the CPU load;

[0141] At the same time, the UART receiving driver can also detect the integrity of the received data, handle baud rate errors, frame errors and communication anomalies, and feedback to the user program.

[0142] Further,

[0143] The hardware layer includes:

[0144] Transmitter hardware module: includes 5 UART channels and Tx pin;

[0145] Receiver hardware module: includes 5 UART channels and Rx pins;

[0146] Optoelectronic isolation module: connects the transmitter and receiver to ensure physical one-way transmission;

[0147] Software modules, including user programs and kernel drivers, support DMA transfer, shared memory and dynamic load distribution.

[0148] Example 2: Hardware framework such as Figure 4 As shown,

[0149] The transmitting end has 5 interface channels, and the receiving end also has 5 interface channels. The optoelectronic isolation module is set between the transmitting end hardware module and the receiving end hardware module. The direction of the arrow indicates that the data flow is transmitted from the UART channel of the transmitting end to the corresponding UART channel of the receiving end after optoelectronic unidirectional isolation. Among them, UART channel 0 is responsible for the transmission of control information, and UART channel 1 to UART channel 4 are responsible for the transmission of segmented file data respectively.

[0150] The architecture of the software module is as follows Figure 5 As shown, the entire system is divided into Linux user space and Linux kernel space;

[0151] In the Linux user space, there are system call modules and applications. The system call module is the interface between the Linux user space and the Linux kernel space, and is used by user programs to access the Linux kernel space.

[0152] The application includes a sending program and a receiving program. The sending program processes, transmits and controls data in segments; the receiving program receives data, divides it into segments, integrates it and verifies the integrated data.

[0153] The Linux kernel space is divided into three layers: the core layer, the system service layer, and the hardware abstraction layer.

[0154] The core layer provides the basic functions of the kernel, including process management and memory management;

[0155] The system service layer is responsible for providing various services of the operating system, including file system services and network services;

[0156] The hardware abstraction layer is located between the operating system kernel and the hardware, providing an interface for interacting with the hardware, including the UART transmit driver, the UART receive driver, the network subsystem, and the file system.

[0157] The UART transmit driver and the UART receive driver implement communication with the hardware and are used to manage the data transmission of the UART channel;

[0158] Network subsystem: provides network transmission function for data and supports network-based communication;

[0159] File system: implements file storage, reading and management.

[0160] It will be understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present invention, and the present invention is not limited thereto. Persons skilled in the art will readily appreciate that various modifications and improvements can be made without departing from the spirit and substance of the present invention, and such modifications and improvements are considered within the scope of protection of the present invention.

Claims

1. A 5-way UART unidirectional efficient data transmission method in a Linux embedded system, comprising a transmitting end and a receiving end at the hardware level, characterized in that the transmitting end includes a transmitting program and the receiving end includes a receiving program, and the specific steps are: Sending end: S1. Initially, the sending program calculates the sending interval based on the file size to be transferred and the current network conditions; S2. Preprocessing the file data, including file information packaging and data content subpackaging; S3. Convolutionally encode the data packet using FEC (forward error correction) technology; S4. Create the sending control task and create five sending tasks; S5. The control task periodically obtains the load indicators of the five tasks to dynamically allocate the data packets to be sent. The five sending tasks execute in a loop. Each time a sending task is completed, the next cycle is delayed after the sending interval. When the data packet is sent, the sending end ends the transmission; The receiving end synchronously receives the data sent by the sending end: S6. When the sender sends data to the receiver, the receiver's program requests shared memory space from the Linux embedded system. S7. The receiving end creates a receiving end control task and five receiving tasks; S8. The receiving task parses the received data and sends it to the receiving control task, and then the receiving task loops again; S9. The receiving end control task performs combined verification on the parsed data; S10. Complete the data transmission after all the combined data are stored in the shared memory space.

2. A 5-way UART unidirectional efficient data transmission method in a Linux embedded system according to claim 1, characterized in that, The file data preprocessing includes file information packaging and data content subpackaging, specifically: The file information package encapsulates the file name, file data length, and file MDS summary into a package, and adds additional information: a frame header to identify the start of the package, a packet data length indicating the current packet length, a frame trailer indicating the end of the package, a packet sequence number set to zero, and a CRC32 checksum for verifying the integrity of the packet data. Data content subpackaging is to divide the file data into N packets to obtain data packets, and then add a frame header, packet data length, frame tail, packet sequence number from 1 to N, and CRC32 check value to the data packets.

3. A 5-way UART unidirectional efficient data transmission method in a Linux embedded system according to claim 1, characterized in that, The control task of the sending end is specifically: regularly and dynamically monitoring the load intensity of all sending tasks, and dynamically allocating data to be sent according to the load conditions of the sending tasks.

4. A 5-way UART unidirectional efficient data transmission method in a Linux embedded system according to claim 1, characterized in that, The transmitting end is also configured with a UART transmitting driver, and the transmitting task steps are specifically as follows: S60. Receive the data to be sent assigned by the end of the sending end control task; S61. Call UART send driver; S62. After delaying the sending time interval, go to S60.

5. The method for unidirectional and efficient data transmission using 5-way UARTs in a Linux embedded system according to claim 2, wherein: The receiving end is also configured with a UART receiving driver, and the specific steps of its receiving task are: S90 calls the UART receiving driver whose receiving end corresponds to the UART channel where the transmitting end sends data; S91. Receive data through the UART channel; S92. Perform convolutional code decoding; S93. Check the data, including the header, footer, and CRC32 checksum. S94. Parsing data, including extracting the packet number, packet data length, packet data content, and parsing the file name, file length, and MDS summary value for a special packet with a packet number of zero; S95. Send the parsed data to the receiving end control task, and go to S90.

6. The method for unidirectional and efficient data transmission using 5-way UARTs in a Linux embedded system according to claim 5, wherein: The receiving end control tasks are specifically: S100. The receiving end control task receives the data content sent by the receiving task, including the packet sequence number, packet data length, packet data content, file name, file length and MDS summary value; S101. Create a file based on the obtained file name; S102. Combine the data into file data according to the packet sequence number, packet data length and packet data content; S103. Verify the combined file data, and the verification content is: The packet sequence number must increase from 0 to N, and there must be no loss in the middle; The combined file data length is equal to the file length of the received file; The MDS summary value of the combined file data is equal to the received MDS summary value; S104. Save the combined file.

7. The method for unidirectional and efficient data transmission using 5-way UARTs in a Linux embedded system according to claim 1, wherein: The sending time interval is the sum of the data transmission time, the receiving end processing time and the time margin. The time margin should be the preset value of the sending program.

8. The method for unidirectional and efficient data transmission using 5-way UARTs in a Linux embedded system according to claim 1, wherein: The transmitting end and the receiving end respectively deploy a UART transmitting driver and a UART receiving driver for managing and operating data transmission on the UART channel.

9. The method for unidirectional and efficient data transmission using 5-way UARTs in a Linux embedded system according to claim 1, wherein: The hardware layer includes: Transmitter hardware module: contains 5 UART channels and only enables the Tx pin; Receiver hardware module: contains 5 UART channels and only enables the Rx pin; Optoelectronic isolation module: Isolates different UART channels. Each channel allows the signal to be transmitted only from the transmitter to the receiver, preventing the signal from being transmitted in the opposite direction and ensuring physical one-way transmission. Software module: includes application programs and drivers, supports DMA transfer, shared memory, and dynamic load distribution.

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