Inverter turn-off protection circuit

Abstract

The invention discloses an inverter turn-off protection circuit, which comprises a bus voltage sampling circuit, a current sampling module, a multiplier, a threshold voltage comparison circuit and a gate turn-off circuit, and is characterized in that the bus voltage sampling circuit is used for sampling an inverter bus voltage to obtain a sampling voltage; the current sampling module is used for sampling phase current output by the alternating current side of the inverter to obtain sampling current; the multiplier is used for receiving the sampling voltage and the sampling current and carrying out multiplication operation to obtain instantaneous power; the threshold voltage comparison circuit is used for comparing the instantaneous power with a threshold to obtain a level signal; and the gate pole turn-off circuit is used for controlling the turn-off of a gate pole turn-off switch tube according to the level signal output by the threshold voltage comparison circuit so as to control the turn-off of a power tube of the inverter. The inverter turn-off protection circuit operates independently, is not affected by an MCU system, is low in cost and high in response speed, and greatly improves function safety.

Description

Technical Field

[0001] The present invention belongs to the technical field of inverter protection, and in particular relates to an inverter shutdown protection circuit. Background Art

[0002] Traditional inverter protection circuit implementation methods are:

[0003] 1. Use the driver chip's desaturation detection function to monitor the IGBT voltage drop to protect the inverter. This traditional method offers the advantage of rapid protection, but the disadvantage is that the high-voltage side of the driver chip requires a dedicated power supply circuit, such as a flyback power supply to generate +15V and -5V voltages to power the protection circuit. Furthermore, desaturation detection is required for each bridge arm, resulting in a complex circuit, high failure rate, and high cost.

[0004] 2. Use software to implement, sample voltage and current, calculate and then execute protection action. The disadvantage is that it needs to be sampled and then calculated, the action is slow and protection cannot be carried out in time. Summary of the Invention

[0005] The purpose of the present invention is to overcome the defects of the prior art and provide an inverter shutdown protection circuit.

[0006] The technical solution of the present invention is implemented as follows: The present invention discloses an inverter shutdown protection circuit,

[0007] include:

[0008] A bus voltage sampling circuit, wherein the bus voltage sampling circuit is used to sample the inverter bus voltage to obtain a sampled voltage;

[0009] A current sampling module, which is used to sample the phase current output by the inverter AC side to obtain a sampled current;

[0010] a multiplier configured to receive the sampled voltage and the sampled current and perform a multiplication operation to obtain instantaneous power;

[0011] A threshold voltage comparison circuit, wherein the threshold voltage comparison circuit is used to compare the instantaneous power with the threshold value to obtain a level signal;

[0012] The gate turn-off circuit is used to control the turn-off of the gate turn-off switch tube according to the level signal output by the threshold voltage comparison circuit, thereby controlling the turn-off of the power tube of the inverter.

[0013] Furthermore, the multiplier includes a transistor BQ1, a transistor BQ2 and a transistor BQ4, the base of the transistor BQ4 is connected to the first voltage dividing point of the bus voltage sampling circuit, the emitter of the transistor BQ4 is grounded directly or via a resistor R6, the collector of the transistor BQ4 is respectively connected to the emitter of the transistor BQ1 and the emitter of the transistor BQ2, the base of the transistor BQ1 is connected to the first output end of the current sampling module, the collector of the transistor BQ1 is respectively connected to one end of the resistor R22 and the first output end of the multiplier, the other end of the resistor R22 is connected to the power supply voltage, the base of the transistor BQ2 is connected to the second output end of the current sampling module, the collector of the transistor BQ2 is respectively connected to one end of the resistor R21 and the second output end of the multiplier, and the other end of the resistor R21 is connected to the power supply voltage.

[0014] Furthermore, the threshold voltage comparison circuit includes a clamping diode ZD1, the cathode of the clamping diode ZD1 is respectively connected to the input end of the threshold voltage comparison circuit, and the anode of the clamping diode ZD1 is connected to the base of the gate turn-off switch tube BQ3 of the gate turn-off circuit.

[0015] The inherent threshold voltage of the clamping diode ZD1 is , the positive electrode of the clamping diode ZD1 is connected to the negative voltage , the cathode voltage of the clamping diode ZD1 is V4, when V4- > When the clamp tube is turned on, when V4- < When , the clamp tube does not conduct.

[0016] Furthermore, the cathode of the clamping diode ZD1 is connected to one end of the capacitor C2, and the other end of the capacitor C2 is grounded.

[0017] Furthermore, the inverter shutdown protection circuit of the present invention also includes a differential-to-single-ended circuit, the two input ends of the differential-to-single-ended circuit are connected to the two output ends of the multiplier, and the output end of the differential-to-single-ended circuit is connected to the input end of the threshold voltage comparison circuit.

[0018] Furthermore, the differential-to-single-ended circuit includes an operational amplifier U3D, the non-inverting input terminal of the operational amplifier U3D is connected to the first output terminal of the multiplier directly or via a resistor R2, the inverting input terminal of the operational amplifier U3D is connected to the second output terminal of the multiplier directly or via a resistor R4, the inverting input terminal of the operational amplifier U3D is connected to one end of the resistor R6 and one end of the capacitor C3, the other end of the resistor R6 and the other end of the capacitor C3 are connected to the output terminal of the operational amplifier U3D, and the output terminal of the operational amplifier U3D is connected to the input terminal of the threshold voltage comparison circuit.

[0019] The non-inverting input terminal of the operational amplifier U3D is connected to one end of the resistor R1 and one end of the capacitor C1 respectively, and the other end of the resistor R1 and the other end of the capacitor C1 are grounded.

[0020] Furthermore, the gate turn-off circuit includes a gate turn-off switch tube BQ3, the collector of the gate turn-off switch tube BQ3 is connected to the gate of the power switching device of the inverter, the base of the gate turn-off switch tube BQ3 is connected to the output end of the threshold voltage comparison circuit directly or via a resistor R3, the base of the gate turn-off switch tube BQ3 is connected to a negative voltage via a resistor R5, and the emitter of the gate turn-off switch tube BQ3 is connected to a negative voltage.

[0021] Furthermore, the negative pressure is generated by a negative pressure generating circuit.

[0022] Furthermore, the negative voltage generating circuit adopts a charge pump circuit.

[0023] Furthermore, the negative voltage generating circuit includes an excitation source and a push-pull transistor Q1 and a push-pull transistor Q2. The base of the push-pull transistor Q1 and the base of the push-pull transistor Q2 are connected to the output end of the excitation source, the collector of the push-pull transistor Q1 is connected to the power supply voltage, the collector of the push-pull transistor Q2 is grounded, the emitter of the push-pull transistor Q2 and the emitter of the push-pull transistor Q1 are both connected to one end of the capacitor C4, the other end of the capacitor C4 is respectively connected to the cathode of the diode D1 and the anode of the diode D2, the cathode of the diode D2 is grounded, the anode of the diode D1 is respectively connected to one end of the capacitor C5 and one end of the resistor R23, the other end of the capacitor C5 and the other end of the resistor R23 are grounded.

[0024] Furthermore, the inverter shutdown protection circuit of the present invention further includes a power supply circuit, which includes an LDO module. The LDO module is used to generate a power supply voltage by dividing the voltage from the high-voltage bus to power the current sampling module and the multiplier.

[0025] Furthermore, the bus voltage sampling circuit includes a first voltage dividing point and a plurality of voltage dividing resistors. The first voltage dividing point is grounded via at least one voltage dividing resistor and is connected to the positive bus pole of the inverter via at least one voltage dividing resistor.

[0026] Furthermore, the input end of the LDO module is connected to the second voltage dividing point of the bus voltage sampling circuit, the second voltage dividing point is grounded via at least one voltage dividing resistor, and the second voltage dividing point is connected to the positive bus pole of the inverter via at least one voltage dividing resistor.

[0027] The present invention has at least the following beneficial effects: the inverter shutdown protection circuit of the present invention uses an analog circuit to perform multiplication calculation on the voltage output by the three-phase current sampling sensor and the voltage sampled by the bus voltage divider to realize instantaneous power calculation. The multiplier circuit is powered by power taken from the bus voltage divider point and then converted by an LDO. The multiplier estimates the inverter power consumption and obtains an analog voltage. The analog voltage passes through a clamping diode of a specific amplitude. The amplitude is the threshold of the inverter power upper limit. When the analog voltage exceeds the threshold, a high level is output. The circuit is input to the transistor of the IGBT gate circuit to realize the IGBT gate level being pulled down to a negative voltage, realizing negative voltage accelerated shutdown to stop wave generation, and protecting the inverter.

[0028] The present invention uses a purely hardware-based multiplier analog circuit to calculate instantaneous power. It also cleverly uses an LDO to generate positive voltage by dividing the voltage of a high-voltage busbar, and a charge pump circuit composed of an NE555 and a diode to generate negative voltage. A clamping diode is used to set the instantaneous power threshold. By adopting the above scheme, the inverter shutdown protection circuit of the present invention operates independently and is not affected by the MCU system. Not only does it not require the participation of the MCU system program to achieve inverter protection, it also does not require the addition of a flyback power supply circuit to provide power. It can completely independently monitor the working status of the inverter. Furthermore, the circuit principle of the present invention is simple and reliable, with low cost and simple implementation. Furthermore, the passive components of the purely hardware circuit have a fast response speed, with a delay time at the PN junction of only nanoseconds, a response speed far exceeding that of the MCU software protection method. Even when the MCU fails, it can still achieve real-time monitoring and protection, greatly improving functional safety. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0030] Figure 1 This is a functional block diagram of the inverter shutdown protection circuit disclosed in an embodiment of the present invention;

[0031] Figure 2 This is a circuit diagram of the first part (including the bus voltage sampling circuit and the power supply circuit) of the inverter shutdown protection circuit disclosed in an embodiment of the present invention;

[0032] Figure 3 This is a circuit diagram of the second part (including a current sampling module, a multiplier, and a differential-to-single-ended circuit) of the inverter shutdown protection circuit disclosed in an embodiment of the present invention;

[0033] Figure 4 A circuit diagram of the third part (including a threshold voltage comparison circuit, a gate shutdown circuit, a negative voltage generation circuit, and an IGBT) of the inverter shutdown protection circuit disclosed in an embodiment of the present invention;

[0034] Figure 5 This is a working logic flow chart of the inverter shutdown protection circuit disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0036] In the description of the present invention, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention.

[0037] The terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, features specified as "first" or "second" may explicitly or implicitly include one or more of such features; in the description of the present invention, unless otherwise specified, "plurality" or "several" means two or more.

[0038] See also Figure 1 , an embodiment of the present invention provides an inverter shutdown protection circuit, comprising:

[0039] A bus voltage sampling circuit, wherein the bus voltage sampling circuit is used to sample the inverter bus voltage to obtain a sampled voltage;

[0040] A current sampling module, which is used to sample the phase current output by the inverter AC side to obtain a sampled current;

[0041] a multiplier configured to receive the sampled voltage and the sampled current and perform a multiplication operation to obtain instantaneous power;

[0042] A threshold voltage comparison circuit, wherein the threshold voltage comparison circuit is used to compare the instantaneous power with the threshold value to obtain a level signal;

[0043] The gate turn-off circuit is used to control the turn-off of the gate turn-off switch tube according to the level signal output by the threshold voltage comparison circuit, thereby controlling the turn-off of the power tube of the inverter.

[0044] This invention determines whether the inverter is in a runaway state by analyzing the product of the inverter's three-phase current and bus voltage, i.e., instantaneous power, in real time. This instantaneous power is then compared with a threshold voltage, which is set by selecting clamping diodes with different parameters. Exceeding the threshold triggers soft shutdown of the IGBT gate, achieving functional safety-level inverter protection. This invention uses an independent hardware simulation circuit to calculate the IGBT's instantaneous power in real time without the need for an MCU or a running program. This purely hardware-based, standalone operation protects the inverter's core system and achieves functional safety.

[0045] Furthermore, the bus voltage sampling circuit includes a first voltage dividing point and a plurality of voltage dividing resistors, wherein the first voltage dividing point is grounded via at least one voltage dividing resistor and connected to the positive bus pole of the inverter via at least one voltage dividing resistor. The input end of the LDO module is connected to a second voltage dividing point of the bus voltage sampling circuit, wherein the second voltage dividing point is grounded via at least one voltage dividing resistor and connected to the positive bus pole of the inverter via at least one voltage dividing resistor.

[0046] In some embodiments, see Figure 2 The bus voltage sampling circuit is connected by resistors R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R19, and R20 in series and parallel voltage division. The power supply position is connected to the bus positive pole Vbus, and the grounding point is connected to the bus negative pole E-WB. The output voltage of the voltage division point is Represents the bus voltage value; the voltage dividing point V7 supplies power to the LDO. Specifically, the first voltage dividing point is grounded via the voltage dividing resistor R20, and the first voltage dividing point is connected to the positive busbar of the inverter via multiple voltage dividing resistors connected in series. For example, the first voltage dividing point is connected to the positive busbar of the inverter via the voltage dividing resistors R19, R16, R14, R12, R10, and R8 connected in series. The two ends of the voltage dividing resistor R19 are connected in parallel with the voltage dividing resistor R17, the two ends of the voltage dividing resistor R16 are connected in parallel with the voltage dividing resistor R15, the two ends of the voltage dividing resistor R14 are connected in parallel with the voltage dividing resistor R13, the two ends of the voltage dividing resistor R12 are connected in parallel with the voltage dividing resistor R11, the two ends of the voltage dividing resistor R10 are connected in parallel with the voltage dividing resistor R9, and the two ends of the voltage dividing resistor R8 are connected in parallel with the voltage dividing resistor R7. The second voltage dividing point V7 is located between the voltage dividing resistor R14 and the voltage dividing resistor R6.

[0047] The bus voltage sampling circuit is used to sample the bus voltage value, and the voltage division ratio is:

[0048]

[0049] in, is the voltage at the sampling point, and the voltage divider resistor value is adjusted to ensure ; is the bus voltage value.

[0050] Furthermore, the inverter shutdown protection circuit of the present invention also includes a power supply circuit, see Figure 2 The power supply circuit includes an LDO module U2, which is used to generate a supply voltage by dividing the voltage from the high-voltage busbar to power the current sampling module, the multiplier, the differential-to-single-ended converter, and the like. The input of the LDO module U2 is connected to the second voltage-dividing point of the busbar voltage sampling circuit, and the output of the LDO module U2 outputs the supply voltage Ua. The present invention uses a voltage-dividing resistor to divide the voltage from the busbar to generate a positive voltage for the LDO, which then powers the op amps of the multiplier and the differential-to-single-ended converter.

[0051] See also Figure 3 , the power supply of the current sampling module U4 is the output of LDO, and the grounding point is E-WB; output Indicates three-phase current. The current value output by the three-phase current sampling sensor , the proportional relationship between current and voltage is determined by the current sensor transfer function parameters, and .

[0052] The multiplier adopts a differential amplifier multiplier, which is a commonly used analog multiplier structure and uses the nonlinear characteristics of the differential amplifier to realize signal multiplication operation.

[0053] Further, see Figure 3 The multiplier includes transistors BQ1, BQ2, and BQ4. The base of transistor BQ4 is connected to the first voltage divider point of the bus voltage sampling circuit. The emitter of transistor BQ4 is grounded directly or via resistor R6. The collector of transistor BQ4 is connected to the emitters of transistors BQ1 and BQ2, respectively. The base of transistor BQ1 is connected to the first output terminal of the current sampling module. The collector of transistor BQ1 is connected to one end of resistor R22 and the first output terminal of the multiplier, respectively. The other end of resistor R22 is connected to the supply voltage. The base of transistor BQ2 is connected to the second output terminal of the current sampling module. The collector of transistor BQ2 is connected to one end of resistor R21 and the second output terminal of the multiplier, respectively. The other end of resistor R21 is connected to the supply voltage. The supply voltage is the LDO output voltage, and the grounding point is E-WB.

[0054] The two analog quantities input to the multiplier are and , the output is ; Use the multiplier to multiply the bus voltage And three-phase current sampling values Perform multiplication operations, The analog value representing the single-phase instantaneous power of the inverter;

[0055]

[0056] Notice: Indicates the peak-to-peak value of single-phase instantaneous power, which is an effective value times.

[0057] Furthermore, the inverter shutdown protection circuit of the present invention further includes a differential-to-single-ended circuit, wherein the two input terminals of the differential-to-single-ended circuit are connected to the two output terminals of the multiplier, and the output terminal of the differential-to-single-ended circuit is connected to the input terminal of the threshold voltage comparison circuit. The differential-to-single-ended circuit is configured to convert the differential voltage output by the multiplier into a single-ended analog voltage and output it to the threshold voltage comparison circuit.

[0058] Further, see Figure 3 The differential-to-single-ended circuit includes an operational amplifier U3D, a non-inverting input terminal of the operational amplifier U3D connected to the first output terminal of the multiplier directly or via a resistor R2, an inverting input terminal of the operational amplifier U3D connected to the second output terminal of the multiplier directly or via a resistor R4, an inverting input terminal of the operational amplifier U3D connected to one end of the resistor R6 and one end of the capacitor C3, the other end of the resistor R6 and the other end of the capacitor C3 connected to the output terminal of the operational amplifier U3D, and the output terminal of the operational amplifier U3D connected to the input terminal of the threshold voltage comparison circuit.

[0059] The non-inverting input terminal of the op amp U3D is connected to one end of the resistor R1 and one end of the capacitor C1, respectively. The other ends of the resistor R1 and the other ends of the capacitor C1 are grounded. The supply voltage of the op amp U3D is the output voltage of the LDO, and the ground is E-WB.

[0060] Further, see Figure 4 The threshold voltage comparison circuit includes a clamping diode ZD1, the cathode of the clamping diode ZD1 is connected to the input end of the threshold voltage comparison circuit and one end of the capacitor C2 respectively, the other end of the capacitor C2 is grounded, and the anode of the clamping diode ZD1 is connected to the base of the gate turn-off switch tube BQ3 of the gate turn-off circuit.

[0061] The threshold voltage comparison circuit is composed of only the clamping diode ZD1, and its inherent threshold voltage , the anode is connected to negative pressure , the output voltage of the differential to single-ended module is V4. When V4- > When V4- < When the clamping diode is not conducting, the output voltage is V6; by selecting the clamping diode threshold voltage with different parameters , you can set the threshold value of the inverter instantaneous power of this protection circuit; the estimated instantaneous power and the clamping diode threshold Compare and exceed the threshold The output is high ; lower than The output is low level .

[0062] Further, see Figure 4 The gate turn-off circuit includes a gate turn-off switch tube BQ3, the base of the gate turn-off switch tube BQ3 is connected to the output end of the threshold voltage comparison circuit directly or via a resistor R3, the base of the gate turn-off switch tube BQ3 is connected to the emitter of the gate turn-off switch tube BQ3 via a resistor R5, the collector of the gate turn-off switch tube BQ3 is connected to the gate of the power switch device of the inverter, and the emitter of the gate turn-off switch tube BQ3 is connected to the negative voltage V6.

[0063] When the base of the gate turn-off switch tube BQ3, that is, the output voltage of the clamping diode ZD1, is greater than V6, the transistors be are turned on, and then ec is turned on, the gate of the power tube IGBT is connected to the negative voltage V6, and the IGBT is turned off; the emitter of the gate turn-off switch tube BQ3 is connected to the negative voltage, and the high level output by the threshold voltage comparison circuit will control the gate turn-off switch tube BQ3 to turn on, pulling the gate of the IGBT to the negative voltage, thereby realizing the negative voltage shutdown of the IGBT gate; the low level output by the threshold voltage comparison circuit will not trigger the gate turn-off switch tube BQ3 to turn on to the negative voltage, and will not affect the normal operation of the IGBT.

[0064] Furthermore, the negative pressure is generated by a negative pressure generating circuit, and the negative pressure generating circuit adopts a charge pump circuit.

[0065] Further, see Figure 4The negative voltage generating circuit includes an excitation source and push-pull transistors Q1 and Q2. The bases of push-pull transistors Q1 and Q2 are connected to the output end of the excitation source, the collector of push-pull transistor Q1 is connected to the supply voltage, the collector of push-pull transistor Q2 is grounded, the emitter of push-pull transistor Q2 and the emitter of push-pull transistor Q1 are both connected to one end of capacitor C4, the other end of capacitor C4 is respectively connected to the cathode of diode D1 and the anode of diode D2, the cathode of diode D2 is grounded, the anode of diode D1 is respectively connected to one end of capacitor C5 and one end of resistor R23, the other end of capacitor C5 and the other end of resistor R23 are grounded. Push-pull transistors Q1 / Q2, diodes D1 / D2, capacitors C4 / C5, and resistor R23 form a charge pump. The excitation source of the present invention is composed of a NE555 circuit, a resistor R18, and a capacitor C16 circuit. The supply voltage of the negative voltage generating circuit of the present invention is the output voltage of the LDO, and the ground is E-WB (ie, the negative pole of the busbar).

[0066] The negative voltage generating circuit disclosed in this embodiment is a charge pump circuit. Of course, the present invention is not limited to the above negative voltage generating circuit, and can also be other negative voltage generating circuits.

[0067] See also Figure 4 In some embodiments, the power switching device is a single-phase IGBT. However, the circuit of the present invention is not limited to being used in single-phase IGBTs. In practical applications, the circuit of the present invention can also be extended to be used in three-phase IGBTs.

[0068] When expanded to three-phase IGBT, the current value of the three phases can be collected and compared with the threshold value. For comparison, if the threshold is exceeded, the three-way gate turn-off circuit will be triggered to pull the gates of the three-phase IGBTs to negative voltage to achieve shutdown; the IGBT can also be replaced with SiC modules, etc.

[0069] See also Figure 5 The working logic flow of the circuit of the present invention is as follows:

[0070] The voltage at the sampling point is obtained by sampling the bus voltage through a series resistor according to a certain voltage division ratio. ;

[0071] The three-phase current sampling sensor is used to sample the three-phase current and obtain ;

[0072] Take power from the bus voltage sampling divider resistor to power the LDO and output the power supply voltage Ua;

[0073] Use the LDO output supply voltage Ua as the supply voltage for the multiplier and current sensor;

[0074] Will and Input to the multiplier circuit to get ;

[0075] Will Input to the clamping diode input, Exceeds the clamping voltage of the clamping diode Output high level signal ;

[0076] Set the high level Drive the IGBT gate to softly turn off transistor Q1 to turn off the IGBT.

[0077] The present invention uses a purely hardware-based multiplier analog circuit to calculate instantaneous power. It also cleverly uses an LDO to generate positive voltage by dividing the voltage of a high-voltage busbar, and a charge pump circuit composed of an NE555 and a diode to generate negative voltage. A clamping diode is used to set the instantaneous power threshold. By adopting the above scheme, the inverter shutdown protection circuit of the present invention operates independently and is not affected by the MCU system. Not only does it not require the participation of the MCU system program to achieve inverter protection, it also does not require the addition of a flyback power supply circuit to provide power. It can completely independently monitor the working status of the inverter. Furthermore, the circuit principle of the present invention is simple and reliable, with low cost and simple implementation. Furthermore, the passive components of the purely hardware circuit have a fast response speed, with a delay time at the PN junction of only nanoseconds, a response speed far exceeding that of the MCU software protection method. Even when the MCU fails, it can still achieve real-time monitoring and protection, greatly improving functional safety.

[0078] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An inverter shutdown protection circuit, characterized in that: include: A bus voltage sampling circuit, wherein the bus voltage sampling circuit is used to sample the inverter bus voltage to obtain a sampled voltage; A current sampling module, which is used to sample the phase current output by the inverter AC side to obtain a sampled current; a multiplier configured to receive the sampled voltage and the sampled current and perform a multiplication operation to obtain instantaneous power; A threshold voltage comparison circuit, wherein the threshold voltage comparison circuit is used to compare the instantaneous power with the threshold value to obtain a level signal; The gate turn-off circuit is used to control the turn-off of the gate turn-off switch tube according to the level signal output by the threshold voltage comparison circuit, thereby controlling the turn-off of the power tube of the inverter.

2. The inverter shutdown protection circuit according to claim 1, wherein: The multiplier includes a transistor BQ1, a transistor BQ2 and a transistor BQ4. The base of the transistor BQ4 is connected to the first voltage dividing point of the bus voltage sampling circuit, the emitter of the transistor BQ4 is grounded directly or via a resistor R6, the collector of the transistor BQ4 is respectively connected to the emitter of the transistor BQ1 and the emitter of the transistor BQ2, the base of the transistor BQ1 is connected to the first output end of the current sampling module, the collector of the transistor BQ1 is respectively connected to one end of the resistor R22 and the first output end of the multiplier, the other end of the resistor R22 is connected to the power supply voltage, the base of the transistor BQ2 is connected to the second output end of the current sampling module, the collector of the transistor BQ2 is respectively connected to one end of the resistor R21 and the second output end of the multiplier, and the other end of the resistor R21 is connected to the power supply voltage.

3. The inverter shutdown protection circuit according to claim 1, wherein: The threshold voltage comparison circuit includes a clamping diode ZD1 , the cathode of the clamping diode ZD1 is connected to the input end of the threshold voltage comparison circuit, and the anode of the clamping diode ZD1 is connected to the base of the gate turn-off switch tube BQ3 of the gate turn-off circuit.

4. The inverter shutdown protection circuit according to claim 3, wherein: The cathode of the clamp diode ZD1 is connected to one end of the capacitor C2 , and the other end of the capacitor C2 is grounded.

5. The inverter shutdown protection circuit according to any one of claims 1 to 4, characterized in that: It also includes a differential-to-single-ended circuit, wherein the two input terminals of the differential-to-single-ended circuit are connected to the two output terminals of the multiplier, and the output terminal of the differential-to-single-ended circuit is connected to the input terminal of the threshold voltage comparison circuit.

6. The inverter shutdown protection circuit according to claim 5, wherein: The differential-to-single-ended circuit includes an operational amplifier U3D, wherein the non-inverting input terminal of the operational amplifier U3D is connected to the first output terminal of the multiplier directly or via a resistor R2, the inverting input terminal of the operational amplifier U3D is connected to the second output terminal of the multiplier directly or via a resistor R4, the inverting input terminal of the operational amplifier U3D is connected to one end of the resistor R6 and one end of the capacitor C3, the other end of the resistor R6 and the other end of the capacitor C3 are connected to the output terminal of the operational amplifier U3D, and the output terminal of the operational amplifier U3D is connected to the input terminal of the threshold voltage comparison circuit.

7. The inverter shutdown protection circuit according to claim 1, 3 or 4, characterized in that: The gate turn-off circuit includes a gate turn-off switch tube BQ3, the collector of the gate turn-off switch tube BQ3 is connected to the gate of the power switch device of the inverter, the base of the gate turn-off switch tube BQ3 is connected to the output end of the threshold voltage comparison circuit directly or via a resistor R3, the base of the gate turn-off switch tube BQ3 is connected to a negative voltage via a resistor R5, and the emitter of the gate turn-off switch tube BQ3 is connected to a negative voltage.

8. The inverter shutdown protection circuit according to claim 7, wherein: The negative voltage is generated by a negative voltage generating circuit, which includes an excitation source and a push-pull transistor Q1 and a push-pull transistor Q2. The base of the push-pull transistor Q1 and the base of the push-pull transistor Q2 are connected to the output end of the excitation source, the collector of the push-pull transistor Q1 is connected to the power supply voltage, the collector of the push-pull transistor Q2 is grounded, the emitter of the push-pull transistor Q2 and the emitter of the push-pull transistor Q1 are both connected to one end of the capacitor C4, the other end of the capacitor C4 is respectively connected to the cathode of the diode D1 and the anode of the diode D2, the cathode of the diode D2 is grounded, the anode of the diode D1 is respectively connected to one end of the capacitor C5 and one end of the resistor R23, the other end of the capacitor C5 and the other end of the resistor R23 are grounded.

9. The inverter shutdown protection circuit according to claim 1, wherein: It also includes a power supply circuit, which includes an LDO module. The LDO module is used to generate a power supply voltage by dividing the voltage of the high-voltage bus to supply power to the current sampling module and the multiplier.

10. The inverter shutdown protection circuit according to claim 1, wherein: The bus voltage sampling circuit includes a first voltage dividing point and a plurality of voltage dividing resistors. The first voltage dividing point is grounded via at least one voltage dividing resistor and is connected to the positive bus electrode of the inverter via at least one voltage dividing resistor.

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