Efficient synchronous rectification BUCK circuit based on silicon carbide MOSFET

Abstract

The invention discloses an efficient synchronous rectification BUCK circuit based on a silicon carbide MOSFET, and the circuit comprises a digital controller, the output end of the digital controller is sequentially connected with a silicon carbide MOSFET driving unit and a DC / DC conversion unit, and the DC / DC conversion unit is connected with an output Vout. The input end of the digital controller is connected with the temperature sensor, the frequency adjusting unit and the self-adaptive dead time adjusting unit. The output Vout is further connected with the digital controller through the SW zero-crossing comparison unit, the overcurrent protection unit and the feedback and compensation network unit. A silicon carbide MOSFET is used as a switching device, the dead time is dynamically adjusted in combination with a frequency-temperature two-parameter mapping algorithm, lossless current detection and overcurrent protection are realized by using a device on-resistor Rds (on), and zero-current turn-off control is realized based on SW node voltage real-time monitoring.

Description

Technical Field

[0001] The present invention relates to a high-efficiency synchronous rectification BUCK circuit based on silicon carbide MOSFET. Background Art

[0002] Existing low-on-resistance systems have gradually evolved from diode rectification to synchronous rectification, introducing low-side MOSFETs. While this reduces conduction losses, it is limited by the physical properties of silicon materials, significantly increasing switching losses at MHz frequencies. Silicon carbide MOSFETs, with their wide bandgap of 2.8eV, can increase the breakdown field strength by a factor of 10, theoretically allowing the device to operate at higher frequencies, helping to reduce the size of passive components (inductors and capacitors) and increase power density. Furthermore, the on-resistance of silicon carbide MOSFETs (e.g., 40mΩ) is much lower than that of silicon-based devices, significantly reducing conduction losses. Furthermore, silicon carbide Schottky diodes have virtually no reverse recovery current, and when used in conjunction with silicon carbide MOSFETs, they can further reduce switching losses and electromagnetic interference (EMI).

[0003] However, despite the obvious theoretical advantages of synchronous rectification technology and silicon carbide MOSFETs, they still face a series of challenges in practical applications:

[0004] 1. Sensitive to drive timing: Silicon carbide MOSFETs have stringent requirements on gate drive circuits and timing. Existing drive solutions are easily affected by parasitic parameters at high frequencies, resulting in drive signal distortion.

[0005] 2. Dead time contradiction: Under high-frequency conditions, the switching speed of silicon carbide MOSFETs increases, shortening the turn-on / off time to tens of nanoseconds. However, the influence of parasitic parameters also increases, which may cause drive signal distortion. If the dead time is too long, it will increase losses; if the dead time is too short, the risk of shoot-through between the upper and lower transistors increases, which may cause current spikes and damage the device.

[0006] 3. Insufficient protection reliability: Overcurrent protection is a core function that ensures safe system operation, extends device life, and meets industry compliance. Since SiC MOSFETs typically have a lower on-resistance (Rds(on)) and a different temperature coefficient than silicon devices, accurate and reliable overcurrent protection is a pressing issue.

[0007] 4. Light-load efficiency degradation: In a synchronous rectifier buck circuit, when the inductor current IL drops to zero during the freewheeling phase, if the synchronous rectifier (low-side silicon carbide MOSFET) is not turned off in time, current will flow in the reverse direction (from the output to the input), resulting in additional losses. Improving circuit efficiency at light loads is also a challenge in practical applications. Summary of the Invention

[0008] To solve the above technical problems, the present invention provides a high-efficiency synchronous rectification BUCK circuit based on silicon carbide MOSFET.

[0009] The present invention is achieved through the following technical solutions.

[0010] The present invention provides a high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET, comprising a digital controller, wherein the output end of the digital controller is sequentially connected to a silicon carbide MOSFET drive unit and a DC / DC conversion unit, and the DC / DC conversion unit is connected to the output Vout; the input end of the digital controller is respectively connected to a temperature sensor, a frequency adjustment unit, and an adaptive dead time adjustment unit, and the output Vout is further connected to the digital controller via an SW zero-crossing comparison unit, an overcurrent protection unit, and a feedback and compensation network unit.

[0011] The DC / DC conversion unit includes a high-voltage side silicon carbide MOSFET Q1 and a low-voltage side silicon carbide MOSFET Q2;

[0012] The silicon carbide MOSFET driving unit includes a first driving unit and a second driving unit. The output end of the first driving unit is connected to the gate of the high-voltage side silicon carbide MOSFET Q1, and the output end of the second driving unit is connected to the gate of the low-voltage side silicon carbide MOSFET Q2.

[0013] The drain of the high-voltage side silicon carbide MOSFET Q1 is connected to the positive electrode of the input voltage Vin, and the source of the high-voltage side silicon carbide MOSFET Q1 is connected to the drain of the low-voltage side silicon carbide MOSFET Q2 and the first end of the power inductor L1; the source of the low-voltage side silicon carbide MOSFET Q2 is grounded, the second end of the power inductor L1 is connected to the positive electrode of the output capacitor group Cout and the load end, and the negative electrode of the output capacitor Cout is grounded.

[0014] The digital controller has a first PWM output terminal HO connected to the input terminal of the first driving unit, and a second PWM output terminal LO connected to the input terminal of the second driving unit.

[0015] The feedback and compensation network unit includes a voltage divider resistor Rfb1, a voltage divider resistor Rfb2, a compensation resistor R1, a compensation resistor R2, compensation capacitors C1-C3, an error amplifier OPA1 and a comparator COMP1;

[0016] A first end of the voltage dividing resistor Rfb1 is connected to the positive electrode of the output capacitor group Cout, a second end of the voltage dividing resistor Rfb1 is connected to a first end of the voltage dividing resistor Rfb2 and the non-inverting input terminal of the error amplifier OPA1, and a second end of the voltage dividing resistor Rfb2 is grounded;

[0017] The compensation capacitor C1 is connected in series with the compensation resistor R1, one end of the compensation capacitor C1 is connected to the first end of the voltage divider resistor Rfb1, and one end of the compensation resistor R1 is connected to the second end of the voltage divider resistor Rfb1;

[0018] The inverting input terminal of the error amplifier OPA1 is connected to a 0.8V voltage reference, and the output terminal is connected to the input terminal of the comparator COMP1 through a compensation resistor R2 and a compensation capacitor C2 connected in parallel. The two ends of the compensation capacitor C3 are connected to the compensation capacitor C2 and the compensation resistor R2 respectively.

[0019] The input end of the adaptive dead time adjustment unit is connected to the frequency signal output end and the temperature sensor signal output end of the digital controller, and the output end is connected to the dead time adjustment port of the digital controller.

[0020] It includes a current limiting resistor RILIM, a first end of which is connected to the source of the low-voltage side silicon carbide MOSFETQ2, and the other end of which is connected to the collector of the MOS transistor T1. The emitter of the collector of the MOS transistor T1 is connected to the output end of the constant current source ILIM and the non-inverting input end of the comparator COMP2; the output end of the comparator COMP2 is connected to the protection signal input end of the digital controller.

[0021] Traditional overcurrent protection typically requires additional current sensors, such as Hall sensors or sampling resistors, which increases cost and circuit complexity. This patented method utilizes the on-resistance (Rds(on)) of silicon carbide MOSFETs to achieve lossless current sensing and overcurrent protection. This fully leverages the physical properties of wide-bandgap semiconductors, offering significant advantages such as simplified circuit design, reduced cost, and improved response speed. It is particularly suitable for high-frequency, high-power density synchronous rectification buck circuits.

[0022] The SW zero-crossing detection unit includes a high-speed comparator COMP3, the non-inverting input terminal of the high-speed comparator COMP3 is connected to the switch node SW, the inverting input terminal is grounded, and the output terminal is connected to the zero-crossing detection port of the digital controller. Under light load conditions, the switching loss of the traditional synchronous rectification BUCK circuit accounts for a large proportion, affecting the overall efficiency. This patent can accurately control the switching action by performing a zero-crossing comparison on the SW node voltage and dynamically detecting the voltage zero crossing point. When the load is light, the synchronous rectifier tube is turned off in time to prevent reverse current from flowing into the low-side silicon carbide MOSFET, thereby reducing losses, reducing heat dissipation requirements, and improving power density.

[0023] The frequency adjustment unit includes a frequency oscillator, a feedforward ramp generator and a frequency adjustment resistor RT; the frequency adjustment end of the frequency oscillator is grounded through the resistor RT, and its clock signal output end is connected to the frequency control port of the digital controller.

[0024] The adjustment method of the adaptive dead time adjustment unit is:

[0025] (1) Real-time acquisition of switching frequency fsw and device junction temperature T j ;

[0026] (2) According to the preset frequency-temperature mapping curve, the optimal dead time (t dead ), ensuring that:

[0027] t dead ≥t off HS+t on LS-t delay driver,

[0028] Where: t off HS is the high-voltage side tube shut-off time, t on LS is the opening time of the low-pressure side pipe, t delay driver is the transmission delay of the driving circuit;

[0029] (3) Ensure that the dead time is shortened under high-frequency conditions to reduce conduction losses, and that the dead time is extended under low-frequency or high-temperature conditions to avoid the risk of shoot-through.

[0030] The dead time t of the adaptive dead time adjustment unit dead The following relationship is satisfied:

[0031]

[0032] Where: k1 is the frequency-related coefficient, k2 is the temperature compensation coefficient, k3 is the minimum dead time reference, T j is the device junction temperature.

[0033] The beneficial effects of the present invention are: by adopting silicon carbide MOSFET as the switching device, combining the frequency-temperature dual parameter mapping algorithm to dynamically adjust the dead time, using the device on-resistance Rds(on) to achieve lossless current detection and overcurrent protection, and realizing zero-current shutdown control based on real-time monitoring of the SW node voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a schematic diagram of the principle of the present invention;

[0035] Figure 2 Schematic diagram of the circuit structure of the present invention; DETAILED DESCRIPTION

[0036] The technical solution of the present invention is further described below, but the scope of protection claimed is not limited to the description.

[0037] A high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET includes a digital controller, wherein the output end of the digital controller is sequentially connected to a silicon carbide MOSFET drive unit and a DC / DC conversion unit, and the DC / DC conversion unit is connected to an output Vout; the input end of the digital controller is respectively connected to a temperature sensor, a frequency adjustment unit, and an adaptive dead time adjustment unit, and the output Vout is also respectively connected to the digital controller through an SW zero-crossing comparison unit, an overcurrent protection unit, and a feedback and compensation network unit;

[0038] The DC / DC conversion unit includes a high-voltage side silicon carbide MOSFET Q1 and a low-voltage side silicon carbide MOSFET Q2;

[0039] The silicon carbide MOSFET driving unit includes a first driving unit and a second driving unit. The output end of the first driving unit is connected to the gate of the high-voltage side silicon carbide MOSFET Q1, and the output end of the second driving unit is connected to the gate of the low-voltage side silicon carbide MOSFET Q2.

[0040] The drain of the high-voltage side silicon carbide MOSFET Q1 is connected to the positive electrode of the input voltage Vin, and the source of the high-voltage side silicon carbide MOSFET Q1 is connected to the drain of the low-voltage side silicon carbide MOSFET Q2 and the first end of the power inductor L1; the source of the low-voltage side silicon carbide MOSFET Q2 is grounded, the second end of the power inductor L1 is connected to the positive electrode of the output capacitor group Cout and the load end, and the negative electrode of the output capacitor Cout is grounded.

[0041] The digital controller has a first PWM output terminal HO connected to the input terminal of the first driving unit, and a second PWM output terminal LO connected to the input terminal of the second driving unit.

[0042] The feedback and compensation network unit includes a voltage divider resistor Rfb1, a voltage divider resistor Rfb2, a compensation resistor R1, a compensation resistor R2, compensation capacitors C1-C3, an error amplifier OPA1 and a comparator COMP1;

[0043] A first end of the voltage dividing resistor Rfb1 is connected to the positive electrode of the output capacitor group Cout, a second end of the voltage dividing resistor Rfb1 is connected to a first end of the voltage dividing resistor Rfb2 and the non-inverting input terminal of the error amplifier OPA1, and a second end of the voltage dividing resistor Rfb2 is grounded;

[0044] The compensation capacitor C1 is connected in series with the compensation resistor R1, one end of the compensation capacitor C1 is connected to the first end of the voltage divider resistor Rfb1, and one end of the compensation resistor R1 is connected to the second end of the voltage divider resistor Rfb1;

[0045] The inverting input terminal of the error amplifier OPA1 is connected to a 0.8V voltage reference, and the output terminal is connected to the input terminal of the comparator COMP1 through a compensation resistor R2 and a compensation capacitor C2 connected in parallel. The two ends of the compensation capacitor C3 are connected to the compensation capacitor C2 and the compensation resistor R2 respectively.

[0046] The input of the adaptive dead-time adjustment unit is connected to the frequency signal output and temperature sensor signal output of the digital controller, and the output is connected to the dead-time adjustment port of the digital controller. The adaptive dead-time adjustment unit dynamically adjusts the dead-time by combining a frequency-temperature dual-parameter mapping algorithm, effectively resolving the conflict between dead-time and efficiency and reliability in high-frequency silicon carbide MOSFET synchronous rectification buck circuits. This adjustment method avoids shoot-through current and voltage overshoot, extends device life, significantly improves system performance, and reduces design complexity.

[0047] It includes a current limiting resistor RILIM, a first end of which is connected to the source of the low-voltage side silicon carbide MOSFETQ2, and the other end of which is connected to the collector of the MOS transistor T1. The emitter of the collector of the MOS transistor T1 is connected to the output end of the constant current source ILIM and the non-inverting input end of the comparator COMP2; the output end of the comparator COMP2 is connected to the protection signal input end of the digital controller.

[0048] Silicon carbide MOSFETs, with their high frequency, low loss, high-temperature stability, and excellent reverse recovery characteristics, offer groundbreaking performance improvements for synchronous rectification buck circuits. As switching transistors, they not only optimize efficiency and power density but also simplify circuit design and enhance system reliability, laying a key technical foundation for the industrial application of high-power density power supplies. This patented solution leverages the physical properties of silicon carbide MOSFETs, combining synchronous rectification with digital control technologies to achieve an innovative design for efficient, compact, and highly reliable power supply systems.

[0049] The SW zero-crossing detection unit includes a high-speed comparator COMP3, a non-inverting input terminal of the high-speed comparator COMP3 is connected to the switch node SW, an inverting input terminal is grounded, and an output terminal is connected to the zero-crossing detection port of the digital controller.

[0050] The frequency adjustment unit includes a frequency oscillator, a feedforward ramp generator and a frequency adjustment resistor RT; the frequency adjustment end of the frequency oscillator is grounded through the resistor RT, and its clock signal output end is connected to the frequency control port of the digital controller.

[0051] described since The adjustment method of the adaptive dead time adjustment unit is:

[0052] (1) Real-time acquisition of switching frequency fsw and device junction temperature Tj ;

[0053] (2) According to the preset frequency-temperature mapping curve, the optimal dead time (t dead ), ensuring that:

[0054] t dead ≥t off HS+t on LS-t delay driver,

[0055] Where: t off HS is the high-voltage side tube shut-off time, t on LS is the opening time of the low-pressure side pipe, t delay driver is the transmission delay of the driving circuit;

[0056] (3) Ensure that the dead time is shortened under high-frequency conditions to reduce conduction losses, and that the dead time is extended under low-frequency or high-temperature conditions to avoid the risk of shoot-through.

[0057] The dead time t of the adaptive dead time adjustment unit dead The following relationship is satisfied:

[0058]

[0059] Where: k1 is the frequency-related coefficient, k2 is the temperature compensation coefficient, k3 is the minimum dead time reference, and Tj is the device junction temperature.

[0060] The structural diagram of the present invention is as follows Figure 1 As shown, it consists of a digital controller, a silicon carbide MOSFET drive unit, a DC / DC conversion unit, a SW node zero-crossing detection unit, an overcurrent protection unit, an adaptive dead time adjustment unit, a feedback and compensation network unit, and a frequency adjustment unit.

[0061] The DC / DC converter unit consists of a high-side SiC MOSFET (Q1), a low-side SiC MOSFET (Q2), a power inductor (L1), and an output capacitor (Cout). By controlling the on / off switching of Q1 and Q2, buck voltage reduction and synchronous rectification are achieved, improving circuit efficiency. By replacing traditional MOSFETs with SiC MOSFETs, leveraging their high frequency, low loss, high-temperature stability, and excellent reverse recovery characteristics, this not only optimizes efficiency and power density, but also simplifies circuit design and enhances system reliability.

[0062] The silicon carbide MOSFETs (Q1, Q2) are Wolfspeed C3M0065100K, with an on-resistance Rds(on) of 65mΩ (25°C) and a Qg of 38nC.

[0063] Adaptive Dead-Time Adjustment Unit: This unit directly reads the current switching frequency fsw and device temperature through the PWM logic control unit. Using a frequency-temperature dual-parameter mapping algorithm, it dynamically adjusts the dead-time (10ns to 100ns) according to a preset curve. When the switching frequency increases from 100kHz to MHz, the switching speed of the SiC MOSFET increases, shortening the turn-on / off time to tens of nanoseconds. At this point, the influence of parasitic parameters (such as gate loop inductance and junction capacitance) intensifies, potentially causing drive signal distortion. The impact of junction temperature fluctuations must also be considered. A fixed dead-time cannot adapt to rapidly changing switching transients. Therefore, adaptively varying the dead-time with the switching frequency is a key technology for achieving efficient and reliable operation.

[0064] Adaptive dead time t dead With the switching frequency f sw The relationship can be approximately expressed as:

[0065]

[0066] in:

[0067] k1 is the frequency-related coefficient;

[0068] k2 is 0.2ns / ℃ (temperature compensation coefficient);

[0069] k3 = 10ns (minimum dead time reference);

[0070] T j is the device junction temperature (unit: °C).

[0071] At the same time, the ideal dead time t dead Need to meet:

[0072] t dead ≥t off HS+t on LS-t delay driver

[0073] in:

[0074] t off HS is the high-pressure side tube shut-off time;

[0075] t on LS is the opening time of the low-pressure side pipe;

[0076] t delay driver is the transmission delay of the driver circuit.

[0077] Dynamically optimizing and adaptively adjusting the dead time based on the switching frequency can balance the conflicting demands of avoiding shoot-through current and reducing conduction loss, significantly improving system performance and reducing design complexity.

[0078] Overcurrent protection unit: The overcurrent protection unit consists of a current-limiting resistor RILIM, a current-limiting capacitor CILIM, a constant current source ILIM, a MOSFET T1, and a current-limiting comparator COMP2. When the PWM is off (LO is high), the unit uses the low-side silicon carbide MOSFET on-resistance Rds(on) to achieve lossless current detection. The constant current source ILIM provides a reference current that flows through the current-limiting resistor RILIM to program the current limit threshold. If the voltage at the constant current source pin is lower than GND, the current-limiting comparator COMP2 prevents further SW pulses, thereby achieving overload or short-circuit protection. At a junction temperature of 27°C, the ILIM current sensed by Rds(on) is 200μA and includes a temperature coefficient of +4500ppm / °C to track the changes in the low-side MOSFET's Rds(on) with temperature. The relationship between RILIM and the output current Iout satisfies the following equation:

[0079]

[0080] in:

[0081] ΔI L is the peak-to-peak value of the inductor L1 current;

[0082] R ds (on) is the on-resistance of the low-side SiC MOSFET;

[0083] The current limiting capacitor CILIM is crucial for the normal operation of the valley current limiting circuit. The appropriate capacitance value should be selected so that the time constant R ILIM *C ILIM About 6ns.

[0084] SW Zero-Crossing Comparator: The SW zero-crossing comparator consists of comparator COMP3. By sensing the voltage at the SW node using the zero-crossing comparator to detect reverse current flow, the low-side MOSFET is turned off. A high-speed comparator, such as the TLV301 with a response time of less than 20ns, is used to monitor the SW (switch node) voltage in real time. When the voltage crosses zero, a shutdown signal is output to the digital controller, which in turn turns off the low-side MOSFET, preventing reverse current from flowing into the low-side SiC MOSFET.

[0085] Feedback and compensation network unit: In a synchronous rectification buck circuit based on silicon carbide MOSFETs, the design of the feedback and compensation network directly affects the system's stability, dynamic response accuracy, and anti-interference capability. The feedback network uses a resistor divider network (Rfb1 and Rfb2) to sample the output voltage Vout. The output voltage and the sampling resistor satisfy the following relationship:

[0086]

[0087] The compensation network uses a Type III compensator, consisting of op amp OPA1, Rfb1, R1, C1, R2, C2, and C3. It has three poles and two zeros to improve low-frequency gain and high-frequency noise suppression. The op amp can be the OPA2188, with a gain-bandwidth product of up to 10 MHz.

[0088] Driver Unit: The SiC MOSFET driver unit consists of driver unit 1 and driver unit 2. The driver unit inputs are connected to the digital controller's PWM signals HO and LO, respectively, and the outputs are connected to the high-side SiC MOSFET 1Q1 and the low-side SiC MOSFET 2Q2, respectively. The driver unit converts the digital controller's PWM signals (HO and LO) into power signals sufficient to drive the SiC MOSFETs. The driver unit can utilize dedicated SiC MOSFET driver chips, such as Infineon's 1ED3321MC12N and Zhanxin Electronics' IVC01A02. These chips offer advantages such as fast switching speed, low propagation delay, strong drive capability, and high common-mode transient immunity (CMTI).

[0089] Frequency Adjustment Unit: This unit consists of a frequency oscillator, a feedforward ramp generator, and a frequency adjustment resistor (RT). It provides a clock signal (Clock) to the PWM logic control unit, with a frequency range up to the MHz level. Adjusting the resistance of RT adjusts the switching frequency.

[0090] Experiments show that this solution can achieve a peak efficiency of 97.6% at a switching frequency of 1 MHz. Compared with the prior art, the present invention achieves significant improvements in both switching frequency and efficiency.

Claims

1. A high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET, characterized by: It includes a digital controller, the output end of the digital controller is connected to the silicon carbide MOSFET drive unit and the DC / DC conversion unit in sequence, and the DC / DC conversion unit is connected to the output Vout; the input end of the digital controller is respectively connected to the temperature sensor, the frequency adjustment unit, and the adaptive dead time adjustment unit, and the output Vout is also connected to the digital controller through the SW zero-crossing comparison unit, the overcurrent protection unit, and the feedback and compensation network unit; The DC / DC conversion unit includes a high-voltage side silicon carbide MOSFET Q1 and a low-voltage side silicon carbide MOSFET Q2; The silicon carbide MOSFET driving unit includes a first driving unit and a second driving unit. The output end of the first driving unit is connected to the gate of the high-voltage side silicon carbide MOSFET Q1, and the output end of the second driving unit is connected to the gate of the low-voltage side silicon carbide MOSFET Q2.

2. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The drain of the high-voltage side silicon carbide MOSFET Q1 is connected to the positive electrode of the input voltage Vin, and the source of the high-voltage side silicon carbide MOSFET Q1 is connected to the drain of the low-voltage side silicon carbide MOSFET Q2 and the first end of the power inductor L1; the source of the low-voltage side silicon carbide MOSFET Q2 is grounded, the second end of the power inductor L1 is connected to the positive electrode of the output capacitor group Cout and the load end, and the negative electrode of the output capacitor Cout is grounded.

3. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The digital controller has a first PWM output terminal HO connected to the input terminal of the first driving unit, and a second PWM output terminal LO connected to the input terminal of the second driving unit.

4. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The feedback and compensation network unit includes a voltage divider resistor Rfb1, a voltage divider resistor Rfb2, a compensation resistor R1, a compensation resistor R2, compensation capacitors C1-C3, an error amplifier OPA1 and a comparator COMP1; A first end of the voltage dividing resistor Rfb1 is connected to the positive electrode of the output capacitor group Cout, a second end of the voltage dividing resistor Rfb1 is connected to a first end of the voltage dividing resistor Rfb2 and the non-inverting input terminal of the error amplifier OPA1, and a second end of the voltage dividing resistor Rfb2 is grounded; The compensation capacitor C1 is connected in series with the compensation resistor R1, one end of the compensation capacitor C1 is connected to the first end of the voltage divider resistor Rfb1, and one end of the compensation resistor R1 is connected to the second end of the voltage divider resistor Rfb1; The inverting input terminal of the error amplifier OPA1 is connected to a 0.8V voltage reference, and the output terminal is connected to the input terminal of the comparator COMP1 through a compensation resistor R2 and a compensation capacitor C2 connected in parallel. The two ends of the compensation capacitor C3 are connected to the compensation capacitor C2 and the compensation resistor R2 respectively.

5. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The input end of the adaptive dead time adjustment unit is connected to the frequency signal output end and the temperature sensor signal output end of the digital controller, and the output end is connected to the dead time adjustment port of the digital controller.

6. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: It includes a current limiting resistor RILIM, a first end of which is connected to the source of the low-voltage side silicon carbide MOSFETQ2, and the other end of which is connected to the collector of the MOS transistor T1. The emitter of the collector of the MOS transistor T1 is connected to the output end of the constant current source ILIM and the non-inverting input end of the comparator COMP2; the output end of the comparator COMP2 is connected to the protection signal input end of the digital controller.

7. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The SW zero-crossing detection unit includes a high-speed comparator COMP3, a non-inverting input terminal of the high-speed comparator COMP3 is connected to the switch node SW, an inverting input terminal is grounded, and an output terminal is connected to the zero-crossing detection port of the digital controller.

8. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The frequency adjustment unit includes a frequency oscillator, a feedforward ramp generator and a frequency adjustment resistor RT; the frequency adjustment end of the frequency oscillator is grounded through the resistor RT, and its clock signal output end is connected to the frequency control port of the digital controller.

9. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 1, characterized in that: The adjustment method of the adaptive dead time adjustment unit is: (1) Real-time acquisition of switching frequency fsw and device junction temperature T j ; (2) According to the preset frequency-temperature mapping curve, the optimal dead time (t dead ), ensuring that: t dead ≥t off HS+t on LS-t delay driver, Where: t off HS is the high-voltage side tube shut-off time, t on LD is the opening time of the low-pressure side pipe, t delay driver is the transmission delay of the driving circuit; (3) Ensure that the dead time is shortened under high-frequency conditions to reduce conduction losses, and that the dead time is extended under low-frequency or high-temperature conditions to avoid the risk of shoot-through.

10. The high-efficiency synchronous rectification buck circuit based on silicon carbide MOSFET according to claim 9, characterized in that: The dead time t of the adaptive dead time adjustment unit dead The following relationship is satisfied: Where: k1 is the frequency-related coefficient, k2 is the temperature compensation coefficient, k3 is the minimum dead time reference, T j is the device junction temperature.

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