On-off state and abnormal behavior on-line monitoring method for synchronous rectification MOSFET of power supply system

Abstract

The invention relates to an on-line monitoring method for the on-off state and abnormal behavior of a synchronous rectification MOSFET of a power system. According to the method, a drain-source voltage VDS signal and a drain current Isd signal of a synchronous rectification MOSFET are collected in the working process of a system, and on-line monitoring is conducted on the on-off state and the abnormal state of the MOSFET. The method specifically comprises the following steps: conducting state monitoring: when VDS is smaller than or equal to a conducting judgment threshold value, judging to be conducted, and otherwise, judging to be turned off; monitoring an oscillation state, and judging switch oscillation when the VDS generates multiple complete oscillations in a set time window; early turn-off monitoring is carried out, early turn-off is judged according to whether I sd is higher than a threshold value or not during turn-off in the DCM mode, and early turn-off is judged according to the current descending trend and zero intersection point deviation in the CCM mode; withstand voltage monitoring: when the VDS transient peak value exceeds the rated withstand voltage or margin of the device, determining that the device is unsafe; and mis-opening monitoring: in the DCM mode, when the VDS is close to the opening threshold value during the logic turn-off period, determining that the mis-opening risk exists. The method can improve the reliability of the power supply system.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of power electronics, in particular to a method for online monitoring of switching state and abnormal behavior of synchronous rectification MOSFET of a power supply system. BACKGROUND

[0002] In a switching power supply system, the improvement of power conversion efficiency has always been the focus of industry research. Synchronous rectification (SR) technology, as a method of replacing traditional diodes with metal-oxide-semiconductor field-effect transistors (MOSFETs) to reduce rectification loss, has been widely used in various DC-DC converters, especially in Flyback topology.

[0003] In practical applications, the control of synchronous rectification is generally based on the waveform of MOSFET drain-source voltage (VDS). When the primary side power tube is turned off, the body diode of the secondary side synchronous rectification MOSFET is first turned on, and after a delay, the synchronous rectification MOSFET channel is turned on when the VDS voltage reaches the turn-on threshold (Vthon). After being turned on, the VDS voltage is approximately the product of the drain-source current Isd and the on-resistance Rds(on) Isd x Rds(on), and it decreases as the current decreases; when the voltage drops to the turn-off threshold (Vthoff), the synchronous rectification MOSFET is turned off.

[0004] However, in actual power supply systems, the VDS waveform is affected by circuit topology, working mode (such as discontinuous mode DCM / continuous mode CCM), parasitic parameters, and load conditions, and may have problems such as turn-on / turn-off oscillation, premature turn-off, resonance false triggering, voltage spikes, etc. These problems can cause poor system reliability, increased rectification loss, false turn-on of the synchronous rectification MOSFET, and in severe cases, can cause the power supply system to fail. However, the identification of these problems currently relies mainly on the experience of technical personnel, and there is a lack of quantifiable detection methods and automated monitoring means, resulting in a large subjective nature of the evaluation results, which can easily lead to missed or false judgments, and can only be analyzed after the fact, unable to effectively identify and monitor the above abnormal situations online, posing a potential threat to the operational safety and reliability of the power supply system.

[0005] Therefore, there is an urgent need for a method for online monitoring of the switching state and abnormal behavior of the synchronous rectification MOSFET of the power supply system, in order to guide the design and verification of the synchronous rectification circuit, and to improve the operational reliability of the power supply system while ensuring its efficiency. SUMMARY

[0006] The present application aims at the problem of lacking of unified judgment of synchronous rectification MOSFET switch state and abnormal behavior in prior art, and provides an online monitoring method for switch state and abnormal behavior of synchronous rectification MOSFET of a power supply system.

[0007] To achieve the above-mentioned purpose, the present application provides an online monitoring method for switch state and abnormal behavior of synchronous rectification MOSFET of a power supply system, which comprises:

[0008] During the working process of the power supply system, the drain-source voltage VDS signal and the drain current Isd signal of the synchronous rectification MOSFET are collected, and the switch state of the synchronous rectification MOSFET is monitored online based on the VDS signal and the Isd signal;

[0009] The monitoring specifically comprises:

[0010] Conduction state monitoring: when VDS is less than or equal to the conduction judgment threshold voltage of the synchronous rectification MOSFET, it is determined that the synchronous rectification MOSFET is in the conduction state; otherwise, it is in the turn-off state;

[0011] Oscillation state monitoring: when VDS occurs complete oscillation multiple times within a set time window, it is determined that the synchronous rectification MOSFET appears turn-on / turn-off oscillation phenomenon;

[0012] Early turn-off monitoring: in the discontinuous mode DCM, whether early turn-off occurs is determined according to whether the drain current Isd at the turn-off of the synchronous rectification MOSFET is greater than a preset turn-off judgment threshold; in the continuous mode CCM, whether early turn-off occurs is determined by detecting the deviation of the current drop trend and the current zero-crossing point at the turn-off;

[0013] Voltage withstand monitoring: when the measured VDS transient voltage peak value exceeds the rated voltage withstand of the selected synchronous rectification MOSFET or a preset margin, it is determined that the switch process does not meet the safety requirements of the device;

[0014] False turn-on monitoring: in the discontinuous mode DCM, when the difference between the VDS signal of the resonance valley bottom and the opening threshold Vthon of the synchronous rectification MOSFET is less than a preset voltage margin within the logical timing of the turn-off state of the synchronous rectification MOSFET, it is determined that there is a false turn-on risk in the synchronous rectification circuit.

[0015] Preferably, the conduction state monitoring specifically comprises:

[0016] The collected VDS signal is subjected to low-pass filtering to eliminate high-frequency noise interference; wherein the cut-off frequency of the low-pass filtering is not more than 1 / 2 of the switching frequency of the synchronous rectification MOSFET;

[0017] The filtered VDS signal is continuously sampled, and the voltage value of each sampling point is compared with the turn-on determination threshold voltage of the synchronous rectification MOSFET;

[0018] When it is monitored that the VDS of the continuous multiple sampling points is less than or equal to the turn-on determination threshold voltage, it is determined that the synchronous rectification MOSFET is in the turn-on state;

[0019] Otherwise, it is determined that the synchronous rectification MOSFET is in the turn-off state.

[0020] Preferably, the oscillation state monitoring specifically includes:

[0021] The number of times that the VDS signal continuously crosses the turn-on determination threshold value and the turn-off determination threshold value to form the complete oscillation in the set time window is recorded;

[0022] When the number of times exceeds a preset threshold value, it is determined that the synchronous rectification MOSFET appears turn-on / turn-off oscillation;

[0023] Wherein, the continuous crossing of the turn-on determination threshold value and the turn-off determination threshold value to form the complete oscillation specifically is:

[0024] The process that the VDS signal rises from below the turn-on determination threshold value to above the turn-on determination threshold value and then falls below the turn-off determination threshold value is a complete oscillation; or, the process that the VDS signal falls from above the turn-on determination threshold value to below the turn-on determination threshold value and then rises above the turn-on determination threshold value is a complete oscillation.

[0025] Preferably, the early turn-off monitoring specifically includes:

[0026] In the discontinuous mode DCM, the Isd signal at the turn-off time of the synchronous rectification MOSFET is collected and compared with a preset turn-off determination threshold value, and when the Isd is greater than the preset turn-off determination threshold value, it is determined that early turn-off occurs;

[0027] In the continuous mode CCM, the falling curve of the Isd during turn-off is fitted, and the predicted current zero-crossing point obtained by fitting is calculated, and the time sequence deviation of the predicted current zero-crossing point and the actual current zero-crossing point is calculated; when the time sequence deviation exceeds a preset deviation, it is determined that early turn-off occurs.

[0028] Preferably, the withstand voltage monitoring specifically includes:

[0029] The transient voltage peak value of the VDS signal is collected;

[0030] comparing the transient voltage peak value with a rated voltage withstand or margin threshold of the synchronous rectification MOSFET;

[0031] outputting a voltage overrun alarm and recording the peak duration when the transient peak value exceeds the rated voltage withstand or margin threshold.

[0032] Further preferably, when the transient peak value exceeds the rated voltage withstand or margin threshold, the method further comprises: protecting the power supply system;

[0033] The method of protecting the power supply system specifically comprises one or more of: shutdown protection, voltage regulation protection, switching regulation protection, or system redundancy start protection.

[0034] The shutdown protection specifically comprises: turning off the synchronous rectification MOSFET to cut off the load current.

[0035] The voltage regulation protection specifically comprises: reducing the input voltage and / or output voltage to reduce the voltage stress on the synchronous rectification MOSFET.

[0036] The switching regulation protection specifically comprises: reducing the switching frequency or on-duty ratio of the synchronous rectification MOSFET, thereby reducing the transient peak value of VDS.

[0037] The system redundancy start protection specifically comprises: switching the power supply system to a backup circuit to maintain the safe operation of the power supply system.

[0038] Preferably, the sampling rate of the VDS signal and the Isd signal is not less than 10 times the system switching frequency.

[0039] Preferably, when any of the following situations is detected: the synchronous rectification MOSFET exhibits turn-on / shut-off oscillation phenomenon, premature shut-off, the switching process does not meet the safety requirements of the device, or there is a risk of false turn-on, it is determined that a switching state abnormal event is detected.

[0040] The type, occurrence time, and corresponding signal parameters of the switching state abnormal event are stored in a non-volatile memory and output to an external controller through a communication interface.

[0041] The power supply system synchronous rectification MOSFET switch state and abnormal behavior online monitoring method provided by the embodiment of the application can realize systematic online monitoring of the turn-on state, turn-off state and abnormal behavior of the synchronous rectification MOSFET based on the joint analysis of the VDS voltage waveform and the Isd current waveform, and realizes quantifiable, repeatable, systematic, standardized monitoring and objective analysis. The method can not only identify and effectively evaluate the abnormality in real time during the operation of the power supply system, but also provide an objective basis for the design, debugging and verification of the synchronous rectification circuit, thereby greatly improving the safety and reliability of the power supply system while ensuring the efficient operation of the power supply system. BRIEF DESCRIPTION OF DRAWINGS

[0042] Figure 1 The power supply system synchronous rectification MOSFET typical application circuit provided by the embodiment of the application is shown in the figure.

[0043] Figure 2 The signal waveform diagram of the drain-source voltage VDS and the drain current Isd of the secondary side synchronous rectification MOSFET in the power supply system after the primary side power tube is turned off is shown in the figure.

[0044] Figure 3 The VDS waveform schematic diagram in the DCM mode of the power supply system provided by the embodiment of the application is shown in the figure. DETAILED DESCRIPTION

[0045] The technical solutions of the application will be further described in detail below with reference to the accompanying drawings and embodiments.

[0046] The power supply system synchronous rectification MOSFET switch state and abnormal behavior online monitoring method provided by the embodiment of the application is shown in the figure.

[0047] Figure 1 The power supply system synchronous rectification MOSFET typical application circuit provided by the embodiment of the application is shown in the figure. Figure 2 The signal waveform diagram of the drain-source voltage VDS and the drain current Isd of the secondary side synchronous rectification MOSFET in the power supply system after the primary side power tube is turned off is shown in the figure. Figure 3 The VDS waveform schematic diagram in the DCM mode of the power supply system provided by the embodiment of the application is shown in the figure. Figures 1-3 The technical solutions of the application will be further described in detail below with reference to the accompanying drawings and embodiments.

[0048] First, as shown in the figure, Figure 1The typical application circuit of the power system synchronous rectification MOSFET is shown. The AC input voltage is rectified by the rectifier bridge, and the DC bus voltage is formed under the filtering action of the bus capacitor. The DC voltage drives the power MOSFET through the pulse width modulation (PWM) controller to control the high-frequency transformer, so as to realize power transmission and voltage conversion. Figure 1 In the middle, the synchronous rectification MOSFET is on the secondary side, and the diode form is used to simplify the representation (at A, K), in which the diode symbol corresponds to the inherent body diode characteristics of the MOSFET.

[0049] On the secondary side of the transformer, the output voltage end is connected in parallel with the filter capacitor and the load. Unlike the traditional rectification method using Schottky diodes, the synchronous rectification MOSFET is used on the secondary side to replace the traditional Schottky diode as the rectifier device. The source of the synchronous rectification MOSFET is connected to the ground, and the drain is connected to one end of the secondary winding of the transformer. The output end obtains current through the body diode of the synchronous rectification MOSFET and the on-state conduction path. The gate of the synchronous rectification MOSFET is controlled by a special driving circuit or an inductive circuit, so that it can realize energy transmission with low on-state resistance in the conduction interval, thereby significantly reducing the rectification loss.

[0050] Compared with diode rectification, the synchronous rectification topology has the advantages of low conduction loss and high efficiency. However, the switching state is affected by the circuit topology, parasitic parameters, load conditions, etc., and may have problems such as false turn-on, premature turn-off or oscillation, etc. Therefore, the switching process of the synchronous rectification MOSFET needs to be monitored and optimized.

[0051] Taking the flyback converter in discontinuous mode (DCM) as an example, Figure 2 The VDS voltage and Isd current waveforms of the secondary side synchronous rectification MOSFET after the primary side power tube is turned off. After the primary side power tube is turned off, the body diode of the secondary side synchronous rectification MOSFET is turned on first, and the VDS rises to the opening threshold Vthon of the synchronous rectification MOSFET. After a period of delay, the control circuit turns on the gate, and the synchronous rectification MOSFET is turned on. When the synchronous rectification is turned on, the VDS voltage is Isd×Rds(on), and as Isd decreases, Isd×Rds(on) also slowly decreases, and when it decreases to the turn-off threshold Vthoff, the synchronous rectification is turned off.

[0052] In the DCM mode of the actual power supply system, the VDS waveform of the ideal synchronous rectification MOSFET satisfies the following characteristics: no repeated jump occurs in the turn-on and turn-off process of the synchronous rectification MOSFET, thereby avoiding oscillation; after the synchronous rectification MOSFET is turned off, the current flowing through the body diode is small, which is beneficial to improving the system efficiency; the resonant voltage of VDS is always lower than the opening threshold Vthon, and sufficient margin is left to effectively prevent false opening; at the same time, the peak amplitude of VDS is low, which can ensure the working reliability of the synchronous rectification MOSFET. Figure 3 That is, a schematic diagram of a relatively ideal VDS waveform in the DCM mode of the power supply system.

[0053] The switching state and abnormal behavior online monitoring method of the synchronous rectification MOSFET of the power supply system provided by the embodiment of the application can systematically and online monitor the turn-on state, turn-off state and abnormal behavior of the synchronous rectification MOSFET.

[0054] Considering that the VDS and Isd signals change very quickly in the switching state monitoring of the synchronous rectification MOSFET, especially the sharp peaks or oscillations that may occur in the turn-on and turn-off instants, the sampling rate of the VDS signal and the Isd signal needs to be specified accordingly. If the sampling rate is too low, the collected signal may not accurately reflect the transient characteristics, resulting in missed judgment or false judgment of the switching state and abnormal behavior. The sampling rate is set to not less than 10 times the system switching frequency in the application, which can ensure that enough data points are obtained in each switching cycle, so as to accurately capture the rapid changes of VDS and Isd, including the turn-on / turn-off transient, voltage peak, oscillation times and other key information. This not only improves the accuracy of the switching state determination, but also enhances the detection capability of the abnormal behavior (such as premature turn-off, oscillation or overvoltage), ensuring that the online monitoring result is reliable and comprehensive.

[0055] The switching state monitoring and abnormal analysis of the application specifically includes:

[0056] First, turn-on state monitoring: when VDS is less than or equal to the turn-on determination threshold voltage of the synchronous rectification MOSFET, it is determined that the synchronous rectification MOSFET is in the turn-on state; otherwise, it is in the turn-off state.

[0057] The specific process can be:

[0058] Step 11, low-pass filtering the collected VDS signal to eliminate high-frequency noise interference;

[0059] Since in the power supply system, the VDS signal may be affected by switching peaks, electromagnetic interference or other high-frequency noise, which may lead to false judgment of the state of the synchronous rectification MOSFET. Low-pass filtering can smooth the signal and only retain meaningful low-frequency changes.

[0060] The selection of the filtering frequency can be determined according to the system switching frequency (i.e. the switching frequency of the primary side power switch tube) f sw For example, if the system switching frequency is 100 kHz, the low-pass filter cutoff frequency can be selected at fc≈0.1×f sw = about 10 kHz, only keeping the low-frequency on / off signal changes and removing the peak noise above 10 kHz. If the system oscillation frequency or resonance frequency is higher, the cutoff frequency can also be appropriately increased, but the cutoff frequency of the low-pass filtering process should not exceed 1 / 2 of the switching frequency of the synchronous rectification MOSFET.

[0061] Step 12, continuously sampling the filtered VDS signal and comparing the voltage value of each sampling point with the turn-on judgment threshold voltage of the synchronous rectification MOSFET;

[0062] Specifically, the turn-on judgment threshold is the VDS voltage value used to determine that the MOSFET has been fully turned on, which can usually be obtained from the "turn-on voltage drop VDS(on)" in the device parameter manual.

[0063] For power MOSFETs, the turn-on voltage drop is usually in the range of several tens of mV to about 100 mV. In actual applications, the typical value of VDS measured at the rated current can be taken as the threshold value, for example, 50 mV-100 mV.

[0064] Step 13, when it is monitored that the VDS of the continuous multiple sampling points is less than or equal to the turn-on judgment threshold voltage, it is determined that the synchronous rectification MOSFET is in the on state; otherwise, it is determined that the synchronous rectification MOSFET is in the off state.

[0065] Specifically, multiple sampling points are taken for judgment, which aims to avoid misjudgment of the on state due to transient peaks or occasional noise.

[0066] For example, if the sampling frequency is 1 MHz (i.e. sampling once per microsecond), the on state is maintained for at least 5 μs before being recognized as a true on state, in which case VDS obtained from 5 consecutive sampling points should be ≤ the turn-on judgment threshold voltage.

[0067] Second, oscillation state monitoring: when VDS occurs complete oscillation multiple times within a set time window, it is determined that the synchronous rectification MOSFET has on / off oscillation phenomenon.

[0068] The specific process can be:

[0069] Step 21, recording the number of times that the VDS signal continuously crosses the turn-on judgment threshold and the off judgment threshold to form the complete oscillation within the set time window;

[0070] In the turn-on or turn-off phase of the synchronous rectification MOSFET, in order to monitor possible switching oscillation, first continuously collect the drain-source voltage VDS signal in a preset time window, and compare the VDS signal with the set turn-on and turn-off determination thresholds, and determine whether continuous crossing occurs.

[0071] The continuous crossing turn-on and turn-off determination thresholds form a complete oscillation, which is specifically:

[0072] The process that the VDS signal rises from below the turn-on determination threshold to above the turn-on determination threshold, and then falls below the turn-off determination threshold is a complete oscillation; or the process that the VDS signal falls from above the turn-on determination threshold to below the turn-on determination threshold, and then rises above the turn-on determination threshold is a complete oscillation.

[0073] Step 22, when the number exceeds the preset threshold, it is determined that the synchronous rectification MOSFET has turn-on / turn-off oscillation.

[0074] In the entire time window, each oscillation that meets the above conditions is recorded and accumulated. When the number of recorded complete oscillations exceeds the preset threshold, it is determined that the synchronous rectification MOSFET has turn-on / turn-off oscillation in this turn-on or turn-off phase.

[0075] The specific time window can be reasonably set according to the system switching frequency and the turn-on / turn-off time, such as 2-5 switching periods, in order to balance the sensitivity of oscillation capture and the anti-interference ability to short-time transients. For example, for a system with a switching frequency of 100 kHz (i.e. the switching frequency of the primary side power switch tube is 100 kHz), the time window can be set to about 50 μs.

[0076] In the time window, the complete process that the VDS signal rises from below the turn-on determination threshold to above the turn-on determination threshold and then falls below the turn-off determination threshold, or falls from above the turn-on determination threshold to below the turn-on determination threshold and then rises above the turn-on determination threshold is recorded as a complete oscillation. When the number of complete oscillations exceeds the preset threshold (for example, more than 3 times), it is determined that the synchronous rectification MOSFET has switching oscillation in this turn-on or turn-off phase, so that the corresponding protection or alarm mechanism can be triggered to prevent system abnormalities.

[0077] Third, early turn-off monitoring:

[0078] In the discontinuous mode DCM, according to whether the drain current Isd of the synchronous rectification MOSFET when turned off is greater than the preset turn-off determination threshold, it is determined whether early turn-off occurs. When Isd is greater than the preset turn-off determination threshold, it is determined that early turn-off occurs.

[0079] Specifically, in DCM mode, in order to ensure the normal operation of the synchronous rectification MOSFET in the off stage, the drain current Isd at the off instant of the synchronous rectification MOSFET needs to be monitored to determine whether premature turn-off occurs. In specific operation, the Isd signal when the synchronous rectification MOSFET is about to turn off or has just turned off is collected, and is compared with a preset turn-off determination threshold, which can be set according to the rated output current of the system, for example, 5% to 10% of the rated current. When the collected Isd is greater than the preset threshold, it is determined that the synchronous rectification MOSFET has occurred premature turn-off, at which time the control circuit can take appropriate measures, such as adjusting the gate drive delay or recording the abnormal state.

[0080] In CCM mode, whether premature turn-off occurs is determined by detecting the deviation of the current drop trend and the current zero-crossing point at the off time. For example, by fitting the Isd drop curve during the off time and calculating the predicted current zero-crossing point obtained by fitting, the time sequence deviation of the predicted current zero-crossing point and the actual current zero-crossing point is calculated; when the time sequence deviation exceeds the preset deviation, it is determined that premature turn-off occurs.

[0081] Specifically, in continuous conduction mode (CCM), in order to monitor whether premature turn-off of the synchronous rectification MOSFET occurs in the off stage, the deviation of the drop trend of the drain current Isd at the off time and the current zero-crossing point can be analyzed to achieve this. In specific operation, first, the Isd signal of the SR MOSFET during the off time is collected, and the drop waveform is fitted to obtain the predicted current zero-crossing point time. Then, the predicted zero-crossing point is compared with the actually measured zero-crossing point, and the time sequence deviation of the two is calculated. When the deviation exceeds the preset threshold, it is determined that the synchronous rectification MOSFET has occurred premature turn-off.

[0082] In an ideal state, Isd should smoothly decrease to zero crossing point over time after the conduction of MOSFET ends, but due to the characteristics of switching devices and circuit noise, the instantaneous Isd collected may have jitter or sampling error, which cannot directly and accurately determine the zero crossing point. Therefore, a mathematical fitting method (such as linear or polynomial fitting) can be used to smooth the Isd data collected during the off period to obtain a continuous decreasing curve, and the theoretical zero crossing point is calculated accordingly, that is, the time point at which the MOSFET should complete the off in an ideal state. Then, the actual measured zero crossing point is compared with the theoretical zero crossing point obtained by fitting, if the actual zero crossing point is earlier than the theoretical zero crossing point, and the timing deviation exceeds the preset threshold (for example, 2%-6% switching period), it is determined that the synchronous rectification MOSFET has an early off. Through this method, the influence of instantaneous sampling noise and measurement error can be eliminated, and the accuracy of early off determination can be improved. The preset threshold here can be reasonably set according to the actual working conditions and tolerance error of the system, including the reference rated output current, parasitic characteristics of switching devices, and sampling and control delay, etc. For example, the switching frequency is 100 kHz, and the synchronous rectification off time is usually about 1-2 μs, and the allowable deviation can be set to 0.2-0.5 μs; for example, the switching frequency is 200 kHz, and the synchronous rectification off time is usually about 0.5-1 μs, and the allowable deviation can be set to 0.1-0.3 μs;

[0083] Through the above method, the early off problem of synchronous rectification MOSFET caused by control delay or parasitic effect in DCM and CCM modes can be effectively identified, so as to avoid insufficient energy transfer or output voltage fluctuation, improve the efficiency and reliability of the power supply system, and ensure the stable operation of the power supply system.

[0084] Fourth, voltage withstand monitoring: when the measured VDS transient voltage peak value exceeds the rated voltage withstand of the selected synchronous rectification MOSFET or the preset margin, it is determined that the switching process does not meet the safety requirements of the device.

[0085] The specific process can be:

[0086] Step 41, collecting the transient voltage peak value of VDS signal.

[0087] During the switching process of the synchronous rectification MOSFET, the drain-source voltage VDS is continuously monitored, and the transient waveform of VDS is recorded in real time during each switching action. By collecting the highest point of the voltage waveform, the transient voltage peak value can be obtained as the basic data for subsequent voltage withstand determination.

[0088] Step 42, comparing the transient voltage peak value with the rated voltage withstand or margin threshold of the synchronous rectification MOSFET.

[0089] In this step, the VDS transient peak value collected is compared with the rated voltage withstand of the synchronous rectification MOSFET and the preset margin threshold value. The rated voltage withstand is the highest drain-source voltage that the device can withstand for a long time under standard conditions; the preset margin threshold value is lower than the rated voltage withstand, and the preset margin threshold value is used to warn of potential overvoltage risks in advance, taking into account factors such as device aging, temperature changes, parasitic oscillation, and circuit noise when setting the preset margin threshold value. The margin threshold value can be determined comprehensively according to system characteristics and reliability requirements, for example, set to 90% of the rated voltage withstand.

[0090] Step 43, when the transient peak value exceeds the rated voltage withstand or the margin threshold value, output an overvoltage alarm and record the peak duration.

[0091] Different processing mechanisms can be taken for the transient peak value exceeding the rated voltage withstand or the margin threshold value. For example, when the transient peak value exceeds the margin threshold value but does not exceed the rated voltage withstand, it indicates that there is an overvoltage risk during switching, but the device itself has not yet been endangered, and only a warning can be triggered and recorded; when the transient peak value exceeds the rated voltage withstand, it indicates that the device has faced a serious overvoltage situation that may damage the device, and protection or disconnection of the switch can be triggered immediately to avoid device failure or system damage.

[0092] In specific implementation, the protection methods that can be triggered for the power supply system include but are not limited to one or several of the following: shutdown protection, voltage regulation protection, switch regulation protection, or system redundancy start protection.

[0093] The shutdown protection specifically refers to turning off the synchronous rectification MOSFET to cut off the load current.

[0094] The voltage regulation protection specifically refers to reducing the input voltage and / or the output voltage to reduce the voltage stress of the synchronous rectification MOSFET.

[0095] The switch regulation protection specifically refers to reducing the switching frequency or the conduction duty cycle of the synchronous rectification MOSFET, thereby reducing the transient peak value of VDS.

[0096] The system redundancy start protection specifically refers to switching the power supply system to a backup circuit to maintain the safe operation of the power supply system.

[0097] The person skilled in the art can select the corresponding protection method according to the actual situation of the system.

[0098] Fifth, false turn-on monitoring: in the discontinuous mode DCM, when the difference between the VDS signal of the resonance valley bottom and the turn-on threshold Vthon of the synchronous rectification MOSFET is less than the preset voltage margin within the logical timing of the synchronous rectification MOSFET in the off state, it is determined that there is a false turn-on risk in the synchronous rectification circuit.

[0099] Specifically, in the DCM mode, in order to prevent the synchronous rectification MOSFET from being mistakenly turned on during the off period, the VDS signal needs to be monitored in real time. When the synchronous rectification MOSFET is in the off logic timing, the drain-source voltage VDS thereof is collected, and the resonance valley bottom value in the VDS waveform is focused on. The resonance valley bottom value is compared with the turn-on threshold Vthon of the synchronous rectification MOSFET, and if the difference between the two is less than a preset voltage margin, it indicates that there is a risk of mistaken turn-on of the synchronous rectification circuit, that is, the synchronous rectification MOSFET may be accidentally turned on due to resonance spikes or noise at a stage that should theoretically be turned off. Through this determination method, potential mistaken turn-on events can be found in time, and the controller can be provided with a warning or the gate drive strategy can be adjusted, so as to ensure the switching stability of the synchronous rectification MOSFET in the DCM mode and the safe operation of the power supply system.

[0100] The preset voltage margin can be set to 5%-15% or several hundred millivolts of the turn-on threshold Vthon, and the specific value can be determined by system simulation or actual measurement of the minimum valley bottom amplitude of the VDS waveform, so as to ensure that the mistaken turn-on can be avoided under the most severe working conditions.

[0101] The mistaken turn-on phenomenon mainly occurs in the DCM mode, because at this time the drain current of the synchronous rectification MOSFET has dropped to zero or close to zero during the off period, and the VDS signal will have a clear resonance valley bottom, and the voltage waveform during the logical off period may approach the turn-on threshold Vthon. If the difference between the resonance valley bottom and Vthon is too small, accidental conduction is easily triggered, thereby forming mistaken turn-on. In the CCM mode, the drain current of the synchronous rectification MOSFET still flows during the off period, and the VDS voltage changes relatively gently, and there is no obvious resonance valley bottom close to the threshold, so the risk of mistaken turn-on is low, and accidental conduction due to transient fluctuations usually does not occur. Based on this, the mistaken turn-on monitoring is mainly for the DCM mode, and no such monitoring is needed in the CCM mode.

[0102] When the system detects any one of the following situations of the synchronous rectification MOSFET, that is, turn-on / off oscillation, premature turn-off, switching process not meeting the safety requirements of the device, or mistaken turn-on risk, it is determined that a switching state abnormal event is detected;

[0103] The system can also store the type, occurrence time and corresponding signal parameters of the switching state abnormal event in a non-volatile memory, and output them to an external controller through a communication interface.

[0104] The online monitoring method described above can be realized by an integrated power supply monitoring system. The system for realizing the above method can include: a high-speed sampling module for collecting VDS voltage and Isd current signals of the synchronous rectification MOSFET in real time; a signal processing module for performing filtering, fitting, oscillation statistics, threshold comparison and other operations on the collected signals; a determination logic module for outputting the switching state and abnormal events according to the conditions of on / off state, oscillation frequency, premature turn-off, voltage resistance and mis-turn-on risk; a storage module for recording the type of abnormal events, the occurrence time and the corresponding signal parameters; a communication interface for transmitting the monitoring results to an external controller or a host computer system to realize real-time monitoring and protection control. In addition, the system can be combined with a power supply control unit to respond to abnormal events by means of cutting off, voltage regulation or switch adjustment, so as to ensure the safe and reliable operation of the synchronous rectification MOSFET and the entire power supply system.

[0105] The online monitoring system described above is a technical solution that can be realized by those skilled in the art under the method proposed in the present application. Those skilled in the art can use existing high-speed sampling chips, analog-to-digital converters (ADCs), digital signal processors (DSPs) or microcontrollers (MCUs) to collect VDS and Isd signals of the synchronous rectification MOSFET, and realize filtering, fitting, threshold comparison, oscillation statistics and abnormal determination functions in the processor. The storage module can use existing non-volatile memory to record abnormal events, and the communication interface can realize data output through a standard bus (such as SPI, I 2 C or CAN). In combination with existing power supply control technology, those skilled in the art can integrate the functions of collection, processing, determination, recording and protection in the power supply control system according to the method, to realize online monitoring and real-time protection of the switching state and abnormal behavior of the synchronous rectification MOSFET.

[0106] Those skilled in the art should further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been described in the above description in general terms. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0107] The steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in random access memory (RAM), flash memory, read-only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and

[0108] The above detailed description describes the purpose, technical solutions and beneficial effects of the present application. It should be understood that the above description is only a specific embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for on-line monitoring of switching states and abnormal behavior of synchronous rectification MOSFETs in a power supply system, characterized by, The method comprises: During operation of the power supply system, collecting a drain-source voltage VDS signal and a drain current Isd signal of the synchronous rectification MOSFET, and based on the VDS signal and the Isd signal, monitoring a switching state of the synchronous rectification MOSFET on-line; The monitoring specifically comprises: Conduction state monitoring: when the VDS is less than or equal to a conduction determination threshold voltage of the synchronous rectification MOSFET, it is determined that the synchronous rectification MOSFET is in a conduction state; otherwise, it is in an off state; Oscillation state monitoring: when the VDS occurs complete oscillation multiple times within a set time window, it is determined that the synchronous rectification MOSFET has turn-on / off oscillation phenomenon; Early-off monitoring: in a discontinuous mode DCM, according to whether the drain current Isd of the synchronous rectification MOSFET at the time of turning off is greater than a preset off determination threshold (for example, 5% to 10% of the rated output current), it is determined whether early-off occurs; in a continuous mode CCM, by detecting the deviation of the current falling trend and the current zero-crossing point at the time of turning off, it is determined whether early-off occurs; Voltage withstand monitoring: when a measured VDS transient voltage peak value exceeds the rated voltage withstand of the selected synchronous rectification MOSFET or a preset margin, it is determined that the switching process does not meet the safety requirements of the device; Mis-turn-on monitoring: in a discontinuous mode DCM, when the difference between the VDS signal of the resonance valley bottom and the opening threshold Vthon of the synchronous rectification MOSFET within the logical timing of the synchronous rectification MOSFET in the off state is less than a preset voltage margin, it is determined that there is a mis-turn-on risk in the synchronous rectification circuit.

2. The switch status monitoring and anomaly analysis method according to claim 1, characterized in that, The conduction state monitoring specifically comprises: Performing low-pass filtering processing on the collected VDS signal to eliminate high-frequency noise interference; wherein the cut-off frequency of the low-pass filtering processing is not more than 1 / 2 of the switching frequency of the synchronous rectification MOSFET; Performing continuous sampling on the filtered VDS signal, and comparing the voltage value of each sampling point with the conduction determination threshold voltage of the synchronous rectification MOSFET; When it is monitored that the VDS of continuous multiple sampling points is less than or equal to the conduction determination threshold voltage, it is determined that the synchronous rectification MOSFET is in a conduction state; Otherwise, it is determined that the synchronous rectification MOSFET is in an off state.

3. The switch status monitoring and anomaly analysis method of claim 1, wherein, The oscillation state monitoring specifically comprises: Recording the number of times of complete oscillation formed by the VDS signal continuously crossing the conduction determination threshold and the off determination threshold within a set time window; When the number of times exceeds a preset threshold, it is determined that the synchronous rectification MOSFET has turn-on / off oscillation; Wherein, the continuous crossing of the conduction determination threshold and the off determination threshold to form the complete oscillation specifically comprises: The process that the VDS signal rises from below the conduction determination threshold to above the conduction determination threshold, and then falls below the off determination threshold is one complete oscillation; or, the process that the VDS signal falls from above the conduction determination threshold to below the conduction determination threshold, and then rises above the conduction determination threshold is one complete oscillation.

4. The switch status monitoring and anomaly analysis method of claim 1, wherein, The early-off monitoring specifically comprises: In the discontinuous mode DCM, the Isd signal at the turn-off of the synchronous rectification MOSFET is collected and compared with a preset turn-off judgment threshold value, and when the Isd is greater than the preset turn-off judgment threshold value, it is determined that the early turn-off occurs; In the continuous mode CCM, the falling curve of the Isd during the turn-off is fitted, and the predicted current zero-crossing point obtained by fitting is calculated, and the time sequence deviation of the predicted current zero-crossing point and the actual current zero-crossing point is calculated; when the time sequence deviation exceeds the preset deviation, it is determined that the early turn-off occurs.

5. The switch status monitoring and anomaly analysis method of claim 1, wherein, The voltage monitoring specifically includes: Collecting the transient voltage peak value of the VDS signal; Comparing the transient voltage peak value with the rated voltage resistance or margin threshold value of the synchronous rectification MOSFET; When the transient peak value exceeds the rated voltage resistance or margin threshold value, output the voltage resistance overrun alarm and record the peak duration.

6. The switch status monitoring and anomaly analysis method according to claim 5, wherein, When the transient peak value exceeds the rated voltage resistance or margin threshold value, the method further includes: protecting the power supply system; The method of protecting the power supply system specifically includes: one or more of the cut-off protection, voltage regulation protection, switch regulation protection or system redundancy start protection; The cut-off protection specifically includes: turning off the synchronous rectification MOSFET to cut off the load current; The voltage regulation protection specifically includes: reducing the input voltage and / or output voltage to reduce the voltage stress of the synchronous rectification MOSFET; The switch regulation protection specifically includes: reducing the switching frequency or conduction duty cycle of the synchronous rectification MOSFET, thereby reducing the transient peak value of VDS; The system redundancy start protection specifically includes: switching the power supply system to the standby circuit to maintain the safe operation of the power supply system.

7. The switch status monitoring and anomaly analysis method of claim 1, wherein, The sampling rate of the VDS signal and the Isd signal is not less than 10 times the system switching frequency.

8. The switch status monitoring and anomaly analysis method of claim 1, wherein, When any of the following situations is monitored, it is determined that a switching state abnormal event is detected: the synchronous rectification MOSFET appears turn-on / turn-off oscillation phenomenon, early turn-off, switching process does not meet the safety requirements of the device, or there is a risk of mis-turn-on; The type, occurrence time and corresponding signal parameters of the switching state abnormal event are stored in the non-volatile memory and output to the external controller through the communication interface.

Images