Photovoltaic inverter standby automatic voltage-sharing method, device, equipment and medium

Abstract

The invention relates to the technical field of power electronic control, and provides a photovoltaic inverter standby automatic voltage-sharing method, device and equipment and a medium. When the inverter enters the standby state, the standby time length, the direct current side upper bus capacitor voltage and the direct current side lower bus capacitor voltage are automatically detected, and whether bus voltage sharing needs to be carried out or not is judged based on detected data. When bus voltage sharing is needed, high-voltage capacitor discharging is carried out based on PWM control, and standby bus voltage sharing is further realized. According to the method, the impact risk when the inverter is restarted or recovered can be reduced, and the recovery time after the inverter breaks down can be greatly shortened. Moreover, extra power electronic devices are not introduced in the whole control process, and compared with most hardware voltage-sharing circuits, the method saves hardware cost, and the control algorithm is simple and easy to implement.

Description

Technical Field

[0001] The present invention relates to the field of power electronic control technology, and in particular to a method, device, equipment and medium for automatic voltage equalization of a photovoltaic inverter in standby mode. Background Art

[0002] As the global energy mix shifts toward a low-carbon economy, photovoltaic power generation, thanks to its clean, renewable, and distributed nature, has become a key technology driving sustainable development. As a core component of a photovoltaic system, inverter performance directly determines power conversion efficiency and grid connection stability. As photovoltaic technology evolves toward higher power density and higher voltage levels, the DC busbar places higher demands on the voltage withstand and voltage-sharing performance of the supporting capacitors.

[0003] However, in the actual application of inverters, voltage imbalance in bus capacitor series scenarios has long been a problem, threatening equipment reliability and potentially triggering cascading failures, becoming a key bottleneck restricting the efficiency and safety of photovoltaic systems. The main causes of this voltage imbalance are: Under normal inverter operating conditions, deviations in the capacitor equivalent series resistance, capacitance, and leakage current cause the charge distribution to deviate from the theoretical value when high-frequency ripple current or transient load changes occur, causing transient voltage shifts. When the inverter is not powered on or shut down due to a fault, or in standby mode, differences in capacitor self-discharge characteristics and asymmetry in external parasitic leakage paths lead to uneven residual charge distribution. These problems accelerate capacitor aging, leading to bus voltage fluctuations, inverter output distortion, and even triggering protective shutdowns. They can also cause the inverter to be unable to power on or take too long to power on after entering standby mode due to half-bus overvoltage, severely impairing the system's power generation efficiency and economic efficiency.

[0004] Some existing solutions are to achieve voltage balancing of the upper and lower buses of the inverter by adding a separate voltage balancing circuit module and coordinating the corresponding voltage balancing control algorithm. Although it can dynamically correct voltage deviations, its control algorithm requires real-time acquisition of multi-node parameters and high-frequency pulse width modulation, which leads to a surge in processor computing load. In addition, the introduction of additional circuit modules not only increases hardware costs, but also reduces the overall reliability of the system due to increased circuit complexity. Some other solutions are voltage balancing strategies that inject zero-sequence current at the midpoint of the series capacitor and achieve charge redistribution through current loop compensation. This method not only leads to an increase in high-frequency harmonic components, but also fails to achieve voltage balancing after the equipment is in standby mode. In addition, existing solutions mostly focus on dynamic voltage balancing control during the active operation phase of the equipment, but lack a systematic design for the voltage balancing requirements in the standby state. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method, device, equipment and medium for automatic voltage equalization in standby mode of a photovoltaic inverter to solve the above technical problems.

[0006] The present invention solves the above technical problems with the following technical solutions: A photovoltaic inverter standby automatic voltage equalization method, comprising:

[0007] S11, identifying whether the inverter to be controlled is in a standby state;

[0008] S12: If the inverter to be controlled is in a standby state, respectively obtaining the standby duration of the inverter to be controlled, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage;

[0009] S13. Determine whether a preset voltage balancing start condition is met based on the standby time, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage;

[0010] S14: If the preset voltage balancing start condition is met, releasing the output blocking of the PWM modulation module in the inverter to be controlled;

[0011] S15, determining a modulation voltage according to the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage;

[0012] S16, controlling a PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage, and controlling the IGBT in the inverter to be controlled to perform a switching action through the PWM signal, so as to discharge the DC-side upper bus capacitor or the DC-side lower bus capacitor in the inverter to be controlled;

[0013] S17 , repeatedly executing S11 to S16 until the preset voltage balancing start condition is no longer met, and the automatic voltage balancing of the inverter to be controlled is completed.

[0014] The beneficial effects of the present invention are: when the inverter enters the standby state, the standby time, the bus capacitor voltage on the DC side and the bus capacitor voltage on the DC side are automatically detected, and based on the detected data, it is determined whether bus voltage balancing is required. When bus voltage balancing is required, the high-voltage capacitor is discharged based on PWM control to achieve standby bus voltage balancing. This method can not only reduce the impact risk when the inverter is restarted or restored, but also greatly shorten the recovery time after the inverter fails. In addition, the entire control process does not introduce additional power electronic devices. Compared with most hardware voltage balancing circuits, this method saves hardware costs, and the control algorithm is simple and easy to implement.

[0015] On the basis of the above technical solution, the present invention can also be improved as follows.

[0016] Furthermore, judging whether the preset voltage balancing start-up condition is met based on the standby time, the bus capacitor voltage on the DC side, and the bus capacitor voltage on the DC side, includes: calculating the absolute value of the difference between the bus capacitor voltage on the DC side and the bus capacitor voltage on the DC side to obtain the absolute value of the voltage difference; judging whether the preset voltage balancing start-up condition is met based on the standby time, the bus capacitor voltage on the DC side, the bus capacitor voltage on the DC side, and the absolute value of the voltage difference.

[0017] Furthermore, the preset voltage balancing start-up conditions are: the standby time is greater than the preset bus voltage balancing delay time, and the absolute value of the voltage difference is greater than the preset bus voltage balancing deviation maximum value, and the bus capacitor voltage on the DC side is less than the preset half-bus voltage protection threshold, and the bus capacitor voltage on the DC side is less than the preset half-bus voltage protection threshold.

[0018] Furthermore, determining the modulation voltage based on the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage includes: obtaining a half-bus voltage of the inverter to be controlled; calculating an absolute value of the modulation voltage based on the half-bus voltage and a preset modulation duty cycle; generating voltage comparison information based on the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage, the voltage comparison information being information describing the magnitude relationship between the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage; and generating the modulation voltage based on the modulation voltage absolute value and the voltage comparison information.

[0019] Furthermore, calculating the absolute value of the modulation voltage based on the half-bus voltage and the preset modulation duty cycle includes: calculating the product of the half-bus voltage and the preset modulation duty cycle to obtain the absolute value of the modulation voltage.

[0020] Furthermore, controlling the PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage includes: controlling the PWM modulation module in the inverter to be controlled to modulate a preset carrier based on the modulation voltage to generate a PWM signal.

[0021] In order to solve the above technical problems, the present invention also provides a photovoltaic inverter standby automatic voltage equalization device, comprising:

[0022] A state identification module is used to identify whether the inverter to be controlled is in a standby state;

[0023] a data acquisition module, configured to respectively acquire the standby duration of the inverter to be controlled, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage when the inverter to be controlled is in a standby state;

[0024] a condition judgment module, configured to judge whether a preset voltage balancing start condition is met based on the standby time, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage;

[0025] A blocking release module, configured to release the output blocking of the PWM modulation module in the inverter to be controlled when the preset voltage balancing start condition is met;

[0026] a voltage determination module, configured to determine a modulation voltage according to the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage;

[0027] a signal generating module, configured to control a PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage, and to control the IGBT in the inverter to be controlled to perform a switching action through the PWM signal, so as to discharge the DC-side upper bus capacitor or the DC-side lower bus capacitor in the inverter to be controlled;

[0028] A loop module is used to repeatedly execute the operations of the state identification module, the data acquisition module, the condition judgment module, the blockade release module, the voltage determination module and the signal generation module until the preset voltage equalization start condition is not met, thereby completing the automatic voltage equalization of the inverter to be controlled.

[0029] In order to solve the above technical problems, the present invention also provides an electronic device, including a memory, a processor and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the above-mentioned automatic voltage equalization method for photovoltaic inverter standby.

[0030] To solve the above technical problems, the present invention also provides a non-transitory computer-readable storage medium, which stores computer instructions, and the computer instructions are used to enable a computer to execute the above-mentioned photovoltaic inverter standby automatic voltage equalization method.

[0031] In order to solve the above technical problems, the present invention further provides a photovoltaic system, comprising the above-mentioned photovoltaic inverter standby automatic voltage equalization device. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 This is a schematic diagram of the control structure of a photovoltaic inverter standby automatic voltage equalization method according to the present invention;

[0033] Figure 2 A schematic diagram of a three-phase T-type inverter topology for a photovoltaic inverter standby automatic voltage equalization method according to the present invention;

[0034] Figure 3 This is a flow chart of a method for automatic voltage equalization in standby mode for a photovoltaic inverter according to the present invention;

[0035] Figure 4 This is a schematic diagram of an automatic voltage equalizing device for a photovoltaic inverter in standby mode according to the present invention;

[0036] Figure 5 The figure is a schematic diagram of an electronic device according to the present invention. DETAILED DESCRIPTION

[0037] The principles and features of the present invention are described below. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0038] Example 1

[0039] like Figure 1 As shown in the figure, in a photovoltaic system, photovoltaic panels, BOOST converters, inverters, and the grid are connected in sequence. The inverter includes a PWM modulation module, an inverter module, and an LCL filter module. The inverter module usually adopts a three-phase T-type inverter topology or a three-phase I-type inverter topology. Figure 2 As shown, in this embodiment, the inverter module adopts a three-phase T-type inverter topology, and its main structure includes upper and lower bus capacitors on the DC side and 12 IGBT modules.

[0040] Inverter operating states can be divided into normal operation and standby. The standby state includes the inverter being turned off and faulty, i.e., the inverter is not operating. In the standby state, if there is a significant voltage difference between the upper and lower bus capacitors, when the system restarts, the unbalanced residual charge will flow through the inverter switching components, generating a transient surge current, which can easily cause overcurrent damage to power devices. Furthermore, the voltage difference may trigger half-bus overvoltage protection, prolonging system recovery time.

[0041] Based on this, Figure 3 As shown, this embodiment provides a method for automatic voltage equalization of a photovoltaic inverter in standby mode, so as to realize automatic voltage equalization of the photovoltaic inverter in standby mode. The method includes:

[0042] S11. Identify whether the inverter to be controlled is in a standby state.

[0043] S12: If the inverter to be controlled is in a standby state, the standby duration of the inverter to be controlled, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage are respectively obtained.

[0044] The standby time indicates how long the inverter remains in standby mode, and is measured from the moment the inverter enters standby mode. The DC upper bus capacitor voltage and the DC lower bus capacitor voltage are the voltages between the DC positive and negative poles and the midpoint of the upper and lower busbars, respectively.

[0045] S13. Determine whether a preset voltage balancing start condition is met based on the standby time, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage.

[0046] Optionally, in an embodiment, whether the preset voltage equalization start-up conditions are met is judged based on the standby time, the bus capacitor voltage on the DC side, and the bus capacitor voltage on the DC side, including: calculating the absolute value of the difference between the bus capacitor voltage on the DC side and the bus capacitor voltage on the DC side to obtain the absolute value of the voltage difference; judging whether the preset voltage equalization start-up conditions are met based on the standby time, the bus capacitor voltage on the DC side, the bus capacitor voltage on the DC side, and the absolute value of the voltage difference.

[0047] To calculate the absolute value of the voltage difference, first calculate the voltage deviation of the upper and lower bus capacitors according to the following formula: U dif =U pos -U neg Among them, U dif is the voltage deviation of the upper and lower bus capacitors; U pos is the bus capacitor voltage on the DC side, U neg is the DC side lower bus capacitor voltage. Then take the absolute value of the upper and lower bus capacitor voltage deviation to get the absolute value of the voltage difference |U dif |.

[0048] Optionally, in an embodiment, the preset voltage balancing start-up conditions are: the standby time is greater than the preset bus voltage balancing delay time, and the absolute value of the voltage difference is greater than the preset bus voltage balancing deviation maximum value, and the bus capacitor voltage on the DC side is less than the preset half-bus voltage protection threshold, and the bus capacitor voltage on the DC side is less than the preset half-bus voltage protection threshold.

[0049] Preset busbar voltage balancing delay time T del Reflects the interval length of the voltage balancing operation. The shorter the bus voltage balancing delay time is set, the higher the voltage balancing operation frequency is. max The maximum voltage that the half busbar capacitor can withstand. The maximum busbar voltage deviation U difmax The threshold for the busbar to start the standby voltage balancing function. To ensure that the half busbar voltage does not exceed the half busbar voltage protection threshold U max , the maximum value of busbar voltage deviation U difmax It should not be set too large. difmax Delay time T with busbar balancing del Inversely proportional.

[0050] For example, set the busbar voltage balancing delay time T del =30s, maximum busbar voltage deviation U difmax =5V, half bus voltage protection threshold U max=550V. Correspondingly, the preset voltage balancing start condition is expressed as: standby time > 30s, and the absolute value of the voltage difference > 5V, and the DC side upper bus capacitor voltage < 550V, and the DC side lower bus capacitor voltage < 550V.

[0051] S14: If the preset voltage balancing start condition is met, the output blocking of the PWM modulation module in the inverter to be controlled is released.

[0052] If the preset pressure equalization start condition is not met, the standby pressure equalization function is not executed. In some embodiments, if the preset pressure equalization start condition is not met, the standby pressure equalization function is not executed, and after a certain interval, the process returns to S11 to continue data collection and pressure equalization start condition determination, etc., to determine whether the standby pressure equalization function needs to be executed.

[0053] Normally, in standby mode, the inverter output power is 0, causing the PWM modulation module to block output. Therefore, it is necessary to first open the PWM signal output block to ensure the normal output of subsequent PWM signals.

[0054] S15. Determine a modulation voltage according to the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage.

[0055] Optionally, in an embodiment, the modulation voltage is determined based on the bus capacitor voltage on the DC side and the bus capacitor voltage on the DC side, including: obtaining the half-bus voltage of the inverter to be controlled; calculating the absolute value of the modulation voltage based on the half-bus voltage and a preset modulation duty cycle; generating voltage comparison information based on the bus capacitor voltage on the DC side and the bus capacitor voltage on the DC side, the voltage comparison information being information describing the magnitude relationship between the bus capacitor voltage on the DC side and the bus capacitor voltage on the DC side; generating the modulation voltage based on the absolute value of the modulation voltage and the voltage comparison information.

[0056] Optionally, in an embodiment, calculating the absolute value of the modulation voltage based on the half-bus voltage and a preset modulation duty cycle includes: calculating the product of the half-bus voltage and the preset modulation duty cycle to obtain the absolute value of the modulation voltage.

[0057] The half bus voltage is half of the DC input. For example, if the DC input is 800V, the half bus voltage is 400V. The modulation duty cycle can be set according to the specific usage. In this embodiment, the PWM modulation duty cycle is fixed to 10% for each capacitor discharge, that is, the absolute value of the modulation voltage for each capacitor discharge |U pwm |=400V*10%=40V.

[0058] According to the DC side bus capacitor voltage and the DC side bus capacitor voltage, voltage comparison information is generated; according to the modulation voltage absolute value and the voltage comparison information, the modulation voltage is generated. Specifically, if the upper and lower bus capacitor voltage deviation U is obtained,dif >5V, it means that the upper bus capacitor voltage is high, and the modulation voltage U pwm =40V; if the upper and lower busbar capacitor voltage deviation U is obtained dif <-5V, it means that the lower bus capacitor voltage is high, and the modulation voltage U pwm =-40V.

[0059] When the inverter is connected to the grid normally, the modulation voltage is obtained through the dual-loop control output of the bus voltage loop and the inverter current loop.

[0060] S16. Control the PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage, and control the IGBT in the inverter to be controlled to perform a switching action through the PWM signal to discharge the DC side upper bus capacitor or the DC side lower bus capacitor in the inverter to be controlled.

[0061] Optionally, in an embodiment, controlling a PWM modulation module in the inverter to be controlled to generate a PWM signal according to a modulation voltage includes: controlling the PWM modulation module in the inverter to be controlled to modulate a preset carrier based on the modulation voltage to generate a PWM signal.

[0062] Specifically, the waveform corresponding to the modulation voltage is normalized, and accordingly, the amplitude of the carrier is usually set to 1. The waveform and frequency of the carrier can be set according to actual usage. In this embodiment, the carrier adopts an isosceles triangle waveform.

[0063] In the PWM modulation module, the waveform corresponding to the normalized modulated voltage is compared with the carrier wave, generating signals of 0 and 1. Specifically, when the modulated wave is greater than the carrier wave, the signal is 1, and vice versa. This signal controls the IGBT, turning it on when the signal is 1 and off when it is not. This IGBT action discharges the upper or lower busbar capacitor.

[0064] For the working conditions of high bus voltage and uneven voltage, a PWM modulation voltage is given, and the IGBT tube in the inverter topology is activated to release the energy of the positive or negative bus capacitor to achieve standby voltage equalization, preventing bus overvoltage during startup due to excessive positive or negative bus capacitor voltage.

[0065] S17, repeat S11 to S16 until the preset voltage equalization start condition is no longer met, and the automatic voltage equalization of the inverter to be controlled is completed. That is, the above-mentioned continuous discharge and detection process is repeated until the upper and lower bus capacitor voltage deviation U dif Small enough to complete the standby voltage equalization function.

[0066] When the inverter is not powered on or in fault state, the photovoltaic panel input power is 0. This method first identifies whether the inverter is in standby state. When the inverter is in standby state and meets the voltage equalization start condition, the upper and lower bus capacitor voltage deviation U dif The positive or negative value of the output modulation voltage is determined by the positive or negative value of the PWM modulation module. The corresponding duty cycle is output through the LCL filter module, and the energy is fed into the grid to discharge the high-voltage capacitor. The above process is repeated continuously to determine whether the busbar voltage equalization is needed, that is, the high-voltage capacitor is discharged until the voltage deviation between the upper and lower busbar capacitors is less than a certain value, thus achieving standby bus voltage equalization.

[0067] Without adding any additional power electronic devices, the present invention solves the DC bus voltage equalization problem in the photovoltaic inverter standby state, avoids the risk of impact when the equipment is restarted or restored, and greatly reduces the equipment recovery time and the probability of damage to power switching devices without increasing the hardware cost.

[0068] Example 2

[0069] like Figure 4 As shown, this embodiment provides a photovoltaic inverter standby automatic voltage equalization device 200, comprising:

[0070] A state identification module 201 is used to identify whether the inverter to be controlled is in a standby state;

[0071] The data acquisition module 202 is used to respectively obtain the standby time of the inverter to be controlled, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage when the inverter to be controlled is in the standby state;

[0072] Condition judgment module 203, used to judge whether the preset voltage balancing start condition is met based on the standby time, the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage;

[0073] The blocking release module 204 is used to release the output blocking of the PWM modulation module in the inverter to be controlled when the preset voltage equalization start condition is met;

[0074] A voltage determination module 205 is configured to determine a modulation voltage based on the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage;

[0075] A signal generating module 206 is configured to control a PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage, and to control the IGBT in the inverter to be controlled to perform switching actions through the PWM signal, so as to discharge the DC-side upper bus capacitor or the DC-side lower bus capacitor in the inverter to be controlled;

[0076] The loop module 207 is used to repeatedly execute the operations of the state identification module 201, the data acquisition module 202, the condition judgment module 203, the blockade release module 204, the voltage determination module 205 and the signal generation module 206 until the preset voltage equalization start condition is not met, and the automatic voltage equalization of the inverter to be controlled is completed.

[0077] Optionally, in an embodiment, the condition judgment module 203 includes:

[0078] a voltage difference absolute value calculation unit, used to calculate the absolute value of the difference between the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage, to obtain the voltage difference absolute value;

[0079] The condition judgment unit is used to judge whether the preset voltage equalization start condition is met based on the standby time, the DC side upper bus capacitor voltage, the DC side lower bus capacitor voltage and the absolute value of the voltage difference.

[0080] Optionally, in an embodiment, the preset voltage balancing start-up conditions are: the standby time is greater than the preset bus voltage balancing delay time, and the absolute value of the voltage difference is greater than the preset bus voltage balancing deviation maximum value, and the bus capacitor voltage on the DC side is less than the preset half-bus voltage protection threshold, and the bus capacitor voltage on the DC side is less than the preset half-bus voltage protection threshold.

[0081] Optionally, in an embodiment, the voltage determination module 205 includes:

[0082] A voltage acquisition unit, used for acquiring a half-bus voltage of an inverter to be controlled;

[0083] a calculation unit, configured to calculate an absolute value of a modulation voltage according to a half-bus voltage and a preset modulation duty cycle;

[0084] a comparison unit, configured to generate voltage comparison information based on the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage, the voltage comparison information being information describing a magnitude relationship between the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage;

[0085] The modulation voltage generating unit is used to generate the modulation voltage according to the modulation voltage absolute value and the voltage comparison information.

[0086] Optionally, in an embodiment, the computing unit includes:

[0087] The calculation subunit is used to calculate the product of the half bus voltage and the preset modulation duty cycle to obtain the absolute value of the modulation voltage.

[0088] Optionally, in an embodiment, the signal generating module 206 includes:

[0089] The signal generating unit is used to control the PWM modulation module in the inverter to be controlled to modulate a preset carrier based on a modulation voltage to generate a PWM signal.

[0090] In some embodiments, a photovoltaic inverter standby automatic voltage equalization device 200 of the present invention can be implemented by a combination of software and hardware. As an example, a photovoltaic inverter standby automatic voltage equalization device 200 of the present invention can be a processor in the form of a hardware decoding processor, which is programmed to execute a photovoltaic inverter standby automatic voltage equalization method of the present invention. For example, the processor in the form of a hardware decoding processor can adopt one or more application-specific integrated circuits (ASICs), DSPs, programmable logic devices (PLDs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs) or other electronic components.

[0091] The modules described in the embodiments of the present invention may be implemented in software or hardware, and the name of a module does not necessarily limit the module itself.

[0092] Example 3

[0093] like Figure 5 As shown, this embodiment provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, a photovoltaic inverter standby automatic voltage equalization method as in the first embodiment is implemented.

[0094] An electronic device according to an embodiment of the present invention includes a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the above-mentioned method for automatic voltage equalization in standby mode of a photovoltaic inverter is implemented. That is, an electronic device according to an embodiment of the present invention may include but is not limited to: a processor and a memory; the memory is used to store the computer program; the processor is used to execute the method for automatic voltage equalization in standby mode of a photovoltaic inverter shown in any embodiment of the present invention by calling the computer program.

[0095] In an alternative embodiment, an electronic device is provided, Figure 5The electronic device 3000 shown includes: a processor 3001 and a memory 3003. The processor 3001 and the memory 3003 are connected, for example, via a bus 3002. Optionally, the electronic device 3000 may further include a transceiver 3004, which can be used for data exchange between the electronic device and other electronic devices, such as data transmission and / or data reception. It should be noted that in actual applications, the number of transceivers 3004 is not limited to one, and the structure of the electronic device 3000 does not constitute a limitation on the embodiments of the present invention.

[0096] Processor 3001 may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. Processor 3001 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0097] Bus 3002 may include a path for transmitting information between the above components. Bus 3002 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. Bus 3002 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 In the figure, only one thick line is used to represent the bus 3002, but this does not mean that there is only one bus or one type of bus.

[0098] The memory 3003 may be a ROM (Read Only Memory) or other type of static storage device that can store static information and instructions, a RAM (Random Access Memory) or other type of dynamic storage device that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory) or other optical disk storage, optical disk storage (including compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.

[0099] The memory 3003 is used to store application code (computer program) for executing the solution of the present invention, and is controlled by the processor 3001. The processor 3001 is used to execute the application code stored in the memory 3003 to implement the content shown in the above method embodiment.

[0100] Among them, the electronic device can also be a terminal device, and the terminal device can be any device that can install applications, including at least one of a smartphone, a tablet computer, a laptop computer, a desktop computer, a smart speaker, a smart watch, a smart TV, and a smart car device.

[0101] It should be noted that Figure 5 The electronic device shown is only an example and should not limit the functions and scope of use of the embodiments of the present invention.

[0102] Example 4

[0103] This embodiment provides a non-transitory computer-readable storage medium, which stores computer instructions. The computer instructions are used to enable a computer to execute a photovoltaic inverter standby automatic voltage equalization method as described in the first embodiment.

[0104] A computer-readable storage medium according to an embodiment of the present invention stores a computer program, which, when executed by a processor, implements the above-mentioned automatic voltage equalization method for a photovoltaic inverter in standby mode.

[0105] Alternatively, the computer-readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a compact disc (CD-ROM), a magnetic tape, a floppy disk, an optical data storage device, or the like.

[0106] In an exemplary embodiment, a computer program product or computer program is also provided. The computer program product or computer program includes computer instructions stored in a computer-readable storage medium. A processor of an electronic device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the electronic device to perform the aforementioned method for automatic voltage balancing in standby mode for a photovoltaic inverter.

[0107] Computer program code for performing the operations of the present invention may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, C++, and conventional procedural programming languages such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0108] It should be understood that the flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architecture, functions and operations of the methods and computer program products according to various embodiments of the present invention. In this regard, each box in the flowchart or block diagram can represent a module, program segment, or a part of code, and the module, program segment, or a part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order than the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of the boxes in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or can be implemented using a combination of dedicated hardware and computer instructions.

[0109] The computer-readable storage medium provided in the embodiment of the present invention may be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EEPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present invention, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or component.

[0110] The computer-readable storage medium carries one or more programs. When the one or more programs are executed by the electronic device, the electronic device executes the method shown in the above embodiment.

[0111] Example 5

[0112] This embodiment provides a photovoltaic system, including a photovoltaic inverter standby automatic voltage equalization device as described in the second embodiment.

[0113] The above description is merely a preferred embodiment of the present invention and an illustration of the technical principles employed. Those skilled in the art should understand that the scope of disclosure involved in the present invention is not limited to the technical solutions formed by the specific combination of the above-mentioned technical features, but also includes other technical solutions formed by any combination of the above-mentioned technical features or their equivalents without departing from the above-mentioned disclosed concepts. For example, a technical solution formed by replacing the above-mentioned features with (but not limited to) technical features with similar functions disclosed in the present invention.

[0114] It should be noted that the terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects and to define a specific order or precedence. Where appropriate, the order used for similar objects may be interchanged, such that the embodiments of the present application described herein can be implemented in an order other than the order shown or described.

[0115] Those skilled in the art will appreciate that the present invention may be implemented as a system, method, or computer program product. Therefore, the present invention may be implemented in the following forms: entirely in hardware, entirely in software (including firmware, resident software, microcode, etc.), or in a combination of hardware and software, generally referred to herein as a "circuit," "module," or "system." Furthermore, in some embodiments, the present invention may be implemented in the form of a computer program product embodied in one or more computer-readable media containing computer-readable program code.

[0116] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A photovoltaic inverter standby automatic voltage equalization method, characterized in that: include: S11, identifying whether the inverter to be controlled is in a standby state; S12: If the inverter to be controlled is in a standby state, respectively obtaining the standby duration of the inverter to be controlled, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage; S13. Determine whether a preset voltage balancing start condition is met based on the standby time, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage; S14: If the preset voltage balancing start condition is met, releasing the output blocking of the PWM modulation module in the inverter to be controlled; S15, determining a modulation voltage according to the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage; S16, controlling a PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage, and controlling the IGBT in the inverter to be controlled to perform a switching action through the PWM signal, so as to discharge the DC-side upper bus capacitor or the DC-side lower bus capacitor in the inverter to be controlled; S17 , repeatedly executing S11 to S16 until the preset voltage balancing start condition is no longer met, and the automatic voltage balancing of the inverter to be controlled is completed.

2. A photovoltaic inverter standby automatic voltage equalization method according to claim 1, characterized in that: The determining whether a preset voltage balancing start condition is met according to the standby time, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage includes: Calculating the absolute value of the difference between the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage to obtain the absolute value of the voltage difference; Whether a preset voltage balancing start condition is met is determined according to the standby time, the DC side upper bus capacitor voltage, the DC side lower bus capacitor voltage, and the absolute value of the voltage difference.

3. A photovoltaic inverter standby automatic voltage equalization method according to claim 2, characterized in that: The preset voltage balancing start-up conditions are: the standby time is greater than the preset bus voltage balancing delay time, and the absolute value of the voltage difference is greater than the preset bus voltage balancing deviation maximum value, and the DC side bus capacitor voltage is less than the preset half-bus voltage protection threshold, and the DC side lower bus capacitor voltage is less than the preset half-bus voltage protection threshold.

4. A photovoltaic inverter standby automatic voltage equalization method according to claim 1, characterized in that: The determining of the modulation voltage according to the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage includes: Obtaining a half-bus voltage of the inverter to be controlled; Calculating an absolute value of a modulation voltage according to the half-bus voltage and a preset modulation duty cycle; generating voltage comparison information based on the DC-side upper bus capacitor voltage and the DC-side lower bus capacitor voltage, wherein the voltage comparison information is information describing a magnitude relationship between the DC-side upper bus capacitor voltage and the DC-side lower bus capacitor voltage; The modulation voltage is generated according to the modulation voltage absolute value and the voltage comparison information.

5. A photovoltaic inverter standby automatic voltage equalization method according to claim 4, characterized in that: Calculating the absolute value of the modulation voltage according to the half-bus voltage and the preset modulation duty cycle includes: calculating the product of the half-bus voltage and the preset modulation duty cycle to obtain the absolute value of the modulation voltage.

6. A photovoltaic inverter standby automatic voltage equalization method according to claim 1, characterized in that: The controlling the PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage includes: controlling the PWM modulation module in the inverter to be controlled to modulate a preset carrier based on the modulation voltage to generate a PWM signal.

7. A photovoltaic inverter standby automatic voltage equalization device, characterized in that: include: A state identification module is used to identify whether the inverter to be controlled is in a standby state; a data acquisition module, configured to respectively acquire the standby duration of the inverter to be controlled, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage when the inverter to be controlled is in a standby state; a condition judgment module, configured to judge whether a preset voltage balancing start condition is met based on the standby time, the DC side upper bus capacitor voltage, and the DC side lower bus capacitor voltage; A blocking release module, configured to release the output blocking of the PWM modulation module in the inverter to be controlled when the preset voltage balancing start condition is met; a voltage determination module, configured to determine a modulation voltage according to the DC side upper bus capacitor voltage and the DC side lower bus capacitor voltage; a signal generating module, configured to control a PWM modulation module in the inverter to be controlled to generate a PWM signal according to the modulation voltage, and to control the IGBT in the inverter to be controlled to perform a switching action through the PWM signal, so as to discharge the DC-side upper bus capacitor or the DC-side lower bus capacitor in the inverter to be controlled; A loop module is used to repeatedly execute the operations of the state identification module, the data acquisition module, the condition judgment module, the blockade release module, the voltage determination module and the signal generation module until the preset voltage equalization start condition is not met, thereby completing the automatic voltage equalization of the inverter to be controlled.

8. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, a photovoltaic inverter standby automatic voltage equalization method according to any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to enable a computer to execute the photovoltaic inverter standby automatic voltage equalization method according to any one of claims 1 to 6.

10. A photovoltaic system, characterized in that: It includes a photovoltaic inverter standby automatic voltage equalization device as described in claim 7.

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