SAS (Serial Attached SCSI) address management method, device and equipment based on assembled printed circuit board

Abstract

The invention relates to the technical field of assembly printed circuit board production, and provides an SAS address management method, device and equipment based on an assembly printed circuit board, and the method comprises the steps: obtaining a preset SAS address pool and a preset SAS distribution rule; determining candidate SAS address fields from a preset SAS address pool according to the number of board card work orders for assembling the printed circuit board and a preset SAS allocation rule; obtaining a target quality identification code of the target assembly printed circuit board, and establishing an address binding relationship between a target SAS address and the target quality identification code, the target SAS address being obtained by screening from the candidate SAS address field; and transmitting the address binding relationship to an online test burning system, so that the online test burning system burns the target SAS address into a storage chip of the target assembly printed circuit board based on the address binding relationship and the scanning quality identification code. According to the technical scheme provided by one or more embodiments of the invention, paperless management and control of the SAS address can be realized.

Description

Technical Field

[0001] The present disclosure relates to the technical field of assembled printed circuit board production, and in particular to a SAS address management method, apparatus, and device based on assembled printed circuit boards. Background Art

[0002] In the current printed circuit board assembly (PCBA) production process, some boards (such as expander cards, RAID cards, and host bus adapters (HBAs)) use SAS (Serial Attached SCSI) addresses as unique identifiers for hardware device identification and communication. SAS is a serial interface technology based on the SCSI (Small Computer System Interface) protocol, used to connect computers and storage devices such as hard drives, solid-state drives, and tape drives. Therefore, SAS address management methods for allocating and binding SAS addresses are an integral part of the PCBA production process.

[0003] Generally speaking, the management and control process for allocating and binding SAS addresses can include a series of steps, including SAS address allocation, barcode printing, barcode affixing, scanning and binding, scanning and burning, and verification. This management and control method generally uses the printing and affixing of SAS labels. That is, the pre-assigned SAS address is printed on barcode paper, which is then manually affixed to the corresponding PCBA during production. Subsequent scanning and binding, scanning and burning, and verification are then performed.

[0004] For example, the prior art CN115423060A discloses a technical solution of "a SAS address segment allocation module, which is used to intercept the SAS address segment required for the entire work order from the SAS address pool according to the number of work orders and the maintained board SAS address allocation rules after the work order is opened; a barcode printing and pasting module, which is used to print the corresponding S / N number segment and SAS address segment barcode according to the work order, and paste the S / N number segment and SAS address segment barcode one by one on the PCBA board." Summary of the Invention

[0005] In view of this, one or more embodiments of the present disclosure provide a SAS address management method, apparatus, and device based on assembled printed circuit boards, which can achieve paperless management and control of SAS addresses.

[0006] In a first aspect, the present disclosure provides a SAS address management method based on assembled printed circuit boards, the method comprising: obtaining a preset SAS address pool and a preset SAS allocation rule; determining a candidate SAS address segment from the preset SAS address pool based on the number of board work orders for assembled printed circuit boards and the preset SAS allocation rule; obtaining a target quality identification code of a target assembled printed circuit board, and establishing an address binding relationship between a target SAS address and the target quality identification code, the target SAS address being screened from the candidate SAS address segment; transmitting the address binding relationship to an online test burning system, so that the online test burning system burns the target SAS address into a memory chip of the target assembled printed circuit board based on the address binding relationship and the scanned quality identification code; the scanned quality identification code is obtained by the online test burning system by scanning a paper label of the target quality identification code.

[0007] In a second aspect, the present disclosure provides a SAS address management device based on an assembled printed circuit board, the device comprising: an address acquisition unit for acquiring a preset SAS address pool and a preset SAS allocation rule; an address allocation unit for determining a candidate SAS address segment from the preset SAS address pool based on the number of board work orders for assembling the printed circuit board and the preset SAS allocation rule; an address binding unit for acquiring a target quality identification code of a target assembled printed circuit board and establishing an address binding relationship between a target SAS address and the target quality identification code, the target SAS address being screened from the candidate SAS address segment; an address transmission unit for transmitting the address binding relationship to an online test burning system, so that the online test burning system burns the target SAS address into a memory chip of the target assembled printed circuit board based on the address binding relationship and the scanned quality identification code; the scanned quality identification code is obtained by the online test burning system scanning a paper label of the target quality identification code.

[0008] In a third aspect, the present disclosure provides a computer device comprising a memory and a processor, wherein the memory is used to store a computer program, and when the computer program is executed by the processor, the above-mentioned SAS address management method based on assembled printed circuit boards is implemented.

[0009] In a fourth aspect, the present disclosure provides a computer-readable storage medium for storing a computer program. When the computer program is executed by a processor, the computer program implements the above-mentioned SAS address management method based on assembled printed circuit boards.

[0010] The technical solution provided by one or more embodiments of the present disclosure establishes an address binding relationship between a target SAS address and a target quality identification code. Based on this address binding relationship and a scanned quality identification code, an online test and programming system directly programs the target SAS address into the memory chip of the target assembled printed circuit board. This eliminates the need for printing and affixing SAS labels, effectively overcoming the drawbacks of existing SAS address management methods, such as the fragility of paper labels, low operational efficiency, and lack of foolproofing. By implementing system logic foolproofing, paperless allocation and management of SAS addresses is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The features and advantages of the various embodiments of the present disclosure will be more clearly understood by referring to the accompanying drawings, which are schematic and should not be construed as limiting the present disclosure in any way. In the accompanying drawings: Figure 1 A schematic diagram showing the steps of a SAS address management method based on assembling a printed circuit board in one embodiment of the present disclosure is shown; Figure 2 A reference schematic diagram showing SAS allocation rules in one embodiment of the present disclosure is shown; Figure 3 A reference schematic diagram of a target quality identification code in one embodiment of the present disclosure is shown; Figure 4 A reference schematic diagram of a target SAS address in one embodiment of the present disclosure is shown; Figure 5 A schematic diagram of address binding relationship in one embodiment of the present disclosure is shown; Figure 6 A flow chart of a SAS address management method based on assembled printed circuit boards in one embodiment of the present disclosure is shown; Figure 7 A schematic diagram of functional modules of a SAS address management device based on an assembled printed circuit board in one embodiment of the present disclosure is shown; Figure 8 A schematic structural diagram of a computer device in one embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0012] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present disclosure.

[0013] Existing methods for managing SAS addresses on PCBAs typically involve printing and affixing SAS labels. This involves printing pre-assigned SAS addresses onto barcode paper, which is then manually affixed to the corresponding PCBA during production. Subsequent scanning, binding, burning, and verification are then performed. This method has several drawbacks: 1. Relying on paper labels to record SAS addresses is prone to damage, loss, and information lag. 2. Manual scanning and entry is inefficient (average time per board: ≥3 seconds), with an error rate as high as 0.5%-1%, leading to increased rework costs. 3. Paper labels are not foolproof—if boards are incorrectly affixed or not affixed, they cannot be immediately detected, risking the board being sent to the next station, ultimately resulting in rework or even defective boards being shipped to customers, resulting in significant losses.

[0014] In view of this, an embodiment of the present disclosure provides a SAS address management method based on assembled printed circuit boards, which can be applied to a SAS address control device. The SAS address control device can be an electronic device with data processing capabilities. For example, the SAS address control device can be a personal computer, workstation, etc. Furthermore, the method can also be applied to software running on the aforementioned SAS address control device.

[0015] See also Figure 1 , a SAS address management method based on assembling a printed circuit board provided by an embodiment of the present disclosure may include the following steps.

[0016] S1: Obtain a preset SAS address pool and preset SAS allocation rules.

[0017] In this embodiment, before a PCBA work order is opened, a preset SAS address pool and a preset SAS allocation rule for each PCBA need to be maintained. The preset SAS allocation rule can be the number of SAS addresses to be allocated to each PCBA or the character usage rules for the SAS addresses to be allocated to each PCBA.

[0018] For a practical example, see Figure 2 , you can follow the Figure 2 The format shown maintains a preset SAS address pool and preset SAS address allocation rules for each board. The shared SAS address pool for all PCBAs is "27A33DE000000000-27A33DEFFFFFFFFFF." For a PCBA with model (P / N) A, 64 SAS addresses must be pre-allocated for each PCBA created. Furthermore, for a PCBA with model (P / N) A, the SAS address character usage rule is "a total of 16 hexadecimal digits, the first 7 digits must be 27A33DE, and the last 2 digits must be 00, 40, 80, or C0."

[0019] Specifically, "PCBA P / N" refers to the PCBA part number, a code or number used to uniquely identify a printed circuit board assembly (PCBA). Part numbers are crucial throughout electronics manufacturing, supply chain management, and after-sales service. A PCBA P / N typically consists of the following components: Product Series Code: Identifies the series or product line to which the product belongs. For example, "SMB" might represent a small server motherboard series. Version Number: Identifies the design version of the PCBA. For example, "V1.0" represents the first version of the design, and "V2.0" represents the second version of the design. Function or Model Code: Identifies the specific function or model of the PCBA. For example, "RAID" might indicate that this is a RAID card. Supplier or Manufacturer Code: Identifies the supplier or manufacturer of the PCBA. For example, "ABC" might indicate that the PCBA was manufactured by ABC Company. Serial Number or Batch Number: Used to further differentiate between PCBAs of the same version, typically used for production batch management.

[0020] S2: Determine a candidate SAS address segment from the preset SAS address pool according to the number of board work orders for assembling a printed circuit board and the preset SAS allocation rule.

[0021] In this embodiment, each board work order is used to create a separate PCBA. Thus, based on the number of board work orders for the PCBA and the preset SAS allocation rules, candidate SAS address segments that meet the requirements of each board work order can be screened from the preset SAS address pool. In other words, by establishing a relationship between the candidate SAS address segments and each board work order, the PCBAs corresponding to these board work orders no longer use SAS addresses outside the candidate SAS address segments, effectively preventing SAS address confusion.

[0022] In this embodiment, a board work order is a document or record used to guide production activities. For PCBAs, the board work order contains all the information necessary to produce a batch of printed circuit board assemblies. For example, it clearly specifies the PCBA model, production process requirements (including soldering temperature, placement accuracy, etc.), raw material information (specifications and batches of electronic components and PCBs), quality standards, and so on. This information is crucial for the production department, acting as a "to-do list," telling production personnel what to do, how to do it, and what results are required.

[0023] In some embodiments, determining the candidate SAS address segment from the preset SAS address pool based on the number of board work orders for assembling a printed circuit board and the preset SAS allocation rule includes: determining an initial SAS address segment from the preset SAS address pool based on the number of board work orders and a quantity allocation rule in the preset SAS allocation rule; and determining the candidate SAS address segment from the initial SAS address segment based on a character allocation rule in the preset SAS allocation rule.

[0024] In some implementations, the quantity allocation rule includes: the number of SAS address resources expected to be occupied by a single assembled printed circuit board; the character allocation rule includes: character usage rules of the SAS address expected by a single assembled printed circuit board.

[0025] In a practical application example, the preset SAS address pool and the preset SAS allocation rules can be used Figure 2 During the PCBA work order opening phase, the total number of work orders is determined to be 10. Based on the quantity allocation rules in the preset SAS allocation rules, it can be determined that 640 SAS addresses are required, meaning the initial SAS address segment is "27A33DE000000000-27A33DE00000027F." Subsequently, the character allocation rules in the preset SAS allocation rules are used to determine candidate SAS address segments from the initial SAS address segment, ensuring that the SAS addresses in the candidate SAS address segments meet the following conditions: the first seven digits must be 27A33DE, and the last two digits must be 00, 40, 80, or C0.

[0026] In this context, "opening" can be understood as creating, generating, or initiating. "Opening a work order" refers to creating a new PCBA work order record in the production management system based on the production plan and order requirements. This process typically involves entering relevant work order information (such as the aforementioned PCBA model and production process requirements) into the system, while also associating it with the previously maintained SAS address pool and SAS address allocation rules.

[0027] Issuing a work order is one of the first steps in the production process, marking the official release of a production task. Once a work order is issued, subsequent production processes (such as raw material procurement, production scheduling, and actual assembly) will be centered around this work order and executed according to its requirements.

[0028] S3: Obtain a target quality identification code of a target assembled printed circuit board, and establish an address binding relationship between a target SAS address and the target quality identification code, wherein the target SAS address is obtained by screening from the candidate SAS address segment.

[0029] In this implementation, each PCBA board should have a unique quality identification code (QID) to identify the specific board, facilitating quality control and traceability during the production process. For example, a barcode printer would print the QID number for each PCBA based on the work order and then affix it to the corresponding position on the board at the pre-processing station before the board goes online. When the PCBA is normally routed to the visual inspection station before the ICT (In-Circuit Test) station, the target PCBA can be manually or machine-scanned to obtain the target QID.

[0030] In this implementation, by establishing an address binding relationship between the target SAS address and the target QID, it is possible to eliminate the need to download, print, and affix SAS labels. For example, back-end equipment (such as an online test burning system) can eliminate the need to scan paper SAS labels and instead directly determine the target SAS address based on the scanned quality identification code information and the previously established address binding relationship. Ultimately, the accurate target SAS address is burned into the memory chip of the target PCBA board.

[0031] In some embodiments, establishing an address binding relationship between a target SAS address and a target quality identification code includes: for the target assembled printed circuit board, sequentially screening out the corresponding target SAS address from the candidate SAS address segments; binding the target SAS address to the target quality identification code, and generating and recording the address binding relationship.

[0032] In some implementations, the SAS address management method based on assembled printed circuit boards further includes: extracting a bound SAS address according to the address binding relationship; and determining whether the bound SAS address falls within the candidate SAS address segment.

[0033] Specifically, during the address binding generation phase, the target SAS address corresponding to the target QID is selected from the candidate SAS address segment. Therefore, after the address binding is generated, each bound SAS address in the address binding can be checked to see if it falls within the candidate SAS address segment. This creates a reverse verification mechanism, achieving a first-level foolproofing of SAS addresses.

[0034] For a practical example, see Figure 3 , according to the board work order, 10 target PCBAs need to be produced. The target QIDs of these target PCBAs are 000 to 010 respectively. Figure 4, 10 target SAS addresses can be read sequentially from the candidate SAS address segment. The first 13 bits of these 10 target SAS addresses are fixed to 27A33DE000000, and the last three bits are 000, 040, 080, 0C0, 100, 140, 180, 1C0, 200, and 240 respectively. Finally, refer to Figure 5 , the target QID can be bound to the target SAS address to form an address binding relationship.

[0035] S4: Transmitting the address binding relationship to an online test burning system so that the online test burning system burns the target SAS address into the storage chip of the target assembled printed circuit board based on the address binding relationship and the scanned quality identification code; the scanned quality identification code is obtained by the online test burning system scanning the paper label of the target quality identification code.

[0036] In this embodiment, the target PCBA board will be transmitted to the ICT burning system to perform chip burning of the SAS address. In the existing technical solutions, the ICT burning system is generally required to scan the paper SAS label of the target PCBA before the SAS address can be burned into the memory chip of the PCBA. Compared with the existing technology, in this embodiment, the ICT burning system only needs to scan and obtain the paper label of the target QID of the target PCBA to obtain the scanned QID. Subsequently, based on the scanned quality identification code, the ICT burning system can find the corresponding target SAS address in the address binding relationship and complete the burning work. In the entire process, there is no need to print, paste, and scan the SAS label.

[0037] In some embodiments, the online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board based on the address binding relationship and the scan quality identification code, including: the online test burning system scans the paper label of the target quality identification code of the target assembled printed circuit board to determine the scan quality identification code; based on the address binding relationship, the online test burning system determines the target SAS address corresponding to the scan quality identification code; the online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board.

[0038] In some embodiments, after the online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board based on the address binding relationship and the scanned quality identification code, the method further includes: scanning the current quality identification code of the target assembled printed circuit board; reading the current SAS address that has been burned into the memory chip of the target assembled printed circuit board; and performing a functional circuit test based on the current quality identification code, the current SAS address, and the address binding relationship.

[0039] Specifically, throughout the entire PCBA production control process, from QID barcode affixing to PCBA production, SAS address programming, and PCBA functional circuit testing (FCT), it's impossible to guarantee that the QID labels affixed to each board have not been modified or removed. Therefore, the FCT workstation can scan the QID label information on each PCBA after the SAS address has been programmed, read the programmed SAS address from the memory chip, and compare it with the retained information in the address binding relationship determined in step S3 to verify whether any abnormal operation has occurred.

[0040] It should be noted that FCT testing is a functional test used to verify whether the PCBA's functions meet design requirements under actual operating conditions. It simulates the product's actual operating environment and verifies various product functions, such as button response, LED display, and communication capabilities. The FCT testing process includes: before testing begins, scanning the barcode on the PCBA to obtain its unique identification information and sending this information to the MES (Manufacturing Execution System); powering on the PCBA to verify that all functions are functioning properly; burning firmware or configuration information into the PCBA's memory chip; and after testing is complete, sending the test results to the user, recording whether the test passed or failed. FCT testing ensures the functional reliability of the PCBA in actual use and is a critical step in product quality control.

[0041] In some embodiments, the functional circuit test is performed based on the current quality identification code, the current SAS address, and the address binding relationship, including: determining the current binding relationship based on the current quality identification code and the current SAS address; and performing the functional circuit test based on a comparison result of the current binding relationship and the address binding relationship.

[0042] In a practical application example, the FCT workstation automatically scans the QID label on each board and reads the SAS address programmed into the memory chip. The scanned and read QID and SAS address bindings are then automatically compared with the previously recorded address bindings. Only if the matching pair matches can the board proceed to the final inspection and packaging station. If not, the board cannot proceed to the next station. This comparison process implements the second level of error prevention in the SAS address management method.

[0043] See also Figure 6 , a SAS address management method based on PCBA provided in one embodiment of the present disclosure may include the following main processes.

[0044] First, before a PCBA work order is opened, a preset SAS address pool must be maintained in the system. The address resources and character usage rules (i.e., SAS allocation rules) for the SAS addresses required for each PCBA must also be maintained. After a work order is opened, based on the number of board work orders for printed circuit board assembly and the established board SAS allocation rules, candidate SAS address segments required for all work orders can be automatically intercepted from the preset SAS address pool. To prevent confusion, the association between candidate SAS address segments and these work orders can be pre-set, ensuring that the PCBAs corresponding to these work orders cannot use SAS addresses outside the candidate SAS address segment.

[0045] Subsequently, according to the board work order, the target QID corresponding to the target PCBA can be printed, and the target QID can be pasted to the corresponding position of the target PCBA at the pre-processing station before the target PCBA goes online.

[0046] When the target PCBA flows normally to the visual inspection station in front of the ICT workstation, it can be scanned to obtain the target QID. Subsequently, a corresponding number of target SAS addresses can be sequentially retrieved from the assigned candidate SAS address segment. After forming a binding relationship between this target SAS address and the target QID just scanned, the address binding relationship can be recorded and saved to the backend. In particular, the target SAS address assigned at this stage can only fall within the previously determined candidate SAS address segment and cannot be an address outside the candidate SAS address segment range, forming a first-level error-proofing mechanism.

[0047] The target PCBA then continues production to the ICT programming station. Compared to existing technologies, this eliminates the need to scan the PCBA's paper SAS barcode. Instead, the ICT machine automatically scans the PCBA's QID barcode and, based on the recorded address binding relationship, programs the target SAS address corresponding to the target QID into the PCBA's memory chip.

[0048] Since there's no guarantee that the QID labels affixed to each board have not been altered, removed, or otherwise mishandled throughout the entire process, from QID barcode affixing to PCBA production, SAS address programming, and FCT packaging, the FCT workstation scans each board's QID label and reads the SAS address programmed into the memory chip. The scanned and read current QID and SAS address are automatically compared with the address bindings recorded at the previous workstation. Only if they match can the board proceed to the packaging station. If they don't, the board cannot proceed to the next workstation and must return to the ICT programming station to identify the cause and reprogram the address. This implements a second-level error-proofing mechanism, enabling paperless allocation and management of SAS addresses.

[0049] The technical solution provided by one or more embodiments of the present disclosure establishes an address binding relationship between a target SAS address and a target quality identification code. Based on this address binding relationship and a scanned quality identification code, an online test and programming system directly programs the target SAS address into the memory chip of the target assembled printed circuit board. This eliminates the need for printing and affixing SAS labels, effectively overcoming the drawbacks of existing SAS address management methods, such as the fragility of paper labels, low operational efficiency, and lack of foolproofing. By implementing system logic foolproofing, paperless allocation and management of SAS addresses is achieved.

[0050] See also Figure 7 The present disclosure further provides a SAS address management device based on PCBA, the device comprising: The address acquisition unit 100 is used to acquire a preset SAS address pool and a preset SAS allocation rule; The address allocation unit 200 is configured to determine a candidate SAS address segment from the preset SAS address pool according to the number of board work orders for assembling a printed circuit board and the preset SAS allocation rule; An address binding unit 300 is configured to obtain a target quality identification code of a target assembled printed circuit board and establish an address binding relationship between a target SAS address and the target quality identification code, wherein the target SAS address is obtained by screening the candidate SAS address segment; The address transmission unit 400 is used to transmit the address binding relationship to the online test burning system, so that the online test burning system burns the target SAS address into the storage chip of the target assembled printed circuit board based on the address binding relationship and the scanned quality identification code; the scanned quality identification code is obtained by the online test burning system scanning the paper label of the target quality identification code.

[0051] In one embodiment, the address allocation unit 200 is specifically used to determine the initial SAS address segment from the preset SAS address pool based on the number of board work orders and the quantity allocation rule in the preset SAS allocation rule; and determine the candidate SAS address segment from the initial SAS address segment based on the character allocation rule in the preset SAS allocation rule.

[0052] In one embodiment, the address binding unit 300 is specifically used to, for the target assembled printed circuit board, sequentially filter out the corresponding target SAS address from the candidate SAS address segments; bind the target SAS address with the target quality identification code, and generate and record the address binding relationship.

[0053] In one embodiment, the PCBA-based SAS address management device further includes a first verification unit configured to extract a bound SAS address based on the address binding relationship and determine whether the bound SAS address falls within the candidate SAS address segment.

[0054] In one embodiment, the online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board based on the address binding relationship and the scan quality identification code, including: the online test burning system scans the paper label of the target quality identification code of the target assembled printed circuit board to determine the scan quality identification code; based on the address binding relationship, the online test burning system determines the target SAS address corresponding to the scan quality identification code; the online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board.

[0055] In one embodiment, the PCBA-based SAS address management device further includes a second verification unit configured to scan a current quality identification code of the target assembled printed circuit board, read a current SAS address programmed into a memory chip of the target assembled printed circuit board, and perform a functional circuit test based on the current quality identification code, the current SAS address, and the address binding relationship.

[0056] In one embodiment, the second verification unit is specifically configured to determine a current binding relationship according to the current quality identification code and the current SAS address; and perform a functional circuit test according to a comparison result between the current binding relationship and the address binding relationship.

[0057] The various units described in the above embodiments can be implemented by computer chips or products with certain functions. A typical implementation device is a computer. Specifically, the computer can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0058] For the convenience of description, the above devices are described as being divided into various units according to their functions. Of course, when implementing this application, the functions of each unit can be implemented in the same or multiple software and / or hardware.

[0059] See also Figure 8The present disclosure also provides a computer device, which includes a memory and a processor, wherein the memory is used to store a computer program, and when the computer program is executed by the processor, the above-mentioned SAS address management method based on assembled printed circuit boards is implemented.

[0060] The present disclosure also provides a computer-readable storage medium for storing a computer program. When the computer program is executed by a processor, the computer program implements the above-mentioned SAS address management method based on assembled printed circuit boards.

[0061] The processor may be a central processing unit (CPU). The processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or a combination of the above chips.

[0062] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer executable programs, and modules, such as the program instructions / modules corresponding to the methods in the embodiments of the present disclosure. The processor executes the non-transitory software programs, instructions, and modules stored in the memory to perform various processor functions and data processing, thereby implementing the methods in the aforementioned method embodiments.

[0063] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created by the processor, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory may optionally include a memory remotely located relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0064] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing the relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When executed, the program can include the processes in the above-described method embodiments. The storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM), a random access memory (RAM), a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD). The storage medium can also include a combination of the above-mentioned types of memory.

[0065] The various embodiments in this specification are described in a progressive manner. Similar portions between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the device, equipment, and storage medium embodiments are generally similar to the method embodiments, so their descriptions are relatively simplified. For relevant portions, refer to the descriptions of the method embodiments.

[0066] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

[0067] Although the embodiments of the present disclosure have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present disclosure, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A SAS address management method based on assembling a printed circuit board, characterized in that: The method comprises: Get the preset SAS address pool and preset SAS allocation rules; Determining a candidate SAS address segment from the preset SAS address pool according to the number of board work orders for assembling a printed circuit board and the preset SAS allocation rule; Obtaining a target quality identification code of a target assembled printed circuit board, and establishing an address binding relationship between a target SAS address and the target quality identification code, wherein the target SAS address is obtained by screening from the candidate SAS address segment; The address binding relationship is transmitted to an online test burning system, so that the online test burning system burns the target SAS address into the storage chip of the target assembled printed circuit board based on the address binding relationship and the scanned quality identification code; the scanned quality identification code is obtained by the online test burning system scanning a paper label of the target quality identification code.

2. The method according to claim 1, characterized in that The determining of a candidate SAS address segment from the preset SAS address pool according to the number of board work orders for assembling a printed circuit board and the preset SAS allocation rule includes: Determining an initial SAS address segment from the preset SAS address pool according to the number of the board work orders and a quantity allocation rule in the preset SAS allocation rule; The candidate SAS address segment is determined from the initial SAS address segment according to a character allocation rule in the preset SAS allocation rule.

3. The method according to claim 2, characterized in that The quantity allocation rule includes: the number of SAS address resources expected to be occupied by a single assembled printed circuit board; the character allocation rule includes: the character usage rule of the SAS address expected by a single assembled printed circuit board.

4. The method according to claim 1, wherein The establishing of an address binding relationship between a target SAS address and a target quality identification code includes: For the target assembled printed circuit board, sequentially filter out the corresponding target SAS address from the candidate SAS address segments; The target SAS address is bound to the target quality identification code, and the address binding relationship is generated and recorded.

5. The method according to claim 1, wherein The online test burning system burns the target SAS address into the storage chip of the target assembled printed circuit board based on the address binding relationship and the scan quality identification code, including: The online test burning system scans the paper label of the target quality identification code of the target assembled printed circuit board to determine the scanned quality identification code; Based on the address binding relationship, the online test burning system determines the target SAS address corresponding to the scan quality identification code; The online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board.

6. The method according to claim 1 or 5, characterized in that After the online test burning system burns the target SAS address into the memory chip of the target assembled printed circuit board based on the address binding relationship and the scan quality identification code, the method further includes: Scanning the current quality identification code of the target assembled printed circuit board; Reading the current SAS address that has been burned into the memory chip of the target assembled printed circuit board; A functional circuit test is performed according to the current quality identification code, the current SAS address, and the address binding relationship.

7. The method according to claim 6, characterized in that The performing of a functional circuit test according to the current quality identification code, the current SAS address, and the address binding relationship includes: Determining a current binding relationship according to the current quality identification code and the current SAS address; A functional circuit test is performed based on a comparison result of the current binding relationship and the address binding relationship.

8. A SAS address management device based on an assembled printed circuit board, characterized in that: The device comprises: An address acquisition unit, configured to acquire a preset SAS address pool and a preset SAS allocation rule; An address allocation unit, configured to determine a candidate SAS address segment from the preset SAS address pool according to the number of board work orders for assembling a printed circuit board and the preset SAS allocation rule; An address binding unit, configured to obtain a target quality identification code of a target assembled printed circuit board and establish an address binding relationship between a target SAS address and the target quality identification code, wherein the target SAS address is obtained by screening from the candidate SAS address segment; An address transmission unit is configured to transmit the address binding relationship to an online test burning system, so that the online test burning system burns the target SAS address into the storage chip of the target assembled printed circuit board based on the address binding relationship and a scanned quality identification code; the scanned quality identification code is obtained by the online test burning system scanning a paper label of the target quality identification code.

9. A computer device, characterized in that: The computer device includes a memory and a processor, the memory is used to store a computer program, and when the computer program is executed by the processor, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium is used to store a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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