Power transistor and method for manufacturing power transistor
By arranging the AlGaN layer on the single crystal SiC layer and forming a gallium oxide layer thereon, the energy barrier is optimized, and the problems of expensive gallium oxide donor substrate and high SiC-gallium oxide transition resistance are solved, thereby realizing low-cost and high-performance power transistor manufacturing.
Patent Information
- Application Number
- CN202510136238.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-02-07
- Filing Date
- 2025-02-07
- Publication Date
- 2025-08-08
AI Technical Summary
In the existing gallium oxide power transistor manufacturing, the gallium oxide donor substrate is expensive and the transition resistance between SiC and gallium oxide is high, resulting in increased costs and poor performance.
Using a single crystal SiC layer as the basis, the AlGaN layer is arranged on the single crystal SiC layer, and the gallium oxide layer is arranged on the AlGaN layer, and the energy barrier is optimized by adjusting the aluminum concentration and doping gradient of the AlGaN layer to form a continuous and low resistance transition.
The resistance between SiC and gallium oxide is reduced, the conductivity and manufacturing efficiency of power transistors are improved, and the production cost is reduced.
Smart Images
Figure CN120456593A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a power transistor and a method for manufacturing a power transistor. Background Art
[0002] Gallium oxide-based power transistors have lower on-resistance than similar power transistors based on SiC or GaN.
[0003] However, gallium oxide has a low thermal conductivity, so when producing vertical gallium oxide transistors, a polycrystalline SiC substrate is used, to which the gallium oxide layer is applied. This is usually done with the aid of a gallium oxide donor substrate.
[0004] Disadvantages here are that this method is expensive, the gallium oxide donor substrate has a smaller diameter than the common polycrystalline SiC substrate, and the transition between SiC and gallium oxide is Has high resistance.
[0005] The object of the present invention is to overcome these disadvantages. Summary of the Invention
[0006] The power transistor has a single-crystalline SiC layer. According to the present invention, an AlGaN layer is arranged on the single-crystalline SiC layer, wherein the gallium oxide layer is arranged on the AlGaN layer.
[0007] An advantage here is that the conduction band of AlGaN lies between the conduction bands of SiC and gallium oxide, so that the resistance between SiC and gallium oxide is low.
[0008] In the extended solution, the AlGaN layer has an aluminum-gallium ratio of 1:4-1:2. ).
[0009] Advantageously, the energy barrier with respect to gallium oxide and with respect to SiC can be adjusted by varying the aluminum concentration in the AlGaN layer.
[0010] In another configuration, the aluminum concentration of the AlGaN layer decreases toward the gallium oxide layer.
[0011] The advantage here is that the resistance between SiC and gallium oxide is further reduced, since the band gap and therefore the energy position of the conduction band edge change gradually. ) is continuous and non-transient.
[0012] In an extended embodiment, the gallium oxide layer has a thickness greater than 5e18 cm^-3 (or 5×10 18 cm -3 ) of n-doping concentration.
[0013] Advantageously, the energy barrier between AlGaN and gallium oxide can be further reduced by high doping in order to ensure a low-loss current flow.
[0014] In another configuration, the GaN layer is arranged between the AlGaN layer and the gallium oxide layer.
[0015] An advantage here is that the conduction band of GaN is located between the conduction bands of AlGaN and gallium oxide, so that the resistance between SiC and gallium oxide is very low.
[0016] In one configuration, the AlGaN layer has a first doping gradient, wherein the first doping gradient decreases from a side of the AlGaN layer facing the SiC layer in the direction of the gallium oxide layer.
[0017] Advantageously, the energy barrier of AlGaN relative to GaN is lower than the energy barrier of AlGaN relative to SiC. The energy barrier can be lowered by a higher doping concentration on the side facing SiC, so that a uniform barrier is formed on both sides.
[0018] In another configuration, the GaN layer has a second doping gradient, wherein the second doping gradient increases from a side of the GaN layer facing the AlGaN layer in the direction of the gallium oxide layer.
[0019] The advantage here is that the energy barrier of GaN to AlGaN is lower than the energy barrier of GaN to gallium oxide. The energy barrier can be lowered by a higher doping concentration on the side facing gallium oxide to provide a uniform barrier to both sides.
[0020] In one embodiment, the gallium oxide layer has a third doping gradient, wherein the doping of the gallium oxide layer is greatest in a lower region facing the SiC layer.
[0021] The method according to the invention for producing a power transistor comprises applying an AlGaN layer on a single-crystalline SiC layer by means of MOCVD, and applying a gallium oxide layer on the AlGaN layer by means of MOCVD or HVPE.
[0022] In one embodiment, a GaN layer is applied on the AlGaN layer by means of MOCVD.
[0023] Further advantages result from the following description of exemplary embodiments or from the dependent claims. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The present invention is described below based on preferred embodiments and accompanying drawings.
[0025] Figure 1 : According to the first embodiment of the power transistor of the present invention,
[0026] Figure 2 : According to the second embodiment of the power transistor of the present invention,
[0027] Figure 3 : A method for manufacturing a power transistor. DETAILED DESCRIPTION
[0028] Figure 1 A first embodiment of a power transistor 100 according to the present invention is shown. The power transistor 100 comprises a single-crystalline SiC layer 102. An AlGaN layer 103 is arranged on the SiC layer 102. A gallium oxide layer 105 is arranged on the AlGaN layer 103. In order to reduce the resistance at the transition between the AlGaN layer 103 and the gallium oxide layer 105, the gallium oxide layer 105 can optionally have a very high n-doping concentration in the lower region, i.e., immediately above the AlGaN layer 103, in particular greater than 5e18 cm^-3 (or 5×10 18 cm -3 ).
[0029] Figure 2 A second embodiment of a power transistor 200 according to the present invention is shown. The power transistor 200 includes a single-crystalline SiC layer 202. An AlGaN layer 203 is arranged on the SiC layer 202. A GaN layer 204 is arranged on the AlGaN layer 203. A gallium oxide layer 105 is arranged on the GaN layer 203. The GaN layer 203 has a layer thickness of 50-200 nanometers. The doping concentration of the GaN layer 204 is greater than 1e19 cm^-3 (or 1×10 19 cm -3 In this case, the doping may be uniform or may have a doping gradient, which increases upward starting from the side of the GaN layer 204 facing the AlGaN layer 203 .
[0030] The single crystal SiC layers 102 and 202 have a thickness greater than 5e18 cm^-3 (or 5×10 18 cm -3) n-doping concentration. The AlGaN layers 103 and 203 have a layer thickness of at least 50 nanometers. The aluminum-gallium concentration ratio in the AlGaN layers 103 and 203 preferably has a ratio of 1:4-1:2. Ideally, the aluminum concentration is selected so that the energy barrier relative to SiC and relative to gallium oxide is the same. The goal is to establish the following energy transition from SiC to gallium oxide: the energy transition enables low-loss current transmission. The doping concentration of the AlGaN layers 103 and 203 is greater than 5e18 cm^-3 (or 5×10 18 cm -3 ), preferably 1e20cm^-3 (or 1×10 20 cm -3 ). In this case, the doping can be uniform or can have a doping gradient that decreases upward starting from the side of the AlGaN layer 103 and 203 facing the SiC layer 102 and 202. This means that the conduction band edge on the side facing the gallium oxide corresponds as much as possible to the conduction band edge of gallium oxide and on the side facing the SiC corresponds as much as possible to the conduction band edge of SiC. The power transistors 100 and 200 each include a source electrode 106 or 206 and a gate electrode 108 or 208, which are arranged on the gallium oxide layer 104 or 204. The source electrode 106 or 206 and the gate electrode 108 or 208 are electrically isolated from each other by an insulating region 107 or 207. The drain electrode 101 or 201 is located below the silicon layer 102 or 202.
[0031] For example, the present invention is used in power transistors, particularly MOSFETs or JFETs, which are used in electric drive systems of electric vehicles or hybrid vehicles, such as DC / DC converters and inverters, as well as vehicle charging equipment. The power transistors can also be used in inverters for household appliances such as washing machines.
[0032] Figure 3 A method 300 for producing a power transistor is shown. The method begins with step 310, in which an AlGaN layer is applied to a single-crystalline SiC layer, preferably by means of MOCVD. The AlGaN layer has a density greater than 5e18 cm^-3 (or 5×10 18 cm -3 ) is preferably greater than 1e20cm^-3 (or 1×10 20 cm -3 ) doping concentration. The AlGaN layer may have a first doping gradient, wherein the first doping gradient is the largest directly above the single-crystalline SiC layer and decreases with increasing thickness of the AlGaN layer, i.e., the doping concentration of the AlGaN layer has a value of 1e20 cm^-3 (or 1×10 20cm -3 ) and decreases to 5e18 cm^-3 (or 5×10 18 cm -3 ). In a subsequent step 330, a gallium oxide layer is applied to the AlGaN layer by means of MOCVD or HVPE. The gallium oxide layer can also have a doping gradient, wherein in the lower region, i.e., in the region facing the AlGaN layer, the doping preferably has a value greater than 5e18 cm^-3 (or 5×10 18 cm -3 In subsequent steps, not shown, the power transistor is produced by suitable processing of the gallium oxide layer (also called device layer) and applying and insulating electrical contacts according to the prior art.
[0033] Optionally, in step 320 (which is carried out between steps 310 and 330), a GaN layer can be applied on the AlGaN layer by means of MOCVD. In this case, the GaN layer has a density greater than 5e18 cm^-3 (or 5×10 18 cm -3 ) is preferably greater than 1e20cm^-3 (or 1×10 20 cm -3 ). The GaN layer may have a second doping gradient, wherein the second doping gradient is smallest just above the AlGaN layer and increases with increasing thickness of the AlGaN layer, i.e., the doping concentration of the GaN layer has a value of 5e18 cm^-3 (or 5×10 18 cm -3 ) and increases to 1e20 cm^-3 (or 1×10 20 cm -3 ) value.
Claims
1. A power transistor (100), comprising a single-crystal SiC layer (102), characterized in that: An AlGaN layer (103) is arranged on the single crystal SiC layer (102), wherein a gallium oxide layer (105) is arranged on the AlGaN layer (103).
2. The power transistor (100) according to claim 1, characterized in that The AlGaN layer (103) has an aluminum-gallium ratio of 1:4-1:
2.
3. The power transistor (100) according to claim 2, characterized in that The aluminum concentration of the AlGaN layer (103) decreases toward the gallium oxide layer (105).
4. The power transistor (100) according to any one of the preceding claims, characterized in that The gallium oxide layer (105) has an n-doping concentration greater than 5e18 cm^-3 in a region facing the AlGaN layer (103).
5. The power transistor (100) according to any one of claims 1 to 3, characterized in that The GaN layer (104) is arranged between the AlGaN layer (103) and the gallium oxide layer (105).
6. The power transistor (100) according to any one of the preceding claims, characterized in that The AlGaN layer (104) has a first doping gradient, wherein the first doping gradient decreases from a side of the AlGaN layer (104) facing the SiC layer (102) toward the gallium oxide layer (105).
7. The power transistor (100) according to any one of claims 5 or 6, characterized in that The GaN layer (105) has a second doping gradient, wherein the second doping gradient increases from a side of the GaN layer (104) facing the AlGaN layer (103) toward the gallium oxide layer (105).
8. The power transistor (100) according to any one of the preceding claims, characterized in that The gallium oxide layer (105) has a third doping gradient, wherein the doping of the gallium oxide layer (105) is greatest in a lower region toward the SiC layer (102).
9. A method (300) for manufacturing a power transistor, the method comprising the following steps: A (310) AlGaN layer is applied on the single-crystalline SiC layer by means of MOCVD, A gallium oxide layer is applied (330) on the AlGaN layer by means of MOCVD or HVPE.
10. The method (300) according to claim 9, characterized in that A GaN layer is applied onto the AlGaN layer by means of MOCVD.