Miniature light emitting diode chip with dielectric layer and manufacturing method thereof

Abstract

The invention provides a miniature light emitting diode chip with a dielectric layer. The miniature light emitting diode chip comprises a substrate; the dielectric layer is arranged on the substrate, the dielectric layer is made of dielectric materials, and the substrate and the semiconductor layer are bonded through the dielectric layer; and a semiconductor layer disposed on the dielectric layer. In addition, the invention also provides a method for forming the micro light-emitting diode chip. According to the invention, the pixel density or the DPI can be improved.

Description

Technical Field

[0001] The present invention generally relates to the field of micro light emitting diodes, and more particularly, to a micro light emitting diode chip having a dielectric layer. Background Art

[0002] A micro-light emitting diode (MLED) is a novel LED structure achieved by thinning, miniaturizing, and arraying the existing LED structure. It integrates arrayed micron-sized micro-LEDs onto an active addressing drive panel to enable the lighting and individual control of the micro-LEDs, thereby outputting the desired display image. The core structure of a MLED is a micro-luminescent mesa, which includes a PN junction diode made of a direct bandgap semiconductor material. When a forward bias is applied to the MLED by the upper and lower electrodes, causing current to flow through it, electrons and holes recombine in the active region, emitting single-color photons.

[0003] In current micro-LED chip manufacturing processes, separately manufactured micro-light-emitting mesas are typically bonded to a driver backplane via a metal bonding layer. However, metal-bonded micro-LED chips have a low DPI (dots per inch). This low DPI limits print quality, particularly in printheads. Summary of the Invention

[0004] The object of the present invention is to provide a micro light-emitting diode chip with a dielectric layer, by means of which the pixel density or DPI can be increased.

[0005] In a first aspect of the present invention, the aforementioned object is achieved by a micro-LED chip having a dielectric layer, the chip comprising:

[0006] substrate;

[0007] a dielectric layer located on the substrate, wherein the dielectric layer is made of a dielectric material and bonds the substrate to the semiconductor layer; and

[0008] The semiconductor layer is located on the dielectric layer.

[0009] In one embodiment of the present invention, the micro-LED chip further comprises:

[0010] a bottom transparent conductive layer located between the semiconductor layer and the metal layer;

[0011] a metal layer located between the bottom transparent conductive layer and the dielectric layer; and

[0012] A through-hole contact is formed in the dielectric layer to electrically connect the bottom transparent conductive layer to the driving circuit.

[0013] In another embodiment of the present invention, the substrate includes a driving circuit.

[0014] In another embodiment of the present invention, the material of the substrate includes one or more of the following:

[0015] Glass, and silicon.

[0016] In another embodiment of the present invention, the glass comprises one or more of the following:

[0017] Silicate glass, borate glass, phosphate glass and lead glass.

[0018] In another embodiment of the present invention, the dielectric layer comprises:

[0019] a first dielectric layer, one side of which is in contact with the semiconductor layer and the other side of which is in contact with the second dielectric layer; and

[0020] The second dielectric layer has one side in contact with the substrate and the other side in contact with the first dielectric layer, wherein the first dielectric layer and the second dielectric layer are bonded to each other.

[0021] In another embodiment of the present invention, the micro-LED chip further comprises:

[0022] A temporary substrate is located on the semiconductor layer, wherein the temporary substrate is configured to grow the semiconductor layer.

[0023] In another embodiment of the present invention, the dielectric material includes one or more of the following:

[0024] Silicon dioxide, silicon nitride, and aluminum oxide.

[0025] In another embodiment of the present invention, it is provided that:

[0026] The thickness of the substrate is 100 μm to 3 mm;

[0027] The thickness of the dielectric layer is 1 nm to 3 μm; and / or

[0028] The thickness of the semiconductor layer is 200 nm to 100 μm.

[0029] In another embodiment of the present invention, the semiconductor layer comprises:

[0030] a first semiconductor layer, which is located on the light-emitting layer;

[0031] a light emitting layer located between the first semiconductor layer and the second semiconductor layer and configured to emit light; and

[0032] The second semiconductor layer is located between the light emitting layer and the dielectric layer.

[0033] In a second aspect of the present invention, the aforementioned object is achieved by a micro-light emitting diode chip comprising:

[0034] a driving substrate having a driving circuit;

[0035] a dielectric layer located on the substrate, wherein the dielectric layer is made of a dielectric material and bonds the substrate to the semiconductor layer, wherein a through-hole contact portion is provided in the dielectric layer for electrically connecting the driving substrate to the semiconductor layer; and

[0036] The micro-luminescent mesa is located on the dielectric layer and is configured to emit light.

[0037] In one embodiment of the present invention, the micro-luminescent mesa comprises:

[0038] a first semiconductor layer, which is located on the light-emitting layer;

[0039] a light emitting layer located between the first semiconductor layer and the second semiconductor layer and configured to emit light; and

[0040] The second semiconductor layer is located between the light-emitting layer and the dielectric layer, wherein the top surface of the micro-light-emitting mesa close to the first semiconductor layer is smaller than the bottom surface of the micro-light-emitting mesa close to the second semiconductor layer.

[0041] In another embodiment of the present invention, the center distance between adjacent micro-light-emitting mesas is 19 μm to 23 μm.

[0042] In another embodiment of the present invention, the micro-LED chip further comprises:

[0043] a bottom transparent conductive layer located between the micro-luminescent mesa and the metal layer; and

[0044] The metal layer is located between the bottom transparent conductive layer and the dielectric layer.

[0045] In another embodiment of the present invention, the metal layer is configured to reflect light from the micro-luminescent mesa.

[0046] In another embodiment of the present invention, the micro-LED chip further comprises:

[0047] a passivation layer covering the side surfaces of the micro-light-emitting mesas and extending between the top transparent conductive layer and the top transparent conductive layer, wherein the passivation layer has a notch to expose a portion of the top of the micro-light-emitting mesas;

[0048] a top transparent conductive layer covering the micro-luminescent mesa and the passivation layer;

[0049] a first electrode on and in electrical contact with the top transparent conductive layer;

[0050] a second electrode electrically connected to the through-hole contact; and

[0051] The micro lens is located on the micro light-emitting mesa to shape the light emitted by the micro light-emitting mesa.

[0052] In another embodiment of the present invention, the polarity of the second electrode is opposite to that of the first electrode.

[0053] In another embodiment of the present invention, the material of the second semiconductor layer is a second conductive type material layer composed of two or more elements of Ga, N, As, Al, In, and P, and the first semiconductor layer is a first conductive type material layer composed of two or more elements of Ga, N, As, Al, In, and P, wherein the first conductive type is different from the second conductive type.

[0054] In another embodiment of the present invention, the light emitting layer comprises a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer.

[0055] In another embodiment of the present invention, an electron blocking layer is provided on a first side of the light-emitting layer, where the first side refers to a side along which electrons migrate out of the light-emitting layer.

[0056] In another embodiment of the present invention, the material of the passivation layer is Si3N4 film, SiO2 film or Al2O3 film.

[0057] In another embodiment of the present invention, it is provided that:

[0058] The material of the dielectric layer is selected from the group consisting of silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof; and / or

[0059] The material of the metal layer is selected from the group consisting of aluminum (Al), copper (Cu), tungsten (W), silver (Ag), gold (Au), nickel (Ni), platinum (Pt), tantalum (Ta), and molybdenum (Mo).

[0060] In a third aspect of the present invention, the aforementioned object is achieved by a method for manufacturing a micro-light emitting diode chip, the method comprising:

[0061] providing a temporary substrate;

[0062] growing a semiconductor layer on a temporary substrate;

[0063] growing a first dielectric layer on the semiconductor layer;

[0064] providing a substrate;

[0065] growing a second dielectric layer on the substrate;

[0066] bonding the first and second dielectric layers to each other to form a dielectric layer;

[0067] removing the temporary substrate; and

[0068] The semiconductor layer is etched to form a micro-light-emitting mesa.

[0069] In one embodiment of the present invention, the method further comprises:

[0070] planarizing the first dielectric layer; and / or

[0071] The second dielectric layer is planarized.

[0072] In one embodiment of the present invention, the method further comprises:

[0073] depositing a bottom transparent conductive layer on the semiconductor layer; and

[0074] A metal layer is formed on the bottom transparent conductive layer.

[0075] In another embodiment of the present invention, the method further comprises:

[0076] A through-hole contact is formed in the first dielectric layer to electrically connect the bottom transparent conductive layer to the driving circuit.

[0077] In another embodiment of the present invention, the substrate includes a driving circuit.

[0078] In another embodiment of the present invention, the material of the substrate includes one or more of the following:

[0079] Glass, and silicon.

[0080] In another embodiment of the present invention, the method further comprises:

[0081] The semiconductor layer is etched to form a micro-light-emitting mesa.

[0082] Furthermore, the present invention relates to a print head having a micro-light emitting diode chip according to the invention.

[0083] In one embodiment of the present invention, the print head has a DPI of 600 or more.

[0084] The present invention has the following technical effects: the present invention bonds the micro-luminescent mesa to the driving backplane through a dielectric layer. Compared with metal bonding, the density of the micro-luminescent mesa can be increased, thereby increasing the DPI (dots per inch) of the micro-light-emitting diode chip. Especially in print head applications, the increased DPI can improve printing quality. The principle is mainly that in the prior art, the important manufacturing sequence of the micro-light-emitting diode chip through metal bonding is to first etch out the micro-luminescent mesa, and then perform metal bonding of the micro-luminescent mesa and the driving backplane. Since the micro-luminescent mesa has been formed during this bonding process, it is necessary to align the micro-luminescent mesa with the driving backplane (for example, align the micro-luminescent mesa with the through-hole contact portion). Since the alignment accuracy is limited, requirements are put forward for the spacing between the micro-luminescent mesas, that is, the spacing cannot be lower than a certain value, otherwise alignment is difficult to achieve or the alignment accuracy is poor. In contrast, in the present application, the manufacturing sequence is to perform dielectric bonding first and then etch the micro-luminescent mesas. Therefore, during the bonding process, since the micro-luminescent mesas have not yet been formed, the bonding has no or low requirements for alignment accuracy. Therefore, there is no minimum spacing requirement for the micro-luminescent mesas. Therefore, during the subsequent etching of the micro-luminescent mesas, the spacing between adjacent micro-luminescent mesas can be set to be smaller, thereby increasing the density of the micro-luminescent mesas, that is, increasing the DPI (dots per inch) of the micro-LED chip. When the present invention is applied to a printhead, the DPI of the printhead can be increased, thereby improving print quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0085] The present invention will be further described below with reference to the accompanying drawings in conjunction with specific embodiments.

[0086] Figures 1A to 1D The process of forming a micro-LED chip with a dielectric layer according to the present invention is shown;

[0087] Figure 2 A schematic diagram showing a micro light emitting diode chip with a dielectric layer according to the present invention; and

[0088] Figure 3 FIG. 4 shows a top view of a micro-LED chip with a dielectric layer according to the present invention. DETAILED DESCRIPTION

[0089] It should be noted that the components in the drawings may be shown exaggeratedly for the sake of illustration and are not necessarily correct to scale. In the drawings, identical or functionally identical components are provided with the same reference numerals.

[0090] In the present invention, unless otherwise specified, the phrases "disposed on," "disposed above," and "disposed above" do not exclude the presence of intermediate components. Furthermore, "disposed on or above" merely indicates the relative positional relationship between two components and, in certain circumstances, such as after reversing the product orientation, can be converted to "disposed below or below," and vice versa.

[0091] In the present invention, each embodiment is only intended to illustrate the aspects of the present invention and should not be construed as limiting.

[0092] In the present invention, unless otherwise specified, the quantifiers "a" and "an" do not exclude the presence of multiple elements.

[0093] In the present invention, the term "connected" may refer to direct connection between two objects or indirect connection between two objects via an intermediate element.

[0094] In the present invention, the term "configuration" refers to the setting of the shape, structure, material and / or function of the target object to achieve the desired technical effect, wherein "configuration" includes a variety of alternative technical means for achieving the technical effect, which become obvious under the teachings of the present invention.

[0095] It should also be noted that in the embodiments of the present invention, for the sake of clarity and simplicity, only a portion of the parts or components may be shown, but those skilled in the art will understand that, under the teachings of the present invention, the required parts or components can be added according to the needs of the specific scenario. In addition, unless otherwise stated, the features of different embodiments of the present invention can be combined with each other. For example, a feature in the second embodiment can be used to replace a corresponding or functionally identical or similar feature in the first embodiment, and the resulting embodiment also falls within the scope of disclosure or description of this application.

[0096] It should also be noted that, within the scope of the present invention, terms such as "same," "equal," and "equal to" do not imply absolute equality of values, but rather allow for a certain reasonable error. In other words, such terms also encompass "substantially the same," "substantially equal," and "substantially equal." Similarly, in the present invention, terms such as "perpendicular to" and "parallel to" indicating direction also encompass the meaning of "substantially perpendicular to" and "substantially parallel to."

[0097] In the present invention, the term "configuration" refers to the setting of the shape, structure, material and / or function of the target object to achieve the desired technical effect, wherein "configuration" includes a variety of alternative technical means for achieving the technical effect, which become obvious under the teachings of the present invention.

[0098] In the present invention, the term "interval between adjacent micro-light-emitting mesas" refers to the distance between the edges of adjacent micro-light-emitting mesas in a central longitudinal section perpendicular to the bottom surfaces of the micro-light-emitting mesas.

[0099] In the present invention, the term "light-emitting side of the micro-luminescent mesa" refers to the side of the micro-luminescent mesa from which light is output, i.e., the side from which light generated by the micro-luminescent mesa exits the micro-luminescent mesa and is output outward. For example, the light-emitting side of the micro-luminescent mesa is the side on which the microlenses are located. Similarly, the term "the side of the micro-luminescent mesa facing away from the light-emitting side" refers to the side of the micro-luminescent mesa opposite the light-emitting side, such as the side facing the driver circuit or driver circuit.

[0100] Figures 1A to 1D The process of forming a micro-LED chip 100 with a dielectric layer according to the present invention is shown.

[0101] like Figure 1A As shown, in step S1, a temporary substrate 102 is provided, and a semiconductor layer 101 is formed on the substrate. A first dielectric layer 103A is formed on the semiconductor layer 101, thereby forming a first composite 100A. Here, the semiconductor layer 101 includes a first semiconductor layer 101A, a light-emitting layer 101B, and a second semiconductor layer 101C. The first semiconductor layer 101A is disposed on the light-emitting layer 101B, the light-emitting layer 101B is disposed between the first semiconductor layer 101A and the second semiconductor layer 101C and is configured to emit light, and the second semiconductor layer 101C is disposed between the light-emitting layer 101B and the first dielectric layer 103A. The material of the temporary substrate 102 may include, for example, sapphire, silicon, graphite, boron nitride, polymers (such as polyimide, polyvinyl chloride, polyethylene, etc.), or metals (such as copper, nickel). The material of the first dielectric layer 103A may include, for example, dielectric materials (or dielectric materials) such as silicon dioxide, silicon nitride, and aluminum oxide. In addition, other additional structures, such as through-hole contacts and metal layers, may also be formed on the temporary substrate 102. The first dielectric layer 103A (especially silicon dioxide) may be formed by, for example, thermal oxidation (i.e., oxidation of the silicon substrate), chemical vapor deposition (CVD), physical vapor deposition (PVD, such as sputtering), and sol-gel methods.

[0102] like Figure 1BAs shown, in step S2, a substrate 104 is provided, and a second dielectric layer 103B is formed on the substrate 104, thereby forming a second composite 100B. The material of the second dielectric layer 103B may also include, for example, silicon dioxide, silicon nitride, and aluminum oxide. The material of the substrate 104 may include, for example, glass and silicon. When the substrate 104 is made of glass, the glass may include, for example, silicate glass, borate glass, phosphate glass, and lead glass. The second dielectric layer 103B (particularly silicon dioxide) may be formed by, for example, thermal oxidation (i.e., oxidation of a silicon substrate), chemical vapor deposition (CVD), physical vapor deposition (PVD, such as sputtering), sol-gel methods, and the like. The substrate 104 may optionally be a driver substrate, i.e., it contains driver circuitry for driving the micro-LEDs. In an alternative embodiment, the substrate 104 is also a temporary substrate and is removed after bonding, thereby allowing conductive structures such as through-hole contacts to be formed in the insulating layer. In another alternative embodiment, the micro-LED chip 100 does not include a driving circuit, but the driving circuit is formed in a separate circuit board, such as a flexible circuit board electrically connected to the micro-LED chip 100 .

[0103] like Figure 1C As shown, in step S3, the first dielectric layer 103A and the second dielectric layer 103B are bonded to each other to join the first composite 100A and the second composite 100B together. Here, the first dielectric layer 103A and the second dielectric layer 103B are bonded to each other to form the dielectric layer 103. The bonding can be performed by oxide bonding, polymer adhesive bonding, sol-gel dielectric bonding, or the like. For example, in the case of oxide bonding, the bonding process is as follows: first, the bonding surface is cleaned and treated to ensure that the surface is clean and flat to facilitate full exposure of the dielectric layer; then, the two surfaces to be bonded are aligned and attached. Under appropriate temperature, pressure, and other conditions, the atoms (e.g., silicon atoms and oxygen atoms) between the dielectric layers (currently the silicon dioxide layer) interact to form chemical bonds or strong physical adsorption, thereby achieving bonding.

[0104] like Figure 1D As shown, in step S4, the temporary substrate 102 is removed. Here, the temporary substrate 102 can be removed, for example, by debonding or chemical mechanical polishing (CMP). Debonding methods include, for example, laser debonding, thermal debonding, chemical debonding, mechanical debonding, UV light debonding, etc.

[0105] In subsequent steps, the semiconductor layer 101 is etched to form micro-light-emitting mesas and other required structures. Finally, the micro-LED chip 100 is formed.

[0106] As can be seen from the above manufacturing process, in this application, the manufacturing sequence is to first perform dielectric bonding and then etch the micro-luminescent mesas. Therefore, during the bonding process, since the micro-luminescent mesas have not yet been formed, the bonding has no or low requirements for alignment accuracy. Therefore, there is no minimum spacing requirement for the micro-luminescent mesas. Therefore, in the subsequent etching process of the micro-luminescent mesas, the spacing between adjacent micro-luminescent mesas can be set to be smaller, thereby increasing the density of the micro-luminescent mesas, that is, increasing the DPI (dots per inch) of the micro-LED chip. When the present invention is applied to a printhead, the DPI of the printhead can be increased, thereby improving print quality.

[0107] Figure 2 FIG. 1 shows a schematic diagram of a micro-LED chip 100 with a dielectric layer according to the present invention. Figure 2 In the embodiment, the micro light emitting mesa (or semiconductor layer) of the micro light emitting diode chip 100 is a regular trapezoidal structure with a small upper surface and a large lower surface.

[0108] The components of the micro LED chip 100 are described in detail below.

[0109] A substrate or driver circuit 202 (i.e., a driver backplane). The driver circuit 202 can be based on silicon or glass, i.e., the driver circuit 202 can have a silicon or glass substrate. The driver circuit 202 can, for example, be a driver circuit of various forms, such as a CMOS driver circuit or a thin-film transistor (TFT) driver circuit, such as a 2T1C driver circuit, a 3T1C driver circuit, and a 5T2C driver circuit. The driver circuit 202 is configured to drive the micro-LEDs, for example, to control the on / off state and brightness of the micro-LEDs. The driver circuit 202 can, for example, include transistors, capacitors, a conductive wiring layer, and a metal layer. The conductive wiring layer is configured to supply power to the micro-LED array. An insulating layer 218 is formed on the driver circuit 202, wherein the insulating layer is provided with through-holes, and the through-holes are provided with through-hole contacts 216 (e.g., IC copper pillars) for electrically connecting the conductive wiring layer to the micro-LED array 203. The metal layer is used to electrically contact the micro-LEDs and can also be used to reflect light from the micro-light-emitting mesa upward to improve light extraction efficiency (LEE). The conductive circuit layer, metal layer, and insulating layer may be formed on the driving circuit 202 by deposition, such as physical vapor deposition (PVD) and chemical vapor deposition (CVD). Depending on the specific application scenario, the metal layer and insulating layer may be patterned by photolithography and through-holes may be formed therein. In addition, transistors and capacitors in the conductive circuit layer may be formed by deposition and etching.

[0110] In one embodiment of the present invention, the circuitry can be electrically connected to each micro-LED in the micro-LED array via separate metal interconnects. In some embodiments, each micro-LED can be individually electrically controlled by a driver circuit. In some embodiments, the driver backplane can be electrically connected to electrodes of the micro-LED chip via metal interconnects. In some embodiments, a dielectric layer can be formed in the gaps between the micro-LEDs. In some embodiments, a dielectric layer can also be formed in the gaps between the interconnects.

[0111] The micro-LED chip includes multiple micro-LED arrays, each of which includes multiple micro-LEDs. The micro-LEDs are driven, for example, using a passive matrix (PM) drive system. The cathodes of all micro-LEDs in each array are connected to a common cathode, while the micro-LEDs with the same number in each array are connected to corresponding anodes. This allows for individual control of the on / off state and brightness of each LED by controlling the corresponding cathode and anode.

[0112] · A micro-LED array 203, which includes a micro-light-emitting mesa 208. The micro-LED array 203 is formed on the driving circuit 202. For the specific structure of the micro-light-emitting mesa, please refer to the description below. The micro-LED array 203 is bonded to the driving circuit 202 by dielectric bonding, and the bonding methods include full-surface dielectric bonding and hybrid bonding (hybrid bonding in the case of the presence of a metal through-hole contact 216). Here, the bonding can be through oxide bonding, polymer adhesive bonding, sol-gel dielectric bonding, etc. For example, in the case of oxide bonding, the bonding process is as follows: first, the bonding surface is cleaned and treated to ensure that the surface is clean and flat to facilitate full exposure of the dielectric layer; then the two surfaces to be bonded are aligned and bonded, and under appropriate temperature, pressure and other conditions, the atoms (such as silicon atoms and oxygen atoms) between the dielectric layers (now the silicon dioxide layer) interact to form chemical bonds or strong physical adsorption to achieve bonding. In the present invention, the formation sequence of the micro-LED chip 100 is as follows: first, the first dielectric layer 218A and the second dielectric layer 218B are bonded together to form the dielectric layer 218, thereby bonding the substrate or driving circuit 202 to the semiconductor layer used to form the micro-LED array 103, wherein the first dielectric layer 218A and the second dielectric layer 218B are both made of dielectric insulating material (or referred to as dielectric material) and together serve as the insulating layer 218 after bonding; then, the semiconductor layer is etched to form the micro-LED array 203; finally, other required structures are formed, such as the transparent conductive layer 209, the reflective electrode 212, the microlens 201, etc.

[0113] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the pitch of the micro-LED array, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 microns and about 50 microns. In some embodiments, the number of pixels on the micro-LED chip 100 may be between thousands and millions.

[0114] Each micro LED consists of the following components:

[0115] A micro-luminescent mesa 208 is configured to emit light, wherein the area of the upper surface of the micro-luminescent mesa 208 is smaller than the area of the lower surface, i.e., it has a regular trapezoidal shape. Here, the upper surface refers to the surface of the micro-luminescent mesa facing the light-emitting side, i.e., the side of the microlens 201, while the lower surface refers to the surface of the micro-luminescent mesa facing away from the light-emitting side, i.e., the side of the microlens 201. The micro-luminescent mesa 208 includes a first semiconductor layer 208A, a second semiconductor layer 208C, and a light-emitting layer 208B disposed between the first and second semiconductor layers 208A, 208C. The light-emitting layer 208B includes a multi-quantum well layer and an electron-blocking layer. In one embodiment of the present invention, the first semiconductor layer is an N-type GaN layer or an N-type AlGaN layer, and the second semiconductor layer is a P-type GaN layer or a P-type AlGaN layer, that is, the material of the second semiconductor layer can be a second conductivity type material layer composed of at least two or more elements of Ga, N, As, Al, In, and P, and the first semiconductor layer can be a first conductivity type material layer composed of at least two or more elements of Ga, N, As, Al, In, and P. The types of the first semiconductor layer and the second semiconductor layer can be interchangeable. The multi-quantum well layer is an InGaN / GaN multi-quantum well layer or an InGaN / AlGaN multi-quantum well layer or an InGaAs / AlGaAs multi-quantum well layer. The electron blocking side is arranged on the first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment of the present invention, the first semiconductor layer can also be a P-type GaN layer or a P-type AlGaN layer, and the second semiconductor layer can be an N-type GaN layer or an N-type AlGaN layer.

[0116] In one embodiment of the present invention, the first semiconductor layer (or first-type semiconductor layer) is a semiconductor material having a first conductivity type and includes a plurality of semiconductor layers. The main matrix material of the first semiconductor layer may be, but is not limited to, Ga, N, As, P, In, and includes but is not limited to a waveguide layer, a confinement layer, a transition layer, and a window layer; in addition, an ohmic contact layer may be formed below the window layer. In some embodiments, the second semiconductor layer (or second-type semiconductor layer for short) is a semiconductor material having a second conductivity type and includes a plurality of semiconductor layers. The main matrix material of the second semiconductor layer may be, but is not limited to, composed of at least two or more elements of Ga, N, As, P, In, and Al. In addition, the first semiconductor layer may include, from top to bottom, but is not limited to, a confinement layer and a waveguide layer; in addition, in some embodiments, an ohmic contact layer may be formed on the confinement layer. In one embodiment of the present invention, the first semiconductor layer is an N-type GaN layer or an N-type AlGaN layer, and the second semiconductor layer is a P-type GaN layer or a P-type AlGaN layer, that is, the material of the second semiconductor layer may be a second conductive type material layer composed of at least two or more elements of Ga, N, As, Al, In, and P, and the first semiconductor layer may be a first conductive type material layer composed of at least two or more elements of Ga, N, As, Al, In, and P. In another embodiment of the present invention, the first semiconductor layer may also be a P-type GaN layer or a P-type AlGaN layer, and the second semiconductor layer may be an N-type GaN layer or an N-type AlGaN layer. In an embodiment of the present invention, the micro-luminescent mesa is stepped or trapezoidal.

[0117] The first electrode, here the cathode 211, is electrically connected to the first semiconductor layer of the micro-luminescent mesa 208 via a transparent conductive layer 209 and a cathode contact 214 extending through a passivation layer 215. The cathode 211 may also include an annular reflective electrode 212 surrounding the micro-luminescent mesa 208. This electrode may be formed, for example, by magnetron sputtering or evaporation, and may use Al or an Al alloy as a sidewall reflector. The electrode stack metal may be made of Ni, Al, Ti, Ni, Pt, Au, or other metals. The passivation layer 215 is disposed between the top transparent conductive layer 209 and the micro-luminescent mesa 208. Its function is not only to reduce current leakage at the sidewalls but also to passivate sidewall defects and prevent damage to the micro-luminescent mesa caused by water, oxygen, and other factors during operation. The passivation layer 215 can be formed by depositing SiO2 using a CVD process or Al2O3 using an ALD process. The cathode 211 may, for example, have a common cathode structure, where an array of micro-LEDs is connected to a common cathode.

[0118] A second electrode, here an anode 213, is disposed at the bottom of the micro-light-emitting mesa 208 to power the anode 213. The anode 213 of each micro-LED in the array can be selectively connected to a signal contact (not shown). The common cathode and selective anode connection scheme can form a passive matrix control scheme to control the on / off and brightness adjustment of each micro-LED. Additional layers, such as a passivation layer 215, a transparent conductive layer 209, a cathode 211, and the like, are also disposed on the micro-light-emitting mesa 208 and the anode 213. It should be noted that in other embodiments, the polarity of the first electrode and the second electrode can be interchanged, that is, the cathode 211 and the anode 213 can be interchanged.

[0119] A bottom transparent conductive layer 219 is located between the bottom of the micro-luminescent mesa 208 and the reflector layer 217. The bottom transparent conductive layer 219 is configured to electrically connect the second semiconductor layer of the micro-luminescent mesa 208 to the reflector layer 217 and, in turn, to the anode 213. The bottom transparent conductive layer 219 may be made of a metal oxide, such as indium tin oxide (ITO) or zinc oxide (ZnO), and may be formed by methods including physical vapor deposition (PVD), chemical vapor deposition (CVD), sol-gel deposition, and solution coating.

[0120] A reflector layer 217 is disposed at the bottom of the micro-luminescent mesa 208 and covers the bottom transparent conductive layer 219. The reflector layer 217 is configured to work with the bottom anode 213 to reflect light from the micro-luminescent mesa 208 upward to the top light output. Furthermore, the reflector layer 217 is configured to electrically connect the bottom transparent conductive layer 219 to the anode 213. The reflector layer 217 has an atomic layer deposition layer on the side facing the micro-luminescent mesa 208. The atomic layer deposition layer can block the metal from the reflective metal layer to prevent it from diffusing without substantially affecting light reflection. For example, it can prevent the metal from diffusing through the bottom transparent conductive layer 219 into the micro-luminescent mesa 208 and affecting the luminous efficiency of the micro-luminescent mesa 208.

[0121] The reflector layer 217 may include, from top to bottom (i.e., from facing the micro-light-emitting mesa 208 to facing away from the micro-light-emitting mesa 208), for example, an atomic layer deposition layer, a reflective metal layer, a first barrier layer, and a second barrier layer, wherein the upper side of the reflector layer 217 faces the micro-light-emitting mesa or semiconductor layer of the micro-light-emitting diode, and the lower side of the reflector layer faces away from the micro-light-emitting mesa or semiconductor layer of the micro-light-emitting diode or faces toward the bottom transparent conductive layer.

[0122] For example, the stacked structure of the reflector layer 217 may be as follows (in order from close to the micro-light-emitting mesa to far away from the micro-light-emitting mesa):

[0123] Atomic layer deposition layer, made of nickel, 5 angstroms thick;

[0124] a reflective metal layer made of silver with a thickness of 1000 angstroms;

[0125] First and second barrier layers, made of titanium and platinum, with thicknesses of 200 and 500 angstroms, respectively;

[0126] The second barrier layer is made of titanium and has a thickness of 200 angstroms.

[0127] In addition, the number of layers of the first barrier layer is three.

[0128] The reflective mirror layer can be formed, for example, by evaporation, sputtering, chemical vapor deposition (CVD), etc., wherein the atomic layer deposition layer of the reflective mirror layer can be formed, for example, by atomic layer deposition.

[0129] Microlenses 201 are disposed above the micro-light-emitting mesas 208 to shape the light emitted therefrom, such as by converging or collimating it. The microlenses include a lens portion 201A and a spacer portion 201B. Lens portion 201A is disposed on the outermost side, i.e., the uppermost side, and is configured to shape the light from the micro-light-emitting mesas 208. Spacer portion 201B is disposed between lens portion 201A and the micro-light-emitting mesas 208 to adjust the focal position of lens portion 201A. For example, parameters such as the thickness of spacer portion 201B and the curvature of lens portion 201A can be adjusted so that the focal point of lens portion 201A is precisely located within the micro-light-emitting mesas 208 of the micro-LED. Microlenses 201 correspond one-to-one with micro-light-emitting mesas 208. Furthermore, in this embodiment, gaps are present between adjacent microlenses 201. The bottom of the gap is flush with the top of the micro-luminescent mesa 208 and is higher than the bottom of the micro-luminescent mesa 208, and the lens portion 201A is located above the cathode 212. The microlenses 201 can be formed through multiple deposition processes. During the microlens formation process, a SiO2 film layer is first deposited, followed by ion etching. The microlenses are formed on the surface of the top transparent conductive layer 209 at locations corresponding to the micro-luminescent mesas 208.

[0130] The microlenses can be made of a variety of materials that are transparent at the wavelength emitted by a single micro-LED pixel. Examples of transparent materials for microlenses include polymers, dielectrics, and semiconductors. In some embodiments, the dielectric material comprises one or more materials such as silicon oxide, silicon nitride, silicon carbide, titanium oxide, zirconium oxide, aluminum oxide, and the like. In some embodiments, the microlenses are made of photoresist. In some embodiments, the microlenses are typically hemispherical in shape. In some embodiments, the central axis of the microlenses is aligned with or identical to the central axis of a single, lensless micro-LED pixel. It should be understood that a complete display panel comprises an array of numerous individual pixels and numerous microlenses. Furthermore, there is not necessarily a one-to-one correspondence between microlenses and pixel light sources, nor is there a one-to-one correspondence between the driver circuitry (not shown) and the pixel light sources. A pixel light source can also be composed of multiple individual light-emitting elements, such as single, pixel LEDs connected in parallel. In some embodiments, a single microlens can cover several single, lensless LED pixels. A single microlens has positive optical power and is positioned to reduce the divergence or viewing angle of light emitted by the corresponding pixel light source. For example, the light beam emitted by the pixel light source may originally have a relatively wide divergence angle. In one embodiment, the initial angle of the marginal rays of the light beam relative to the vertical axis perpendicular to the substrate is greater than 60°. After the rays are refracted by the microlenses, the divergence angle of the new marginal rays is reduced. In one embodiment, the reduced angle is less than 30°. The microlenses in the microlens array are generally identical. Examples of microlenses include spherical microlenses, aspherical microlenses, Fresnel microlenses, and cylindrical microlenses.

[0131] The micro LED structures are formed in an array in a micro LED chip, with a resolution of, for example, 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro LED structures is in the nanometer range, for example, 20 nm to 100 nm.

[0132] In some embodiments of the present invention, the micro-LED array may include a single-layer micro-LED structure. In some embodiments of the present invention, the micro-LED array may include multiple layers of vertically stacked micro-LED structures.

[0133] In some embodiments of the present invention, the micro-LED array may include blue micro-LEDs. In some embodiments of the present invention, the pitch of the micro-LED array, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 microns and about 50 microns. In some embodiments, the number of pixels on a micro-LED chip may range from thousands to millions.

[0134] Figure 3FIG. 1 shows a top view of a micro-LED chip 100 having a dielectric layer (or dielectric bonding layer) according to the present invention.

[0135] like Figure 3 As shown, the micro-LED chip 100 with a dielectric layer according to the present invention includes a substrate 202 and a plurality of micro-light-emitting mesas 208 arranged on the substrate 202. In the present invention, because the semiconductor layer is etched to form the micro-light-emitting mesas 208 after the semiconductor layer and the substrate are bonded via dielectric bonding, the distance between the micro-light-emitting mesas 208, particularly the center-to-center distance D, can be small, for example, 19 μm to 23 μm, or even less than 19 μm, thereby providing a higher pixel density. When the LED chip 100 according to the present invention is used in the print head of a laser printer, it can provide a higher DPI, such as a DPI of 600 or more, for example, 600, 1200, or 1400.

[0136] Although certain embodiments of the present invention have been described in this application, it will be understood by those skilled in the art that these embodiments are provided by way of example only. Numerous variations, alternatives, and modifications will be contemplated by those skilled in the art in light of the teachings of this disclosure without departing from the scope of the present invention. The appended claims are intended to define the scope of the present invention and are intended to encompass methods and structures within the scope of these claims and their equivalents.

Claims

1. A micro light-emitting diode chip having a dielectric layer, comprising: substrate; a dielectric layer located on the substrate, wherein the dielectric layer comprises a dielectric material; as well as The semiconductor layer is located on the dielectric layer, and has a plurality of micro-light-emitting mesas.

2. The micro light emitting diode chip according to claim 1, characterized in that: The substrate includes a driving circuit, and the chip further includes: a bottom transparent conductive layer located between the semiconductor layer and the metal layer; a metal layer located between the bottom transparent conductive layer and the dielectric layer; and A through-hole contact is located in the dielectric layer to electrically connect the bottom transparent conductive layer to the driving circuit. 3 . The micro light emitting diode chip according to claim 1 , wherein a material of the substrate comprises one or more of the following: glass and silicon.

4. The micro-LED chip according to claim 4, wherein the glass comprises one or more of the following: Silicate glass, borate glass, phosphate glass and lead glass.

5. The micro-LED chip according to claim 1, wherein the dielectric layer comprises: a first dielectric layer, one side of which is in contact with the semiconductor layer and the other side of which is in contact with the second dielectric layer; as well as The second dielectric layer has one side in contact with the substrate and the other side in contact with the first dielectric layer, wherein the first dielectric layer and the second dielectric layer are bonded to each other.

6. The micro-LED chip according to claim 1, wherein the dielectric layer comprises one or more of the following: Silicon dioxide, silicon nitride, and aluminum oxide.

7. The micro-LED chip according to claim 1, wherein: The thickness of the substrate is 100 μm to 3 mm; The thickness of the dielectric layer is 1 nm to 3 μm; and / or The thickness of the semiconductor layer is 200 nm to 100 μm.

8. The micro-LED chip according to claim 1, wherein the semiconductor layer comprises: a first semiconductor layer located on the light-emitting layer; a light emitting layer located between the first semiconductor layer and the second semiconductor layer and configured to emit light; as well as The second semiconductor layer is located between the light emitting layer and the dielectric layer.

9. The micro-LED chip according to claim 1, wherein the micro-light emitting mesa comprises: a first semiconductor layer located on the light-emitting layer; a light-emitting layer located between the first semiconductor layer and the second semiconductor layer; as well as The second semiconductor layer is located between the light-emitting layer and the dielectric layer, wherein the top surface of the micro-light-emitting mesa close to the first semiconductor layer is smaller than the bottom surface of the micro-light-emitting mesa close to the second semiconductor layer. 10 . The micro-LED chip according to claim 1 , wherein a center-to-center distance between adjacent micro-light-emitting mesas is 19 μm to 23 μm. The micro-LED chip according to claim 14 , wherein the metal layer reflects light from the micro-light-emitting mesas.

12. The micro-LED chip according to claim 14, further comprising: a passivation layer covering the side surfaces of the micro-light-emitting mesas and extending between the top transparent conductive layer and the top transparent conductive layer, wherein the passivation layer has a notch to expose a portion of the top of the micro-light-emitting mesas; a top transparent conductive layer covering the micro-luminescent mesa and the passivation layer; a first electrode on and in electrical contact with the top transparent conductive layer; a second electrode electrically connected to the through-hole contact; as well as The micro lens is located on the micro light-emitting mesa to shape the light emitted by the micro light-emitting mesa. The micro-LED chip according to claim 16 , wherein the polarity of the second electrode is opposite to that of the first electrode.

14. The micro-light emitting diode chip according to claim 12, wherein the material of the second semiconductor layer is a second conductivity type material layer composed of two or more elements among Ga, N, As, Al, In, and P, and the first semiconductor layer is a first conductivity type material layer composed of two or more elements among Ga, N, As, Al, In, and P, wherein the first conductivity type is different from the second conductivity type. The micro light emitting diode chip according to claim 12 , wherein the light emitting layer comprises a plurality of stacked material layers.

16. The micro-LED chip according to claim 12, characterized in that: The multi-layer stacked material layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, an InGaAs / AlGaAs multi-quantum well layer, or an AlGaInP multi-quantum well layer. 17 . The micro light emitting diode chip according to claim 16 , wherein the passivation layer is made of Si 3 N 4 film, SiO 2 film or Al 2 O 3 film.

18. The micro-LED chip according to claim 25, wherein: The material of the dielectric layer is selected from one or more of the following: silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon nitride (Si3N4), silicon carbonitride (SiCN), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), titanium dioxide (TiO2), zirconium oxide (ZrO2), lanthanum oxide (La2O3), magnesium oxide (MgO), phospho-silicate glass (PSG), boro-phospho-silicate glass (BPSG), or any combination thereof; and / or The material of the metal layer is selected from one or more of the following: aluminum (Al), copper (Cu), tungsten (W), silver (Ag), gold (Au), nickel (Ni), platinum (Pt), tantalum (Ta), and molybdenum (Mo).

19. A method for manufacturing the micro-LED chip according to claim 1, comprising: providing a temporary substrate; forming a semiconductor layer on a temporary substrate; growing a first dielectric layer on the semiconductor layer; providing a substrate; forming a second dielectric layer on the substrate; bonding the first and second dielectric layers to each other to form a dielectric layer; removing the temporary substrate; as well as The semiconductor layer is etched to form a micro-light-emitting mesa.

20. The method according to claim 19, further comprising: planarizing the first dielectric layer; and / or The second dielectric layer is planarized.

21. The method of claim 19, further comprising: depositing a bottom transparent conductive layer on the semiconductor layer; as well as A metal layer is formed on the bottom transparent conductive layer.

22. The method of claim 19, further comprising: A through-hole contact is formed in the first dielectric layer to electrically connect the bottom transparent conductive layer to the driving circuit.

23. A print head comprising a micro-light emitting diode chip according to any one of claims 1 to 18.

24. The print head of claim 23, wherein the print head has a DPI of 600 or more.

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