Power amplifier circuit

Abstract

Provided is a power amplifier circuit in which the load impedance of an amplifier can be set at a position that is most suitable for broadband. The power amplifier circuit includes a differential amplifier, a first output terminal, and a second output terminal. The differential amplifier includes a first amplifier and a second amplifier. A signal of a desired frequency is output from the first output terminal or the second output terminal by turning on or off each switch. Inductors in which the directions of rotation of the current flowing therethrough are opposite to each other are provided in advance and are made to function so as to weaken magnetic field coupling. By weakening magnetic field coupling, the size of impedance winding on a Smith chart can be reduced. As a result, fluctuations in impedance with respect to frequency can be suppressed. A fixed load impedance at a broadband operating frequency is achieved by a series circuit comprising a switch and a capacitor.

Description

Technical Field

[0001] The invention relates to a power amplifier circuit. Background Art

[0002] A power amplifier circuit sometimes employs a two-stage structure consisting of a driver-stage amplifier and a power-stage amplifier (for example, see Patent Document 1). In the power amplifier circuit described in Patent Document 1, a load impedance suitable for 2G mode can be set by switching a switch. Furthermore, a load impedance suitable for 3G mode can be set in 3G mode.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: U.S. Patent No. 10411662 Summary of the Invention

[0006] Problems to be solved by the invention

[0007] The technology described in Patent Document 1 can set a load impedance suitable for each mode. However, when focusing on a certain mode, there is a problem in that it is difficult to set a load impedance suitable for a wider frequency band in that mode.

[0008] The present invention has been made in view of the above circumstances, and provides a power amplifier circuit capable of setting the load impedance of the amplifier to a position optimal for a wide band.

[0009] Technical solutions to solve problems

[0010] To solve the above-mentioned problems and achieve the purpose, a power amplifier circuit according to one embodiment of the present disclosure includes: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein the power amplifier circuit includes: a first inductor; a second inductor coupled to the first inductor; and a third inductor coupled to the first inductor, wherein a power supply for the differential amplifier is supplied to a midpoint of the first inductor, one end of the second inductor is connected to one end of the third inductor, and the power amplifier circuit further includes: a first capacitor having one end connected to the other end of the second inductor; end; a first switch provided between a connection point of one end of the second inductor and one end of the third inductor and the first output terminal; a second switch provided between the other end of the third inductor and the second output terminal; a third switch having one end connected between the third inductor and the second switch; and a second capacitor connected between the other end of the third switch and a reference potential, and the other end of the first capacitor being connected to the reference potential, wherein the first switch, the second switch, and the third switch are controlled to be on or off, thereby outputting a signal of a desired frequency from the first output terminal or the second output terminal.

[0011] According to another embodiment of the present disclosure, a power amplifier circuit includes: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein the power amplifier circuit includes: a first inductor; a second inductor coupled to the first inductor; and a third inductor coupled to the first inductor, wherein a power supply for the differential amplifier is supplied to a midpoint of the first inductor, and one end of the second inductor is connected to one end of the third inductor. The power amplifier circuit further includes: a first capacitor having one end connected to the other end of the second inductor; and a first switch provided between one end of the second inductor and one end of the third inductor. A first inductor and a second inductor are connected between a connection point and the first output terminal; a second switch is provided between the other end of the third inductor and the second output terminal; and a fifth inductor has one end connected to the connection point of the second inductor and the first capacitor, the other end of the first capacitor is connected to a reference potential, and the other end of the fifth inductor is connected to a reference potential, the fifth inductor and the first inductor are coupled to each other, the rotation direction of the current flowing through the first inductor and the rotation direction of the current flowing through the fifth inductor are opposite to each other, and by controlling the first switch and the second switch to be turned on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

[0012] According to another embodiment of the present disclosure, a power amplifier circuit includes: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein the power amplifier circuit includes: a first inductor; a second inductor coupled to the first inductor; and a third inductor coupled to the first inductor, wherein a power supply for the differential amplifier is supplied to a midpoint of the first inductor, and one end of the second inductor is connected to one end of the third inductor. The power amplifier circuit further includes: a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal. a second switch provided between the other end of the third inductor and the second output terminal; a second capacitor having one end connected between the third inductor and the second switch and the other end connected to a reference potential; a fourth capacitor provided between the other end of the third inductor and one end of the second capacitor; and a fifth capacitor provided between the first switch and a connection point between one end of the second inductor and one end of the third inductor, the other end of the second inductor being connected to a reference potential. By controlling the first switch and the second switch to be on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

[0013] Effects of the Invention

[0014] According to the power amplifier circuit according to the present disclosure, the load impedance of the amplifier can be set to a position most suitable for a wide band. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 1 is a diagram showing an example of a power amplifier circuit according to a comparative example.

[0016] Figure 2 This is a diagram showing a power amplifier circuit according to the first embodiment.

[0017] Figure 3 It is a diagram showing the operating state of each switch.

[0018] Figure 4 It shows Figure 3 Smith chart of the amplifier's load impedance.

[0019] Figure 5 This is a diagram showing an example of an equivalent circuit of a general balun transformer.

[0020] Figure 6 It shows that Figure 5 This is a Smith chart of the impedance viewed from the primary-side terminating resistor when the circuit is used as a matching circuit for a power amplifier.

[0021] Figure 7 It shows that Figure 5 This is a Smith chart of the impedance viewed from the primary-side terminating resistor when the circuit is used as a matching circuit for a power amplifier.

[0022] Figure 8 It shows that Figure 5 This is a Smith chart of the impedance viewed from the primary-side terminating resistor when the circuit is used as a matching circuit for a power amplifier.

[0023] Figure 9 It is shown from Figure 2 The Smith chart of the impedance of the output side of each amplifier is observed.

[0024] Figure 10 This is a diagram showing a power amplifier circuit according to the second embodiment.

[0025] Figure 11 This is a diagram showing a power amplifier circuit according to a third embodiment.

[0026] Figure 12 It is shown from Figure 11 The Smith chart of the impedance of the output side of each amplifier is observed.

[0027] Figure 13 This is a diagram showing a power amplifier circuit according to a fourth embodiment.

[0028] Figure 14 This is a diagram for explaining the circuit appearance at even-order harmonics of the harmonic processing circuit of the power amplifier circuit according to the fourth embodiment.

[0029] Figure 15 These are diagrams for explaining the circuit appearance of the harmonic processing circuit of the power amplifier circuit according to the fourth embodiment at the fundamental wave and odd-order harmonics.

[0030] Figure 16 This is a diagram showing a power amplifier circuit according to the fifth embodiment.

[0031] Figure 17 It shows the fundamental frequency Figure 16 The equivalent circuit diagram of the power amplifier circuit is shown.

[0032] Figure 18 This is a diagram showing a power amplifier circuit according to the sixth embodiment.

[0033] Figure 19 This is a diagram showing a power amplifier circuit according to the seventh embodiment.

[0034] Figure 20This is a diagram showing a power amplifier circuit according to the eighth embodiment.

[0035] Figure 21 This is a diagram showing a power amplifier circuit according to a ninth embodiment. DETAILED DESCRIPTION

[0036] Hereinafter, embodiments of the present invention will be described in detail based on the accompanying drawings. In the following description of each embodiment, the same reference numerals are used for components that are the same as or equivalent to other embodiments, and their descriptions are simplified or omitted. The present invention is not limited to each embodiment. In addition, the components of each embodiment include components that can and can be easily replaced by those skilled in the art or substantially the same components. In addition, the structures described below can be appropriately combined. In addition, the structure can be omitted, replaced or changed within the scope of the main purpose of the invention.

[0037] Hereinafter, in order to facilitate understanding of the embodiment, a comparative example will be described.

[0038] (Comparative Example)

[0039] Figure 1 1 is a diagram showing an example of a power amplifier circuit according to a comparative example. Figure 1 This is a diagram showing a power amplifier module disclosed in Patent Document 1. Figure 1 The power amplifier circuit shown adopts a two-stage structure of a driver stage amplifier and a power stage amplifier.

[0040] exist Figure 1 In the example, power amplifier module 800 includes amplifiers 841, 842, and 843. Amplifier 841 functions as a driver stage. Amplifiers 842 and 843 function as differential power stages. Power amplifier module 800 receives a signal RFin from input terminal 801 as input. It outputs a signal for a second-generation mobile communication system (i.e., a 2G (2nd Generation) signal RFout_2G) and a signal for a third-generation mobile communication system (i.e., a 3G (3rd Generation) signal RFout_3G).

[0041] The output of the bias circuit 861 is applied to the gate terminal of the amplifier 841. The output of the bias circuit 862 is applied to the gate terminal of the amplifier 842. The output of the bias circuit 863 is applied to the gate terminal of the amplifier 843.

[0042] The output of the amplifier 841, which corresponds to the driver stage, is input to the amplifier 842 and the amplifier 843, which correspond to the differential power stage, via the transformer 870. The output of the amplifier 842 is connected to a capacitor 827. The output of the amplifier 843 is connected to a capacitor 858.

[0043] A balun transformer composed of a transformer 880 is connected to the output sides of amplifiers 842 and 843. Transformer 880 includes an inductor 881 as a primary winding and an inductor 882 as a secondary winding. Inductor 881 and inductor 882 are magnetically coupled.

[0044] A first terminal 883 of the inductor 881 is connected to the output terminal of the amplifier 842. A second terminal 884 of the inductor 881 is connected to the output terminal of the amplifier 843. A center tap 885 of the inductor 881 is connected to the power supply VCC.

[0045] A phase compensation circuit 890 is connected in series to the output side of the inductor 882. The phase compensation circuit 890 includes capacitors 891, 892, and 893. A switch 805 is connected to the output side of the phase compensation circuit 890.

[0046] The first terminal 888 of inductor 882 is connected to output terminal 802 via capacitor 891 and switch 805. Output terminal 802 outputs a 2G signal RFout_2G, a signal for a second-generation mobile communication system. The second terminal 889 of inductor 882 is connected to output terminal 803 via capacitor 892 and switch 805. Output terminal 803 outputs a 3G signal RFout_3G, a signal for a third-generation mobile communication system. The third terminal 887 of inductor 882 is connected to a reference potential via capacitor 893. Hereinafter, the operation of outputting the 2G signal RFout_2G is referred to as the 2G mode. Furthermore, the operation of outputting the 3G signal RFout_3G is referred to as the 3G mode.

[0047] Here, the ratio of the number of turns of inductor 881 to the number of turns of inductor 882 when the 2G signal RFout_2G is output from output terminal 802 is greater than the ratio of the number of turns of inductor 881 to the number of turns of inductor 882 when the 3G signal RFout_3G is output from output terminal 803. This allows the load impedance of amplifiers 842 and 843 in 2G mode to be lower than the load impedance of amplifiers 842 and 843 in 3G mode.

[0048] By switching switch 890, a load impedance suitable for 2G mode can be set in 2G mode. In addition, a load impedance suitable for 3G mode can be set in 3G mode. In this way, in the power amplifier circuit of the comparative example, 2G mode or 3G mode is realized by turning the switch on and off. However, when focusing on a certain mode, it is difficult to set a suitable load impedance for a wider frequency band in that mode. The frequency band of the signal in 3G mode is, for example, 663 [MHz] to 915 [MHz] in the low band. If matching within this frequency band is considered, it is difficult to set the load impedance of amplifiers 842 and 843 to a position that is most suitable for the wide band.

[0049] (First embodiment)

[0050] Next, an embodiment will be described.

[0051] (structure)

[0052] Figure 2 FIG. 1 is a diagram showing a power amplifier circuit 1 according to the first embodiment. Figure 2 , the power amplifier circuit 1 according to the first embodiment includes inductors 111 and 112, an amplifier 120, an amplifier 130, a harmonic processing circuit 140, inductors 151, 152, 153, and 166, capacitors 154, 162, 165, and 169, switches 161, 163, 164, 167, and 168, and output terminals 180 and 181. The black dots added near inductors 151, 152, and 153 indicate the polarity of the inductors. This also applies to other figures referenced in the following description.

[0053] The amplifier 120 as the first amplifier and the amplifier 130 as the second amplifier constitute a differential amplifier corresponding to a differential power stage. In some cases, a pre-stage amplifier (see FIG. 1 ) described later is provided before the differential power stage formed by the amplifiers 120 and 130. Figure 16 ).

[0054] The inductors 111 and 112 are provided on the input sides of the amplifiers 120 and 130. The inductors 111 and 112 are magnetically coupled to each other. Figure 2 The curve K0 in FIG. 1 shows that magnetic field coupling is performed. A signal from the previous stage is input to the inductor 111. A power supply 183 is connected to the inductor 111.

[0055] The amplifier 120 includes a transistor 124, a capacitor 121, and resistors 122 and 123. One end of the capacitor 121 is connected to one end of the inductor 112.

[0056] Transistor 124 includes a collector, which serves as the output terminal of amplifier 120; a base connected to the other end of capacitor 121 via resistor 123; and an emitter connected to a reference potential. One end of resistor 122 is connected to the connection point between capacitor 121 and resistor 123. A bias circuit (not shown) is connected to the other end of resistor 122. Capacitor 121 is provided to block direct current. Amplifier 120 amplifies signal RFp2 supplied from one end of inductor 112 and outputs signal RFp3. The reference potential is, for example, ground potential. This applies to the following description.

[0057] The amplifier 130 includes a transistor 134 , a capacitor 131 , and resistors 132 and 133 . One end of the capacitor 131 is connected to the other end of the inductor 112 .

[0058] Transistor 134 includes a collector, which serves as the output terminal of amplifier 130; a base connected to the other end of capacitor 131 via resistor 133; and an emitter connected to a reference potential. One end of resistor 132 is connected to the junction of capacitor 131 and resistor 133. A bias circuit (not shown) is connected to the other end of resistor 132. Capacitor 131 is provided to block direct current. Amplifier 130 amplifies signal RFm2 supplied from the other end of inductor 112 and outputs signal RFm3.

[0059] Inductor 151 corresponds to the first inductor of the present disclosure. A power supply 182 is connected to the midpoint of inductor 151. Power supply 182 supplies voltage to amplifiers 120 and 130 via wiring (not shown). In other words, power is supplied to the midpoint of inductor 151 for the differential amplifier formed by amplifiers 120 and 130.

[0060] The inductor 152 corresponds to the second inductor of the present disclosure. The inductor 152 and the inductor 151 are magnetically coupled to each other. Figure 2 Curve K1 in FIG. 1 shows magnetic field coupling. Inductor 153 corresponds to the third inductor of the present disclosure. Inductor 153 and inductor 151 are magnetic field coupled to each other. Figure 2 The curve K2 in FIG. 1 shows that magnetic field coupling is performed. The inductors 151 , 152 , and 153 function as a balun.

[0061] Inductors 151, 152, and 153 are implemented, for example, using wiring patterns on a multilayer PCB (Printed Circuit Board). Specifically, for example, wiring patterns corresponding to inductors 151, 152, and 153 are arranged on different layers of the PCB. By arranging the wiring patterns so that they overlap when viewed from the main surface of the PCB, magnetic field coupling between the inductors is achieved.

[0062] One end of inductor 152 and one end of inductor 153 are connected at connection point N2. The other end of inductor 153 is connected to output terminal 180 via switch 163. Switch 163 is provided between the other end of inductor 153 and output terminal 180. Switch 163 corresponds to the second switch of the present disclosure. Output terminal 180 corresponds to the second output terminal of the present disclosure. Output terminal 180 outputs a signal in 2G mode, for example.

[0063] The other end of the inductor 152 is connected to one end of the capacitor 154. The other end of the capacitor 154 is connected to a reference potential. The capacitor 154 corresponds to the first capacitor of the present disclosure.

[0064] Inductor 166 corresponds to the fourth inductor of the present disclosure. One end of inductor 166 is connected to connection point N2. The other end of inductor 166 is connected to output terminal 181 via switch 167. Output terminal 181 corresponds to the first output terminal of the present disclosure. Output terminal 181 outputs, for example, a signal in the LB (Low Band) frequency band of a fifth-generation mobile communication system (5G mode) or a signal in the VLB (Very Low Band) frequency band of a fifth-generation mobile communication system (5G mode).

[0065] The inductor 166 is provided between the connection point N2 and the switch 167. The switch 167 corresponds to the first switch of the present disclosure.

[0066] One end of switch 161 is connected to the connection point N3 between inductor 153 and switch 163. The other end of switch 161 is connected to one end of capacitor 162. The other end of capacitor 162 is connected to a reference potential. Capacitor 162 is connected between the other end of switch 161 and the reference potential. Switch 161 corresponds to the third switch of the present disclosure. Capacitor 162 corresponds to the second capacitor of the present disclosure.

[0067] One end of switch 164 is connected to a connection point N4 between inductor 153 and switch 163. The other end of switch 164 is connected to one end of capacitor 165. The other end of capacitor 165 is connected to a reference potential. Capacitor 165 is connected between the other end of switch 164 and the reference potential.

[0068] One end of the switch 168 is connected to a connection point N5 between the inductor 166 and the switch 167. The other end of the switch 168 is connected to one end of the capacitor 169. The other end of the capacitor 169 is connected to a reference potential.

[0069] By controlling switch 167 (first switch), switch 163 (second switch), and switch 161 (third switch) to be on or off, a signal of a desired frequency is output from output terminal 181 or output terminal 180. Each switch is controlled to be on or off by a control signal from a control unit (not shown).

[0070] (Harmonic processing circuit)

[0071] Harmonic processing circuit 140 is provided on the output side of amplifiers 120 and 130. It is connected between the collector of transistor 124, which serves as the output terminal of amplifier 120, and the collector of transistor 134, which serves as the output terminal of amplifier 130. Harmonic processing circuit 140 is connected in parallel with inductor 151. "Connected in parallel" here means that harmonic processing circuit 140 and inductor 151 are connected in a row between the output terminals of amplifier 120 and amplifier 134. More specifically, one end (one end of capacitor 142, described later) and the other end (one end of capacitor 143, described later) of harmonic processing circuit 140 are connected to one end and the other end of inductor 151, respectively. Since harmonic processing circuit 140 is provided in common for both amplifiers 120 and 130, there is no need to provide separate harmonic processing circuits 140 for each amplifier. Consequently, the size of the power amplifier circuit can be reduced.

[0072] The harmonic processing circuit 140 includes a capacitor 142, a capacitor 143, and an inductor 141. The capacitor 142 corresponds to the third capacitor of the present disclosure. The capacitor 143 corresponds to the fourth capacitor of the present disclosure. The inductor 141 corresponds to the sixth inductor of the present disclosure.

[0073] One end of capacitor 142 is connected to the output terminal of amplifier 120. One end of capacitor 143 is connected to the output terminal of amplifier 130. A connection point N1 between the other ends of capacitor 142 and 143 is connected to one end of inductor 141. The other end of inductor 141 is connected to a reference potential. Harmonic processing circuit 140 enables matching of the outputs of amplifiers 120 and 130.

[0074] (State of the switch)

[0075] Figure 3 It is a diagram showing the operating state of each switch. Figure 3 The "SW161" in Figure 2 Switch 161, "SW163" corresponds to Figure 2 Switch 163, "SW164" in corresponds to Figure 2 Switch 164, "SW167" in the Figure 2Switch 167, "SW168" in the Figure 2 Switch 168 in.

[0076] Figure 3 "State 1" in FIG. 1 shows the states of the switches when outputting signals in the second-generation (2G) frequency band (i.e., 2G mode). In "State 1," switch 161 is "off," switches 163 and 164 are "on," and switches 167 and 168 are "off." Consequently, inductor 153 is electrically connected to output terminal 180, and capacitor 165 is electrically connected to connection point N4.

[0077] This "state 1" corresponds to the third mode of the power amplifier circuit of the present disclosure. Switch 163 is "on", so output terminal 180 is used. Switch 167 is "off", so output terminal 181 is not used.

[0078] In the third mode, the first switch 167 is off, the second switch 163 is on, and the third switch 161 is off, and a signal of the third frequency (2G) included in the first frequency “5G LB” is output from the output terminal 180 .

[0079] Figure 3 "State 2" in the figure indicates the state of each switch when outputting a signal of the VLB (Very Low Band) frequency band of the fifth generation mobile communication system (5G) (hereinafter referred to as "5G VLB"). Figure 3 In "State 2" of FIG1 , switch 161 is "ON," switches 163 and 164 are "OFF," and switches 167 and 168 are "ON." Consequently, the connection point N2 between inductor 153 and inductor 152 is electrically connected to output terminal 181 via inductor 166, and capacitor 169 is connected to connection point N5. Furthermore, capacitor 162 is electrically connected to connection point N3.

[0080] This "state 2" corresponds to the second mode of the power amplifier circuit of the present disclosure. Switch 163 is "off", so output terminal 180 is not used. Switch 167 is "on", so output terminal 181 is used.

[0081] In the second mode, the first switch 167 is on, the second switch 163 is off, and the third switch 161 is on, and a signal of the second frequency “5G VLB” different from the signal of the first frequency “5G LB” is output from the first output terminal 181 .

[0082] Figure 3 "State 3" in the figure indicates the state of each switch when outputting a signal of the LB (Low band) frequency band of the fifth generation mobile communication system (5G) (hereinafter referred to as "5G LB"). Figure 3 In "State 3" of FIG1 , switch 161 is "off," switches 163 and 164 are "off," and switches 167 and 168 are "on." Therefore, the connection point N2 between inductor 153 and inductor 152 is electrically connected to output terminal 181 via inductor 166, and capacitor 169 is electrically connected to connection point N5.

[0083] This "state 3" corresponds to the first mode of the power amplifier circuit of the present disclosure. Since the switch 163 is "off", the output terminal 180 is not used. Since the switch 167 is "on", the output terminal 181 is used.

[0084] In the first mode, the first switch 167 is on, the second switch 163 is off, and the third switch 161 is off, and a signal of “5G LB” having a first frequency is output from the first output terminal 181 .

[0085] exist Figure 3 In the example, the load impedance of the amplifiers 120 and 130 at this time is shown in FIG. 1 . Figure 4 . Figure 4 It shows Figure 3 The Smith chart of the load impedance of the amplifiers 120 and 130 in "State 3" is shown. Figure 4 , Figure 3 In "State 3", the impedances at 800 [MHz] to 900 [MHz] are substantially at the same position in amplifiers 120 and 130. In contrast, it can be seen that the position of the impedance at 650 [MHz] deviates from the positions of the other impedances.

[0086] In contrast, in Figure 3 In the example, the switch 161 is turned on in the state 2 in which the signal of "5G VLB" is output. Figure 2 When the black dots of inductor 152 and inductor 153 are viewed from the connection point N2 of inductor 152 and inductor 153, the rotation directions of the currents flowing therethrough are opposite to each other. Therefore, the magnetic field coupling from inductor 151 to inductors 152 and 153 is weakened. By weakening the magnetic field coupling from inductor 151 to inductors 152 and 153, Figure 8 Similarly, the size of the impedance winding can be reduced. In other words, the fluctuation of impedance with respect to frequency can be suppressed. Regarding the operating frequency, in 2G mode, for example, it is 824 [MHz]-915 [MHz]. In 5G mode, for example, it is 663 [MHz]-915 [MHz]. A series circuit including switch 161 and capacitor 162 achieves a fixed load impedance at the broadband operating frequency of this 5G mode.

[0087] (action)

[0088] Figure 4 It is shown from Figure 2 The Smith chart of the impedance of the output side of each amplifier is observed. Figure 4 “Gin_U” indicated by the dotted line in FIG. 1 is the impedance of the output side viewed from the collector terminal of the transistor 124 of the amplifier 120 . Figure 4 The solid line "Gin_L" in FIG. 1 is the impedance of the output side viewed from the collector terminal of the transistor 134 of the amplifier 130. Figure 4 Due to the different frequencies, the positions of the markers will spread out and cannot be concentrated in close locations.

[0089] In addition, Figure 4 At marker m541, the frequency Fc = 650 [MHz], the reflection coefficient Gin_L = 0.320 / 70.774, and the impedance = 5.032 + j3.394. At marker m542, the frequency Fc = 800 [MHz], the reflection coefficient Gin_L = 0.080 / 37.987, and the impedance = 5.644 + j0.580. At marker m543, the frequency Fc = 900 [MHz], the reflection coefficient Gin_L = 0.074 / -2.290, and the impedance = 5.798 + j0.034. At marker m544, the frequency Fc = 850 [MHz], the reflection coefficient Gin_U = 0.287 / 71.255, and the impedance = 5.109 + j3.031. At the position marked m545, the frequency Fc = 800 [MHz], the reflection coefficient Gin_U = 0.077 / 42.148, and the impedance = 5.575 + j0.581. At the position marked m546, the frequency Fc = 900 [MHz], the reflection coefficient Gin_U = 0.061 / 8.041, and the impedance = 5.642 + j0.097.

[0090] (Equivalent circuit of a balun)

[0091] Here, Figure 5 This is a diagram showing an example of an equivalent circuit of a general balun transformer. Figure 5The equivalent circuit shown includes an inductor L4 on the primary side, a termination resistor Term3 on the primary side, a capacitor C5 on the primary side, an inductor L5 on the secondary side, a termination resistor Term4 on the secondary side, and a capacitor C4 on the secondary side. One end of the inductor L4 is connected to one end of the capacitor C5 and one end of the termination resistor Term3. The other end of the inductor L4, the other end of the capacitor C5, and the other end of the termination resistor Term3 are connected to a reference potential. The inductor L4 and the capacitor C5 are connected in parallel between the connection point between the two and the reference potential. One end of the inductor L5 is connected to one end of the capacitor C4 and one end of the termination resistor Term4. The other end of the inductor L5, the other end of the capacitor C4, and the other end of the termination resistor Term4 are connected to a reference potential. The inductor L5 and the capacitor C4 are connected in parallel between the connection point between the two and the reference potential. The inductor L4 and the inductor L5 are magnetically coupled to each other. In addition, the capacitor C4 is equivalent to Figure 2 Capacitor 169 in.

[0092] Based on Figure 5 The equivalent circuit of a balun transformer used as a matching circuit for a power amplifier is described below. Figure 6 、 Figure 7 as well as Figure 8 It shows that Figure 5 This is a Smith chart of the impedance viewed from the primary-side terminating resistor Term3 when the circuit is used as a matching circuit for a power amplifier.

[0093] exist Figure 6 In the characteristic f1 shown in FIG. 1 , if the capacitance value of capacitor C4 is increased, the image Figure 7 As shown in characteristic f2, the resonant frequency becomes lower and the impedance winding becomes larger. When the impedance winding is large, the impedance shifts greatly with respect to the frequency, which is not preferable.

[0094] Therefore, it is possible to consider increasing the capacitance of capacitor C4 and reducing the coupling coefficient of the inductor. Figure 8 As shown in characteristic f3, only the resonant frequency can be lowered. In this case, the impedance does not increase. In other words, the change in impedance with frequency can be suppressed.

[0095] In this embodiment, Figure 3In "State 2" in the circuit, the switch 161 is turned on. By turning on the switch 161, the capacitor 162 is connected to the connection point N3, and the connected capacitance value becomes larger. In addition, in this embodiment, if the black dot of the inductor 152 and the black dot of the inductor 153 are observed from the connection point N2 of the inductor 152 and the inductor 153, the rotation directions of the currents flowing through them are opposite to each other. Therefore, when the switch 161 is turned on and a signal is output from the output terminal 181, it works to weaken the magnetic field coupling from the inductor 151 to the inductors 152 and 153. As a result, the image Figure 8 As shown in the characteristic f3, it is possible to reduce only the resonant frequency and the frequency at which the impedance becomes substantially the same. Figure 4 The characteristic changes shown are Figure 9 Features shown.

[0096] Figure 9 It is shown from Figure 2 The Smith chart of the impedance of the output side of each amplifier is observed. Figure 9 “Gin_U” indicated by the dotted line in FIG. 1 is the impedance of the output side viewed from the collector terminal of the transistor 124 of the amplifier 120 . Figure 9 The solid line "Gin_L" in FIG. 1 is the impedance of the output side viewed from the collector terminal of the transistor 134 of the amplifier 130. Figure 9 ,and Figure 4 Compared with the case of , the spread of the positions of the marks is small, and the positions of the marks can be concentrated in close positions. Figure 9 In the case of Figure 4 Compared with the case of , the impedance change with respect to frequency becomes smaller.

[0097] In addition, Figure 9At marker m541, the frequency Fc = 650 [MHz], the reflection coefficient Gin_L = 0.257 / 66.652, and the impedance = 5.415 + j2735. At marker m542, the frequency Fc = 800 [MHz], the reflection coefficient Gin_L = 0.124 / 46.545, and the impedance = 5.828 + j1.066. At marker m543, the frequency Fc = 900 [MHz], the reflection coefficient Gin_L = 0.179 / -0.640, and the impedance = 7.174 + j0.030. At marker m544, the frequency Fc = 650 [MHz], the reflection coefficient Gin_U = 0.220 / 66.311, and the impedance = 5.459 + j2.312. At the position marked m545, the frequency Fc = 800 [MHz], the reflection coefficient Gin_U = 0.122 / 49.495, and the impedance = 5.750 + j1.081. At the position marked m546, the frequency Fc = 900 [MHz], the reflection coefficient Gin_U = 0.163 / 3.498, and the impedance = 6.944 + j0.142.

[0098] (Second embodiment)

[0099] (structure)

[0100] Figure 10 1 is a diagram showing a power amplifier circuit 1a according to the second embodiment. Figure 10 , the power amplifier circuit 1 according to the first embodiment includes inductors 111 and 112, an amplifier 120, an amplifier 130, a harmonic processing circuit 140, inductors 151, 152, 153 and 166, capacitors 154, 162, 165 and 169, switches 161, 163, 164, 167 and 168, and output terminals 180 and 181.

[0101] The inductor 166 as the fourth inductor and the inductor 152 as the second inductor are magnetically coupled to each other. Curve K3 indicates that magnetic field coupling is performed.

[0102] Inductors 151, 152, 153, and 166 are implemented, for example, by wiring patterns arranged on a multilayer PCB substrate. Specifically, for example, wiring patterns corresponding to inductors 151, 152, 153, and 166 are arranged on different layers of the PCB substrate. By arranging the wiring patterns so that they overlap when viewed from above from the main surface of the PCB substrate, magnetic field coupling between the inductors is achieved. The winding direction of the pattern corresponding to inductor 166 is opposite to that of the pattern corresponding to inductor 152. Therefore, the rotation direction of the current flowing through inductor 152 and the rotation direction of the current flowing through inductor 166 are opposite to each other. Inductors 151, 152, 153, and 166 function as a balun. In this embodiment, the matching circuit of this balun operates at a wideband.

[0103] (action)

[0104] exist Figure 10 In the output of the "5G VLB" signal, the switch 161 is turned "ON". If the black dot of the inductor 152 and the black dot of the inductor 153 are observed from the connection point N2 of the inductor 152 and the inductor 153, the rotation directions of the currents flowing therethrough are opposite to each other. Therefore, when the signal is output from the output terminal 181, it works to reduce the magnetic field coupling from the inductor 151 to the inductors 152 and 153. By weakening the magnetic field coupling between the inductor 151 and the inductor 152, Figure 9 Similarly, the size of the impedance winding can be reduced. In other words, the change of impedance with respect to frequency can be suppressed.

[0105] exist Figure 10 In addition to Figure 2 In addition to the structure, the inductor 166 and the inductor 152 are further added to form a reverse magnetic field coupling. Figure 2 Compared with the case of , the magnetic field coupling between inductor 151 and inductor 152 is further weakened. More specifically, Figure 2 In the case of 5G VLB ( Figure 3 When the switch 161 is turned on in "State 2" in FIG, the magnetic field coupling between the inductor 151 and the inductor 152 is weakened. Figure 10 In the case of 5G LB and 5G VLB, the magnetic field coupling between inductor 151 and inductor 152 is weakened due to the influence of inductor 166 and inductor 152 always being magnetically coupled in opposite directions. Figure 2 Compared with the situation in Figure 10 In the case of , the size of the impedance winding is further reduced. Therefore, for 5G VLB, Figure 2Compared with the situation in Figure 10 In the case of , the impedance change with respect to frequency becomes smaller.

[0106] (Third embodiment)

[0107] (structure)

[0108] Figure 11 1 is a diagram showing a power amplifier circuit 1b according to a third embodiment. Figure 11 In FIG. 1 , the power amplifier circuit 1b has a configuration in which the inductor 155 is added to the power amplifier circuit 1 according to the first embodiment. Also, the power amplifier circuit 1b has a configuration in which the switch 161 and the capacitor 162 are omitted from the power amplifier circuit 1 according to the first embodiment.

[0109] Inductor 155 corresponds to the fifth inductor of this disclosure. One end of inductor 155 is connected to the connection point N6 between inductor 152 and capacitor 154. The other end of inductor 155 is connected to a reference potential. Inductor 155 and inductor 151 are magnetically coupled to each other. Curve K4 indicates magnetic field coupling.

[0110] Inductors 151, 152, 153, and 155 are implemented, for example, by wiring patterns arranged on a multilayer PCB substrate. Specifically, for example, wiring patterns corresponding to inductors 151, 152, 153, and 155 are arranged on different layers of the PCB substrate. By arranging the wiring patterns so that they overlap when viewed from above from the main surface of the PCB substrate, magnetic field coupling between the inductors is achieved. The winding direction of the pattern corresponding to inductor 155 is opposite to the winding direction of the patterns corresponding to inductors 152 and 153. Therefore, the rotation direction of the current flowing through inductor 151 and the rotation direction of the current flowing through inductor 155 are opposite to each other. Inductors 151, 152, 153, and 155 function as baluns.

[0111] (action)

[0112] Figure 12 It is shown from Figure 11 The Smith chart of the impedance of the output side of each amplifier is observed. Figure 11 “Gin_U” indicated by the dotted line in FIG. 1 is the impedance of the output side viewed from the collector terminal of the transistor 124 of the amplifier 120 . Figure 11 The solid line "Gin_L" in FIG. 1 is the impedance of the output side viewed from the collector terminal of the transistor 134 of the amplifier 130. Figure 11 ,and Figure 4 Compared with the case of , the positions of the marks are less diffused, and the positions of the marks can be concentrated in close positions.

[0113] In addition, Figure 12 At marker m541, the frequency Fc = 650 [MHz], the reflection coefficient Gin_L = 0.175 / 104.115, and the impedance = 4.342 + j1.522. At marker m542, the frequency Fc = 800 [MHz], the reflection coefficient Gin_L = 0.079 / 152.174, and the impedance = 4.338 + j0.321. At marker m543, the frequency Fc = 900 [MHz], the reflection coefficient Gin_L = 0.074 / 157.625, and the impedance = 4.355 + j0.246. At marker m544, the frequency Fc = 650 [MHz], the reflection coefficient Gin_U = 0.145 / 106.683, and the impedance = 4.435 + j1.255. At the position marked m545, the frequency Fc = 800 [MHz], the reflection coefficient Gin_U = 0.084 / 152.326, and the impedance = 4.294 + j0.338. At the position marked m546, the frequency Fc = 900 [MHz], the reflection coefficient Gin_U = 0.089 / 153.190, and the impedance = 4.255 + j0.343.

[0114] As described above, according to the power amplifier circuit 1b according to this embodiment, compared with the case of the first embodiment, in the 5G LB of "State 3", it is possible to Figure 12 As shown, the load impedance of the amplifiers 120 and 130 becomes broadband. Specifically, according to the power amplifier circuit 1b based on this embodiment, the inductor 151 and the inductor 155 are magnetically coupled, so that the inductor 152 and the capacitor 154 do not function as a low-pass filter. When the inductor 152 and the capacitor 154 do not function as a low-pass filter, in particular, no attenuation of the high-frequency side signal occurs, and thus the function is performed to expand the frequency range in which the impedance is well matched. Therefore, even in the case where the switch 161 and the capacitor 162 are not provided, it is possible to Figure 12 As shown, the load impedance of amplifiers 120, 130 is made broadband.

[0115] (Fourth embodiment)

[0116] (structure)

[0117] Figure 13 1 is a diagram showing a power amplifier circuit 1c according to a fourth embodiment. The power amplifier circuit 1c according to the fourth embodiment adopts a harmonic processing circuit 140a using a microstrip line instead of the harmonic processing circuit 140 in the power amplifier circuit 1 according to the first embodiment.

[0118] exist Figure 13In the embodiment, the harmonic processing circuit 140a includes a third capacitor 142, a fourth capacitor 143, and a microstrip line 61c. One end of the third capacitor 142 is connected to the output terminal of the amplifier 120. One end of the fourth capacitor 143 is connected to the output terminal of the amplifier 130. The other end of the third capacitor 142 and the other end of the fourth capacitor 143 are connected at a connection point N1. One end of the microstrip line 61c is connected at the connection point N1. The other end of the microstrip line 61c is connected to a reference potential. The microstrip line 61c is formed into a straight line, for example.

[0119] (action)

[0120] Figure 14 This figure illustrates the circuit appearance of the harmonic processing circuit 140a of the power amplifier circuit 1c according to the fourth embodiment in the case of even-order harmonics. In the case of even-order harmonics, the phase of the signal output from the amplifier 120 becomes substantially the same as the phase of the signal output from the output terminal of the amplifier 130. Therefore, the potential at the output terminal of the amplifier 120 and the potential at the output terminal of the amplifier 130 become substantially the same.

[0121] Therefore, no current flows from the output of amplifier 120 to the output of amplifier 130 via third capacitor 142 and fourth capacitor 143. Therefore, when viewed from the output of amplifier 120, the output of amplifier 130 is not connected to the output of amplifier 130 via third capacitor 142 and fourth capacitor 143.

[0122] On the other hand, the potential of the output terminal of the amplifier 130 is different from the reference potential, so a current flows from the output terminal of the amplifier 120 through the third capacitor 142 and the microstrip line 61c toward the reference potential (see Figure 13 Therefore, when viewed from the output end of the amplifier 120, the output end of the amplifier 120 is connected to the reference potential via the third capacitor 142 and the microstrip line 61f (see Figure 14 ).

[0123] The impedance ZLp associated with even-order harmonics when the harmonic processing circuit 140a is viewed from the output end of the amplifier 120 can be adjusted by the capacitance of the third capacitor 142 and the inductance of the microstrip line 61f. Similarly, the impedance ZLm associated with even-order harmonics when the harmonic processing circuit 140a is viewed from the output end of the amplifier 130 can also be adjusted by the capacitance of the fourth capacitor 143 and the inductance of the microstrip line 61g.

[0124] Figure 15 1 is a diagram for explaining the appearance of the circuit under the fundamental wave and odd-order harmonics of the harmonic processing circuit 140a of the power amplifier circuit 1c according to the fourth embodiment. Figure 15As shown, in the case of the fundamental wave and odd-order harmonics, the phase of the signal output from amplifier 120 differs by approximately 180 degrees from the phase of the signal output from the output end of amplifier 130, so connection point N1 becomes a virtual short circuit. Therefore, when viewed from the output end of amplifier 120, the output end of amplifier 120 is connected to the reference potential via third capacitor 142. Similarly, when viewed from the output end of amplifier 130, the output end of amplifier 130 is connected to the reference potential via fourth capacitor 143.

[0125] The impedance ZLp with respect to the fundamental wave and odd-order harmonics when the harmonic processing circuit 140a is viewed from the output end of the amplifier 120 can be adjusted by the capacitance of the third capacitor 142. Similarly, the impedance ZLm with respect to the fundamental wave and odd-order harmonics when the harmonic processing circuit 140a is viewed from the output end of the amplifier 130 can also be adjusted by the capacitance of the fourth capacitor 143.

[0126] (Fifth embodiment)

[0127] (structure)

[0128] Figure 16 1 is a diagram showing a power amplifier circuit 1d according to the fifth embodiment. Figure 11 The power amplifier circuit 1d according to the fifth embodiment includes an amplifier 100 as a pre-stage amplifier. The amplifier 100 is a driver-stage amplifier and is provided before a differential amplifier formed by amplifiers 120 and 130.

[0129] An inter-stage matching circuit 110 is provided between the amplifier 100 and the differential amplifier formed by the amplifiers 120 and 130. The inter-stage matching circuit 110 includes inductors 111 and 112 and capacitors 113 and 114.

[0130] Inductor 111 and inductor 112 are magnetically coupled to each other. One end of inductor 111 is connected to the output terminal of amplifier 100. The other end of inductor 111 is connected to power supply 183. Inductor 111 corresponds to the seventh inductor of this disclosure. One end of inductor 112 is connected to the input terminal of amplifier 120. The other end of inductor 112 is connected to the input terminal of amplifier 130. Inductor 112 corresponds to the eighth inductor of this disclosure.

[0131] The capacitor 114 is connected in parallel with the inductor 111. The capacitor 113 is connected in parallel with the inductor 112. The capacitor 113 corresponds to the third capacitor of the present disclosure.

[0132] Amplifier 100 includes a transistor 104, a capacitor 101, and a resistor 102. The collector of transistor 104 is connected to one end of inductor 111 and one end of capacitor 114. The emitter of transistor 104 is connected to the other end of capacitor 114 and a reference potential. The base of transistor 104 is connected to one end of capacitor 101. One end of resistor 102 is connected to the connection point between the other end of capacitor 101 and the base of transistor 104. A bias circuit (not shown) is connected to the other end of resistor 102.

[0133] Focusing on transistor 124 of amplifier 120, its emitter is connected to a reference potential, and its collector is connected to one end of inductor 151. A signal at one end of inductor 112 is input to the base of transistor 124. Focusing on transistor 134 of amplifier 130, its emitter is connected to a reference potential, and its collector is connected to the other end of inductor 151. A signal at the other end of inductor 112 is input to the base of transistor 134.

[0134] The inter-stage matching circuit 110 widens the load impedance of the transistor 104 and suppresses the influence of the parasitic capacitance between the base and emitter of the transistors 124 and 134, which varies with the power level. This achieves a wideband amplifier with good linearity.

[0135] Figure 17 It shows the fundamental frequency Figure 16 The equivalent circuit diagram of the power amplifier circuit 1d is shown in FIG. Figure 17 In FIG. 1 , a parasitic capacitance between the base and the emitter of the transistor 124 is indicated by reference numeral 124 b , and a parasitic capacitance between the base and the emitter of the transistor 134 is indicated by reference numeral 134 b .

[0136] When viewed from the base of transistor 124, parasitic capacitance 124b and capacitor 113a are connected in parallel between the base of transistor 124 and the reference potential. Therefore, by appropriately selecting the capacitance value of capacitor 113a, the influence of parasitic capacitance 124b, whose value fluctuates depending on the power level, can be reduced. For example, the capacitance value of capacitor 113a can be made sufficiently larger than the capacitance value of parasitic capacitance 124b. This reduces the influence of fluctuations in parasitic capacitance 124b. This improves the linearity of the input of transistor 124.

[0137] The same applies to parasitic capacitance 134b between the base and emitter of transistor 134. Specifically, by appropriately selecting the capacitance value of capacitor 113b, the influence of parasitic capacitance 134b, whose magnitude varies depending on the power level, can be reduced. This improves the linearity of the input of transistor 134.

[0138] Here, the frequency characteristics of the load impedance of the collector of the transistor 104 in the amplifier 100 are considered. Figure 2 Compared to the power amplifier circuit 1 according to the first embodiment shown, the capacitor 121 on the base side of the transistor 124 and the capacitor 131 on the base side of the transistor 134 are not provided. These capacitors 121 and 131 are provided to block DC current. However, these capacitors 121 and 131 have frequency dependence and therefore affect the load impedance of the collector of the transistor 104.

[0139] Therefore, in the power amplifier circuit 1d of this embodiment, capacitors 121 and 131 are not provided. Even in this case, as long as the bias voltage supplied via resistor 122 is the same as the bias voltage supplied via resistor 132, no current flows, thus achieving the same function as blocking direct current. According to the power amplifier circuit 1d of this embodiment, since capacitors 121 and 131 are not provided, frequency fluctuations in the load impedance of the collector of transistor 104 can be reduced.

[0140] In addition, Figure 16 In the embodiment, the position of the resistor 122 may be changed to connect the resistor 122 between the base of the transistor 124 and the resistor 123, so that the bias voltage is provided through the resistor 122. Similarly, the position of the resistor 132 may be changed to connect the resistor 132 between the base of the transistor 134 and the resistor 133, so that the bias voltage is provided through the resistor 132.

[0141] (Sixth embodiment)

[0142] (structure)

[0143] Figure 18 This diagram shows a power amplifier circuit 1e according to the sixth embodiment. Compared to the power amplifier circuit 1 according to the first embodiment, the power amplifier circuit 1e according to the sixth embodiment has capacitors 190 and 192 added and the capacitor 154, inductor 166, and switch 161 deleted.

[0144] Capacitor 190 is connected in series between the other end of inductor 153 and node N3. Capacitor 192 is connected in series between the other end of inductor 152 and node N5.

[0145] In this embodiment, inductor 166, which was provided in power amplifier circuit 1 of the first embodiment, is omitted. In power amplifier circuit 1 of the first embodiment, inductor 166 does not magnetically couple with other inductors. Therefore, the positions of the marks showing the output impedance as viewed from the collector end of transistor 124 of amplifier 120 and the output impedance as viewed from the collector end of transistor 134 of amplifier 130 tend to spread out. In contrast, in this embodiment, by removing inductor 166, the positions of the marks showing the output impedance as viewed from the collector end of transistor 124 of amplifier 120 and the output impedance as viewed from the collector end of transistor 134 of amplifier 130 are easily concentrated in close proximity. In other words, impedance fluctuations with frequency changes are easily reduced.

[0146] Furthermore, in this embodiment, the resonant frequency of the series circuit formed by inductor 152 and capacitor 169 is set to the center frequency of the 5G mode operating frequency (e.g., 663 MHz to 915 MHz). This further reduces the change in impedance of the output side viewed from the collector end of transistor 124 of amplifier 120 and the change in impedance of the output side viewed from the collector end of transistor 134 of amplifier 130 with respect to frequency changes.

[0147] As described above, in this embodiment, the load impedance of the amplifiers 120 and 130 can be made broadband even without providing the switch 161 that is turned on and off to reduce the impedance change with the frequency change in the power amplifier circuit 1 of the first embodiment.

[0148] Furthermore, due to the omission of inductor 166, the output impedance viewed from the collector end of transistor 124 of amplifier 120 and the output impedance viewed from the collector end of transistor 134 of amplifier 130 are lower than those of the power amplifier circuit 1 of the first embodiment. In contrast, in this embodiment, the capacitance value of capacitor 162 is set larger than that of capacitor 162 in power amplifier circuit 1, thereby increasing the impedance and maintaining particularly good characteristics in 5G mode.

[0149] Furthermore, in this embodiment, capacitors 190 and 192 are added. As described above, since the value of capacitor 162 is increased, the inductance of inductor 152 needs to be increased. Furthermore, correspondingly, in order to maintain the winding ratio of the balanced-unbalanced transformer, the inductance of inductors 151 and 153 also needs to be increased. Here, particularly when the power amplifier circuit 1e operates in 2G mode, the inductance of inductors 152 and 153 becomes larger when viewed from the output terminal 180. Therefore, by adding capacitor 190, this inductance can be made to appear small, and proper impedance matching can be achieved even in 2G mode. Furthermore, by adding capacitor 192, the inductance of inductor 152 can be made to appear small even when the power amplifier circuit 1e operates in 5G mode, and proper impedance matching can be achieved.

[0150] (Seventh embodiment)

[0151] (structure)

[0152] Figure 19 14 is a diagram showing a power amplifier circuit 1f according to a seventh embodiment. Compared to the power amplifier circuit 1e according to the sixth embodiment, the power amplifier circuit 1f according to the seventh embodiment has a capacitor 144 and inductors 145 and 146 added thereto.

[0153] The capacitor 144 and the inductor 145 are connected in series to form a series circuit. The resonant frequency of the series circuit formed by the capacitor 144 and the inductor 145 is set to be above the operating frequency of the 5G mode. The inductor 146 is further connected in series with the series circuit formed by the capacitor 144 and the inductor 145. The series circuit of the capacitor 144 and the inductor 145 and the inductor 146 are connected in parallel with the inductor 151 between the other end of the capacitor 142 and the other end of the capacitor 143. In addition, the inductor 146 is magnetically coupled with the inductors 152 and 153, respectively. Curves K5 and K6 represent magnetic field coupling.

[0154] When power amplifier circuit 1f operates in 2G mode, a series circuit of capacitor 144 and inductor 146 is connected in parallel to inductor 151, which functions as the primary winding of a balun transformer. This makes the impedance of inductor 146 invisible, and only inductor 151 is visible as the primary winding of the balun transformer. Furthermore, inductors 152 and 153 function as the secondary winding of the balun transformer. Here, if the inductances of inductors 151, 152, and 153 are all set to be the same, the turns ratio between the primary winding of the balun transformer formed by inductor 151 and the secondary winding formed by the series circuit of inductor 152 and inductor 153 is 1:2.

[0155] On the other hand, when power amplifier circuit 1f operates in 5G mode, the series circuit formed by capacitor 144 and inductor 145 resonates and becomes invisible as impedance. Consequently, the parallel circuit of inductors 151 and 146 functions as the primary winding of a balun transformer, while inductor 153 functions as the secondary winding of the balun transformer. Consequently, the turns ratio between the primary and secondary windings of the balun transformer is 1:2. As a result, the load impedance seen by amplifiers 120 and 130 can be made approximately the same in both 2G and 5G modes.

[0156] In addition, although Figure 19 , the capacitor 144 and the inductor 145 and 146 are added to the power amplifier circuit 1e of the sixth embodiment. However, the capacitor 144 and the inductor 145 and 146 may also be added to the power amplifier circuit 1 of the first embodiment. Figure 20 This configuration example will be described.

[0157] (Eighth embodiment)

[0158] (structure)

[0159] Figure 20 1 is a diagram showing a power amplifier circuit 1g according to an eighth embodiment. Figure 20 Inductor 146, a series circuit formed by capacitor 144 and inductor 145, is connected in parallel with inductor 151 between the other end of capacitor 142 and the other end of capacitor 143. Furthermore, inductor 146 is magnetically coupled with inductors 152 and 153, respectively. By adding capacitors 144, inductors 145, and 146, the following effect can be achieved: the load impedance viewed from amplifiers 120 and 130 can be made substantially the same in both 2G mode and 5G mode.

[0160] Furthermore, the capacitor 144 and the inductors 145 and 146 may also be added to the power amplifier circuits 1a to 1d of the second to fifth embodiments. Even in these cases, the addition of the capacitor 144 and the inductors 145 and 146 can achieve the same effect, namely, making the load impedance viewed from the amplifiers 120 and 130 substantially the same in both the 2G mode and the 5G mode.

[0161] (Ninth embodiment)

[0162] (structure)

[0163] Figure 211 is a diagram showing a power amplifier circuit 1h according to a ninth embodiment. Compared to the power amplifier circuit 1e according to the sixth embodiment, the power amplifier circuit 1h according to the ninth embodiment has an additional circuit at a stage subsequent to the output terminals 180 and 181.

[0164] Specifically, filter 210 is connected downstream of output terminal 180. Furthermore, a SPMT (Single Pole Multiple Throw) switch 220 and filters 230 and 240 are connected downstream of output terminal 181. Furthermore, an MPST (Multiple Pole Single Throw) switch 250 is connected downstream of filters 210 and 230.

[0165] The passband of filter 210 is set to pass signals included in the operating frequency of the 2G mode. The passbands of filters 230 and 240 are set to pass signals included in the operating frequency of the 5G mode. For example, the passband of filter 230 is set to pass signals of 5G VLB, and the passband of filter 240 is set to pass signals of 5G LB.

[0166] The SPMT switch 220 switches whether the output of the output terminal 181 is input to the filter 230 or the filter 240 according to whether the operation mode of the power amplifier circuit 1g is 5G VLB or 5G LB.

[0167] The MPST switch 250 switches between the output of the output filter 210 and the output of the output filter 230 or the output filter 240 according to whether the operation mode of the power amplifier circuit 1g is the 2G mode or the 5G mode.

[0168] By configuring a circuit after the output terminals 180 and 181 in this manner, switching between the 2G mode and the 5G mode can be performed more easily.

[0169] In the present disclosure, each transistor is a bipolar transistor, but the present disclosure is not limited to this. A bipolar transistor has an emitter as a first terminal, a collector as a second terminal, and a base as a third terminal. As for bipolar transistors, a heterojunction bipolar transistor (HBT) can be exemplified, but the present disclosure is not limited to this. Each transistor may also be, for example, a field effect transistor (FET). In this case, the emitter can be replaced by a source, the collector by a drain, and the base by a gate. Therefore, the first terminal mentioned above can also be called an emitter or a source, the second terminal mentioned above can also be called a collector or a drain, and the third terminal mentioned above can also be called a base or a gate. Each transistor may also be a multi-finger transistor in which a plurality of unit transistors (also called "fingers") are electrically connected in parallel. The so-called unit transistor refers to the minimum structure that constitutes a transistor.

[0170] Regarding the description of the technical solutions, the present disclosure can take the following forms.

[0171] <1>

[0172] A power amplifier circuit comprises: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein:

[0173] The power amplifier circuit comprises:

[0174] 1st inductor;

[0175] a second inductor coupled to the first inductor; and

[0176] a third inductor coupled to the first inductor;

[0177] The power supply of the differential amplifier is supplied to the midpoint of the first inductor.

[0178] One end of the second inductor is connected to one end of the third inductor,

[0179] The power amplifier circuit further comprises:

[0180] a first capacitor having one end connected to the other end of the second inductor;

[0181] a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal;

[0182] a second switch provided between the other end of the third inductor and the second output terminal;

[0183] a third switch having one end connected between the third inductor and the second switch; and

[0184] The second capacitor is connected between the other end of the third switch and the reference potential.

[0185] The other end of the first capacitor is connected to a reference potential.

[0186] By controlling the first switch, the second switch, and the third switch to be turned on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

[0187] <2>

[0188] according to <1> The power amplifier circuit, wherein:

[0189] In the first mode, the first switch is turned on, the second switch is turned off, and the third switch is turned off, and a signal of the first frequency is output from the first output terminal.

[0190] In the second mode, the first switch is turned on, the second switch is turned off, and the third switch is turned on, and a signal having a second frequency different from the first frequency is output from the first output terminal.

[0191] In the third mode, the first switch is turned off, the second switch is turned on, and the third switch is turned off, and a signal of a third frequency included in the first frequency is output from the second output terminal.

[0192] <3>

[0193] according to <1> or <2> The power amplifier circuit, wherein:

[0194] further comprising: a fourth inductor provided between the first switch and a connection point between one end of the second inductor and one end of the third inductor;

[0195] The fourth inductor and the second inductor are coupled to each other.

[0196] A rotation direction of the current flowing through the second inductor and a rotation direction of the current flowing through the fourth inductor are opposite to each other.

[0197] <4>

[0198] A power amplifier circuit comprises: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein:

[0199] The power amplifier circuit comprises:

[0200] 1st inductor;

[0201] a second inductor coupled to the first inductor; and

[0202] a third inductor coupled to the first inductor;

[0203] The power supply of the differential amplifier is supplied to the midpoint of the first inductor.

[0204] One end of the second inductor is connected to one end of the third inductor,

[0205] The power amplifier circuit further comprises:

[0206] a first capacitor having one end connected to the other end of the second inductor;

[0207] a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal;

[0208] a second switch provided between the other end of the third inductor and the second output terminal; and

[0209] a fifth inductor having one end connected to a connection point between the second inductor and the first capacitor;

[0210] The other end of the first capacitor is connected to a reference potential.

[0211] The other end of the fifth inductor is connected to a reference potential.

[0212] The fifth inductor and the first inductor are coupled to each other.

[0213] The rotation direction of the current flowing through the first inductor and the rotation direction of the current flowing through the fifth inductor are opposite to each other.

[0214] By controlling the first switch and the second switch to be on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

[0215] <5>

[0216] according to <1> to <4> The power amplifier circuit according to any one of claims 1 to 5, wherein:

[0217] The device further includes a harmonic processing circuit connected in parallel with the first inductor between the output terminal of the first amplifier and the output terminal of the second amplifier.

[0218] <6>

[0219] according to <5> The power amplifier circuit, wherein:

[0220] The harmonic processing circuit comprises:

[0221] a third capacitor having one end connected to the output end of the first amplifier; and

[0222] A fourth capacitor, one end of which is connected to the output end of the second amplifier,

[0223] The other end of the third capacitor is connected to the other end of the fourth capacitor.

[0224] The power amplifier circuit further includes: a sixth inductor having one end connected to a connection point between the other end of the third capacitor and the other end of the fourth capacitor;

[0225] The other end of the sixth inductor is connected to a reference potential.

[0226] <7>

[0227] according to <5> The power amplifier circuit, wherein:

[0228] The harmonic processing circuit comprises:

[0229] a third capacitor having one end connected to the output end of the first amplifier; and

[0230] A fourth capacitor, one end of which is connected to the output end of the second amplifier,

[0231] The other end of the third capacitor is connected to the other end of the fourth capacitor.

[0232] The power amplifier circuit further includes: a microstrip line, one end of which is connected to a connection point between the other end of the third capacitor and the other end of the fourth capacitor;

[0233] The other end of the microstrip line is connected to a reference potential.

[0234] <8>

[0235] according to <1> to <7> The power amplifier circuit according to any one of claims 1 to 5, wherein:

[0236] The power amplifier circuit further comprises:

[0237] a pre-amplifier, provided in a pre-stage of the differential amplifier; and

[0238] an inter-stage matching circuit, provided between the pre-stage amplifier and the differential amplifier,

[0239] The inter-stage matching circuit comprises:

[0240] a seventh inductor, one end of which is connected to the output end of the pre-amplifier;

[0241] an eighth inductor coupled to the seventh inductor; and

[0242] The third capacitor is connected in parallel with the eighth inductor.

[0243] The first amplifier includes a first transistor, an emitter or a source of which is connected to a reference potential, and a collector or a drain of which is connected to one end of the first inductor.

[0244] The signal at one end of the eighth inductor is input to the base or gate of the first transistor.

[0245] The second amplifier includes a second transistor, an emitter or a source of which is connected to a reference potential, and a collector or a drain of which is connected to the other end of the first inductor.

[0246] The signal at the other end of the eighth inductor is input to the base or gate of the second transistor.

[0247] <9>

[0248] A power amplifier circuit comprises: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein:

[0249] The power amplifier circuit comprises:

[0250] 1st inductor;

[0251] a second inductor coupled to the first inductor; and

[0252] a third inductor coupled to the first inductor;

[0253] The power supply of the differential amplifier is supplied to the midpoint of the first inductor.

[0254] One end of the second inductor is connected to one end of the third inductor,

[0255] The power amplifier circuit further comprises:

[0256] a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal;

[0257] a second switch provided between the other end of the third inductor and the second output terminal;

[0258] a second capacitor having one end connected between the third inductor and the second switch and the other end connected to a reference potential;

[0259] a fourth capacitor provided between the other end of the third inductor and one end of the second capacitor; and

[0260] The fifth capacitor is provided between the first switch and a connection point between one end of the second inductor and one end of the third inductor.

[0261] The other end of the second inductor is connected to a reference potential.

[0262] By controlling the first switch and the second switch to be on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

[0263] <10>

[0264] according to <9> The power amplifier circuit, wherein:

[0265] In the first mode, the first switch is turned on, the second switch is turned off, and a signal of the first frequency is output from the first output terminal.

[0266] In the second mode, the first switch is turned on and the second switch is turned off, and a signal having a second frequency different from the first frequency is output from the first output terminal.

[0267] In the third mode, the first switch is turned off, the second switch is turned on, and a signal of a third frequency included in the first frequency is output from the second output terminal.

[0268] <11>

[0269] according to <10> The power amplifier circuit, wherein:

[0270] further comprising: a series circuit and a ninth inductor connected in parallel with the first inductor,

[0271] The series circuit includes a sixth capacitor and a tenth inductor connected in series with the sixth capacitor.

[0272] The series circuit is connected in series with the ninth inductor.

[0273] <12>

[0274] according to <2> The power amplifier circuit, wherein:

[0275] further comprising: a series circuit and a ninth inductor connected in parallel with the first inductor,

[0276] The series circuit includes a sixth capacitor and a tenth inductor connected in series with the sixth capacitor.

[0277] The series circuit is connected in series with the ninth inductor.

[0278] <13>

[0279] according to <12> The power amplifier circuit, wherein:

[0280] The resonant frequency of the series circuit is a center frequency of a frequency band including the first frequency and the second frequency.

[0281] Description of Reference Numerals

[0282] 1, 1a, 1b, 1c, 1d: power amplifier circuit;

[0283] 61c, 61f, 61g: microstrip lines;

[0284] 100, 120, 130: amplifier;

[0285] 110: inter-stage matching circuit;

[0286] 140, 140a: harmonic processing circuit;

[0287] 101, 113, 114, 121, 131, 142, 143, 144, 154, 162, 165, 169: capacitors;

[0288] 102, 122, 123, 132, 133: resistance;

[0289] 104, 124, 131, 134: transistors;

[0290] 111, 112, 141, 145, 146, 151, 152, 153, 155, 166: inductors;

[0291] 161, 163, 164, 167, 168: switches;

[0292] 180, 181: output terminals;

[0293] 210, 230, 240: filter;

[0294] 220: SPMT switch;

[0295] 250: MPST switch.

Claims

1. A power amplifier circuit comprising: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein: The power amplifier circuit comprises: 1st inductor; a second inductor coupled to the first inductor; and a third inductor coupled to the first inductor; The power supply of the differential amplifier is supplied to the midpoint of the first inductor. One end of the second inductor is connected to one end of the third inductor, The power amplifier circuit further comprises: a first capacitor having one end connected to the other end of the second inductor; a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal; a second switch provided between the other end of the third inductor and the second output terminal; a third switch having one end connected between the third inductor and the second switch; and The second capacitor is connected between the other end of the third switch and the reference potential. The other end of the first capacitor is connected to a reference potential. By controlling the first switch, the second switch, and the third switch to be turned on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

2. The power amplifier circuit according to claim 1, wherein: In the first mode, the first switch is turned on, the second switch is turned off, and the third switch is turned off, and a signal of the first frequency is output from the first output terminal. In the second mode, the first switch is turned on, the second switch is turned off, and the third switch is turned on, and a signal having a second frequency different from the first frequency is output from the first output terminal. In the third mode, the first switch is turned off, the second switch is turned on, and the third switch is turned off, and a signal of a third frequency included in the first frequency is output from the second output terminal.

3. The power amplifier circuit according to claim 1 or claim 2, wherein: further comprising: a fourth inductor provided between the first switch and a connection point between one end of the second inductor and one end of the third inductor; The fourth inductor and the second inductor are coupled to each other. A rotation direction of the current flowing through the second inductor and a rotation direction of the current flowing through the fourth inductor are opposite to each other.

4. A power amplifier circuit comprising: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein: The power amplifier circuit comprises: 1st inductor; a second inductor coupled to the first inductor; and a third inductor coupled to the first inductor; The power supply of the differential amplifier is supplied to the midpoint of the first inductor. One end of the second inductor is connected to one end of the third inductor, The power amplifier circuit further comprises: a first capacitor having one end connected to the other end of the second inductor; a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal; a second switch provided between the other end of the third inductor and the second output terminal; as well as a fifth inductor having one end connected to a connection point between the second inductor and the first capacitor; The other end of the first capacitor is connected to a reference potential. The other end of the fifth inductor is connected to a reference potential. The fifth inductor and the first inductor are coupled to each other. The rotation direction of the current flowing through the first inductor and the rotation direction of the current flowing through the fifth inductor are opposite to each other. By controlling the first switch and the second switch to be on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

5. The power amplifier circuit according to claim 1 or claim 4, wherein: The device further includes a harmonic processing circuit connected in parallel with the first inductor between the output terminal of the first amplifier and the output terminal of the second amplifier.

6. The power amplifier circuit according to claim 5, wherein: The harmonic processing circuit comprises: a third capacitor having one end connected to the output end of the first amplifier; and A fourth capacitor, one end of which is connected to the output end of the second amplifier, The other end of the third capacitor is connected to the other end of the fourth capacitor. The power amplifier circuit further includes: a sixth inductor having one end connected to a connection point between the other end of the third capacitor and the other end of the fourth capacitor; The other end of the sixth inductor is connected to a reference potential.

7. The power amplifier circuit according to claim 5, wherein: The harmonic processing circuit comprises: a third capacitor having one end connected to the output end of the first amplifier; and A fourth capacitor, one end of which is connected to the output end of the second amplifier, The other end of the third capacitor is connected to the other end of the fourth capacitor. The power amplifier circuit further includes: a microstrip line, one end of which is connected to a connection point between the other end of the third capacitor and the other end of the fourth capacitor; The other end of the microstrip line is connected to a reference potential.

8. The power amplifier circuit according to claim 1, claim 2 or claim 4, wherein: The power amplifier circuit further comprises: a pre-amplifier, provided in a pre-stage of the differential amplifier; and an inter-stage matching circuit, provided between the pre-stage amplifier and the differential amplifier, The inter-stage matching circuit comprises: a seventh inductor, one end of which is connected to the output end of the pre-amplifier; an eighth inductor coupled to the seventh inductor; and The third capacitor is connected in parallel with the eighth inductor. The first amplifier includes a first transistor, an emitter or a source of which is connected to a reference potential, and a collector or a drain of which is connected to one end of the first inductor. The signal at one end of the eighth inductor is input to the base or gate of the first transistor. The second amplifier includes a second transistor, an emitter or a source of which is connected to a reference potential, and a collector or a drain of which is connected to the other end of the first inductor. The signal at the other end of the eighth inductor is input to the base or gate of the second transistor.

9. A power amplifier circuit comprising: a differential amplifier including a first amplifier and a second amplifier; and output terminals including a first output terminal and a second output terminal, wherein: The power amplifier circuit comprises: 1st inductor; a second inductor coupled to the first inductor; and a third inductor coupled to the first inductor; The power supply of the differential amplifier is supplied to the midpoint of the first inductor. One end of the second inductor is connected to one end of the third inductor, The power amplifier circuit further comprises: a first switch provided between a connection point between one end of the second inductor and one end of the third inductor and the first output terminal; a second switch provided between the other end of the third inductor and the second output terminal; a second capacitor having one end connected between the third inductor and the second switch and the other end connected to a reference potential; a fourth capacitor provided between the other end of the third inductor and one end of the second capacitor; and The fifth capacitor is provided between the first switch and a connection point between one end of the second inductor and one end of the third inductor. The other end of the second inductor is connected to a reference potential. By controlling the first switch and the second switch to be on or off, a signal of a desired frequency is output from the first output terminal or the second output terminal.

10. The power amplifier circuit according to claim 9, wherein: In the first mode, the first switch is turned on, the second switch is turned off, and a signal of the first frequency is output from the first output terminal. In the second mode, the first switch is turned on and the second switch is turned off, and a signal having a second frequency different from the first frequency is output from the first output terminal. In the third mode, the first switch is turned off, the second switch is turned on, and a signal of a third frequency included in the first frequency is output from the second output terminal.

11. The power amplifier circuit according to claim 10, wherein: further comprising: a series circuit and a ninth inductor connected in parallel with the first inductor, The series circuit includes a sixth capacitor and a tenth inductor connected in series with the sixth capacitor. The series circuit is connected in series with the ninth inductor.

12. The power amplifier circuit according to claim 2, wherein: further comprising: a series circuit and a ninth inductor connected in parallel with the first inductor, The series circuit includes a sixth capacitor and a tenth inductor connected in series with the sixth capacitor. The series circuit is connected in series with the ninth inductor.

13. The power amplifier circuit according to claim 12, wherein: The resonant frequency of the series circuit is a center frequency of a frequency band including the first frequency and the second frequency.

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