Test circuit and test method for dynamic intrinsic energy loss test of power device
By designing the combination of waveform generation module and test module, the additional loss and measurement inaccuracy problems in dynamic intrinsic energy loss testing of power devices are solved, and the accuracy and consistency testing in high-frequency bands are achieved, reducing costs.
Patent Information
- Application Number
- CN202510649408.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-20
- Publication Date
- 2025-08-12
AI Technical Summary
The dynamic intrinsic energy loss testing technology of existing power devices has problems of additional energy loss interference and inaccurate measurements, especially in high frequency bands that affect the accuracy and consistency of the test results.
A test circuit is designed, including a waveform generation module and a test module. By connecting a large-capacitance value capacitor, the waveform voltage is not affected by the power device to be tested, and the device to be tested is connected in series with the reference capacitor, and a quantitative conversion model is established to measure energy loss.
It improves the accuracy and consistency of the test, reduces experimental errors, and can make reliable performance comparisons between different devices, reducing test costs.
Smart Images
Figure CN120468612A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of power device testing, and relates to a test circuit and a test method for testing the dynamic intrinsic energy loss of a power device. Background Art
[0002] The importance of energy in today's world is self-evident. It impacts nearly every aspect of human life, and the progress of human society is inseparable from innovations in energy technology. One of the key pillars of energy development is power electronics, also known as power electronics, which provides critical technical support for energy conversion, transmission, and storage. In today's society, electrical energy is the primary form of energy utilization. Other forms of energy, such as hydropower, thermal energy, nuclear energy, wind power, and solar energy, typically need to be converted into electrical energy before being transmitted and distributed through the power grid and then converted into other forms of energy. Power electronics is considered the most advanced technology for power conversion. It is estimated that at least 50% of the world's electrical energy is processed by power devices. By using advanced power devices, power electronics technology enables efficient conversion and precise control of electrical energy. These power devices include thyristors, metal-oxide-semiconductor field-effect transistors (MOSFETs), and insulated-gate bipolar transistors (IGBTs), which feature fast switching speeds, low losses, and high reliability.
[0003] New research shows that there is dynamic intrinsic energy loss in the output capacitance of power devices, which limits the high frequency of power devices. Specifically, when the gate and source of the power device are short-circuited, the output capacitance C OSS There is a problem of abnormal heating during the charging and discharging process at high frequency, that is, C OSS There is energy loss at high frequencies. When the output power of the circuit is tens of watts, the energy loss of some devices even reaches several watts at frequencies of MHz. On the other hand, the drain-source voltage (V DS ) The waveform during switching is asymmetric. Specifically, when the drain-source voltage remains unchanged, the output capacitance of the power device is different during charging and discharging. This shows that the C OSS It is not an ideal capacitor, and its dynamic intrinsic energy loss is common. With the development and application of GaN and SiC, the requirements for the operating frequency and voltage of power electronic systems are further improved, which makes C OSS The problem of dynamic intrinsic energy loss has become more prominent and has become an important factor limiting the improvement of system efficiency.
[0004] Although a variety of testing technologies for the dynamic intrinsic energy loss of power devices have been proposed, existing testing technologies still have some shortcomings. For example, existing testing technologies such as nonlinear resonance testing methods cannot effectively isolate non-target losses during the measurement process. When the power device switches transiently, the parasitic effects of the gate drive circuit will generate additional energy losses. Such losses are closely related to the C OSS The dynamic losses are coupled with each other; at the same time, the thermal loss of the series inductor in the test circuit will increase exponentially with increasing frequency, and may reach a level equivalent to the loss to be measured in the high frequency band, seriously interfering with the accuracy of the measurement results; the other Sawyeta test circuit has a small measurement range and cannot accurately represent the energy loss of the power device under actual working conditions. Summary of the Invention
[0005] In view of this, an object of the present invention is to provide a test circuit and test method for dynamic intrinsic energy loss testing of power devices, thereby reducing additional energy loss during device testing and improving test accuracy and consistency.
[0006] To achieve the above objectives, the present invention provides, in one aspect, a test circuit for testing the dynamic intrinsic energy loss of a power device. The test circuit includes a waveform generation module and a test module, the waveform generation module being electrically connected to the test module. The waveform generation module is configured to generate a waveform voltage and adjust the amplitude and frequency of the waveform voltage. The test module performs a dynamic intrinsic energy loss test on the power device under test based on the waveform voltage.
[0007] Furthermore, the waveform generating module includes a DC power supply Vin, an inductor L, a capacitor C P and field effect tube Q1; the positive electrode of the DC power supply Vin is connected to the first end of the inductor L, and the negative electrode of the DC power supply Vin is grounded; the second end of the inductor L is respectively connected to the drain of the field effect tube Q1 and the capacitor C P The first end of the field effect tube Q1 is connected to the source of the capacitor C P The second ends of the capacitors C P The two ends of the test module are connected in parallel.
[0008] The test module includes a reference capacitor Cref and a power device to be tested connected in series; the drain of the power device to be tested is connected to the capacitor C P The first end of the reference capacitor Cref is connected, the gates are short-circuited and connected to the first end of the reference capacitor Cref; the second end of the reference capacitor Cref is grounded.
[0009] The relationship between the power device to be tested and the reference capacitor Cref satisfies the following conditions:
[0010] C eq=C o *C ref / (C o +C ref )
[0011] Where C eq Represents the equivalent capacitance of the test module, C o Represents the output capacitance of the power device under test, C ref Indicates the capacitance value of the reference capacitor Cref;
[0012] Furthermore, the capacitor C P The capacitance value is at least equal to the equivalent capacitance C eq The value of the waveform generator module is more than one order of magnitude, ensuring that the waveform voltage generated by the waveform generator module is not affected by the power device to be tested, thereby ensuring the adjustment of the inductor L and the capacitor C P The value can control the amplitude and frequency of the waveform voltage generated by the waveform generation module.
[0013] In another aspect, the present invention provides a test method for testing dynamic intrinsic energy loss of a power device, the method comprising:
[0014] First, a test circuit for testing the dynamic intrinsic energy loss of a power device is constructed. The test circuit includes a waveform generating module and a test module connected in parallel to the output end of the waveform generating module.
[0015] The waveform generating module includes a DC power supply, an inductor, a capacitor and a field-effect transistor; the positive electrode of the DC power supply is connected to the first end of the inductor, and the negative electrode of the DC power supply is grounded; the second end of the inductor is respectively connected to the drain of the field-effect transistor and the second end of the capacitor; the source of the field-effect transistor and the second end of the capacitor are both grounded.
[0016] The test module includes a power device to be tested and a reference capacitor; the drain of the power device to be tested is connected to the first end of the capacitor, the source and the gate are short-circuited and connected to the first end of the reference capacitor; the second end of the reference capacitor is grounded.
[0017] Then, a waveform voltage is generated by the waveform generating module, and voltage curves of the power device to be tested and the reference capacitor under the excitation of the waveform voltage are collected;
[0018] Finally, the maximum output charge of the power device to be measured is determined according to the voltage curve of the reference capacitor, and the output charge of the power device to be measured is integrated with the maximum output charge as the integration limit to achieve the measurement of the dynamic intrinsic energy loss of the power device to be measured.
[0019] Further, determining the maximum output charge of the power device under test according to the voltage curve of the reference capacitor includes determining the maximum voltage value of the reference capacitor according to the voltage curve of the reference capacitor, and calculating the maximum output charge of the power device under test by the following formula:
[0020] Q max =C ref (V refmax -V ref0 )
[0021] Where C ref Indicates the capacitance value of the reference capacitor, V refmax Indicates the maximum voltage value of the reference capacitor, V ref0 Indicates the initial voltage value of the reference capacitor;
[0022] With the maximum output charge Q max As the integration limit, the output charge of the power device to be tested is integrated:
[0023]
[0024] Where, E DISS Represents the total energy loss during the soft switching transient of the power device under test, V DUT It represents the actual voltage of the power device under test, and Q represents the output charge of the power device under test.
[0025] Furthermore, the power device to be tested and the reference capacitor satisfy the following conditions:
[0026] C eq =C o *C ref / (C o +C ref )
[0027] Where C eq Represents the equivalent capacitance of the test module, C o Represents the output capacitance of the power device under test, C ref Indicates the capacitance value of the reference capacitor;
[0028] The capacitance of the capacitor is at least equal to the equivalent capacitance C eq The value of the inductor and the capacitor is more than one order of magnitude, ensuring that the waveform voltage generated by the waveform generating module is not affected by the power device to be measured, thereby ensuring that adjusting the values of the inductor and the capacitor can control the amplitude and frequency of the waveform voltage generated by the waveform generating module.
[0029] The beneficial effects of the present invention are:
[0030] (1) The present invention sets a parallel capacitor C in the waveform generating module PThe capacitance value is at least equal to the equivalent capacitance C eq The value of the waveform generator module is more than one order of magnitude, ensuring that the waveform voltage generated by the waveform generator module is not affected by the power device to be tested, thereby ensuring that the amplitude and frequency of the waveform voltage generated by the waveform generator module can be fully controlled by adjusting the values of the inductor and capacitor, that is, ensuring that the resonant waveform of the circuit is completely controlled by the inductor L and the parallel capacitor C. P Under these conditions, the circuit's resonant characteristics remain stable, making test results more reliable and consistent. This effectively controls experimental conditions, ensuring that the test process is not disturbed by external factors. This design not only reduces experimental errors and improves test accuracy, but also provides a good basis for performance comparisons of different devices.
[0031] (2) By connecting the power device to be tested in series with the reference capacitor, the power device to be tested can be placed in the off state, eliminating the influence of the gate-source capacitance of the device to be tested and avoiding the energy loss that may be caused during the switching process. This can eliminate all possible hard switching losses and improve the accuracy and credibility of the test results.
[0032] (3) The present invention connects the device under test in series with a reference capacitor, and establishes a quantitative conversion model between the voltage and output charge of the device under test through the reference capacitor, so that the energy loss of the device under test can be measured by integrating the output charge of the device under test, without considering the voltage asymmetry during the discharge process, thereby avoiding the accumulation of integration errors.
[0033] (4) The present invention can realize the measurement of the power device E through a relatively simple topological structure. DISS The measurement of the value only requires a small increase in the DC bias, which is not limited by the power amplifier and greatly reduces the cost of dynamic intrinsic energy loss testing of power devices.
[0034] Other advantages, objects, and features of the present invention will be described in part in the following description and, in part, will be apparent to those skilled in the art upon examination of the following description or may be learned from practice of the present invention. The objects and other advantages of the present invention may be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below with reference to the accompanying drawings, in which:
[0036] Figure 1 A schematic diagram of a test circuit for testing dynamic intrinsic energy loss of a power device according to an embodiment of the present invention;
[0037] Figure 2A flow chart of a test method for dynamic intrinsic energy loss testing of power devices provided by an embodiment of the present invention;
[0038] Figure 3 Schematic diagram of waveforms generated by a waveform generation module for dynamic intrinsic energy loss testing of power devices provided by an embodiment of the present invention
[0039] Figure 4 Schematic diagram of waveforms actually measured by the test module for dynamic intrinsic energy loss testing of power devices provided by an embodiment of the present invention
[0040] Figure 5 The reference capacitance and voltage curve of the device under test obtained based on the test method provided by the embodiment of the present invention.
[0041] Figure numerals: 1-waveform generation module; 2-test module. DETAILED DESCRIPTION
[0042] The following describes the embodiments of the present invention by means of specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and the following embodiments and features in the embodiments can be combined with each other without conflict.
[0043] Among them, the accompanying drawings are only for illustrative purposes and represent only schematic diagrams rather than actual pictures, and should not be understood as limiting the present invention. In order to better illustrate the embodiments of the present invention, some parts of the accompanying drawings may be omitted, enlarged or reduced, and do not represent the dimensions of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions may be omitted in the accompanying drawings.
[0044] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "back", etc. indicating directions or positional relationships, they are based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operate in a specific direction. Therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.
[0045] Example 1
[0046] like Figure 1 The figure shows a test circuit for dynamic intrinsic energy loss testing of a power device provided by this embodiment. The circuit includes: a waveform generating module 1 and a testing module 2, wherein the waveform generating module 1 and the testing module 2 are electrically connected.
[0047] The waveform generating module 1 is used to generate a waveform and control the waveform amplitude and frequency; the testing module 2 is used to test the power device according to the waveform generated by the waveform generating module 1.
[0048] In this embodiment, the waveform generating module 1 includes a DC power supply Vin, an inductor L, a field effect transistor Q1 and a capacitor C P .
[0049] The positive electrode of the DC power supply Vin is connected to the first end of the inductor L, the negative electrode of the DC power supply Vin is grounded, and the second end of the inductor L is connected to the drain of the field effect tube Q1 and the capacitor C respectively. P The first end is connected to the source of the field effect tube Q1 and the capacitor C P The second end of capacitor C is grounded. P The two ends of the test module are connected in parallel.
[0050] In this embodiment, the test module 2 includes a reference capacitor Cref and a device under test (DUT).
[0051] Among them, the drain of the device under test is connected to the capacitor C P The first end of the inductor L and the drain of the field effect tube Q1 are connected, the source and gate of the device under test DUT are short-circuited, and are connected to the first end of the reference capacitor Cref. The second end of the reference capacitor Cref is grounded.
[0052] In addition, the following conditions need to be met between the device under test (DUT) and the reference capacitor (Cref):
[0053] C eq =C o *C ref / (C o +C ref )
[0054] Where C eq Indicates the equivalent capacitance of the test module, C o Represents the output capacitance of the device under test (DUT), C ref Indicates the capacitance value of the reference capacitor Cref.
[0055] The waveform voltage generated by the waveform generating module 1 satisfies the actual voltage of the device under test DUT:
[0056] V DUT =V WG -V ref
[0057] Where V DUT Indicates the actual voltage of the device under test DUT, V WG Indicates the waveform voltage generated by the waveform generation module, V ref Indicates the actual voltage of the reference capacitor Cref.
[0058] The initial voltage of the reference capacitor Cref and the output charge of the device under test DUT satisfy:
[0059] Q=C ref (V ref -V ref0 )
[0060] Where Q represents the output charge of the device under test (DUT), V ref0 Indicates the initial voltage of the reference capacitor Cref.
[0061] The output charge of the device under test (DUT) and the actual voltage of the device under test (DUT) satisfy the following conditions:
[0062]
[0063] Where, E DISS Represents the total energy loss during the soft switching transient (charging and discharging cycle) of the device under test (DUT), Q max Indicates the maximum output charge of the device under test (DUT).
[0064] It should be noted that the design of the test module 2 is to adjust the inductance L and the parallel capacitance C P The amplitude and frequency of the waveform generated by the waveform generating module 1 can be flexibly controlled by the numerical value of . This adjustment mechanism makes the waveform generation process not only highly flexible, but also adaptable to the diverse needs of different application scenarios, and meets the specific requirements of various experiments and practical applications. In the application process of this circuit, it is particularly noteworthy that when testing different types of devices, the waveform characteristics generated remain relatively stable. This means that no matter what type of device is replaced, the basic shape and parameters of the waveform will not change significantly. This feature provides a solid basis for comparison, so that under the same experimental conditions, devices of different types or from different manufacturers can be E-tested. DISS Valid comparison of values. DISS The value is an important indicator for evaluating device performance and loss, and can reflect the energy loss of the device under working conditions.
[0065] By accurately measuring and comparing these E DISSThe value of ΔH can provide a deeper understanding of the performance of various devices under the same operating environment, thus providing important data support for further research and application. This not only helps to conduct more accurate analysis in theoretical research, but also provides a scientific basis for device selection in engineering practice.
[0066] Furthermore, the test circuit design provided in this embodiment significantly improves the reliability and consistency of the test. Because the waveform characteristics are unaffected by device type, researchers can focus on the performance of the device itself during experiments without worrying about external factors interfering with the test results. This consistency is particularly important when conducting large-scale tests or comparative studies, as it can reduce experimental errors and improve the credibility of the data.
[0067] The principle of the test circuit described in the present invention is to ensure that the device under test DUT is in the off state by connecting the device under test DUT in series with the reference capacitor Cref. The core purpose of this design choice is to eliminate all possible hard switching losses, because in this state, the device always remains off, thereby avoiding the energy loss that may be caused during the switching process. In addition, since the gate and source of the device under test DUT are short-circuited, the device under test DUT can effectively remain in the off state, which also eliminates the influence of the gate-source capacitance Cgs. Therefore, from the perspective of the circuit, the device under test DUT can be approximately regarded as the output capacitance C OSS . C OSS Connected in series with the reference capacitor Cref, the equivalent capacitance can be calculated using the series capacitor formula.
[0068] It is worth noting that in this configuration, the charge value passing through the device under test (DUT) and the reference capacitor Cref is the same, which provides a basis for subsequent measurements. In order to ensure that the waveform generated by the waveform generation module will not be affected by different devices under test, it is necessary to ensure that the parallel capacitor C P The value of the equivalent capacitance C eq The realization of this requirement is crucial because it ensures that the resonant waveform of the circuit is completely controlled by the inductor L and the parallel capacitor C P Under these conditions, the circuit's resonant characteristics remain stable, making test results more reliable and consistent. This design effectively controls experimental conditions, ensuring that the test process is not disturbed by external factors. This method not only improves test accuracy but also provides a good basis for performance comparisons of different devices.
[0069] The present invention can realize E through a relatively simple topological structure DISS The measurement of the value only requires a small increase in the DC bias, which is not limited by the power amplifier.
[0070] During the resonant transient period, the waveform voltage generated by the waveform generation module is V WG , and since it is approximately the output capacitance C OSS The actual voltage of the device under test DUT is: V DUT =V WG -V ref The charge Q output by the device under test (DUT) is the same as the charge in the reference capacitor Cref because the current flowing through them is the same.
[0071] Example 2
[0072] like Figure 2 The present invention provides a test method for testing the dynamic intrinsic energy loss of a power device, which includes the following steps:
[0073] S1. Use the waveform generation module to generate a waveform voltage and control the voltage amplitude and frequency. The waveform voltage generated by the waveform generation module is as follows: Figure 3 As shown;
[0074] S2. The power device is tested by the test module according to the waveform voltage generated by the waveform generation module, wherein the voltage of the power device under test and the reference capacitor measured by the test module is as follows: Figure 4 shown.
[0075] The waveform generation module includes: a DC power supply Vin, an inductor L, a field effect transistor Q1 and a capacitor C P .
[0076] The positive electrode of the DC power supply Vin is connected to the first end of the inductor L, the negative electrode of the DC power supply Vin is grounded, and the second end of the inductor L is connected to the drain of the field effect tube Q1 and the capacitor C P The first end of the MOSFET Q1 is connected to the source of the capacitor C P The second ends of the two terminals are grounded.
[0077] The test module includes: a reference capacitor Cref and a device under test DUT.
[0078] The source and gate of the device under test DUT are short-circuited and connected to the first end of the reference capacitor Cref. The second end of the reference capacitor Cref is grounded. The drain of the device under test DUT is connected to the second end of the inductor L and the capacitor Cref. P The first end of the MOSFET Q1 is connected to the drain of the MOSFET Q1.
[0079] In step S2, the dynamic intrinsic energy loss of the power device under test (DUT) is tested by using a waveform voltage, as shown in the following formula:
[0080]
[0081] Where, E DISS Represents the total energy loss during the soft switching transient (charging and discharging cycle) of the device under test (DUT), Q max Indicates the maximum output charge of the device under test (DUT).
[0082] Among them, Q max The value of is obtained by obtaining the maximum voltage of the reference capacitor Cref and calculating it according to the maximum voltage, as shown in the following formula:
[0083] Q max =C ref (V refmax -V ref0 )
[0084] Among them, V refmax Indicates the maximum voltage value of the reference capacitor. V refmax It can be obtained from the voltage curve of the reference capacitor during the charge and discharge process, as shown in the following figure: Figure 5 shown.
[0085] In summary, with the help of the above-mentioned technical solutions of the present invention, the present invention significantly improves the reliability and consistency of the test. Since the waveform characteristics are not affected by the device type, engineers and researchers can focus more on the performance of the device itself when conducting experiments without having to worry about external factors interfering with the test results. This consistency is particularly important when conducting large-scale tests or comparative studies because it can reduce experimental errors and improve the credibility of the data. The present invention can effectively control the experimental conditions to ensure that the test process is not interfered with by external factors. This method not only improves the accuracy of the test, but also provides a good basis for comparing the performance of different devices.
[0086] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions, which should all be included in the scope of the claims of the present invention.
Claims
1. A test circuit for testing dynamic intrinsic energy loss of a power device, characterized in that: The test circuit includes a waveform generating module and a test module, wherein the waveform generating module is electrically connected to the test module; The waveform generation module is used to generate a waveform voltage and adjust the amplitude and frequency of the waveform voltage. The test module performs a dynamic intrinsic energy loss test on the power device to be tested according to the waveform voltage.
2. The test circuit according to claim 1, wherein: The waveform generation module includes a DC power supply Vin, an inductor L, a capacitor C P and field effect tube Q1; the positive electrode of the DC power supply Vin is connected to the first end of the inductor L, and the negative electrode of the DC power supply Vin is grounded; the second end of the inductor L is respectively connected to the drain of the field effect tube Q1 and the capacitor C P The first end of the field effect tube Q1 is connected to the source of the capacitor C P The second ends of the capacitors C P The two ends of the test module are connected in parallel.
3. The test circuit according to claim 2, wherein: The test module includes a reference capacitor Cref and a power device to be tested connected in series; the drain of the power device to be tested is connected to the capacitor C P The source and the gate are short-circuited and connected to the first end of the reference capacitor Cref; A second terminal of the reference capacitor Cref is grounded.
4. The test circuit according to claim 3, characterized in that: The power device to be tested and the reference capacitor Cref satisfy the following conditions: C eq =C o *C ref / (C o +C ref ) Where C eq Represents the equivalent capacitance of the test module, C o Represents the output capacitance of the power device under test, C ref Indicates the capacitance value of the reference capacitor Cref; The capacitor C P The capacitance value is at least equal to the equivalent capacitance C eq The value of the waveform generator module is more than one order of magnitude, ensuring that the waveform voltage generated by the waveform generator module is not affected by the power device to be tested, thereby ensuring the adjustment of the inductor L and the capacitor C P The value can control the amplitude and frequency of the waveform voltage generated by the waveform generation module.
5. The test circuit according to claim 3, characterized in that: The energy loss of the power device to be tested is calculated by the following formula: Where, E DISS It represents the total energy loss during the soft switching transient of the power device under test, Q max It represents the maximum output charge of the power device under test, and Q represents the output charge of the power device under test.
6. A test method for testing dynamic intrinsic energy loss of power devices, characterized in that: The method includes: First, a test circuit for testing the dynamic intrinsic energy loss of a power device is constructed. The test circuit includes a waveform generating module and a test module connected in parallel to the output end of the waveform generating module. The test module includes a power device to be tested and a reference capacitor connected in series. Then, a waveform voltage is generated by the waveform generating module, and voltage curves of the power device to be tested and the reference capacitor under the excitation of the waveform voltage are collected; Finally, the maximum output charge of the power device to be measured is determined according to the voltage curve of the reference capacitor, and the output charge of the power device to be measured is integrated with the maximum output charge as the integration limit to achieve the measurement of the dynamic intrinsic energy loss of the power device to be measured.
7. The method according to claim 6, characterized in that Determining the maximum output charge of the power device under test according to the voltage curve of the reference capacitor includes determining the maximum voltage value of the reference capacitor according to the voltage curve of the reference capacitor, and calculating the maximum output charge of the power device under test by the following formula: Q max =C ref (V refmax -V ref0 ) Where C ref Indicates the capacitance value of the reference capacitor, V refmax Indicates the maximum voltage value of the reference capacitor, V ref0 Indicates the initial voltage value of the reference capacitor; With the maximum output charge Q max As the integration limit, the output charge of the power device to be tested is integrated: Where, E DISS Represents the total energy loss during the soft switching transient of the power device under test, V DUT It represents the actual voltage of the power device under test, and Q represents the output charge of the power device under test.
8. The method according to claim 6, characterized in that The waveform generating module includes a DC power supply, an inductor, a capacitor and a field effect transistor; the positive electrode of the DC power supply is connected to the first end of the inductor, and the negative electrode of the DC power supply is grounded; the second end of the inductor is respectively connected to the drain of the field effect transistor and the first end of the capacitor; the source of the field effect transistor and the second end of the capacitor are both grounded; the drain of the power device to be tested is connected to the first end of the capacitor, and the source and gate are short-circuited and connected to the first end of the reference capacitor; the second end of the reference capacitor is grounded.
9. The test circuit according to claim 8, characterized in that: The power device to be tested and the reference capacitor satisfy the following conditions: C eq =C o *C ref / (C o +C ref ) Where C eq Represents the equivalent capacitance of the test module, C o Represents the output capacitance of the power device under test, C ref Indicates the capacitance value of the reference capacitor; The capacitance of the capacitor is at least equal to the equivalent capacitance C eq The value of the inductor and the capacitor is more than one order of magnitude, ensuring that the waveform voltage generated by the waveform generating module is not affected by the power device to be measured, thereby ensuring that adjusting the values of the inductor and the capacitor can control the amplitude and frequency of the waveform voltage generated by the waveform generating module.