IGBT module detection method and device based on spread spectrum time domain reflection and medium

Abstract

The invention discloses an IGBT module detection method and device based on spread spectrum time domain reflection and a medium, and the method comprises the steps: constructing a module equivalent model corresponding to an IGBT module, and determining model parameters corresponding to the module equivalent model; generating a spread spectrum time domain reflection signal based on a spread spectrum time domain reflection signal platform; performing aging simulation on the IGBT module through a specified bonding wire in the equivalent model of the fracture module, and determining a target model parameter corresponding to the IGBT module after the aging simulation; transmitting the spread spectrum time domain reflection signal to the IGBT module after aging simulation so as to determine an incident signal and a reflection signal obtained by the IGBT module through the spread spectrum time domain reflection signal according to the target model parameter; and performing cross correlation on the incident signal and the reflected signal to obtain a cross-correlated signal amplitude, and establishing a mapping relation between the signal amplitude and the aging position so as to realize aging detection of the IGBT module based on the mapping relation.

Description

Technical Field

[0001] The present application relates to the field of IGBT technology, and in particular to an IGBT module detection method, device, and medium based on spread spectrum time domain reflectometry. Background Art

[0002] With the continuous improvement of the voltage level and transmission capacity of high-voltage direct current (HVDC) transmission systems, flexible direct current (HVDC) transmission systems have become widely used. In flexible direct current transmission systems, converter valves are core components. The power devices within these systems are responsible for converting AC to DC power, making their reliability crucial to system safety. The power devices in converter valves primarily use IGBT modules. However, as IGBT modules age, their performance degrades, component loss increases, and the risk of catastrophic system failure increases. Therefore, monitoring the operating status of IGBT modules is crucial to ensuring system stability and safety.

[0003] Currently, IGBT status monitoring primarily relies on prefault measurements, analysis of degradation process models, and system identification methods. Commonly used monitoring parameters include VCE(on) and / or RDS(on), which require specially designed sensors to measure. However, these parameters often vary slightly compared to their off-state counterparts. Furthermore, sensors typically require electrical isolation to prevent interference from high DC voltages, making direct measurement of these parameters impractical, cost-effective, and potentially resulting in low measurement resolution. Without adding additional sensors or circuitry, some methods indirectly track changes in VCE(on) and / or RDS(on) by monitoring thermal resistance and junction temperature. However, direct junction temperature measurement is difficult to implement and can only be effectively applied when the converter is idle. Summary of the Invention

[0004] To solve the above problems, this application proposes an IGBT module detection method based on spread spectrum time domain reflectometry, including:

[0005] Constructing a module equivalent model corresponding to the IGBT module and determining model parameters corresponding to the module equivalent model; wherein the module equivalent model includes parasitic parameters after equivalent simplification;

[0006] Importing the module equivalent model into a preset spread spectrum time domain reflection signal platform, and generating a spread spectrum time domain reflection signal based on the spread spectrum time domain reflection signal platform;

[0007] Performing an aging simulation on the IGBT module by breaking a specified bonding wire in the module equivalent model, and determining target model parameters corresponding to the IGBT module after the aging simulation;

[0008] Transmitting the spread spectrum time domain reflection signal to the IGBT module after aging simulation, so as to determine the incident signal and the reflected signal obtained by the IGBT module through the spread spectrum time domain reflection signal through the target model parameters;

[0009] The incident signal and the reflected signal are cross-correlated to obtain a cross-correlated signal amplitude, and a mapping relationship between the signal amplitude and the aging position is established to implement aging detection of the IGBT module based on the mapping relationship.

[0010] In one implementation of the present application, before constructing the module equivalent model corresponding to the IGBT module, the method further includes:

[0011] Construct the chip equivalent circuit of the IGBT chip based on parasitic parameters;

[0012] For some parasitic parameters in the chip equivalent circuit, performing equivalent simplification on the said part of the parasitic parameters to obtain a simplified chip equivalent model;

[0013] Parameters of the chip equivalent model are calibrated, and a module equivalent model corresponding to the IGBT module is constructed according to the signal transmission path inside the IGBT module and the chip equivalent model.

[0014] In one implementation of the present application, the partial parasitic parameters include emitter-drain capacitance, and equivalent simplification of the partial parasitic parameters is performed to obtain a simplified chip equivalent model, specifically including:

[0015] The depletion layer width that affects the emitter-drain capacitance is equivalently expressed by the capacitance parameter of the diode PN junction:

[0016] According to the equivalently expressed depletion layer width, the depletion layer of the diode PN junction is equivalently expressed as a junction capacitance;

[0017] When the expression of the junction capacitance is equivalent to the expression corresponding to the emitter-drain capacitance, some parasitic parameters are equivalently simplified to replace them with diodes to obtain a simplified chip equivalent model.

[0018] In one implementation of the present application, an equivalent representation of the depletion layer width affecting the emitter-drain capacitance is performed, specifically including:

[0019] The depletion layer width affecting the emitter-drain capacitance is equivalently expressed by the following formula:

[0020]

[0021] Where W represents the depletion layer width, εs is the dielectric constant of the semiconductor, Vdet is the reverse bias voltage of the diode PN junction; Vbi is the built-in potential of the diode PN junction, Np and Nn are the acceptor doping concentration and donor doping concentration, and ΔN(T) is the temperature compensation term, which represents the change in carrier concentration at high temperature. is the doping gradient correction factor, which describes the influence of the spatial distribution of doping concentration.

[0022] In one implementation of the present application, parameter calibration of the chip equivalent model specifically includes:

[0023] Charging the gate in the chip equivalent model to obtain change curves of gate current and gate voltage at different charging stages;

[0024] Performing phased parameter fitting on the gate capacitance based on the change curve to determine the gate capacitance in the chip equivalent model;

[0025] The IGBT chip is equivalently decomposed into a cascade topology of BJT and MOSFET. Based on the cascade topology, a saturation region current model corresponding to the MOSFET is constructed:

[0026] Parameters included in the saturation region current model are determined, and parameter calibration is performed on the chip equivalent model according to the gate capacitance and the parameters.

[0027] In one implementation of the present application, performing phased parameter fitting on the gate capacitance based on the change curve to determine the gate capacitance in the chip equivalent model specifically includes:

[0028] When it is determined through the change curve that the gate voltage enters a linear region, measuring a first driving current corresponding to the gate capacitance and a first gate voltage change rate corresponding to the gate voltage;

[0029] determining a gate-emitter capacitance corresponding to the gate capacitance according to the first drive current and the first gate voltage change rate;

[0030] When the gate voltage enters the saturation region from the linear region, measuring a second driving current corresponding to the gate capacitance and a second gate voltage change rate corresponding to the gate voltage;

[0031] A gate-collector Miller capacitance corresponding to the gate is determined according to the gate-emitter capacitance, the second drive current, and the second gate voltage change rate.

[0032] In one implementation of the present application, constructing a saturation region current model corresponding to the MOSFET specifically includes:

[0033] The saturation region current model is:

[0034]

[0035] Wherein, Ic(t) is the collector current, β is the dynamic current gain, which characterizes the carrier multiplication efficiency of the BJT in the IGBT chip, kp is the composite transconductance coefficient, which characterizes the equivalent transconductance under the synergistic effect of BJT-MOSFET, Vth is the equivalent threshold voltage, which characterizes the minimum gate drive voltage threshold required for the device to turn on, and α(Vge-Vth) is the nonlinear correction term.

[0036] In one implementation of the present application, determining the model parameters corresponding to the module equivalent model specifically includes:

[0037] The bonding wires in the module equivalent model are equivalently represented as resistors and inductors, and the bonding wires in a parallel structure are structurally simplified to obtain a simplified module equivalent model;

[0038] According to the simplified module equivalent model, the resistance value and the inductance value corresponding to the bonding wire are determined to obtain model parameters.

[0039] An embodiment of the present application provides an IGBT module detection device based on spread spectrum time domain reflectometry, the device comprising:

[0040] at least one processor;

[0041] and, a memory communicatively coupled to the at least one processor;

[0042] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the IGBT module detection method based on spread spectrum time domain reflection as described in any one of the above items.

[0043] An embodiment of the present application provides a non-volatile computer storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to:

[0044] An IGBT module detection method based on spread spectrum time domain reflectometry as described in any of the above items.

[0045] The IGBT module detection method based on spread spectrum time domain reflectometry proposed in this application can bring the following beneficial effects:

[0046] Based on the circuit structure of IGBT chips and IGBT modules, a module equivalent model of the IGBT module is constructed. By breaking different bonding wires and changing model parameters, the aging degree of the IGBT module is simulated. Based on the online detection platform built by the spread spectrum time domain reflectometry, the simulation and experimental results are analyzed to form aging degradation standards and corresponding diagnostic evaluation methods. It only needs to analyze the cross-correlation amplitude of the incident and reflected signals to determine the bond wire breakage through the mapping relationship, and monitor the aging status of the IGBT module in real time. There is no need to add dedicated sensors or complex isolation circuits, avoiding the dependence of traditional indirect temperature measurement methods on the system idle state. The detection accuracy and reliability are significantly improved through model parameter equivalence and aging simulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0048] Figure 1 A schematic flow chart of an IGBT module detection method based on spread spectrum time domain reflectometry provided in an embodiment of the present application;

[0049] Figure 2 A schematic diagram of the structure of an IGBT online detection platform provided in an embodiment of the present application;

[0050] Figure 3 A waveform diagram of a spread spectrum time domain reflection signal provided in an embodiment of the present application;

[0051] Figure 4 A schematic diagram of a cable structure model provided in an embodiment of the present application;

[0052] Figure 5 A schematic diagram of the structure of a chip equivalent circuit provided in an embodiment of the present application;

[0053] Figure 6 A schematic diagram of the structure of a chip equivalent model provided in an embodiment of the present application;

[0054] Figure 7 A schematic structural diagram of a simplified chip equivalent model provided in an embodiment of the present application;

[0055] Figure 8 A simplified circuit diagram of an FF100R12KS4 module provided in an embodiment of the present application;

[0056] Figure 9 A schematic diagram of an equivalent circuit of a bonding wire provided in an embodiment of the present application;

[0057] Figure 10(a)-Figure 10(b)A schematic diagram of an input reflection signal waveform of an IGBT module provided in an embodiment of the present application;

[0058] Figure 11(a)-Figure 11(b) A schematic diagram of a cross-correlation curve of an IGBT module provided in an embodiment of the present application;

[0059] Figure 12 A schematic diagram of a bond wire break provided in an embodiment of the present application;

[0060] Figure 13 A schematic structural diagram of an IGBT module detection device based on spread spectrum time domain reflectometry provided in an embodiment of the present application. DETAILED DESCRIPTION

[0061] To make the purpose, technical solutions, and advantages of this application more clear, the technical solutions of this application will be clearly and completely described below in conjunction with the specific embodiments of this application and the corresponding drawings. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0062] The embodiment of the present application proposes a spread spectrum time domain reflectometry (SSTDR) technology to detect the real-time status of the IGBT module. Unlike traditional offline detection methods, SSTDR can directly evaluate the aging degree of the IGBT module by comparing the differences in reflected signals. Moreover, the frequency of the SSTDR signal is much higher than the switching frequency of the IGBT module, thereby ensuring that the power device is not interrupted during normal operation, thereby realizing effective real-time status monitoring without interfering with the normal operation of the equipment.

[0063] Based on the existing problems, this paper built an IGBT equivalent circuit simulation model based on the circuit of IGBT chip and module, and simulated the aging of IGBT by changing parameters. Based on the spread spectrum time domain reflectometry, an online positioning simulation and experimental platform was built, and the simulation and experimental results were analyzed. The aging degradation standards and corresponding diagnostic evaluation methods were formulated.

[0064] The following describes in detail the technical solutions provided by various embodiments of the present application in conjunction with the accompanying drawings.

[0065] like Figure 1 As shown, the IGBT module detection method based on spread spectrum time domain reflectometry provided in the embodiment of the present application includes:

[0066] S101: Construct a module equivalent model corresponding to the IGBT module, and determine model parameters corresponding to the module equivalent model; wherein the module equivalent model includes parasitic parameters after equivalent simplification.

[0067] Due to the complex internal structure of the IGBT module, its impedance characteristics dynamically change as the device switches between operating states. Therefore, it is necessary to build a module equivalent model of the IGBT module based on the circuit structure of the IGBT chip and module. The module equivalent model is a simulation model that simulates IGBT module aging by changing model parameters. An online detection platform based on spread spectrum time-domain reflectometry is used to analyze simulation and experimental results, thereby establishing aging degradation standards and corresponding diagnostic assessment methods. Parasitic parameters significantly influence signal propagation in the IGBT module, so simplified equivalent parasitic parameters are added to the module equivalent model.

[0068] Aging simulation test needs to be carried out based on IGBT online detection platform, such as Figure 2 The figure shows a structural diagram of an IGBT online detection platform. The SSTDR signal is transmitted to the CE ends of the IGBT module through a transmission cable. Since the equivalent impedance of the IGBT is different from that of the transmission cable, a reflected signal is generated. Finally, a cross-correlation analysis is performed on the collected incident signal and reflected signal, and the aging degree of the IGBT module is evaluated based on the cross-correlation signal.

[0069] For the SSTDR signal, a square wave signal is used to drive the PN code generator to generate a PN sequence, and the PN sequence is modulated by a sine wave to form a high-frequency test signal. Since good autocorrelation is the most important guarantee for reducing experimental errors, the SSTDR signal needs to be selected. According to the simulation results, the pseudo-random sequence is selected as the m code, and the carrier modulation method is binary phase shift keying (2PSK) modulation of the cosine signal and the m sequence in a 1:1 manner. At the same time, since the size of the IGBT is relatively small compared to the cable, using an incident signal that is too long may cause the reflected signal to overlap with the incident signal, thereby reducing the accuracy of the test results. Therefore, the final sequence length of the spread spectrum time domain reflection signal is 7, and the specific waveform is as follows Figure 3 As shown. Figure 7 As shown, the signal modulation frequency is set to 25MHz.

[0070] When performing aging test on IGBT module, it is necessary to transmit signal to the IGBT module through known cable. Therefore, it is also necessary to establish corresponding cable simulation model. The cable module is composed of 60m intact cable. The structure and size of the cable are as follows: Figure 4 The cable is a coaxial structure, and the cable distribution parameters used in the cable simulation model are shown in Table 1:

[0071] Table 1

[0072] Cable distribution parameters Numerical Cable core outer diameter (mm) 3.5 XLPE insulation outer diameter (mm) 8.8 Shielding layer radius (mm) 9.9 Semiconducting layer thickness (mm) 0.5 Resistivity (m) <![CDATA[1.75×10 -8 ]]> Variable frequency dielectric constant fitting parameters <![CDATA[A=2.73;B=2.64×10 -9 ;p=0.716]]> Vacuum magnetic permeability (H / m) <![CDATA[4π×10 -7 ]]> XLPE dielectric constant (Ω / m) <![CDATA[2.04×10 -11 ]]> XLPE conductivity (F / m) <![CDATA[1×10 -16 ]]>

[0073] The IGBT module is composed of IGBT chips, diodes, solder layers, ceramics, etc. For IGBT chips, traditional equivalent circuit models often ignore the high-frequency coupling effect of parasitic parameters, resulting in insufficient aging simulation accuracy. The embodiment of the present application proposes an IGBT chip equivalent circuit model containing dynamic parasitic parameters at high frequencies to improve modeling accuracy. Figure 5 The schematic diagram of the chip equivalent circuit shown in FIG. 1 includes an emitter E, a gate G, and a collector C. The parasitic parameters in the chip equivalent circuit are shown in Table 2:

[0074] Table 2

[0075] Parasitic parameters meaning <![CDATA[C ge ]]> Gate-emitter capacitance <![CDATA[C gc ]]> Gate-collector Miller capacitance <![CDATA[C ce ]]> Collector-emitter capacitance <![CDATA[C ed ]]> Emitter-drain capacitance <![CDATA[C cd ]]> Collector-drain capacitance <![CDATA[R g ]]> Gate resistance <![CDATA[R d ]]> Drain side resistance <![CDATA[L g ]]> Gate inductance <![CDATA[L c ]]> Collector inductance <![CDATA[L e ]]> Emitter inductance

[0076] For some parasitic parameters in the chip equivalent circuit, the diode characteristics can be used to simplify them equivalently, and the diode can be used to replace the traditional capacitor model to obtain a simplified chip equivalent model.

[0077] Specifically, some parasitic parameters include emitter-drain capacitance C ed , introduce voltage dependence, combine reverse bias voltage (Vdg) and doping concentration (Nq, Np) to dynamically correct it, C ed It can be expressed as:

[0078]

[0079] Where εs is the dielectric constant of the semiconductor, Sed is the emitter-drain overlap area, d(Vdg) is the depletion layer thickness, q is the electron charge, Np and Nn are the acceptor doping concentration (p-type region) and donor doping concentration (n-type region), ΔN(T) is the temperature compensation term, which represents the change in carrier concentration at high temperature, and Vdg is the reverse bias voltage between the drain and gate. is the doping gradient correction factor, which describes the influence of the spatial distribution of doping concentration.

[0080] Considering that the depletion layer capacitance characteristics of the IGBT chip are similar to those of the diode PN junction capacitance, the depletion layer width that affects the emitter-drain capacitance can be equivalently expressed through the capacitance parameters of the diode PN junction. The width of the diode PN junction depletion layer can be equivalently expressed as:

[0081]

[0082] Where W represents the depletion layer width, εs is the dielectric constant of the semiconductor, Vdet is the reverse bias voltage of the diode PN junction, and Vbi is the built-in potential of the diode PN junction.

[0083] According to the depletion layer width expressed in the above equivalent representation, the depletion layer of the diode PN junction can be equivalently expressed as the junction capacitance C j , specifically expressed as:

[0084]

[0085] Where S represents the cross-sectional area of the PN junction.

[0086] Comparing expressions (1) and (3), their forms are the same, indicating that the two expressions are equivalent. In this case, the diode can replace the traditional capacitor in the chip equivalent circuit, that is, the diode junction capacitance D ed To replace the IGBT depletion layer capacitor C ed In addition to the role of replacing the capacitor, the reverse breakdown characteristic of the diode can also reflect the reverse breakdown voltage between the base and the emitter, and the forward conduction characteristic can also reflect the forward breakdown voltage between the drain and the source of the MOSFET. Similarly, in addition to the emitter-drain capacitance, C ce and C cd It can also be replaced by D ce and D cd By simplifying some parasitic parameters, some parasitic parameters can be replaced by diodes, thereby obtaining a simplified chip equivalent model. Under the test conditions of the embodiment of the present application, the gate, collector, and emitter lead inductance impedances are very small and are ignored, resulting in a final simplified chip equivalent model, the structural diagram of which is shown in FIG. Figure 6 As shown, Rg is the gate internal resistance, Rc and Re are the contact resistances.

[0087] In one embodiment, after obtaining the chip equivalent model, it is necessary to calibrate its parameters to provide a theoretical basis for the electrothermal characteristics of the chip. When calibrating the parameters, it is necessary to extract the gate capacitance parameter C in the equivalent circuit by fitting the experimental data in stages. ge and Miller capacitance C gc , quantifying the dynamic characteristics of gate charging.

[0088] Specifically, based on the three-stage gate charging characteristics, the gate in the chip equivalent model is charged to obtain the curves of gate current and gate voltage at different charging stages. The charging stage is divided into the linear region, the Miller plateau phase, and the saturation region. Based on the changing curves, the gate capacitance is fitted in stages to determine the gate capacitance in the chip equivalent model.

[0089] First, it is determined by the change curve that when the gate voltage enters the linear region, the gate voltage V ge Rising to the threshold voltage V th In the initial stage, the gate-emitter capacitance C gedominates the charging process, while the gate-collector capacitance C gc The capacitive reactance of (Miller capacitance) is high and its influence can be ignored. g (t)1 vs. C ge Charging, measuring the first driving current corresponding to the gate capacitance and the first gate voltage change rate corresponding to the gate voltage in this stage, and converting the first driving current I g (t)1 and the first gate voltage change rate dV ge1 Substituting / dt1 into it, the gate emitter capacitance C corresponding to the gate capacitance can be calculated ge .

[0090] Then, in the Miller plateau phase, C gc The feedback effect is significant, resulting in V ge Although not directly used in parameter calculation, the dynamic characteristics of this stage verify that C gc and provide transition conditions for the extraction of saturated zone.

[0091] Secondly, when the gate voltage enters the saturation region from the linear region, C gc and C ge Both participate in charging, and the total driving current is the sum of the two charging currents. Measure the second driving current I corresponding to the gate capacitance g (t)2 and the second gate voltage change rate dV corresponding to the gate voltage ge2 / dt2, based on Ig(t)2=(C ge +C gc )·dVge2 / dt2, according to the gate-emitter capacitance C ge , the second driving current I g (t)2 and the second gate voltage change rate dV ge2 / dt2, can determine the gate collector Miller capacitance C corresponding to the gate gc .

[0092] Further, in Figure 6 In the chip equivalent model shown, if only the BJT and MOSFET parts in the IGBT chip are considered, the equivalent circuit of the IGBT can be simplified, and the simplified circuit obtained is as follows Figure 7 As shown in Figure 2, the IGBT chip is equivalently decomposed into a cascade topology of BJTs and MOSFETs. Based on this cascade topology, the parameters of the BJTs and MOSFETs need to be calculated accordingly.

[0093] First, for MOSFET, the corresponding saturation region current model is constructed. The saturation region current model introduces dynamic current gain and composite transconductance coefficient, which can quantify the carrier multiplication efficiency and the synergistic effect of BJT-MOSFET. The saturation region current model is expressed as:

[0094]

[0095] Wherein, Ic(t) is the collector current, β is the dynamic current gain, which characterizes the carrier multiplication efficiency of the BJT in the IGBT chip, kp is the composite transconductance coefficient, which characterizes the equivalent transconductance under the synergistic effect of BJT-MOSFET, Vth is the equivalent threshold voltage, which characterizes the minimum gate drive voltage threshold required for the device to turn on, and α(Vge-Vth) is the nonlinear correction term.

[0096] Then, the parameters contained in the saturation region current model are solved. In this way, the parameter calibration of the chip equivalent model is completed through the gate capacitance and parameters.

[0097] In one embodiment, when calculating the saturation region current model parameters, the specific process is as follows:

[0098] Select two working points in the saturation region (V ge1 (t), I c1 (t) and V ge2 (t), I c2 (t)), the following equation is constructed based on the saturation region current model:

[0099]

[0100] Simplified by Taylor expansion approximation (α→0):

[0101]

[0102] The tail current Itail is measured by pulse testing and the dynamic gain is defined as:

[0103]

[0104] Where Vbr is the device breakdown voltage, and the correction term is used to compensate for the gain attenuation effect at high voltage.

[0105] Iterative process:

[0106] Initial value setting: Let α = 0, and calculate V by formula (6) th and k p .

[0107] Nonlinear correction: Substitute into formula (5) and inversely calculate

[0108] Iteration convergence: Repeat the above two steps until ΔV th <5%V th And Δk p <1% k p .

[0109] Because IGBT modules in industrial applications generally use a modular packaging structure with multiple chips connected in parallel, to accurately simulate the dynamic characteristics under actual operating conditions, it is necessary to further establish a module-level equivalent model based on the chip-level chip equivalent model and the signal transmission path within the IGBT module. Each IGBT module consists of two IGBT chips.

[0110] Under normal circumstances, there are two main signal transmission paths inside the IGBT module, namely forward conduction, i.e. IGBT chip-bonding wire-diode, and reverse propagation, i.e. diode-bonding wire-IGBT chip. In other words, the signal mainly passes through the IGBT chip, bonding wire and diode. Based on this signal transmission path, the corresponding IGBT module equivalent model can be established.

[0111] In the embodiment of the present application, the FF100R12KS4 module is used for simulation and experiment, and the corresponding simplified circuit diagram is as follows: Figure 8 As shown, in Figure 8 In the figure, interfaces 1-7 represent interfaces that can be connected to external circuits; BW represents bonding wires, and the number in front of it represents the number of bonding wires, for example, 1BW represents one bonding wire, 4BW represents four bonding wires, etc. At the same time, the bonding wires are numbered to facilitate subsequent aging processing.

[0112] In one embodiment, since the length and number of the bonding wires BW are both known, one of them can be modeled and the others can be simulated accordingly. Figure 9 As shown, the bonding wires in the module equivalent model are equivalently represented as resistance R* and inductance L*. For parallel bonding wires, they can be regarded as resistors (inductors) in parallel for simplification. In this way, the simplified module equivalent model is obtained by structurally simplifying the bonding wires in parallel structure. Since the length and number of the bonding wires BW are known, one of them can be modeled. The resistance value of a 1mm bonding wire is 0.2mΩ and the inductance value is 1nH. It should be noted that the above resistance and inductance values are model parameters provided under experimental conditions. This application does not limit the specific values and can be set according to actual experimental requirements. After clarifying the resistance and inductance values, the model parameters corresponding to the module equivalent model can be obtained. The model parameters are specifically shown in Table 3:

[0113] Table 3

[0114]

[0115] S102: Importing the module equivalent model into a preset spread spectrum time domain reflection signal platform, and generating a spread spectrum time domain reflection signal based on the spread spectrum time domain reflection signal platform.

[0116] The module equivalent model obtained above is imported into the spread spectrum time domain reflection signal platform pre-established in ADS, and a spread spectrum time domain reflection signal is generated through the spread spectrum time domain reflection signal platform. The spread spectrum time domain reflection signal is a 25MHz PN7 modulated signal.

[0117] S103: performing an aging simulation on the IGBT module by breaking a designated bonding wire in the module equivalent model, and determining target model parameters corresponding to the IGBT module after the aging simulation.

[0118] The main reasons for the aging and failure of the IGBT module are the aging of the solder layer and the aging and falling off of the bonding wires. Therefore, the embodiment of the present application simulates the aging of the IGBT module by breaking and falling off the bonding wires. There are two different types of aging for the aging of the bonding wires, namely the different locations of the bonding wire breakage and the different numbers of bonding wire breakages. By breaking the specified bonding wires in the module equivalent model, the aging simulation of the IGBT module is performed, and the resistance and inductance parameters of the equivalent circuit change. At this time, it is necessary to re-determine the target model parameters corresponding to the IGBT module after the aging simulation.

[0119] S104: Transmitting the spread spectrum time domain reflection signal to the IGBT module after aging simulation, so as to determine the incident signal and the reflection signal obtained by the IGBT module through the spread spectrum time domain reflection signal through the target model parameters.

[0120] After generating the spread-spectrum time-domain reflection signal, the spread-spectrum time-domain reflection signal platform can use the target model parameters to determine the signal amplitude reflected at the IGBT module through cable transmission. C1-E1 and C2-E2 represent the collector and emitter electrodes of the two IGBT chips in the IGBT module, respectively. Measurements at both ends of C1-E1 and C2-E2 can produce different reflected signals.

[0121] S105: performing cross-correlation on the incident signal and the reflected signal to obtain a cross-correlated signal amplitude, and establishing a mapping relationship between the signal amplitude and the aging position, so as to implement aging detection of the IGBT module based on the mapping relationship.

[0122] Breaking different numbers of bond wires and breaking them at different locations can simulate the aging of the IGBT module. Under different experimental conditions, the incident and reflected signals are cross-correlated to obtain the cross-correlated signal amplitudes. Using the signal amplitudes calculated under different experimental conditions, a mapping relationship can be established between the signal amplitude and the aging location. This allows the aging of the IGBT module to be tested using an online testing platform. The incident and reflected signals are collected, and the amplitude obtained after the cross-correlation operation is calculated. This signal amplitude can then be used to determine the corresponding aging location and aging degree from the mapping relationship.

[0123] In one embodiment, a 25MHz PN7 modulated signal is transmitted through a 60m cable. The signal amplitude reflected from the IGBT module is measured at both ends C1-E1 and C2-E2. The resulting reflected signals are shown in Figure 10, where Figure 10(a) shows the reflected signal at C1-E1 and Figure 10(b) shows the reflected signal at C2-E2. Cross-correlation is performed on these signals, with the results shown in Figure 11, where Figure 11(a) shows the cross-correlation curve at C1-E1 and Figure 11(b) shows the cross-correlation curve at C2-E2.

[0124] In order to further analyze the impact of bond wire breakage on the reflected signal, a breakage experiment was conducted based on the circuit structure of the FF100R12KS4 module. Figure 12A schematic diagram of bond wire breakage is shown, showing one bond wire (BW1), two bond wires (BW1 and BW2), three bond wires (BW1, BW2, BW5), and four bond wires (BW1, BW2, BW5, and BW6) of IGBT No. 1 (T1). Also shown are one bond wire (BW15), two bond wires (BW15 and BW16), three bond wires (BW15, BW16, and BW17), and four bond wires (BW15, BW16, BW17, and BW18) of IGBT No. 2 (T2). IGBT No. 3 (T3) has one bond wire (BW3), two bond wires (BW3 and BW4), three bond wires (BW3, BW4, and BW10), and four bond wires (BW3, BW4, BW10, and BW11). IGBT No. 4 (T4) has one bond wire (BW19), two bond wires (BW19 and BW20), three bond wires (BW19, BW20, and BW21), and four bond wires (BW19, BW20, BW21, and BW22). The remaining one bonding wire (BW7), two bonding wires (BW7, BW8), three bonding wires (BW7, BW8, BW13), four bonding wires (BW7, BW8, BW13, BW14), five bonding wires (BW7, BW8, BW13, BW14, BW9), and six bonding wires (BW7, BW8, BW13, BW14, BW9, BW12).

[0125] The simulation experiment was carried out based on the fracture diagram above. The maximum cross-correlation amplitudes obtained by the simulation are shown in Tables 4 and 5. The position of the bond wire fracture can be obtained by looking up the table.

[0126] Table 4

[0127]

[0128] Table 5

[0129]

[0130] Among them, Table 4 shows the maximum amplitudes obtained by breaking different bonding wires (C1-E1 end), and Table 5 shows the maximum amplitudes obtained by breaking different bonding wires (C2-E2 end).

[0131] The above are embodiments of the method proposed in this application. Based on the same idea, some embodiments of this application also provide devices and non-volatile computer storage media corresponding to the above methods.

[0132] Figure 13 This is a structural diagram of an IGBT module detection device based on spread spectrum time domain reflection provided in an embodiment of the present application. Figure 13 Shown, including:

[0133] at least one processor; and,

[0134] at least one processor communicatively connected to a memory; wherein,

[0135] The memory stores instructions that can be executed by at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can perform the IGBT module detection method based on spread spectrum time domain reflectometry as described in any one of the above items.

[0136] An embodiment of the present application provides a non-volatile computer storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured as follows:

[0137] An IGBT module detection method based on spread spectrum time domain reflectometry as described in any of the above items.

[0138] The various embodiments in this application are described in a progressive manner. Similar portions between the various embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences between the other embodiments. In particular, the device and medium embodiments are generally similar to the method embodiments, so their descriptions are relatively simple. For relevant portions, refer to the descriptions of the method embodiments.

[0139] The devices and media provided in the embodiments of the present application correspond one-to-one to the methods. Therefore, the devices and media also have similar beneficial technical effects to their corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the devices and media will not be repeated here.

[0140] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0141] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0142] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0143] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0144] In a typical configuration, a computing device includes one or more processors (CPUs), input / output interfaces, network interfaces, and memory.

[0145] Memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.

[0146] Computer-readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. The information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory computer-readable media (transitory media), such as modulated data signals and carrier waves.

[0147] It should also be noted that the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus that includes a series of elements includes not only those elements but also other elements not explicitly listed, or includes elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprises a ..." does not exclude the presence of other identical elements in the process, method, commodity, or apparatus that includes the element.

[0148] The foregoing is merely an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should all be included within the scope of the claims of the present application.

Claims

1. A method for detecting an IGBT module based on spread spectrum time domain reflectometry, characterized in that: The method comprises: Constructing a module equivalent model corresponding to the IGBT module and determining model parameters corresponding to the module equivalent model; wherein the module equivalent model includes parasitic parameters after equivalent simplification; Importing the module equivalent model into a preset spread spectrum time domain reflection signal platform, and generating a spread spectrum time domain reflection signal based on the spread spectrum time domain reflection signal platform; Performing an aging simulation on the IGBT module by breaking a specified bonding wire in the module equivalent model, and determining target model parameters corresponding to the IGBT module after the aging simulation; Transmitting the spread spectrum time domain reflection signal to the IGBT module after aging simulation, so as to determine the incident signal and the reflected signal obtained by the IGBT module through the spread spectrum time domain reflection signal through the target model parameters; The incident signal and the reflected signal are cross-correlated to obtain a cross-correlated signal amplitude, and a mapping relationship between the signal amplitude and the aging position is established to implement aging detection of the IGBT module based on the mapping relationship.

2. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 1, characterized in that: Before constructing the module equivalent model corresponding to the IGBT module, the method further includes: Construct the chip equivalent circuit of the IGBT chip based on parasitic parameters; For some parasitic parameters in the chip equivalent circuit, performing equivalent simplification on the said part of the parasitic parameters to obtain a simplified chip equivalent model; Parameters of the chip equivalent model are calibrated, and a module equivalent model corresponding to the IGBT module is constructed according to the signal transmission path inside the IGBT module and the chip equivalent model.

3. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 2, characterized in that: The parasitic parameters include emitter-drain capacitance, and equivalent simplification is performed on the parasitic parameters to obtain a simplified chip equivalent model, specifically including: The depletion layer width that affects the emitter-drain capacitance is equivalently expressed by the capacitance parameter of the diode PN junction: According to the equivalently expressed depletion layer width, the depletion layer of the diode PN junction is equivalently expressed as a junction capacitance; When the expression of the junction capacitance is equivalent to the expression corresponding to the emitter-drain capacitance, some parasitic parameters are equivalently simplified to replace them with diodes to obtain a simplified chip equivalent model.

4. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 3, characterized in that: An equivalent representation of the depletion layer width affecting the emitter-drain capacitance is made, specifically including: The depletion layer width affecting the emitter-drain capacitance is equivalently expressed by the following formula: Where W represents the depletion layer width, εs is the dielectric constant of the semiconductor, Vdet is the reverse bias voltage of the diode PN junction; Vbi is the built-in potential of the diode PN junction, Np and Nn are the acceptor doping concentration and donor doping concentration, and ΔN(T) is the temperature compensation term, which represents the change in carrier concentration at high temperature. is the doping gradient correction factor, which describes the influence of the spatial distribution of doping concentration.

5. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 2, characterized in that: Parameter calibration of the chip equivalent model specifically includes: Charging the gate in the chip equivalent model to obtain change curves of gate current and gate voltage at different charging stages; Performing phased parameter fitting on the gate capacitance based on the change curve to determine the gate capacitance in the chip equivalent model; The IGBT chip is equivalently decomposed into a cascade topology of BJT and MOSFET. Based on the cascade topology, a saturation region current model corresponding to the MOSFET is constructed: Parameters included in the saturation region current model are determined, and parameter calibration is performed on the chip equivalent model according to the gate capacitance and the parameters.

6. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 5, characterized in that: Performing phased parameter fitting on the gate capacitance based on the change curve to determine the gate capacitance in the chip equivalent model specifically includes: When it is determined through the change curve that the gate voltage enters a linear region, measuring a first driving current corresponding to the gate capacitance and a first gate voltage change rate corresponding to the gate voltage; determining a gate-emitter capacitance corresponding to the gate capacitance according to the first drive current and the first gate voltage change rate; When the gate voltage enters the saturation region from the linear region, measuring a second driving current corresponding to the gate capacitance and a second gate voltage change rate corresponding to the gate voltage; A gate-collector Miller capacitance corresponding to the gate is determined according to the gate-emitter capacitance, the second drive current, and the second gate voltage change rate.

7. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 5, characterized in that: Constructing a saturation region current model corresponding to the MOSFET, specifically including: The saturation region current model is: Wherein, Ic(t) is the collector current, β is the dynamic current gain, which characterizes the carrier multiplication efficiency of the BJT in the IGBT chip, kp is the composite transconductance coefficient, which characterizes the equivalent transconductance under the synergistic effect of BJT-MOSFET, Vth is the equivalent threshold voltage, which characterizes the minimum gate drive voltage threshold required for the device to turn on, and α(Vge-Vth) is the nonlinear correction term.

8. The IGBT module detection method based on spread spectrum time domain reflectometry according to claim 1, characterized in that: Determining the model parameters corresponding to the module equivalent model specifically includes: The bonding wires in the module equivalent model are equivalently represented as resistors and inductors, and the bonding wires in a parallel structure are structurally simplified to obtain a simplified module equivalent model; According to the simplified module equivalent model, the resistance value and the inductance value corresponding to the bonding wire are determined to obtain model parameters.

9. An IGBT module detection device based on spread spectrum time domain reflectometry, characterized in that: The device comprises: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the IGBT module detection method based on spread spectrum time domain reflection as described in any one of claims 1 to 8.

10. A non-volatile computer storage medium storing computer executable instructions, characterized in that: The computer executable instructions are configured to: An IGBT module detection method based on spread spectrum time domain reflectometry as described in any one of claims 1 to 8.

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