Method, device and equipment for reading data of solid state disk and storage medium
Through stacking layer processing and linear prediction, the read-ahead operation sequence is generated, and the data is stored in the controller memory buffer of the solid-state drive, solving the problems of low prediction accuracy and waste of resources for the solid-state drive under complex loads, and achieving efficient data access.
Patent Information
- Application Number
- CN202510976018.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-16
- Publication Date
- 2025-08-12
- Estimated Expiration
- 2045-07-16
AI Technical Summary
The existing solid-state hard disk data pre-reading technology has low prediction accuracy when dealing with complex loads, high resource consumption and access latency, traditional statistical rules and machine learning models have limitations, and insufficient space for storage and circulation path optimization of pre-reading data.
The stacking layer processing is used to perform embedded time series processing on the historical read operation data set, and the pre-read operation sequence is generated through linear prediction, and the data is stored in the controller memory buffer of the solid-state drive, optimizing the data flow path, and reducing resource consumption and access delay.
It realizes efficient prediction of data access mode under complex loads, reduces resource consumption and access delay, and optimizes the storage and circulation path of pre-read data.
Smart Images

Figure CN120469653A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of storage technology, and in particular to a method, apparatus, device, and storage medium for reading data from a solid-state hard disk. Background Art
[0002] In the evolution of storage technology, data pre-reading for solid-state drives (SSDs) has become a core technology for optimizing storage system performance. This technology predicts future data accesses and pre-loads potential data into the cache. Current mainstream technical solutions fall into two main approaches: deterministic pre-reading mechanisms based on statistical rules and dynamic prediction models based on machine learning.
[0003] The deterministic pre-reading mechanism based on statistical rules is limited to reading with fixed rules (such as sequential pre-reading step length) and can only identify simple continuous access and short-cycle repetitive patterns. It cannot effectively cope with complex mixed loads over a long period of time. In addition, key parameters (such as pre-reading window size and trigger threshold) need to be manually preset and are difficult to dynamically adjust according to the load, resulting in low prediction accuracy.
[0004] In dynamic prediction models based on machine learning, recursive neural networks represented by long short-term memory networks (LSTM) have a serial structure and are difficult to converge to the optimal parameter set when processing long-period time series. In addition, the number of parameters and computational complexity increases significantly with the length of the sequence, resulting in low model training efficiency and poor real-time performance.
[0005] In the existing pre-read strategy, the pre-read data is stored in the host's dynamic random access memory (DRAM) or the DRAM inside the SSD. Figure 1 As shown in the figure, if the pre-read data is stored in the host's DRAM in advance, and the host misses the pre-read data, it will lead to a double waste of Peripheral Component Interconnect Express (PCIe) bus resources and the host's DRAM space. If the pre-read data is stored in the DRAM inside the SSD in advance, the hit data must first be transmitted through the controller's internal data path to the Non-Volatile Memory Express (NVMe) host interface, and then packaged by the NVMe host interface and sent to the host's DRAM. This multi-level data flow path has room for optimization, and missed pre-read data will also lead to a waste of SSD DRAM space.
[0006] The technical problem to be solved is how to break through the limitations of traditional statistical rules and existing machine learning models, use lower computing power to achieve efficient prediction of data access patterns under complex loads, and optimize the storage and flow paths of pre-read data to reduce resource consumption and access latency. Summary of the Invention
[0007] The present disclosure provides a method, apparatus, device, and storage medium for reading data from a solid-state hard disk, to at least solve the above technical problems existing in the prior art.
[0008] According to a first aspect of the present application, a method for reading data from a solid-state drive (SSD) is provided, comprising: obtaining a historical read operation data set of the SSD, the historical read operation data set comprising multiple historical read operation records, the historical read operation records being sorted according to an increasing direction of operation time points, the historical read operation records comprising a logical block address and a data size; dividing the historical read operation data set according to a set time window to obtain multiple samples, and embedding the samples to obtain a corresponding embedded time series, the time window having a length of L, the samples comprising historical read operation records of L time points; stacking the embedded time series through N stacking layers to obtain a stacked reinforced time series; performing linear prediction based on the stacked reinforced time series corresponding to all samples to obtain a pre-read operation sequence, the pre-read operation sequence comprising pre-read operation information for a set number of times, the pre-read operation information comprising: a logical block address and a data size of pre-read data; reading corresponding data from a flash memory of the SSD and storing it in a memory buffer of a controller of the SSD according to the pre-read operation information; receiving a data read command, determining whether the data read command hits data in the memory buffer, and reading the hit data from the memory buffer via a PCIe bus.
[0009] In one possible implementation, after obtaining the historical read operation data set of the solid-state hard disk and before dividing the historical read operation data set according to a set time window, the method further includes: for each historical read operation in the historical read operation data set, determining the differential value of the logical block address of the current historical read operation relative to the previous historical read operation, using the differential value as the first feature of the current historical read operation, and normalizing the first features of all historical read operations in the historical read operation data set; for each historical read operation in the historical read operation data set, rounding up the data size of the current historical read operation to a minimum integer multiple according to the page storage capacity, using the minimum integer multiple as the second feature of the current historical read operation, and normalizing the second features of all historical read operations in the historical read operation data set.
[0010] In one possible implementation, the embedding processing of the sample to obtain the corresponding embedded time series includes: convolution processing of the sample through D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample, and obtaining D features of the historical read operation record.
[0011] In one possible implementation, the embedded time series is stacked through N stacking layers to obtain a stacked enhanced time series, including: each stacking layer processes the output time series of the previous layer in turn, wherein the input of the 1st stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th layer output time series, and the stacked enhanced time series is the output time series of the N-th stacking layer.
[0012] In one possible implementation, the i-th stacked layer processes the output time series of the previous layer, including: performing linear changes and nonlinear activation on the output time series of the previous layer through a first multi-layer perceptron to obtain a first time series; performing random pooling processing on the first time series to obtain a second time series; splicing the second time series and the output time series of the previous layer to obtain a third time series; performing linear changes and nonlinear activation on the third time series through a second multi-layer perceptron, and then performing a residual connection with the output time series of the previous layer to obtain the output time series of the i-th stacked layer.
[0013] In one possible implementation, reading corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the controller of the solid-state drive according to the pre-read operation information includes: detecting the PCIe bus status and the host submission queue status; if the PCIe bus is idle and there are no pending operation commands in the host submission queue, reading corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the controller of the solid-state drive according to the logical block address and data size in the pre-read operation information.
[0014] In one possible implementation manner, determining whether the data read command hits the data in the memory buffer includes: determining the logical block address and data size of the data to be read according to the data read command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, determining that the data read command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, determining that the data read command does not hit the data in the memory buffer.
[0015] In one embodiment, the method further includes: if multiple consecutive data read commands received all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number set by the pre-read operation information in the pre-read operation sequence, then determining that the read cycle is completed.
[0016] In one embodiment, if the data read command does not hit the data in the memory buffer, or the read cycle is completed, the method further includes: clearing the data in the memory buffer and re-predicting the pre-read operation sequence.
[0017] According to a second aspect of the present application, a device for reading data from a solid-state hard disk is provided, comprising: an acquisition module for acquiring a historical read operation data set of the solid-state hard disk, wherein the historical read operation data set comprises a plurality of historical read operation records, wherein the historical read operation records are sorted according to the growth direction of the operation time point, and the historical read operation records comprise a logical block address and a data size; a first processing module for dividing the historical read operation data set according to a set time window to obtain a plurality of samples, and embedding the samples to obtain a corresponding embedded time series, wherein the length of the time window is L, and the samples comprise historical read operation records of L time points; a second processing module for processing the historical read operation data set through N stacked layers. The embedded time series is stacked to obtain a stacked reinforcement time series; a prediction module is used to perform linear prediction based on the stacked reinforcement time series corresponding to all samples to obtain a pre-read operation sequence, wherein the pre-read operation sequence includes a set number of pre-read operation information, and the pre-read operation information includes: a logical block address and data size of the pre-read data; a transmission module is used to read the corresponding data from the flash memory of the solid-state drive and store it in the memory buffer of the controller of the solid-state drive according to the pre-read operation information; a command reading module is used to receive a data read command, determine whether the data read command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus.
[0018] In one possible implementation, the device further includes: a preprocessing module, which is used to determine, for each historical read operation in the historical read operation data set, the differential value of the logical block address of the current historical read operation relative to the previous historical read operation, use the differential value as the first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation data set; and is also used to round up the data size of the current historical read operation to a minimum integer multiple according to the page storage capacity for each historical read operation in the historical read operation data set, use the minimum integer multiple as the second feature of the current historical read operation, and normalize the second features of all historical read operations in the historical read operation data set.
[0019] In one possible implementation, when embedding the sample, the first processing module is further used to perform convolution processing on the sample through D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample to obtain D features of the historical read operation record.
[0020] In one embodiment, the second processing module includes N stacking layers, and the stacking layers are used to process the output time series of the previous layer, wherein the input of the first stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th layer output time series, and the stacked reinforcement time series is the output time series of the N-th stacking layer.
[0021] In one embodiment, the stacked layer includes: a first multi-layer perceptron, used to perform linear change and nonlinear activation on the output time series of the previous stacked layer to obtain a first time series; a pooling unit, used to perform random pooling processing on the first time series to obtain a second time series; a splicing unit, used to splice the second time series and the output time series of the previous layer to obtain a third time series; a second multi-layer perceptron, used to perform linear change and nonlinear activation on the third time series, and then perform residual connection with the output time series of the previous layer to obtain the output time series of the stacked layer.
[0022] In one possible implementation, when corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the controller of the solid-state drive according to the pre-read operation information, the data reading module is further used to detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there is no pending operation command in the host submission queue, the corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the controller of the solid-state drive according to the logical block address and data size in the pre-read operation information.
[0023] In one possible implementation manner, the data reading module is further used to determine the logical block address and data size of the data to be read according to the data reading command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data reading command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data reading command does not hit the data in the memory buffer.
[0024] In one embodiment, the data reading module is further used to determine that the read cycle is completed when multiple consecutive data read commands received all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number set by the pre-read operation information in the pre-read operation sequence.
[0025] In one possible implementation, the data reading module is further used to clear the data in the memory buffer when the data read command misses the data in the memory buffer, or when the read cycle is completed, and trigger the solid state drive data reading device to re-predict the pre-read operation sequence.
[0026] According to a third aspect of the present application, an electronic device is provided, including: at least one processor and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the above-mentioned method for reading data from the solid state drive.
[0027] According to a fourth aspect of the present application, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable the computer to execute the method described in the present application.
[0028] The present application provides a method, apparatus, device and storage medium for reading solid-state hard disk data. By using stacking layers to perform stacking processing on time series, since during the stacking processing, the computational complexity increases linearly with the dimension of the input time series rather than exponentially or polynomially, efficient prediction of data access patterns under complex loads can be achieved using lower computing power. By reading corresponding data from the flash memory of the solid-state hard disk and storing it in the memory buffer of the solid-state hard disk controller, the storage and flow path of the pre-read data is optimized, thereby reducing resource consumption and access delay.
[0029] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The above and other objects, features and advantages of the exemplary embodiments of the present application will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present application are shown in an illustrative and non-limiting manner, in which: In the drawings, the same or corresponding reference numerals denote the same or corresponding parts.
[0031] Figure 1 A schematic diagram of the interaction architecture between the host and the solid-state drive according to an embodiment of the present application is shown; Figure 2 A schematic diagram illustrating an implementation flow of a method for reading data from a solid-state drive according to an embodiment of the present application is shown; Figure 3 A schematic diagram illustrating an implementation flow of a method for reading data from a solid-state drive according to another embodiment of the present application is shown; Figure 4 A schematic diagram of the implementation process of stacking layers for time series processing according to an embodiment of the present application is shown; Figure 5 A schematic diagram of the processing process of the centralized learning model in an embodiment of the present application is shown; Figure 6 A structural diagram of a device for reading data from a solid-state hard disk according to an embodiment of the present application is shown. DETAILED DESCRIPTION
[0032] In order to make the purpose, features, and advantages of this application more obvious and easy to understand, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of this application.
[0033] Figure 2 A schematic flow chart of a method for reading data from a solid-state drive according to an example of the present application is shown. The method includes: Operation S101 : Acquire a historical read operation data set of a solid state drive, wherein the historical read operation data set includes multiple historical read operation records, which are sorted according to the growth direction of the operation time points, and the historical read operation records include logical block addresses and data sizes.
[0034] In this embodiment, operation records related to read operations within a set historical time interval, namely historical read operation records, are filtered out from the log of the solid-state drive to construct a historical read operation data set ( ), and sort the historical read operation records in the increasing direction of time points according to the timestamps corresponding to the historical read operation records. Among them, each historical read operation record corresponds to a historical read operation.
[0035] For example, the historical read operation records after sorting in the historical read operation data set can be shown in Table 1. The historical read operation data set includes 4 time point data (i.e., 4 historical read operation records), each time point data includes at least a timestamp, a logical block address, and a data size. The timestamps of the 4 time point data (i.e., the operation time points) are respectively 、 、 、 For the convenience of description, this example uses timestamps to identify historical read operation records. In Table 1, the data at the four time points have been sorted in the direction of increasing timestamps.
[0036] Table 1
[0037] Operation S102 divides the historical read operation data set according to a set time window to obtain multiple samples, and embeds the samples to obtain corresponding embedded time series. The length of the time window is L, and the samples include historical read operation records of L time points.
[0038] In this embodiment, the historical read operation data set ( ) is divided into two parts, with a step size of K. K is smaller than L, and multiple samples can be obtained. Each sample contains L consecutive historical read operation records. K represents the sliding interval of each sliding time window. For example, when K=1, the starting position of the sequence of the current time window is , then the starting position of the sequence of the next time window is , in order to achieve continuous partitioning of historical read operation records. Assuming L = 2, K = 1, partitioning the historical read operation data set shown in Table 1, we can obtain: Sample 0 , that is, [[10000, 8192], [10016, 24576]] Sample 1 , that is, [[10016, 24576], [10048, 12288]] Sample 2 , that is, [[10048, 12288], [10064, 16384]] right The time window is divided into two parts with the length of L and the step size of K. When the time window slides, When the number of remaining undivided historical read operation records in is less than L, the remaining undivided historical read operation records will be discarded, or the sequence will be padded to a fixed length of L by zero padding to keep the input dimension consistent, retain valid features, and ensure the stability of model training and prediction accuracy.
[0039] By embedding samples and increasing their dimensionality, we can obtain embedded time series containing rich temporal features (one sample after embedding becomes a corresponding embedded time series). The embedding process will be illustrated with subsequent examples and will not be detailed here.
[0040] In operation S103 , stacking is performed on the embedded time series through N stacking layers to obtain a stacked enhanced time series.
[0041] In this embodiment, an embedded time series is stacked through N stacking layers to obtain a stacked enhanced time series corresponding to the embedded time series. The stacking process of multiple embedded time series is performed in parallel.
[0042] Use stacking layers to stack time series. During the stacking process, the computational complexity increases linearly with the input time series dimension, rather than exponentially or polynomially. This allows for efficient prediction of data access patterns under complex loads using lower computing power.
[0043] Operation S104 : performing linear prediction based on the stacked reinforcement time series corresponding to all samples to obtain a pre-read operation sequence, wherein the pre-read operation sequence includes pre-read operation information of a set number of times, and the pre-read operation information includes: a logical block address and data size of the pre-read data.
[0044] In this embodiment, the formula for linear prediction of the stacking reinforcement time series is:
[0045] in, represents the stacked reinforcement time series of all samples, Represents the predicted read-ahead operation sequence, Represents a linear transformation, and the stacked reinforcement time series obtained after stacking N layers of stacking layers can be linearly transformed by a multi-layer perceptron to obtain , i.e., a pre-read operation sequence. The pre-read operation sequence includes a set number of pre-read operation information (one pre-read operation information corresponds to one pre-read operation).
[0046] The dimension is ,in, Represents the prediction dimension. In this embodiment =2, which represents the logical block address and data size of a pre-read operation. is the predicted time step length (ie, the number of pre-read operation information included in the pre-read operation sequence, ie, the above-mentioned set number). This is a set value, which can be determined by various factors, such as the model application scenario requirements, the number of stacking layers, and training adjustment parameters. For example, if the application scenario requires low latency, a smaller value should be selected appropriately. Increasing the number of stacking layers can improve the model's feature extraction ability for long-term sequences and theoretically support larger time step lengths.
[0047] By performing linear prediction on the stacked reinforcement time series of all samples, a pre-reading operation sequence containing multiple pre-reading operation information can be obtained.
[0048] Operation S105 : Read corresponding data from the flash memory of the solid state drive according to the pre-read operation information and store it in a memory buffer of the controller of the solid state drive.
[0049] In this embodiment, if Figure 1 As shown in the figure, the memory cache area (Controller Memory Buffer, CMB) of the solid-state drive (SSD) controller serves as a shared buffer between the SSD and the host. The data storage location is closer to the host access path. The data in the NAND is transferred to the CMB through the NAND interface and the internal data path of the controller. When the subsequent host read command hits the data in the CMB, the host can read the data directly from the CMB through the PCIe bus.
[0050] In the prior art, data is pre-stored in the host's DRAM. If the host's data read command misses the data in the host's DRAM, the host's DRAM space resources are wasted. Storing data in the host's DRAM requires occupying the PCIe bus, and if the data misses, PCIe bus resources are further wasted. This embodiment pre-stores data in the CMB, eliminating the need to occupy the host's DRAM space resources or PCIe bus resources. This optimizes the utilization of both host memory resources and PCIe bus resources, reducing inefficient consumption.
[0051] With the prior art, data is pre-stored in the DRAM of the SSD. When the host's data read command hits the data in the DRAM of the SSD, it needs to be transmitted to the NVMe host interface through the controller's internal data path and then packaged into the host's DRAM, and then the data is read from the host's DRAM. It can be seen that the data after the hit is moved multiple times, and the data read path is long, the read efficiency is low and the latency is high, resulting in a slow response speed to the data read command. Moreover, if the data read command does not hit, the DRAM space resources of the SSD will be wasted. In this embodiment, the data is pre-stored in the CMB, and the host can directly read the data from the CMB through the PCIe bus. There is no need to move the data to the host's DRAM through the controller's internal data path, which optimizes the data movement inside the SSD and shortens the data transmission path, thereby reducing the transmission overhead, reducing the host access latency, and improving the response speed, while also saving the SSD DRAM space resources.
[0052] Operation S106 : receiving a data read command, determining whether the data read command hits data in the memory buffer, and reading the hit data from the memory buffer via a PCIe bus.
[0053] In this embodiment, the SSD controller first parses the logical block address and data size in the data read command through the NVMe host interface, queries the address mapping table of the CMB, and confirms whether the data block requested by the command has been pre-stored in the CMB. If so, the data is read directly from the CMB through the PCIe bus. This process does not require the data to be moved through the internal data path of the controller.
[0054] This embodiment performs stacking processing on time series by using stacking layers. Since the computational complexity increases linearly with the dimension of the input time series during the stacking processing, rather than exponentially or polynomially, efficient prediction of data access patterns under complex loads can be achieved using lower computing power. By reading the corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the solid-state drive controller, the storage and flow path of the pre-read data is optimized, thereby reducing resource consumption and access delay.
[0055] In an optional embodiment, if Figure 3 As shown, after obtaining the historical read operation data set of the solid state drive in the above operation S101 and before dividing the historical read operation data set according to the set time window in the above operation S102, the following steps are included: Operation S201: for each historical read operation in the historical read operation data set, determine a differential value between the logical block address of the current historical read operation and the logical block address of the previous historical read operation, use the differential value as a first feature of the current historical read operation, and perform normalization processing on the first features of all historical read operations in the historical read operation data set; Operation S202, for each historical read operation in the historical read operation data set, round up the data size of the current historical read operation to the minimum integer multiple according to the page storage capacity, use the minimum integer multiple as the second feature of the current historical read operation, and normalize the second features of all historical read operations in the historical read operation data set.
[0056] It should be noted that there is no order for operations S201 and S202 and they can be performed simultaneously, or one of them can be performed first.
[0057] To highlight the temporal variation patterns of data access and reduce the complexity of model training, it is necessary to preprocess the historical read operation records in the historical read operation dataset. Preprocessing includes logical block address preprocessing and data size preprocessing.
[0058] Preprocessing the logical block address can include: for the currently traversed historical read operation record, subtracting the logical block address of the previous historical read operation record from its logical block address to obtain a difference value. This difference value replaces the logical block address in the current historical read operation record, and this difference value serves as the first feature in the historical read operation record. Specifically, the difference value (first feature) of the logical block address of the first historical read operation record in the historical read operation dataset is set to 0, and then normalized. Taking Table 1 as an example, after performing the difference calculation, the first feature sequence obtained is [0, 16, 32, 16]. Normalizing the first feature yields the first feature sequence [-1.414, 0, 1.414, 0].
[0059] Data size preprocessing can include rounding the data size in each historical read operation record up to the smallest integer multiple of the page storage capacity. This smallest integer multiple replaces the data size in the historical read operation record as the second feature, and then performing normalization. Taking Table 1 as an example, if the page storage capacity is 16KB, the resulting second feature sequence is [1, 2, 1, 1]. After normalization, the resulting second feature sequence is [-0.577, 1.732, -0.577, -0.577].
[0060] After the above preprocessing, the historical read operation data set is shown in Table 2: Table 2
[0061] Accordingly, samples 0 to 1 are updated as follows: Sample 0 , that is, [[-1.414, -0.577], [0, 1.732]] Sample 1 , that is, [[0, 1.732], [1.414, -0.577]] Sample 2 , that is, [[1.414, -0.577], [0, -0.577]] Since the historical read operation data has been pre-processed, the pre-read operation sequence in the above operation S104 needs to be de-pre-processed to obtain the logical block address and data size of the pre-read data.
[0062] In an optional embodiment, in the above operation S102, the sample is embedded to obtain a corresponding embedded time series, including: convolution processing of the sample through D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample, and obtaining D features of the historical read operation record.
[0063] The convolution kernel can be used to embed each sample, mapping the data at each time point in the sample (each historical read operation record) from low dimension to high dimension, and obtaining the embedded time series corresponding to each sample.
[0064] For example, if the data at each time point is mapped from 2D features to 4D features (D=4), four 1×1 one-dimensional convolution kernels (Conv1D) can be used for one-dimensional convolution. Assume that after embedding, each sample is as follows: Sample 0 : [ [-0.1568, -0.3528, -0.5488, -0.7448], [0.4464, 0.6464, 0.8464, 1.0464]] (embedded time series for sample 0); Sample 1 : [ [0.4464, 0.6464, 0.8464, 1.0464], [0.126, 0.326, 0.526, 0.726]] (embedded time series for sample 1); Sample 2 : [ [0.126, 0.326, 0.526, 0.726], [-0.0154, 0.0846, 0.1846, 0.2846]] (embedded time series for sample 2).
[0065] In an optional embodiment, in the above operation S103, the embedded time series is stacked through N stacking layers to obtain a stacked enhanced time series, including: each stacking layer processes the output time series of the previous layer in turn, wherein the input of the 1st stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th output time series, and the stacked enhanced time series is the output time series of the N-th stacking layer.
[0066] The embedded time series of all samples are input into the stacking layer for stacking processing. The embedded time series of these samples constitute a three-dimensional tensor The three-dimensional tensor contains B samples, each of which is an embedded time series. Each embedded time series contains L time point data, and each time point data contains D features (i.e., D channels). Although the input to the stacking layer is a three-dimensional tensor (shape B × L × D), the stacking layer actually processes each embedded time series (i.e., each sample) in the three-dimensional tensor in parallel. The processing of each embedded time series is the same, and the stacking process results in each embedded time series, i.e., a stacked enhanced time series for each sample.
[0067] Each stacking layer processes the output time series of the previous layer in an ordered hierarchical structure. In particular, the first stacking layer is the starting point of the entire processing flow, and its input data is the above three-dimensional tensor Starting from the second stacking layer, the input data of each subsequent stacking layer is a three-dimensional tensor consisting of the output time series of the previous stacking layer. For example, the input of the second stacking layer is a three-dimensional tensor consisting of the output time series of the first stacking layer. Each stacking layer processes each time series in the input three-dimensional tensor separately and in parallel. After the stacking processing of N stacking layers, the features of different granularities extracted from the first to the Nth stacking layers can be integrated, such as continuous access trends, periodic laws of data block size, etc., and the extracted features are strengthened layer by layer. Each layer of processing performs feature abstraction and information screening on the basis of the previous layer, so that the final output stacked strengthened time series (i.e., the output time series of the Nth stacking layer) can more accurately reflect the core time series characteristics of the original data and suppress the interference of irrelevant noise.
[0068] The following combination Figure 4 and Figure 5 The process of the i-th stacking layer processing the output time series of the previous layer is schematically explained, including: In operation S1031 , a first multilayer perceptron is used to perform linear transformation and nonlinear activation on the output time series of the previous layer to obtain a first time series.
[0069] By processing the output time series of the previous layer through the first multi-layer perceptron of this layer, the dependencies between channels can be captured and the features of the global vision can be obtained. This is achieved through the following formula:
[0070] Where i represents the stacking layer index, N is the number of stacking layers, Represents a three-dimensional tensor consisting of the time series of each sample output after processing by the first multilayer perceptron of the i-th stacked layer, Represents the input of the i-th stacked layer, that is, the output time series of the i-1th layer (3D tensor). For example, when i is equal to 1, the output time series of the previous layer is the above embedded time series 3D tensor ; When i is not 1, the input of the i-th stacked layer is a three-dimensional tensor consisting of the output time series of the i-1-th stacked layer .
[0071] Each stacked layer contains 2 multi-layer perceptrons, here is the first multi-layer perceptron. In the three-dimensional tensor, each time point data contained in each time series contains D-dimensional features (D channels), The time series of each sample is processed separately and in parallel. The processing process of any time series is as follows: the D-dimensional features of the data at each time point are processed independently. The linear change and nonlinear activation of can make the features of different channels of the data at this time point merge with each other. The final output is The D-dimensional features of the data at that time point are new features (still D-dimensional) that encode the dependencies between channels, allowing the model to capture "how the feature changes of a certain channel affect other channels" and thus obtain features of the global perspective.
[0072] The first multilayer perceptron in each stacked layer is processed The shape of is also B×L×D. Recorded as the first time series.
[0073] Assume i=1, the input 3D tensor includes the following 3 samples of embedded time series: Sample 0: [t0, t1]——[[0.5, 0.3, 0.8, 0.1], [0.2, 0.9, 0.4, 0.6]]; Sample 1: [t1, t2]——[[0.9, 0.4, 0.6, 0.2], [0.3, 0.7, 0.5, 0.8]]; Sample 2: [t2, t3] —— [[0.7, 0.5, 0.3, 0.9], [0.1, 0.6, 0.8, 0.4]]; After being processed by the first multi-layer perceptron of the first stacking layer, the obtained is: = [[0.6, 0.2, 0.9, 0.1], [0.3, 0.8, 0.5, 0.7]], [[0.8, 0.5, 0.7, 0.3], [0.4, 0.6, 0.6, 0.9]], [[0.7, 0.6, 0.4, 0.8], [0.2, 0.5, 0.7, 0.5]] Operation S1032 performs random pooling on the first time series to obtain a second time series.
[0074] For the first time series after being processed by the first multi-layer perceptron perform a random pooling operation to strengthen the main features of the global view, which is achieved through the following formula:
[0075] where represents the random pooling operation, including two aspects: one is weighted sampling according to feature importance: for the data at each time point, calculate the probability distribution of the D-dimensional features (based on the feature value size, the larger the value, the higher the probability of being selected), and randomly select k-dimensional features according to the probability to strengthen the main features (channels with large and key information); on the other hand, compress the dimension to reduce complexity: compress the original D-dimensional features into k dimensions (k < D), reduce the number of parameters and the amount of calculation of the subsequent network, and at the same time retain the core channel dependency relationship. Obtain the second time series , with a shape of B × L × k. For example, randomly sample the D = 4-dimensional features of the data at each time point to k = 2 dimensions (the larger the feature value, the higher the probability of being sampled).
[0076] For example, process the first time series in the above example as: = [[0.6, 0.9], [0.8, 0.7]], [[0.8, 0.7], [0.6, 0.9]], [[0.7, 0.8], [0.7, 0.5]] Operation S1033: Concatenate the second time series and the output time series of the previous layer to obtain a third time series.
[0077] The second time series after random pooling is concatenated with the output time series of the previous layer, that is, the output time series of the previous layer that has not been stacked by the current stacking layer. This is achieved through the following formula:
[0078] in, Represents splicing processing: the second time series After the feature dimension of the data at each time point is restored from k dimension to D dimension, it is compared with the output time series of the i-1th stacking layer Splice and get the third time series , the shape is B × L × 2D. At the same time, both local detail features and global dependency features are preserved.
[0079] In operation S1034, after performing linear transformation and nonlinear activation on the third time series through a second multi-layer perceptron, a residual connection is performed with the output time series of the previous layer to obtain the output time series of the i-th stacked layer.
[0080] Through the second multi-layer perceptron of the current stack layer ( ) for the third time series After processing, the output time series of the previous stacked layer Perform residual connection to obtain the output time series of the current stacked layer . This is achieved through the following formula:
[0081] Among them, the above Although the processing can encode channel dependence, it may over-emphasize the main features and ignore the secondary but potentially valuable features. Although the operation can weight the main features of the sampling, the probability sampling method will lose some original features, especially the features with small eigenvalues but important features. The linear transformation and nonlinear activation of the third time series Processing (including compressing the 2D dimension to D dimension) is performed to compensate for the above-mentioned ignored features. Then, Residual connections can fuse the compensated features with the original features retained in the previous stacked layer, restoring the blurred / lost secondary but critical information. With the help of the residual gradient transfer mechanism, the model can learn stably when multiple layers are stacked, avoiding falling into local optimality due to over-focusing on the main features.
[0082] The output time series of the i-th stacked layer It will be used as the input of the i+1th stacking layer. The output time series of the last stacking layer will be used as the input of the subsequent linear prediction layer.
[0083] In an optional embodiment, in the above operation S106, determining whether the data read command hits the data in the memory buffer includes: determining the logical block address and data size of the data to be read according to the data read command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, determining that the data read command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, determining that the data read command does not hit the data in the memory buffer.
[0084] Parse the data read command to determine the logical block address and data size to be read. The CMB stores the logical block addresses and data sizes corresponding to multiple pre-read operations. If the logical block address and data size to be read match the logical block address and data size of any pre-read operation information stored in the CMB, the data read command hits the data in the CMB.
[0085] In an optional embodiment, the method further includes: if multiple consecutive data read commands received all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number set by the pre-read operation information in the pre-read operation sequence, then determining that the read cycle is completed.
[0086] Read the data in the CMB based on the set read cycle, which can be set to the number of pre-read operation information set in the pre-read operation sequence If the number of consecutive hits on the data in the CMB reaches If the number of read cycles exceeds the preset integer multiple, it means that the read cycle is completed.
[0087] For example, =3, the pre-read operation information stored in CMB can be shown in Table 3. The pre-read operation information includes 3 pairs of logical block addresses and data sizes, which can be hit repeatedly. Assuming that a read cycle is 3 = 9 (i.e., 3 times the predicted time step length), the read cycle is considered complete after the host's data read command hits the logical block address and data size nine times in a row. If the host's data read command hits the logical block address and data size fewer than nine times in a row, the read cycle is incomplete. For example, if the host's data read command hits four times in a row and the fifth data read command misses, the read cycle is incomplete.
[0088] Table 3
[0089] In an optional embodiment, if the data read command does not hit the data in the memory buffer, or the read cycle is completed, the method further includes: clearing the data in the memory buffer and re-predicting the pre-read operation sequence.
[0090] If the host's data read command misses the data in the CMB, or when the above-mentioned read cycle is completed, the CMB data is cleared, the CMB space is released, the historical read operation data set is re-acquired based on the current time point, and the above-mentioned operations S101-S106 are performed to re-predict the read operation sequence.
[0091] It should be noted that the above operations S102 to S104 can be implemented using a centralized learning model. Therefore, when the data in the CMB is missed, it is necessary to add the missed scenario to the training data set, that is, the historical read operation data set ( ) is added to the training data set of the centralized learning model as a negative sample, which is the historical read operation data set ( ) is assigned a label identifying it as a negative sample. Using a certain proportion of negative samples to train the centralized learning model for predictive pre-read operation sequences (the negative sample ratio is controlled within a preset range, for example, a 10:1 positive-to-negative sample ratio) can prevent data skew from causing insufficient model generalization. It also allows the model to learn characteristic patterns of pre-read failures to enhance robustness. It also optimizes pre-read strategy iterations by recording miss scenarios, allowing the model to adapt to changes in host access patterns through continuous fine-tuning, reducing ineffective pre-reads and resource waste.
[0092] In an optional embodiment, the reading of corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the controller of the solid-state drive according to the pre-read operation information includes: detecting the PCIe bus status and the host submission queue status, and if the PCIe bus is idle and there is no pending operation command in the host submission queue, then reading the corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the controller of the solid-state drive according to the logical block address and data size in the pre-read operation information.
[0093] The host submission queue stores read, write, and erase block commands sent by the host to the SSD controller. The SSD controller sequentially extracts these commands for execution. If there are unprocessed commands in the host submission queue, it indicates that the host has pending requests. Pre-reading operations may occupy PCIe bus resources or cause command conflicts. Pre-read data is stored in the CMB only when the host submission queue is idle and the PCIe bus is unloaded. This prevents pre-reading operations from competing with core host operations, ensuring priority processing for host commands and overall system efficiency.
[0094] like Figure 6 FIG. 6 is a schematic diagram of a device for reading data from a solid-state hard disk provided in an embodiment of the present application. A device for reading data from a solid-state hard disk, the device 600 comprising: An acquisition module 601 is configured to acquire a historical read operation data set of a solid-state drive, wherein the historical read operation data set includes a plurality of historical read operation records, the historical read operation records are sorted according to the increasing direction of the operation time points, and the historical read operation records include a logical block address and a data size; A first processing module 602 is configured to divide the historical read operation data set according to a set time window to obtain multiple samples, and embed the samples to obtain corresponding embedded time series, where the length of the time window is L, and the samples include historical read operation records at L time points; A second processing module 603 is configured to stack the embedded time series through N stacking layers to obtain a stacked enhanced time series; A prediction module 604 is configured to perform linear prediction based on the stacked reinforcement time series corresponding to all samples to obtain a pre-read operation sequence, wherein the pre-read operation sequence includes pre-read operation information of a set number of times, and the pre-read operation information includes: a logical block address and data size of the pre-read data; The data reading module 605 is used to read the corresponding data from the flash memory of the solid-state drive and store it in the memory buffer of the controller of the solid-state drive according to the pre-read operation information; it is also used to receive a data read command, determine whether the data read command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus.
[0095] In an optional embodiment, the device 600 further includes: a preprocessing module, which is used to determine, for each historical read operation in the historical read operation data set, the differential value of the logical block address of the current historical read operation relative to the previous historical read operation, use the differential value as the first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation data set; and is also used to round up the data size of the current historical read operation to a minimum integer multiple according to the page storage capacity for each historical read operation in the historical read operation data set, use the minimum integer multiple as the second feature of the current historical read operation, and normalize the second features of all historical read operations in the historical read operation data set.
[0096] In an optional embodiment, when embedding the sample, the first processing module 602 is further used to perform convolution processing on the sample through D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample to obtain D features of the historical read operation record.
[0097] In an optional embodiment, the second processing module 603 includes N stacking layers, and the stacking layers are used to process the output time series of the previous layer, wherein the input of the 1st stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th layer output time series, and the stacked reinforcement time series is the output time series of the N-th stacking layer.
[0098] In an optional embodiment, the stacked layer includes: a first multi-layer perceptron, used to perform linear change and nonlinear activation on the output time series of the previous stacked layer to obtain a first time series; a pooling unit, used to perform random pooling processing on the first time series to obtain a second time series; a splicing unit, used to splice the second time series and the output time series of the previous layer to obtain a third time series; a second multi-layer perceptron, used to perform linear change and nonlinear activation on the third time series, and then perform residual connection with the output time series of the previous layer to obtain the output time series of the stacked layer.
[0099] In an optional embodiment, when corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the controller of the solid-state drive according to the pre-read operation information, the data reading module 605 is also used to detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there is no pending operation command in the host submission queue, the corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the controller of the solid-state drive according to the logical block address and data size in the pre-read operation information.
[0100] In an optional embodiment, the data reading module 605 is further used to determine the logical block address and data size of the data to be read according to the data reading command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data reading command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data reading command does not hit the data in the memory buffer.
[0101] In an optional embodiment, the data reading module 605 is also used to determine that the reading cycle is completed when multiple consecutive data reading commands received hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number set in the pre-read operation information in the pre-read operation sequence.
[0102] In an optional embodiment, the data reading module 605 is also used to clear the data in the memory buffer when the data read command does not hit the data in the memory buffer, or when the read cycle is completed, and trigger the solid state drive data reading device to re-predict the pre-read operation sequence.
[0103] The above-mentioned device can execute the method for reading data from a solid-state drive provided in one embodiment of the present application, and has the corresponding functional modules and beneficial effects of executing the method for reading data from a solid-state drive. For technical details not fully described in this embodiment, please refer to the method for reading data from a solid-state drive provided in the embodiment of the present application.
[0104] The present application also provides an electronic device, comprising: a processor; a memory for storing instructions executable by the processor; the processor is configured to read the executable instructions from the memory and execute the instructions to implement the method for reading solid-state hard disk data described in the present application.
[0105] An embodiment of the present application may also be a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, causes the processor to execute the steps of the method according to various embodiments of the present application described in the above “Exemplary Method” section of this specification.
[0106] The computer-readable storage medium can adopt any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium can, for example, include but is not limited to a system, device or component of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.
[0107] The basic principles of the present application have been described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, and effects mentioned in this application are merely illustrative and not restrictive, and it should not be assumed that these advantages, strengths, and effects are required of each embodiment of this application. In addition, the specific details disclosed above are merely illustrative and facilitating understanding, and are not restrictive. The above details do not limit this application to necessarily being implemented using the above specific details.
[0108] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this application can be achieved. This is not a limitation herein.
[0109] It should also be noted that in the apparatus, device, and method of the present application, each component or each step can be decomposed and / or recombined, and such decomposition and / or recombination should be regarded as equivalent solutions of the present application.
[0110] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present application. Therefore, the present application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.
[0111] The above description has been provided for the purpose of illustration and description. Furthermore, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although a number of example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.
[0112] In the description of this specification, the reference terms "one embodiment," "some embodiments," "example," "specific example," or "some examples" mean that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. Moreover, the specific features, structures, materials, or characteristics described may be combined in any appropriate manner in any one or more embodiments or examples. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification, as well as features of different embodiments or examples, unless they are mutually inconsistent.
[0113] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.
[0114] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
Claims
1. A method for reading data from a solid state hard disk, characterized in that: The method comprises: Acquire a historical read operation data set of the solid-state drive, the historical read operation data set including a plurality of historical read operation records, the historical read operation records being sorted according to a growth direction of operation time points, and the historical read operation records including a logical block address and a data size; Divide the historical read operation data set according to a set time window to obtain multiple samples, and embed the samples to obtain corresponding embedded time series, where the length of the time window is L, and the samples include historical read operation records at L time points; stacking the embedded time series through N stacking layers to obtain a stacked enhanced time series; Performing linear prediction based on the stacked reinforcement time series corresponding to all samples to obtain a pre-read operation sequence, wherein the pre-read operation sequence includes pre-read operation information of a set number of times, and the pre-read operation information includes: a logical block address and a data size of the pre-read data; Reading corresponding data from the flash memory of the solid-state drive and storing it in a memory buffer of a controller of the solid-state drive according to the pre-read operation information; A data read command is received, it is determined that the data read command hits data in the memory buffer, and the hit data is read from the memory buffer via a peripheral component interconnect high-speed PCIe bus.
2. The method according to claim 1, characterized in that After obtaining the historical read operation data set of the solid state drive and before dividing the historical read operation data set according to the set time window, the method further includes: For each historical read operation in the historical read operation data set, determining a differential value between a logical block address of a current historical read operation and a logical block address of a previous historical read operation, using the differential value as a first feature of the current historical read operation, and performing normalization processing on the first features of all historical read operations in the historical read operation data set; For each historical read operation in the historical read operation data set, the data size of the current historical read operation is rounded up to the minimum integer multiple according to the page storage capacity, and the minimum integer multiple is used as the second feature of the current historical read operation, and the second features of all historical read operations in the historical read operation data set are normalized.
3. The method according to claim 2, characterized in that The embedding process of the sample to obtain a corresponding embedded time series includes: The sample is convolved using D convolution kernels, and the first feature and the second feature of the historical read operation record at each time point in the sample are mapped to obtain D features of the historical read operation record.
4. The method according to claim 3, characterized in that The stacking process of the embedded time series through N stacking layers to obtain a stacked enhanced time series includes: Each stacked layer processes the output time series of the previous layer in turn, wherein the input of the first stacked layer is the embedded time series, the output of the i-th stacked layer is the i-th layer output time series, and the stacked reinforcement time series is the output time series of the N-th stacked layer.
5. The method according to claim 4, characterized in that The i-th stacked layer processes the output time series of the previous layer, including: The first multi-layer perceptron performs linear change and nonlinear activation on the output time series of the previous layer to obtain the first time series; Performing random pooling processing on the first time series to obtain a second time series; Concatenate the second time series with the output time series of the previous layer to obtain a third time series; After the third time series is linearly changed and nonlinearly activated by the second multi-layer perceptron, a residual connection is performed with the output time series of the previous layer to obtain the output time series of the i-th stacked layer.
6. The method according to claim 1, characterized in that The step of reading corresponding data from the flash memory of the solid state drive and storing the data in the memory buffer of the controller of the solid state drive according to the pre-read operation information includes: Detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there is no pending operation command in the host submission queue, read the corresponding data from the flash memory of the solid-state drive according to the logical block address and data size in the pre-read operation information and store it in the memory buffer of the controller of the solid-state drive.
7. The method according to claim 1, characterized in that Determining whether the data read command hits the data in the memory buffer includes: Determine the logical block address and data size of the data to be read according to the data read command; If the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data read command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data read command does not hit the data in the memory buffer.
8. The method according to claim 7, characterized in that The method further includes: If the received multiple consecutive data read commands all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number set by the pre-read operation information in the pre-read operation sequence, it is determined that the read cycle is completed.
9. The method according to claim 8, characterized in that If the data read command does not hit the data in the memory buffer, or the read cycle is completed, the method further includes: The data in the memory buffer is cleared, and the prediction of the pre-read operation sequence is performed again.
10. A device for reading data from a solid state hard disk, characterized in that: The device comprises: an acquisition module, configured to acquire a historical read operation data set of the solid-state drive, wherein the historical read operation data set includes a plurality of historical read operation records, the historical read operation records are sorted according to the growth direction of the operation time points, and the historical read operation records include a logical block address and a data size; A first processing module is configured to divide the historical read operation data set according to a set time window to obtain multiple samples, and embed the samples to obtain corresponding embedded time series, where the length of the time window is L, and the samples include historical read operation records at L time points; A second processing module is configured to stack the embedded time series through N stacking layers to obtain a stacked enhanced time series; A prediction module is configured to perform linear prediction based on the stacked reinforcement time series corresponding to all samples to obtain a pre-read operation sequence, wherein the pre-read operation sequence includes pre-read operation information of a set number of times, and the pre-read operation information includes: a logical block address and data size of the pre-read data; A data reading module is used to read the corresponding data from the flash memory of the solid-state drive and store it in the memory buffer of the controller of the solid-state drive according to the pre-read operation information; it is also used to receive a data read command, determine whether the data read command hits the data in the memory buffer, and read the hit data from the memory buffer through the PCIe bus.
11. The device according to claim 10, characterized in that The device further comprises: A preprocessing module is used to determine, for each historical read operation in the historical read operation data set, a differential value of the logical block address of the current historical read operation relative to the previous historical read operation, use the differential value as the first feature of the current historical read operation, and normalize the first features of all historical read operations in the historical read operation data set; and is also used to round up the data size of the current historical read operation to a minimum integer multiple according to the page storage capacity for each historical read operation in the historical read operation data set, use the minimum integer multiple as the second feature of the current historical read operation, and normalize the second features of all historical read operations in the historical read operation data set.
12. The device according to claim 11, characterized in that When embedding the sample, the first processing module is also used to perform convolution processing on the sample through D convolution kernels, mapping the first feature and the second feature of the historical read operation record at each time point in the sample to obtain D features of the historical read operation record.
13. The device according to claim 12, characterized in that The second processing module includes N stacking layers, and the stacking layers are used to process the output time series of the previous layer, wherein the input of the first stacking layer is the embedded time series, the output of the i-th stacking layer is the i-th layer output time series, and the stacked reinforcement time series is the output time series of the N-th stacking layer.
14. The device according to claim 13, characterized in that The stacked layer comprises: The first multi-layer perceptron is used to perform linear change and nonlinear activation on the output time series of the previous stacked layer to obtain a first time series; a pooling unit, configured to perform random pooling processing on the first time series to obtain a second time series; a concatenation unit, configured to concatenate the second time series with the output time series of the previous layer to obtain a third time series; The second multi-layer perceptron is used to perform linear transformation and nonlinear activation on the third time series, and then perform residual connection with the output time series of the previous layer to obtain the output time series of the stacked layer.
15. The device according to claim 10, characterized in that When reading corresponding data from the flash memory of the solid-state drive and storing it in the memory buffer of the controller of the solid-state drive according to the pre-read operation information, the data reading module is further used to detect the PCIe bus status and the host submission queue status. If the PCIe bus is idle and there is no pending operation command in the host submission queue, the corresponding data is read from the flash memory of the solid-state drive and stored in the memory buffer of the controller of the solid-state drive according to the logical block address and data size in the pre-read operation information.
16. The device according to claim 10, characterized in that The data reading module is further used to determine the logical block address and data size of the data to be read according to the data reading command; if the logical block address and data size of the data to be read match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data reading command hits the data in the memory buffer; if the logical block address and data size of the data to be read do not match the logical block address and data size of any pre-read operation information stored in the memory buffer, it is determined that the data reading command does not hit the data in the memory buffer.
17. The device according to claim 16, characterized in that The data reading module is further configured to determine that the reading cycle is completed when multiple consecutive data reading commands received all hit the data in the memory buffer, and the number of consecutive hits reaches a preset integer multiple of the number set by the pre-read operation information in the pre-read operation sequence.
18. The device according to claim 17, characterized in that The data reading module is also used to clear the data in the memory buffer when the data reading command does not hit the data in the memory buffer, or when the reading cycle is completed, and trigger the solid state drive data reading device to re-predict the pre-read operation sequence.
19. An electronic device, characterized in that: include: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method according to any one of claims 1 to 9.
20. A non-transitory computer-readable storage medium storing computer instructions, characterized in that: The computer instructions are used to enable a computer to execute the method according to any one of claims 1 to 9.
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