Semiconductor device multi-parameter joint distribution modeling method based on standardized flow

By generating an infinite large model library consistent with the original model library based on standardized flow, the problem of complex joint distribution modeling of semiconductor device parameters is solved, accurate prediction of circuit performance and improvement of chip yield is achieved, and reliability evaluation of semiconductor design is supported.

CN120471008AActive Publication Date: 2025-08-12BEIHANG UNIV

Patent Information

Application Number
CN202510552472.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-29
Publication Date
2025-08-12
Estimated Expiration
2045-04-29

AI Technical Summary

Technical Problem

The prior art is difficult to accurately capture the complex joint distribution of device parameters in semiconductor design, resulting in circuit performance prediction errors and chip failures, especially at advanced process nodes, fluctuation and fall effects significantly affect design and reliability evaluation.

Method used

Using a standardized flow-based method, by constructing a standardized flow model, using coupled rational quadratic neural spline flow and reversible transformation sequences, an infinite large model library consistent with the original model library is generated, containing multi-dimensional model parameters, and trained using maximum likelihood estimation and Adam optimizer to ensure the accuracy of parameter distribution.

Benefits of technology

Accurate modeling of complex parameter distributions is achieved, circuit performance prediction errors are reduced, chip performance and yield are improved, reliability evaluation is provided in the early design stage, and the accuracy of the DTCO process is enhanced.

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Abstract

The invention provides a standardized flow-based multi-parameter joint distribution modeling method for a semiconductor device. The method comprises the following steps: S1, extracting various key model parameters from simulation data of the semiconductor device; s2, constructing an original model library containing a plurality of model cards based on the plurality of key model parameters; s3, processing model parameters based on the original model library to construct a training data set; s4, constructing a standardized flow model; and S5, training the standardized flow model based on the constructed training data to generate a complete model library comprising a large-scale model card, and completing multi-parameter joint distribution modeling of the semiconductor device.
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Description

Technical Field

[0001] The present disclosure relates to the fields of semiconductors, collaborative optimization of semiconductor design technology, electronic design automation, machine learning, and probability distribution generation technology, and in particular to a multi-parameter joint distribution modeling method for semiconductor devices based on standardized flow. Background Art

[0002] Design Technology Co-Optimization (DTCO) is a methodology that deeply integrates semiconductor technology development with circuit design to enhance key metrics such as performance, power efficiency, area, and cost. However, as transistor dimensions continue to shrink, atomic-level randomness caused by charge and material discreteness amplifies fluctuations. Ignoring these fluctuations in DTCO can lead to significant distortions in simulations and reliability assessments. This fluctuation, which intensifies with advancing process nodes, presents a fundamental challenge for DTCO. Consequently, there is an urgent need for more accurate statistical assessments of these fluctuations in integrated circuits. Summary of the Invention

[0003] In view of this, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a multi-parameter joint distribution modeling method for semiconductor devices based on normalized flow.

[0004] In order to achieve the above objectives, the technical solutions disclosed in this disclosure are as follows:

[0005] According to an embodiment of one aspect of the present disclosure, a method for multi-parameter joint distribution modeling of semiconductor devices based on standardized flow is provided, including: S1: extracting multiple key model parameters from semiconductor device simulation data; S2: constructing an original model library containing multiple model cards based on the multiple key model parameters; S3: processing the model parameters based on the original model library to construct a training data set; S4: constructing a standardized flow model; and S5: training the standardized flow model based on the constructed training data to generate a complete model library including large-scale model cards, thereby completing the multi-parameter joint distribution modeling of semiconductor devices.

[0006] According to an embodiment of the present disclosure, each model card includes multi-dimensional model parameters; the generated complete model library is consistent with the joint distribution of multiple parameters in the original model library.

[0007] According to an embodiment of the present disclosure, in operation S3, the model parameters are normalized to eliminate the influence of dimensional differences.

[0008] According to an embodiment of the present disclosure, in operation S4, a coupled rational quadratic neural spline flow is used as the basic architecture when constructing the normalized flow model, including a multi-layer reversible transformation sequence. Each layer of the reversible transformation sequence includes: a coupled rational quadratic spline transformation; a linear transformation of LU decomposition; and an initialization basis distribution as a diagonal Gaussian distribution.

[0009] According to an embodiment of the present disclosure, Affine Coupling Layer or Planar Flow may be used as a basic framework when constructing a standardized flow model.

[0010] According to an embodiment of the present disclosure, in operation S5, the model is trained using the maximum likelihood estimation method, and parameter optimization is performed using the Adam optimizer, the batch size and learning rate are dynamically adjusted, and the network parameters are optimized using the back propagation algorithm.

[0011] According to an embodiment of the present disclosure, the semiconductor device is a MOSFET, FinFET, FDSOI, or GAAFET; the multiple key model parameters are extracted from a common semiconductor device simulation model. The multiple key model parameters include at least two characteristic parameters selected from PHIG, DSUB, VSAT, DELTAVSAT, ETA0, KSATIV, CIT, CDSC, CDSCD, DVT0, DVT1, MEXP, ETAMOB, U0, UA, EU, UD, CGSL, WR, UP, LPA, PHIN, and LOVS.

[0012] The semiconductor device multi-parameter joint distribution modeling method also includes verification and application of the completed semiconductor device multi-parameter joint distribution model. The verification includes calculating the KL divergence and energy distance between the model parameter samples of the original model library and the complete model library. When applying, the trained model is integrated into the EDA tool chain to generate any number of model card samples according to demand for circuit stability analysis and yield prediction of semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0014] Figure 1 The flowchart of the method for multi-parameter joint distribution modeling of semiconductor devices based on normalized flow according to an embodiment of the present disclosure is shown.

[0015] Figure 2 Schematic diagram comparing the modeling results of bimodal distribution and long-tail distribution using different methods.

[0016] Figure 3This is a schematic diagram comparing the parameter distribution of an infinite model library generated based on a finite sample library of fully depleted silicon-on-insulator devices according to an embodiment of the present disclosure with the original parameter distribution QQ diagram. DETAILED DESCRIPTION

[0017] The present disclosure provides a method for joint distribution modeling of multiple parameters of semiconductor devices based on normalizing flow. In the DTCO process of advanced nodes, an infinite model library is generated based on limited model cards to ensure that the joint distribution of parameters in the newly generated model library is consistent with the original model library. The modeling method of the present disclosure mainly relates to the semiconductor field, and more specifically to the fields of semiconductor design technology co-optimization (DTCO), electronic design automation (EDA), machine learning and probability distribution generation technology, and specifically relates to a method for joint modeling of semiconductor device model parameters based on normalizing flow, or also referred to as a method for joint modeling of semiconductor device model parameters based on normalizing flow generator (NFGen). Specifically: (1) The present disclosure relates to the collaborative optimization of semiconductor manufacturing process and integrated circuit design, especially for the parameter distribution modeling problem caused by device fluctuations in advanced process nodes. By constructing an accurate parameter joint distribution generation model, the present disclosure can provide an infinite compact model library containing fluctuations for the DTCO process, which can be used to optimize process parameter selection and increase design margin, thereby improving chip performance, power consumption and yield. (2) The present invention belongs to the statistical modeling module in the EDA tool chain and is compatible with the mainstream simulation program with integrated circuit emulation (SPICE) and the Berkeley short-channel insulated gate field-effect-transistor model (BSIM). By generating an infinite model parameter library that conforms to real statistical characteristics, the present invention can be used in key design verification links such as single device simulation and circuit stability analysis, helping designers to accurately evaluate circuit performance limits and yield risks in the early stages. (3) The present invention adopts the normalized flow technology in the deep generative model and realizes the nonlinear transformation from a simple basis distribution to a target high-dimensional joint distribution through a reversible neural network architecture. This method can accurately calculate the probability density and retain the complex correlation between parameters, providing a machine learning solution for semiconductor parameter generation. (4) The present invention proposes an innovative parameterized modeling method in the field of probability distribution generation, which can accurately capture the complex joint distribution characteristics of semiconductor device parameters (including non-Gaussian, long-tailed, multi-peak and other distribution forms).By combining the Coupled Rational-Quadratic Neural Spline Flow (CRQ-NSF) with linear transformations, efficient sampling and density estimation of high-dimensional parameter spaces are achieved, addressing the shortcomings of traditional methods in modeling complex joint distributions.

[0018] Existing technologies are mainly based on four methods: Gaussian fitting, principal component analysis (PCA), nonlinear power models (NPM), and generalized lambda distribution (GLD), as follows:

[0019] (1) Gaussian fitting

[0020] Early research introduced Gaussian fitting to address the statistical distribution of model parameters. This method assumes that the parameters follow a Gaussian distribution and calculates the mean and covariance matrix of each parameter to construct a statistical model, thereby simplifying the calculations. However, Gaussian fitting struggles to accurately capture the tail of the device model parameter distribution and completely ignores possible nonlinear dependencies between parameters. This can lead to deviations in circuit performance predictions under extreme conditions.

[0021] (2) PCA

[0022] The PCA method achieves data dimensionality reduction by projecting the high-dimensional parameter space onto the low-dimensional principal component space through orthogonal transformation. However, PCA can only handle linear correlations and cannot capture complex nonlinear correlations. Furthermore, the dimensionality reduction process inevitably loses some high-order statistical information, especially tail features. Finally, PCA requires that the data satisfy the Gaussian distribution assumption, which contradicts the actual parameter distribution characteristics.

[0023] (3) NPM

[0024] To improve the accuracy of marginal distributions, researchers have developed NPM for the seven-parameter statistical PSP model. NPM improves distribution modeling by incorporating higher-order moments (skewness and kurtosis), providing improved accuracy for device characteristics such as inverter delay. However, NPM faces challenges in preserving correlations, particularly in accurately capturing marginal distributions. Its correlation-preserving approach struggles with complex multi-parameter joint distributions.

[0025] (4) GLD

[0026] GLD uses rank correlation to approximate marginal distributions and has been widely used in performance modeling. Although GLD performs well in marginal distribution modeling, it still mainly focuses on marginal distributions or simple correlations (such as pairwise correlations), ignoring the complex joint distributions between multiple parameters. This limits the accuracy of the model card.

[0027] The solution proposed to the technical problems existing in the prior art involves using device-level simulations containing fluctuations to extract parameters and obtain a model library containing a limited number of model cards. Using this sample library for circuit-level simulation can directly reflect the impact of fluctuations on the circuit. However, usually limited by the device simulation speed, only a limited number of model cards can be obtained. But using limited model cards for circuit simulation will cause subsampling problems, resulting in the inability to predict circuit performance under extreme conditions, which will ultimately lead to chip failure. A better approach is to generate a comprehensive model library based on a limited set of model cards, while ensuring that the distribution of parameters in the generated model library is consistent with the original model library. Therefore, the main technical problem solved by the modeling method of the present application is how to generate an infinite model library based on limited model cards in the DTCO process of advanced nodes, and ensure that the joint distribution of parameters in the newly generated model library is consistent with the original model library.

[0028] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0029] In the embodiment of the present disclosure, Figure 1 As shown, a multi-parameter joint distribution modeling method for semiconductor devices based on standardized flow is provided, including operations S1-S5:

[0030] S1: Extracting multiple key model parameters from semiconductor device simulation data;

[0031] S2: constructing an original model library including multiple model cards based on the multiple key model parameters;

[0032] S3: Processing model parameters based on the original model library to construct a training data set;

[0033] S4: building a standardized flow model; and

[0034] S5: Based on the constructed training data, the standardized flow model is trained to generate a complete model library including large-scale model cards, completing the multi-parameter joint distribution modeling of semiconductor devices.

[0035] According to an embodiment of the present disclosure, each model card includes multi-dimensional model parameters; the generated complete model library is consistent with the joint distribution of multiple parameters in the original model library.

[0036] According to an embodiment of the present disclosure, in operation S3, the model parameters are normalized by subtracting the mean and dividing by the standard deviation to eliminate the influence of dimensional differences and construct a training data set.

[0037] According to the embodiment of the present disclosure, in operation S4, the coupled rational quadratic neural spline flow is used as the basic architecture when constructing the standardized flow model, including a multi-layer reversible transformation sequence. For example, a K-layer reversible transformation sequence is designed. , each layer contains: coupled rational quadratic spline transform ; Linear transformation of LU decomposition ; Initialize the base distribution It should be noted that other basic frameworks can also be used to build a standardized flow model, such as AffineCoupling Layer or Planar Flow.

[0038] According to an embodiment of the present disclosure, in operation S5, the model is trained using the maximum likelihood estimation method, and parameter optimization is performed using the Adam optimizer, the batch size and learning rate are dynamically adjusted, and the network parameters are optimized using the backpropagation algorithm. For example, the model is trained using the maximum likelihood estimation (MLE) method, and the loss function L is defined as:

[0039] ;

[0040] The Adam optimizer is used for parameter optimization, the batch size and learning rate are dynamically adjusted, and the network parameters are optimized through the back propagation algorithm.

[0041] According to an embodiment of the present disclosure, the semiconductor device may be a planar metal-oxide-semiconductor field-effect transistor (MOSFET), a fin field-effect transistor (FinFET), a fully depleted silicon on insulator (FDSOI), or a gate all around field effect transistor (GAAFET); a variety of key model parameters are extracted from general semiconductor device simulation models, such as the BSIM-CMG model, the BSIM-IMG model, and the BSIM4 model. Taking the BSIM-CMG model as an example, the model is applicable to FinFET and GAAFET. The key model parameters may include PHIG (work function), DSUB (drain-induced barrier lowering effect index coefficient), VSAT (saturation velocity in the saturation region), DELTAVSAT (saturation velocity in the linear region), ETA0 (drain-induced barrier lowering effect coefficient), KSATIV (long channel saturation region coefficient), CIT (interface trap coefficient), CDSC (coupling capacitance between source, drain and channel), CDSCD (drain bias sensitivity of CDSC), DVT0 (short channel effect coefficient), DVT1 (short channel effect index coefficient), MEXP (smoothing function in the saturation region), and the like. At least two characteristic parameters are selected from the following: (number factor), ETAMOB (effective field coefficient), U0 (low-field mobility), UA (one of the phonon and surface scattering coefficients), EU (one of the phonon and surface scattering coefficients), UD (Coulomb scattering coefficient), CGSL (overlap capacitance between the gate and the lightly doped source region), WR (dependence of the source and drain extension region resistance on the channel width), UP (channel length dependence coefficient of carrier mobility), LPA (channel length dependence power coefficient of carrier mobility), and PHIN (coefficient of influence of non-uniform vertical doping on the surface potential) (it should be noted that the type of parameters should be selected according to the actual application; for example, 5 or 15 characteristic parameters can be extracted). Different models extract different parameters. For example, for the BSIM-IMG model, it is necessary to extract its unique LOVS (source-drain overlap length used for capacitance calculation).

[0042] According to an embodiment of the present disclosure, the semiconductor device multi-parameter joint distribution modeling method further includes verifying and applying the completed semiconductor device multi-parameter joint distribution model, wherein the verification includes calculating the KL divergence (Kullback-Leibler Divergence) and energy distance (ED) between the model parameter samples of the original model library and the complete model library, for example, generating a large-scale model card sample ,in The verification method includes calculating the KL divergence and energy distance between the original sample and the generated sample; when applying, the trained model is integrated into the EDA tool chain to generate any number of model card samples according to demand for circuit stability analysis and yield prediction of semiconductor devices.

[0043] More specifically, key model parameters are extracted from semiconductor device simulation data, and the model parameters are set , D is the model parameter dimension, and the original model library containing N model cards is constructed , the above model parameters need to be determined through device-level simulation. Due to the limitation of device simulation speed, only a limited number of model cards can be obtained. , model library. Using such a model library may lead to undersampling problems, making it difficult to accurately predict circuit performance under high sigma conditions, and even causing chip failure. To avoid undersampling problems and accurately capture the impact of process fluctuations on circuits, our goal is to , generate a complete model library , M represents the number of model cards in the complete model library, N represents the number of model cards in the original model library, Achieving this goal requires addressing the following key challenges:

[0044] 1. Marginal distribution of generated model library Must strictly match the original marginal distribution , where 1≤i≤D.

[0045] 2. The parameters are not completely independent, but have linear or nonlinear correlations, and these correlation characteristics must be accurately preserved in the generated data.

[0046] 3. Joint distribution of new complete model libraries Must be distributed jointly with the original model library Totally consistent.

[0047] It is important to note that the difficulty of achieving these requirements increases step by step. The marginal distribution and the correlation between parameters (such as covariance) can be calculated through the joint distribution, and the relationship expression is:

[0048] ;

[0049] ;

[0050] Among them, d, i, j, l represent indexes, x d 、x i 、x j 、x l , represent random variables. Therefore, constructing an accurate joint distribution ensures that the first two requirements are met simultaneously. However, establishing a complete and accurate joint distribution model remains a significant challenge. To our knowledge, existing research has primarily focused on modeling marginal distributions and correlations, with no precedent successfully addressing the joint distribution modeling problem. This critical gap directly impacts the accuracy of simulations of the impact of process variations on circuit performance.

[0051] Another key issue is the lack of rigorous mathematical methods to evaluate generative model libraries. Directly using a low-quality model library can lead to significant decision-making biases among circuit designers. Introducing statistical indicators that can intuitively reflect the quality of the generated model library will provide designers with a quantitative reference basis, thereby ensuring the reliability of design decisions.

[0052] In order to more accurately characterize the impact of process fluctuations on circuit performance, we propose a joint generation model based on normalized flow to model the joint distribution of parameters. The basic principle of normalized flow is to use a reversible smooth mapping f: (Its inverse mapping satisfy Realize the probability density transformation. Transformed random variable whose distribution It can be expressed as:

[0053] ;

[0054] This means that from Sampling is equivalent to first Sampling and re-application Mapping, f represents a reversible smooth mapping.

[0055] The standard flow passes through a series of reversible transformations , the simple basis distribution ( , such as Gaussian distribution) is gradually transformed into the target distribution , forming a normalized flow process. To construct a complex distribution, multiple simple mappings can be combined and the "distribution" transformation can be applied iteratively. The initial distribution is A random variable After K transformations, the target variable It can be expressed as:

[0056] ;

[0057] f1, f2…f K represents a series of reversible transformations; its logarithmic probability distribution satisfies:

[0058] ;

[0059] As shown in the above formula, the core advantage of standardized flow is that it can accurately calculate each point This capability is crucial for capturing the impact of process fluctuations on model parameters and is a key breakthrough that traditional generative methods cannot achieve.

[0060] After testing various models (including autoregressive flow, affine coupled flow, planar flow, etc.), we found that the coupled rational quadratic neural spline flow (CRQ-NSF) has greater flexibility than simple functions and performs best in parameter joint distribution modeling, so it was selected as the implementation solution. In CRQ-NSF, Divided into two parts , after transformation Defined as:

[0061] ;

[0062] in Therefore The neural network is the input and the output is the spline map Parameters. is a monotone rational quadratic spline, and each interval is defined as the ratio of two rational quadratic polynomials. Finally, the expression ability is enhanced through reversible linear transformation and aligned with the target distribution. The overall flow sequence can be expressed as:

[0063] ;

[0064] in represents coupled rational quadratic splines, represents the LU decomposition permutation of the linear transformation, Sampling is done from a diagonal Gaussian distribution (assuming that each dimension is independent and follows a Gaussian distribution).

[0065] Assume the original model library It is known that the parameter x needs to be normalized to eliminate the impact of dimensionality differences on NFGen. After normalization by subtracting the mean and dividing by the standard deviation, the standardized flow model NFGen can be directly trained using maximum likelihood estimation (MLE). Its loss function is defined as:

[0066] ;

[0067] The optimization process is implemented using the Adam optimizer.

[0068] After NFGen training is completed, new samples are generated by random sampling from diagonal Gaussian distribution and applying the trained flow model transformation. After inverse normalization, a new model library is formed. , whose joint distribution is consistent with the original model library Stay consistent.

[0069] Validating the model involves calculating the KL divergence and energy distance between the model parameter samples of the original model library and the complete model library.

[0070] The KL divergence between distributions P and Q is defined as follows:

[0071] ;

[0072] When there is only sample data and the density of P and Q cannot be calculated directly, It can be estimated using k-nearest-neighbor (k-NN):

[0073] ;

[0074] in is the sample point In the sample set of P The Euclidean distance to the kth nearest neighbor, is the same In the sample set of Q The Euclidean distance to the k-th nearest neighbor.

[0075] Energy distance between distribution P and Q The definition is as follows:

[0076] ;

[0077] in represents the Euclidean distance, Representatives from and The expected value of the Euclidean distance between samples, and Respectively represent and Expected self-distance of internal samples.

[0078] The alternatives to the above modeling approach are as follows:

[0079] 1. Different Normalizing Flow model architectures.

[0080] The infrastructure of other Normalizing Flow models that replace CRQ-NSF, such as Affine CouplingLayer or Planar Flow.

[0081] These models may vary in complexity and flexibility, but the basic idea is the same, which is to approximate the joint distribution through a reversible transformation.

[0082] 2. Different loss functions.

[0083] Besides Maximum Likelihood Estimation (MLE), you can also try other objective functions, such as minimizing the Wasserstein distance or using a variational autoencoder (VAE).

[0084] 3. Different normalization methods.

[0085] Instead of the standard deviation normalization method, other methods such as Min-Max normalization or RobustScaler can be used to adapt to the characteristics of different data distributions.

[0086] The disclosed method for multi-parameter joint distribution modeling of semiconductor devices based on standardized flow has the following advantages and positive effects:

[0087] (1) Ability to accurately model non-normal distributions such as long tails and multi-peaks

[0088] Advantages: The distribution is gradually transformed through a reversible neural network. Each step of the transformation can introduce nonlinearity and ultimately fit any complex target distribution.

[0089] Positive effect: Reduces errors when modeling long-tailed and multimodal distributions.

[0090] like Figure 2 The figure shows the results of different methods for modeling bimodal distribution and long-tail distribution, where the upper row is bimodal distribution and the lower row is long-tail distribution. It can be seen that the modeling method of the present disclosure based on NFGen can accurately model bimodal distribution and achieves the best results in modeling long-tail distribution.

[0091] (2) Ability to accurately capture joint distribution:

[0092] Advantages: Using standardized flow modeling naturally preserves the interaction relationship of all parameters, avoiding a single fit to the marginal distribution. The standardized flow directly approximates the joint distribution through a reversible transformation.

[0093] Positive effect: The joint distribution modeling error is significantly reduced, especially in the high Sigma region (such as ±4σ), making the generated model library more consistent with the actual process fluctuation characteristics.

[0094] Reference Figure 3 As shown, the parameter distribution QQ plot (Quantile-Quantile Plot) of the infinite model library generated by the modeling method disclosed in the present invention is compared with the original parameter distribution QQ plot based on a finite sample library of a 22nm FDSOI device. Table 1 below shows the gap between the sample library generated by different methods and the original distribution. KL and ED are the measurement indicators of the gap. Statistical indicators: KL is KL divergence, which measures the information difference between the generated distribution and the true distribution. The smaller the value, the higher the similarity. ED is energy distance, which is a distribution difference measure based on the Euclidean distance between samples. It is sensitive to long-tail distributions and is combined with Figure 3 As can be seen from Table 1, the parameter distribution generated by NFGen is very close to the original distribution, and is superior to traditional methods such as PCA, NPM, and GLD in terms of KL divergence and energy distance metrics.

[0095] Table 1

[0096]

[0097] The embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It should be noted that any implementations not depicted or described in the drawings or the main text of the specification are known to those skilled in the art and are not described in detail. Furthermore, the above definitions of the various elements and methods are not limited to the various specific structures, shapes, or methods described in the embodiments, and can be easily modified or replaced by those skilled in the art.

[0098] In this document, unless otherwise specified, the so-called feature A "or" or "and / or" feature B means that A exists alone, B exists alone, or A and B exist at the same time; the so-called feature A "and" or "and" or "and" feature B means that A and B exist at the same time; the so-called "include", "comprise", "have" and "contain" mean including but not limited to these.

[0099] Furthermore, unless specifically described or required to occur sequentially, the order of the steps is not limited to the order listed above and may be varied or rearranged based on desired design requirements. Furthermore, the above embodiments may be mixed and matched with each other or with other embodiments based on design and reliability considerations. That is, the technical features of different embodiments may be freely combined to form more embodiments.

[0100] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above are only specific embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A multi-parameter joint distribution modeling method for semiconductor devices based on normalized flow, comprising: S1: Extracting multiple key model parameters from semiconductor device simulation data; S2: constructing an original model library including multiple model cards based on the multiple key model parameters; S3: Processing model parameters based on the original model library to construct a training data set; S4: building a standardized flow model; and S5: Based on the constructed training data, the standardized flow model is trained to generate a complete model library including large-scale model cards, completing the multi-parameter joint distribution modeling of semiconductor devices.

2. According to the semiconductor device multi-parameter joint distribution modeling method described in claim 1, each model card includes multi-dimensional model parameters; the generated complete model library is consistent with the joint distribution of multiple parameters in the original model library. 3 . The semiconductor device multi-parameter joint distribution modeling method according to claim 1 , wherein in operation S3 , the model parameters are normalized to eliminate the influence of dimensional differences. 4 . The semiconductor device multi-parameter joint distribution modeling method according to claim 1 , wherein in operation S4 , a coupled rational quadratic neural spline flow is used as a basic architecture when constructing the standardized flow model, including a multi-layer reversible transformation sequence.

5. The semiconductor device multi-parameter joint distribution modeling method according to claim 4, wherein each layer of the reversible transformation sequence comprises: Coupled rational quadratic spline transform; Linear transformation of LU decomposition; as well as Initialize the basis distribution to a diagonal Gaussian distribution.

6. According to the semiconductor device multi-parameter joint distribution modeling method according to claim 4, Affine Coupling Layer or Planar Flow can also be used as a basic framework when constructing the standardized flow model.

7. The semiconductor device multi-parameter joint distribution modeling method according to claim 1, in operation S5, the model is trained using the maximum likelihood estimation method, and parameter optimization is performed using the Adam optimizer, the batch size and learning rate are dynamically adjusted, and the network parameters are optimized using the back propagation algorithm.

8. The semiconductor device multi-parameter joint distribution modeling method according to claim 1, wherein the semiconductor device is a MOSFET, a FinFET, a FDSOI, or a GAAFET; and the multiple key model parameters are extracted from a general semiconductor device simulation model.

9. The semiconductor device multi-parameter joint distribution modeling method according to claim 1, wherein the multiple key model parameters include at least two characteristic parameters of PHIG, DSUB, VSAT, DELTAVSAT, ETAO, KSATIV, CIT, CDSC, CDSCD, DVT0, DVT1, MEXP, ETAMOB, U0, UA, EU, UD, CGSL, WR, UP, LPA, PHIN, and LOVS.

10. The semiconductor device multi-parameter joint distribution modeling method according to claim 1 further includes verifying and applying the completed semiconductor device multi-parameter joint distribution model, wherein the verification includes calculating the KL divergence and energy distance between the model parameter samples of the original model library and the complete model library; when applying, the trained model is integrated into the EDA tool chain, and any number of model card samples are generated according to demand for circuit stability analysis and yield prediction of semiconductor devices.

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