Residual fault current suppression circuit and method of offshore wind power full direct current system

By connecting capacitors and IGBTs in the offshore wind power full DC system, the fault current is quickly suppressed to zero, solving the problem of slow dissipation of fault current in offshore wind power system, achieving rapid fault isolation and system recovery, and improving power supply reliability.

CN120473962APending Publication Date: 2025-08-12HARBIN INST OF TECH
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Patent Information

Application Number
CN202510634020.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-16
Publication Date
2025-08-12

AI Technical Summary

Technical Problem

In offshore wind power systems, DC fault current dissipates slowly, resulting in extended fault clearance time, delayed system recovery, and reduced power supply reliability.

Method used

In offshore wind power full DC system, each DCS is connected in series with capacitors and fully controlled power semiconductor switching devices, such as insulated gate bipolar transistors (IGBTs). When the fault current occurs, the IGBT locks up, the fault current charges the capacitor, the DC fault current is suppressed to zero, and the DCS is quickly turned off.

Benefits of technology

Quickly suppress fault current to zero, shorten the fault clearing time from 500ms to 62ms, achieve rapid fault isolation and improve power supply reliability.

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Abstract

The invention discloses a residual fault current suppression circuit and method of an offshore wind power full-direct-current system, and relates to the technical field of offshore wind power plant power supply. The invention aims to solve the problem of slow current dissipation of the existing offshore power supply fault. A residual fault current suppression circuit is connected in series in front of each DCS of the offshore wind power full-direct-current system, and the circuit comprises a capacitor and a full-control power semiconductor switching device which are connected in parallel. And when the fault current exists, the full-control power semiconductor switching device is locked, and the fault current charges the capacitor, so that the fault current is suppressed to zero, and the DCS is turned off.
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Description

Technical Field

[0001] The present application relates to the technical field of offshore wind farm power supply, and in particular to DC fault protection. Background Art

[0002] A DCCB (Direct Current Circuit Breaker) is a key device used in high-voltage direct current (HVDC) transmission systems. It is specifically designed to quickly cut off the DC current in the event of a fault, protecting the power grid and equipment. Deploying a DCCB offshore increases investment costs and requires additional space on the offshore platform. Therefore, another option is to replace the DCCB with a DCS (Direct Current Switch). Figure 1 As shown in Figure 2, replacing DCCB with DCS can reduce the cost of switchgear and the size of offshore platforms. Figure 2 As shown in FIG, due to the residual energy in the DC cable and the DC reactor, the fault current still flows through the DC-DC converter diode, the DC cable, the reactor and the fault point, resulting in slow dissipation of the fault current. Summary of the Invention

[0003] This application aims to address the problem of slow dissipation of fault current in offshore power supply. It now provides a residual fault current suppression circuit (FCSC) and method for an offshore wind power all-DC system, which quickly suppresses the residual DC fault current to zero, thereby achieving rapid fault isolation using DC switches.

[0004] The first aspect of the present application provides a residual fault current suppression circuit for an offshore wind power all-DC system, comprising: capacitors and fully-controlled power semiconductor switching devices connected in parallel with each other. When a fault current exists, the fully-controlled power semiconductor switching device is locked.

[0005] In a possible design, a diode group is connected in series at the onshore converter station of each transmission cable, and the diode group includes a plurality of SiC diodes connected in series.

[0006] In one possible design, the fully-controlled power semiconductor switch device is an insulated gate bipolar transistor.

[0007] A second aspect of the present application provides a residual fault current suppression method for an offshore wind power all-DC system, wherein the residual fault current suppression method for an offshore wind power all-DC system is implemented based on the residual fault current suppression circuit of the offshore wind power all-DC system;

[0008] The residual fault current suppression method of the offshore wind power full DC system comprises:

[0009] A residual fault current suppression circuit of the offshore wind power full DC system is connected in series before each DCS of the offshore wind power full DC system. When a fault current exists, the fully controlled power semiconductor switching device is locked, and the fault current charges the capacitor, so that the fault current is suppressed to zero and the DCS is shut down.

[0010] In one possible design, the residual fault current suppression method for the above-mentioned offshore wind power full DC system further includes: connecting a diode group in series at the onshore converter station of each transmission cable, wherein the diode group includes multiple SiC diodes connected in series.

[0011] In one possible design, the fully-controlled power semiconductor switch device is an insulated gate bipolar transistor.

[0012] Beneficial effects of this application:

[0013] This application proposes a residual fault current suppression circuit and method for an all-DC offshore wind power system. This circuit and method can rapidly suppress residual DC fault current to zero, thereby enabling rapid fault isolation using DC switches. This application reduces fault clearing time from approximately 500ms to 62ms, significantly accelerating system recovery. This advanced DC fault protection solution improves power supply reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a schematic diagram of the DCS protection scheme;

[0015] Figure 2 Schematic diagram of fault current path after converter lockout;

[0016] Figure 3 Schematic diagram of fault current waveform under DCS scheme and FCSC scheme;

[0017] Figure 4 This is a schematic diagram of the fault protection solution of this application;

[0018] Figure 5 Schematic diagram of the residual fault current suppression circuit and method for the offshore wind power all-DC system of the present application, wherein (a) represents the current path during normal operation, and (b) represents the current path during a fault;

[0019] Figure 6 This is the RLC equivalent circuit diagram of the residual fault current suppression circuit and method for the offshore wind power full DC system of this application;

[0020] Figure 7 Schematic diagram comparing simulation waveforms of typical DCS scheme and FCSC scheme;

[0021] Figure 8 This is the DC fault ride-through waveform. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other in the absence of conflict.

[0023] like Figure 3 The following diagrams show fault current waveforms for the DCS and FCSC solutions. A traditional DC-DC converter requires approximately 500ms to reduce the fault current to below 100A (the DCS disconnection threshold). However, the residual energy circulating on the MVDC (medium voltage direct current) side is slowly dissipated by the resistance of the DC cables and reactors, preventing the DCS from disconnecting immediately. This prolongs the fault clearing time, delays system recovery, and reduces power supply reliability.

[0024] In view of this, the embodiment of the present application provides a residual fault current suppression circuit and method for an offshore wind power full DC system in order to solve the above problems. Figure 4 , the scheme of the implementation method of this application is described in detail.

[0025] Specific embodiment 1: The residual fault current suppression circuit and method of the offshore wind power full DC system described in this embodiment include:

[0026] The capacitor and the fully controlled power semiconductor switch device are connected in parallel with each other. When a fault current exists, the fully controlled power semiconductor switch device is locked.

[0027] In one embodiment, a diode group is connected in series at the onshore converter station of each transmission cable, and the diode group includes a plurality of SiC diodes connected in series.

[0028] In one embodiment, the fully-controlled power semiconductor switch device is an insulated gate bipolar transistor.

[0029] To further introduce the embodiments of this application, Figure 4 A schematic diagram of the fault protection scheme of this application is provided, which is described in detail below:

[0030] 1. DC fault protection layout

[0031] like Figure 5 (a) shows the capacitance C sConnected in parallel with IGBT (Insulated Gate Bipolar Transistor) Q and then in series with DCS. Under normal conditions, IGBT Q remains on and capacitor C s In the short-circuit state, the current flows through IGBT Q. When a fault is detected, IGBT Q is locked and the fault current is commutated from the IGBT branch to the capacitor branch, such as Figure 5 (b) shows the fault current acting on the capacitor C. s After charging, the capacitor voltage rises, quickly suppressing the fault current to zero. The DCS quickly shuts down, achieving rapid fault isolation. The proposed FCSC only needs to block the fault current, and its rated voltage is only 10% of the rated DC voltage of the MVDC, thus minimizing equipment cost and power loss.

[0032] like Figure 4 As shown, FCSC is installed at the offshore platform terminal of each wind farm cable (cable 1-3) and the offshore terminal of the transmission cable (cable 4-6), and is equipped through the offshore platform. In order to suppress the fault current from the onshore AC power grid, a series SiC diode is configured at the onshore converter station of the transmission cable. This design takes advantage of the unidirectional power flow characteristics of renewable energy generation. In addition, when the offshore DC voltage drops during a DC fault, the DC voltage of the onshore MMC (modular multilevel converter) remains near the rated value, thanks to the DC fault blocking capability of the SiC diode, which enables the MMC to remain operational during the DC fault while providing reactive power support to the onshore AC power grid.

[0033] 2. Design of FCSC

[0034] After the DC fault occurs, the DC current rises rapidly and reaches the protection threshold I at the initial time t0. faultmax The equivalent RLC circuit of the residual fault current suppression circuit and method of the offshore wind power full DC system described in this embodiment is as follows: Figure 6 As shown, where R e 、L e and C e are the equivalent resistance, inductance, and capacitance, respectively. When IGBT Q is blocked, the fault current begins to charge the capacitor. The capacitor voltage rises from zero, and the fault current decreases.

[0035] from Figure 6 In the circuit, the equivalent capacitance C e The voltage v Ce It is given by:

[0036] v Ce =A1e z1t +A2e z2t (1),

[0037] in,

[0038]

[0039] Where, v Ce (0) is the capacitor C e The initial voltage is zero. o (0) is the current flowing through the reactance L e The initial current is equal to the maximum fault current I faultmax Therefore, formula (3) can be expressed as:

[0040]

[0041] According to formula (1), the DC reactor L e The current is:

[0042]

[0043] Capacitor C e Through the reactance L e Continuous charging, when the fault current i o When it drops to zero at time t1, it reaches the peak voltage V Cemax Therefore, the maximum capacitor voltage V Cemax Expressed as:

[0044]

[0045] When the output current reaches its peak value I faultmax When the IGBT Q in the FCSC is locked, the equivalent inductance L e The energy stored in is transferred to the capacitor, which can be expressed as follows:

[0046]

[0047] When I faultmax When set to 2pu, the energy stored in the MVDC network remains essentially unchanged. Therefore, the maximum capacitor voltage is determined by the following formula:

[0048]

[0049] The rated voltage of the FCSC described in this application is determined by the maximum capacitor voltage obtained from equations (6) and (8). Larger capacitance will reduce the peak capacitor voltage and the FCSC rated voltage, thereby reducing equipment cost. However, this will result in slower fault current suppression and fault isolation. Conversely, smaller capacitance can clear the fault faster, but will increase the voltage stress on the FCSC. In this application, the FCSC capacitance will be based on the peak capacitor voltage V during the DC fault. Cemax The design is limited to 0.1 pu to balance the failure performance and cost. The design method follows equations (6) and (8).

[0050] In order to verify the fault protection scheme proposed in this application, Figure 1 and Figure 4 The offshore wind power systems shown are all built in the PSCAD / EMTDC environment, and the detailed parameters are shown in Table 1. The onshore MMC regulates the DC voltage on the MVDC side, while the offshore DC WTs are controlled by the maximum power point tracking (MPPT) algorithm. Figure 1 As shown, at 0.5 s, a permanent DC fault F1 is applied to the MVDC cable 5 .

[0051] Table 1 Main parameters of the simulation system

[0052]

[0053] A DC short circuit fault occurs at 0.5s, and the DC voltage at sea is v off to zero, such as Figure 7 (a) shows that the current in the cable rises rapidly. Once it reaches the protection threshold of 2pu, the DC WT converter will be locked. The DC cable discharges after the fault occurs, and the current i flowing through cable 4 and cable 6 is DCS4 and i DCS6 Reverse, see Figure 7 (c) Reverse current and collection cable current (i DCS1 、i DCS2 and i DCS3 ) flows through FCSC5 and feeds power to the fault point. DCS5 The rapid rise of , combined with the directional information from other currents, indicates that the DC fault is located on transmission cable 5. Therefore, the IGBT Q in FCSC5 on the faulty cable is blocked, diverting the capacitor into the fault current path, and the capacitor is charged. As the FCSC capacitor voltage increases, the fault current i DCS5 At 0.554s, it is quickly suppressed to within 100A, and the capacitor voltage v C The peak value is 0.1pu, such as Figure 7 As shown in (d) and (e).

[0054] On the contrary, for Figure 1 As shown in the typical DCS protection scheme, the fault current continues to circulate in the system and takes about 500ms to decay to 100A. Figure 7 (b) to (d) The proposed FCSC solution can quickly suppress fault current and achieve faster fault isolation while maintaining reasonable costs for energy absorption capacitors and parallel IGBTs.

[0055] Figure 8 The simulation results of DC fault ride-through are given. Although the DC voltage v off drops to zero, but the shore DC voltage von Keep it close to its rated value, such as Figure 8 As shown in (a) and (g), thanks to the DC fault blocking capability of the SiC diode equipped on the DC port of the shore MMC, the shore MMC keeps operating and provides reactive power to support the shore AC grid, although the active power flowing in drops to zero, as shown in Figure 8 (h) shown.

[0056] When the fault current i DCS5 When the current is suppressed below 100A at t=0.562s, DCS5 is disconnected to isolate the fault from the offshore DC grid, so that i DCS5 Zero, such as Figure 8 (c) To facilitate fault recovery after fault isolation, the FCSC capacitor is quickly discharged in parallel with the energy-consuming resistor by closing the mechanical switch, as shown in Figure 8 (e) As shown. At about t = 0.574s, the capacitor is completely discharged, at which time the parallel IGBT Q is turned on and the FCSC capacitor is short-circuited. Then, as Figure 8 As shown in (a) and (h), the DC-DC converters in each WT are restarted to control the offshore bus voltage v off , while the shore voltage von remains at 1 pu. Once the offshore bus voltage stabilizes near its rated value at t = 0.632 s, the offshore DC WT converter is unlocked and resumes operation, while the DC-DC converter controls the internal voltage of the WTs. Due to the disconnection of transmission cable 5 for fault isolation, the DC current is distributed between the normal transmission cable 4 and cable 6, as shown in Figure 8 This is shown by the increasing current in (c) and (d).

[0057] like Figure 8 As shown in (b), (c) and (d), at the initial stage of system restart, the transmission current exhibits a brief overshoot before entering the steady state. Similar transient behavior also appears in the DC bus voltage v off and v on In, such as Figure 8 (a) and (g). The onshore MMC is also disturbed during the fault period, and its arm current is effectively limited to below 2pu, effectively protecting the converter. Figure 8 (f).

[0058] Despite experiencing the most severe DC fault conditions, the offshore DC grid achieved rapid recovery within 170ms. Figure 8 As shown, the effective fault current suppression capability of the proposed FCSC enables fast fault ride-through, ensuring reliable power delivery.

[0059] Specific embodiment 2: The residual fault current suppression method of the offshore wind power full DC system described in this embodiment is implemented based on the residual fault current suppression circuit of the offshore wind power full DC system described in the above specific embodiment 1.

[0060] The residual fault current suppression method of the offshore wind power full DC system comprises:

[0061] A residual fault current suppression circuit of the offshore wind power full DC system is connected in series before each DCS of the offshore wind power full DC system. When a fault current exists, the fully controlled power semiconductor switching device is locked, and the fault current charges the capacitor, so that the fault current is suppressed to zero and the DCS is shut down.

[0062] In one embodiment, the residual fault current suppression method for the above-mentioned offshore wind power full DC system further includes: connecting a diode group in series at the onshore converter station of each transmission cable, wherein the diode group includes multiple SiC diodes connected in series.

[0063] In one embodiment, the fully-controlled power semiconductor switch device is an insulated gate bipolar transistor.

[0064] Although the present application is described herein with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the present application. It should be understood that many modifications may be made to the illustrative embodiments, and that other arrangements may be devised, without departing from the spirit and scope of the present application as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in ways other than those described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in conjunction with other described embodiments.

Claims

1. The residual fault current suppression circuit of the offshore wind power full DC system is characterized by: include: The capacitor and the fully controlled power semiconductor switch device are connected in parallel with each other. When a fault current exists, the fully controlled power semiconductor switch device is locked.

2. The residual fault current suppression circuit of the offshore wind power full DC system according to claim 1 is characterized in that: A diode group is connected in series at the onshore converter station of each transmission cable, and the diode group includes a plurality of SiC diodes connected in series.

3. The residual fault current suppression circuit of the offshore wind power full DC system according to claim 1 or 2, characterized in that: The fully controlled power semiconductor switch device is an insulated gate bipolar transistor.

4. A method for suppressing residual fault current in an offshore wind power all-DC system, characterized in that: The residual fault current suppression method of the offshore wind power full DC system is implemented based on the residual fault current suppression circuit of the offshore wind power full DC system according to claim 1; The residual fault current suppression method of the offshore wind power full DC system comprises: A residual fault current suppression circuit of the offshore wind power full DC system is connected in series before each DCS of the offshore wind power full DC system. When a fault current exists, the fully controlled power semiconductor switching device is locked, and the fault current charges the capacitor, so that the fault current is suppressed to zero and the DCS is shut down.

5. The method for suppressing residual fault current in an offshore wind power all-DC system according to claim 4, characterized in that: Also includes: At the onshore converter station of each transmission cable, a diode group is connected in series, and the diode group includes a plurality of SiC diodes connected in series.

6. The residual fault current suppression circuit of the offshore wind power full DC system according to claim 4 or 5, characterized in that: The fully controlled power semiconductor switch device is an insulated gate bipolar transistor.