Light emitting diode structure

Abstract

The invention provides a light emitting diode structure which comprises a substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer, a semiconductor contact layer, a first conductive layer and a second conductive layer. The first semiconductor layer is disposed on the substrate. The light-emitting layer is disposed on the first semiconductor layer. The second semiconductor layer is arranged on the light-emitting layer, and the doping type of the second semiconductor layer is different from that of the first semiconductor layer. The semiconductor contact layer is arranged on the first semiconductor layer and comprises Al < x > Ga < y > In < 1-x-y > N, x + y = 1, and the doping concentration of the semiconductor contact layer is larger than 1 * 10 < 19 > / cm < 3 >. The first conductive layer is disposed on the semiconductor contact layer. The second conductive layer is disposed on the second semiconductor layer. The first conductive pad is disposed on the first conductive layer. The second conductive pad is disposed on the second conductive layer.

Description

[0001] This application is a divisional application of the patent application with the application date of March 23, 2021, application number 202110307377.1, and invention name “Light-emitting diode structure”. Technical Field

[0002] The present disclosure relates to a light emitting diode structure, and more particularly to a light emitting diode structure capable of lowering forward operating voltage and reducing waste heat of the device. Background Art

[0003] Light Emitting Diode (LED) is a light-emitting element made of semiconductor materials that can convert electrical energy into light. It has the advantages of small size, high energy conversion efficiency, long life, and power saving. Therefore, it is widely used as a light source in various electronic devices.

[0004] In UV LED structural design, to reduce semiconductor light absorption, n-type aluminum gallium nitride (AlGaN) is typically used as the N-type contact layer. However, compared to the N-type GaN commonly used for blue LEDs, N-type AlGaN has a higher contact resistance, resulting in a higher operating voltage for the device. A second issue is that when the aluminum content exceeds 20%, a higher alloying temperature is required, which reduces the reflectivity of the N-type metal and is detrimental to the device's luminous efficiency.

[0005] To address this issue, conventional techniques incorporate an N-type contact layer between the N-type layer and the light-emitting layer. This layer, with a lower aluminum content than the N-type layer, is typically inserted between the N-type layer and the light-emitting layer. However, when the aluminum content of the N-type contact layer approaches that of the N-type layer, the voltage reduction effect is poor. When the aluminum content of the N-type contact layer is significantly lower than that of the N-type layer, or even approaches zero, while this improves voltage, it may also lead to light absorption. Furthermore, due to the increased lattice matching, the quality of the subsequent epitaxial growth formed on the N-type contact layer deteriorates, further impacting luminous efficiency.

[0006] Another method of reducing the contact resistance of the N-type electrode is to increase the electron concentration of the N-type contact layer between the N-type layer and the light-emitting layer by high doping. In practice, the doping concentration of silicon is increased to 1x10 19 / cm 3 However, if the doping concentration is too high, it will be detrimental to the crystal quality of the subsequent light-emitting layer quantum well growth.

[0007] The aforementioned growth method requires the N-type contact layer to be at least 0.5μm thick due to the tolerance of the etching process. This degrades the quality of the quantum well epitaxy formed on the N-type contact layer, which is detrimental to luminous efficiency. Therefore, there is a need for improvement in the existing technology. Summary of the Invention

[0008] The present disclosure aims to provide a light emitting diode structure to achieve the effects of lowering forward operating voltage, reducing device waste heat, and improving output power and reliability.

[0009] The present disclosure provides a light emitting diode structure, comprising a substrate, a first semiconductor layer, a light emitting layer, a second semiconductor layer, a semiconductor contact layer, a first conductive layer, and a second conductive layer. The first semiconductor layer is disposed on the substrate. The light emitting layer is disposed on the first semiconductor layer. The second semiconductor layer is disposed on the light emitting layer, and the doping type of the second semiconductor layer is different from the doping type of the first semiconductor layer. The semiconductor contact layer is disposed on the first semiconductor layer and comprises Al x Ga y In 1-x-y N, where x+y=1, and the doping concentration of the semiconductor contact layer is greater than 1x10 19 / cm 3 The first conductive layer is disposed on the semiconductor contact layer. The second conductive layer is disposed on the second semiconductor layer. The first conductive pad is disposed on the first conductive layer. The second conductive pad is disposed on the second conductive layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The various aspects of the present disclosure are best understood from the following detailed description, which will be read in conjunction with the accompanying drawings. It should be understood that, in accordance with industry practice, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity.

[0011] Figure 1 1 is a top view illustrating a light emitting diode structure according to some embodiments of the present disclosure;

[0012] Figure 2 To illustrate the basis Figure 1 Schematic cross-section of the middle section line AA';

[0013] Figures 3 to 8 Schematic cross-sectional views illustrating various steps in manufacturing a light emitting diode structure according to some embodiments of the present disclosure;

[0014] Figure 9 Schematic cross-sectional views illustrating light-emitting diode structures according to other embodiments of the present disclosure;

[0015] Figure 10 Schematic cross-sectional views illustrating light-emitting diode structures according to further embodiments of the present disclosure;

[0016] Figure 11 1 is a top view illustrating a light emitting diode structure according to some embodiments of the present disclosure;

[0017] Figure 12 To illustrate the basis Figure 11 Schematic cross-section of the middle section line BB';

[0018] Figure 13 1 is a top view illustrating a light emitting diode structure according to some further embodiments of the present disclosure;

[0019] Figure 14 To illustrate the basis Figure 13 Schematic cross-section of the center section line CC';

[0020] Figure 15 1 is a top view illustrating a light emitting diode structure according to some further embodiments of the present disclosure;

[0021] Figure 16 To illustrate the basis Figure 15 Schematic cross-section of the middle section line DD';

[0022] Figure 17 1 is a top view illustrating a light emitting diode structure according to some further embodiments of the present disclosure;

[0023] Figure 18 To illustrate the basis Figure 17 Schematic cross-section of the middle section line EE';

[0024] Figure 19 1 is a top view illustrating a light emitting diode structure according to some further embodiments of the present disclosure;

[0025] Figure 20 To illustrate the basis Figure 19 A schematic cross-sectional view of the middle section line FF';

[0026] Figure 21 Schematic cross-sectional views illustrating light-emitting diode structures according to further embodiments of the present disclosure;

[0027] Figure 22 FIG2 is a schematic diagram illustrating a semiconductor contact layer in a light emitting diode structure according to some further embodiments of the present disclosure.

[0028]

Explanation of symbols

[0029] 100: Light-emitting diode structure

[0030] 110:Substrate

[0031] 120: first semiconductor layer

[0032] 122: first thickness structure

[0033] 124: Second thickness structure

[0034] 126: Upper surface

[0035] 130: Luminescent layer

[0036] 140: Second semiconductor layer

[0037] 150: semiconductor contact layer

[0038] 150': semiconductor contact layer

[0039] 151-154: Sub-contact layer

[0040] 155: Independent contact layer

[0041] 156: Insulation

[0042] 157:Through hole

[0043] 160: first conductive layer

[0044] 160a: first conductive layer base

[0045] 160b: first conductive layer protrusion

[0046] 170: second conductive layer

[0047] 172: Upper surface

[0048] 180:Insulation layer

[0049] 182: First opening

[0050] 184: Second opening

[0051] 186: Top surface

[0052] 180a: Insulation layer extension

[0053] 190a: first conductive pad

[0054] 190b: second conductive pad

[0055] AA': hatch line

[0056] BB': hatch line

[0057] CC': hatch line

[0058] DD': hatch line

[0059] EE':Hatch line

[0060] FF': hatch line

[0061] CL: Conductive connection layer

[0062] T1: First thickness

[0063] T2: Second thickness DETAILED DESCRIPTION

[0064] The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components, values, operations, materials, configurations, and the like are described below to simplify the disclosure. Of course, these are merely examples and are not intended to be limiting. Other components, values, operations, materials, configurations, and the like are also contemplated. For example, in the description below, forming a first feature above a second feature may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature are not in direct contact. In addition, the disclosure may repeat reference numbers and / or text in various examples. This repetition itself does not indicate a relationship between the various embodiments and / or configurations discussed.

[0065] Furthermore, for ease of description, spatially relative terms such as "below," "beneath," "below," "above," and "above" may be used throughout this disclosure to describe one element or feature relative to one or more other elements or features as shown in the figures. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0066] Generally, the light-emitting device disclosed herein can be used in any device with lighting or luminescence functions. This disclosure forms an ohmic contact with the N-type electrode by growing a thin semiconductor contact layer (also known as an ohmic contact layer) on the surface of the N-type semiconductor layer not covered by the light-emitting layer. This reduces the forward operating voltage, alloy temperature, and device waste heat, while increasing output power and improving device reliability, all without compromising the quality of the light-emitting layer epitaxial crystal.

[0067] Example 1

[0068] In some embodiments of the present disclosure, a light emitting diode structure 100 is provided that can reduce the forward operating voltage. Figure 1 and Figure 2 , Figure 1 FIG2 is a top view illustrating a light emitting diode structure according to some embodiments of the present disclosure. Figure 2 To illustrate the basis Figure 1 The cross-section diagram of the middle section line AA' should be noted for easy reference. Figure 2 The insulating layer 180, the first conductive pad 190a and the second conductive pad 190b are not shown in FIG. Figure 1The light emitting diode structure 100 includes a substrate 110, a first semiconductor layer 120, a light emitting layer 130, a second semiconductor layer 140, a semiconductor contact layer 150, a first conductive layer 160, a second conductive layer 170, an insulating layer 180, a first conductive pad 190a, and a second conductive pad 190b.

[0069] In some embodiments of the present disclosure, Figure 2 As shown, the first semiconductor layer 120 is disposed on the substrate 110. The first semiconductor layer 120 has a first thickness structure 122 and a second thickness structure 124, and the first thickness T1 of the first thickness structure 122 is greater than the second thickness T2 of the second thickness structure 124. The substrate 110 may include any suitable substrate. In one embodiment, the substrate 110 may be a transparent substrate or an opaque substrate. In some embodiments, the material of the substrate 110 includes, but is not limited to, a glass substrate, a sapphire substrate, a silicon substrate, a printed circuit board, a metal substrate, a ceramic substrate, an acrylic substrate, or a combination thereof. In one embodiment, the material of the substrate 110 includes, but is not limited to, silicon dioxide (SiO2), silicon nitride (Si3N4), titanium dioxide (TiO2), tantalum pentoxide (Ta2O5), gold, aluminum, copper, nickel, or a combination thereof.

[0070] In one embodiment, the first semiconductor layer 120 may be an N-type Group III-V semiconductor layer. In some embodiments disclosed herein, the Group III-V semiconductor layer may include, but is not limited to, binary epitaxial materials such as gallium arsenide (GaAs), gallium nitride (GaN), gallium phosphide (GaP), and indium arsenide (InAs), or ternary or quaternary epitaxial materials such as gallium arsenide phosphide (GaAsP), aluminum gallium arsenide (AlGaAs), indium gallium phosphide (InGaP), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), aluminum indium gallium nitride (AlGaInN), aluminum indium gallium phosphide (AlInGaP), and indium gallium arsenide phosphide (InGaAsP). Therefore, the N-type Group III-V semiconductor layer may be formed by doping the aforementioned Group III-V semiconductor layer with a Group IV-A element (e.g., silicon) or a Group VI-A element (e.g., tellurium).

[0071] Please continue reading Figure 2 In some embodiments, the light-emitting layer 130 is disposed on the first thickness structure 122 of the first semiconductor layer 120. In one embodiment, the light-emitting layer 130 may include, but is not limited to, a multiple quantum well (MQW), a single-quantum well (SQW), a homojunction, a heterojunction, or other similar structures.

[0072] Still see Figure 2 In some embodiments, the second semiconductor layer 140 is disposed above the light-emitting layer 130. In one embodiment, the second semiconductor layer 140 may be a p-type III-V semiconductor layer. In some embodiments disclosed herein, the III-V semiconductor layer may include, but is not limited to, binary epitaxial materials such as gallium arsenide, gallium nitride, gallium phosphide, indium arsenide, aluminum nitride, indium nitride, and indium phosphide, or ternary or quaternary epitaxial materials such as gallium arsenide phosphide, aluminum gallium arsenide, indium gallium phosphide, indium gallium nitride, aluminum gallium nitride, aluminum indium gallium nitride, aluminum indium gallium phosphide, and indium gallium arsenide phosphide. Therefore, the p-type III-V semiconductor layer may be formed by doping the aforementioned III-V semiconductor layer with a Group II-A element (e.g., beryllium, magnesium, calcium, or strontium) or a Group II-B element (e.g., zinc). Therefore, the doping type of the second semiconductor layer 140 is different from the doping type of the first semiconductor layer 120.

[0073] like Figure 2 As shown, in some embodiments, the semiconductor contact layer 150 is disposed on the second thickness structure 124 of the first semiconductor layer 120, and the doping type of the semiconductor contact layer 150 is the same as the doping type of the first semiconductor layer 120. By providing the semiconductor contact layer 150, the resistance between the first semiconductor layer 120 and the first conductive layer 160 can be reduced.

[0074] In one embodiment, the semiconductor contact layer 150 includes Al x Ga y In 1-x-yN, where 0≤x, y≤1. Specifically, the semiconductor contact layer 150 may be an N-type III-V semiconductor layer. In some embodiments disclosed herein, the III-V semiconductor layer may include, but is not limited to, a binary epitaxial material such as gallium nitride, or a ternary or quaternary epitaxial material such as indium gallium nitride or aluminum gallium indium nitride. Therefore, the N-type III-V semiconductor layer may be formed by doping the above-mentioned III-V semiconductor layer with a Group IV-A element (such as silicon) or a Group VI-A element. Based on the above, it should be mentioned that, in some embodiments, the vertical projections of the semiconductor contact layer 150 and the light-emitting layer 130 on the substrate 110 do not overlap or contact each other, and the semiconductor contact layer 150 does not overlap or contact the first thickness structure 122 of the first semiconductor layer 120. In one embodiment, the semiconductor contact layer 150 has a thickness between about 1 nm and about 500 nm, including but not limited to, 1 nm, 20 nm, 40 nm, 60 nm, 80 nm, 100 nm, 120 nm, 140 nm, 160 nm, 180 nm, 200 nm, 220 nm, 240 nm, 260 nm, 280 nm, 300 nm, 320 nm, 340 nm, 360 nm, 380 nm, 400 nm, 420 nm, 440 nm, 460 nm, 480 nm, 500 nm, or any value in between any two of these values.

[0075] In some embodiments, the first conductive layer 160 is disposed on the semiconductor contact layer 150. In one embodiment of the present disclosure, the doping concentration of the semiconductor contact layer 150 is higher than the doping concentration of the first semiconductor layer 120. In another embodiment of the present disclosure, the semiconductor contact layer 150 comprises Al x Ga y In 1-x-y N, where x+y=1, and the doping concentration of the semiconductor contact layer 150 is greater than 1x10 19 / cm 3 Regarding the doping concentration of the semiconductor contact layer 150, when the doping concentration of the semiconductor contact layer 150 is greater than 1x10 19 / cm 3 The semiconductor contact layer 150 will enter the degenerate state only when the impurity energy levels form a continuous energy band, resulting in a reduction in the equivalent energy gap of the semiconductor contact layer 150, making it easier for carriers to transfer at the interface between the first semiconductor layer 120 and the semiconductor contact layer 150 and between the first conductive layer 160 and the semiconductor contact layer 150 (because the energy gap that the carriers need to cross is reduced), thereby reducing the contact resistance. In another embodiment of the present disclosure, the semiconductor contact layer 150 includes Al x Ga y In 1-x-yN, where x=0, that is, the semiconductor contact layer 150 contains Ga y In 1-y N, at this time, the energy gap of the semiconductor contact layer 150 is lower, which reduces the energy gap that carriers need to cross between the first semiconductor layer 120 and the first conductive layer 160, thereby reducing the contact resistance.

[0076] In some embodiments, the width of the first conductive layer 160 disposed on the semiconductor contact layer 150 is substantially smaller than that of the semiconductor contact layer 150. The material of the first conductive layer 160 includes, but is not limited to, a light-transmitting conductive material including indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), or a material having a light-transmitting conductive effect; or an opaque metal material, for example, chromium (Cr), gold (Au), titanium (Ti), aluminum (Al), vanadium (V), or similar opaque metal materials.

[0077] In some embodiments, the second conductive layer 170 is disposed on the second semiconductor layer 140, and the width of the second conductive layer 170 is substantially smaller than that of the second semiconductor layer 140. In one embodiment, the material of the second conductive layer 170 includes, but is not limited to, a light-transmitting conductive material including indium tin oxide, indium zinc oxide, aluminum zinc oxide, or a material having a light-transmitting conductive effect; or an opaque metal material, for example, the opaque metal material includes gold, titanium, aluminum, nickel (Ni), platinum (Pt), palladium (Pd), or similar opaque metal materials.

[0078] Still see Figure 2 In one embodiment, an insulating layer 180 is disposed on the aforementioned light-emitting diode structure. The insulating layer 180 covers at least the sidewalls of the first thickness structure 122, the upper surface 126 of the second thickness structure 124, the sidewalls of the light-emitting layer 130, the sidewalls of the second semiconductor layer 140, the sidewalls and upper surface of the semiconductor contact layer 150, the sidewalls and upper surface of the first conductive layer 160, and the sidewalls and upper surface 172 of the second conductive layer 170. In other embodiments, the insulating layer 180 may not cover the upper surface of the first conductive layer 160, meaning that the insulating layer 180 only covers the sidewalls of the first conductive layer 160. Furthermore, the insulating layer 180 has a first opening 182 and a second opening 184 located above the first conductive layer 160 and the second conductive layer 170, respectively. In some embodiments of the present disclosure, the insulating layer 180 can be formed by chemical vapor deposition, printing, coating, or other suitable methods, and the first opening 182 and the second opening 184 can be formed by an etching process. In some embodiments, the material used for the insulating layer 180 may include, but is not limited to, silicon oxide, silicon nitride, silicon oxynitride, epoxy resin, or other suitable insulating materials.

[0079] In one embodiment of the present disclosure, when the insulating layer 180 covers the sidewalls and top surface of the first conductive layer 160, the width of the first conductive layer 160 is substantially greater than the width of the first opening 182 in the insulating layer 180. In another embodiment, when the insulating layer 180 only covers the sidewalls of the first conductive layer 160, the width of the first conductive layer 160 is substantially equal to the width of the first opening 182 in the insulating layer 180.

[0080] In one embodiment, a first conductive pad 190a is disposed on the insulating layer 180 and electrically connected to the first conductive layer 160 through the first opening 182. A second conductive pad 190b is disposed on the insulating layer 180 and electrically connected to the second conductive layer 170 through the second opening 184. Specifically, the first conductive pad 190a is disposed on the insulating layer 180 and fills the first opening 182; the second conductive pad 190b is disposed on the insulating layer 180 and fills the second opening 184. In some embodiments, the first conductive pad 190a and the second conductive pad 190b protrude and are exposed above the top surface 186 of the insulating layer 180. The exposed portions can serve as a support for electrical contact. In some embodiments, the materials of the first conductive pad 190a and the second conductive pad 190b include, but are not limited to, aluminum, copper, nickel, gold, platinum, titanium, or other suitable conductive materials.

[0081] See also Figures 3 to 8 , Figures 3 to 8 The following describes the manufacturing process of the light-emitting diode structure according to some embodiments of the present disclosure, illustrating cross-sectional schematic diagrams of various steps in the manufacture of the light-emitting diode structure. To facilitate comparison with the differences from the aforementioned embodiments and simplify the description, the following examples use the same reference numerals to designate the same elements, and the description will primarily focus on the differences between the embodiments, without repetitive descriptions.

[0082] First, if Figure 3As shown, in one embodiment, substrate 110 serves as a growth substrate for epitaxial growth. Subsequently, a first semiconductor layer 120, a light-emitting layer 130, and a second semiconductor layer 140 are sequentially deposited or stacked from bottom to top. In some embodiments, first semiconductor layer 120 is an N-type III-V semiconductor layer, and second semiconductor layer 140 is a P-type III-V semiconductor layer. The formation or deposition methods of the first semiconductor layer 120, light-emitting layer 130, and second semiconductor layer 140 may include, but are not limited to, chemical vapor deposition, physical vapor deposition, plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof. In some embodiments, the sidewalls of substrate 110, first semiconductor layer 120, light-emitting layer 130, and second semiconductor layer 140 are aligned with each other. Here, the materials, materials or components of the substrate 110 , the first semiconductor layer 120 , the light emitting layer 130 and the second semiconductor layer 140 have been described in detail in the previous paragraphs and will not be repeated here.

[0083] Then as Figure 4 In one embodiment, Figure 4 The process includes etching a portion of the second semiconductor layer 140, a portion of the light-emitting layer 130, and a portion of the first semiconductor layer 120, exposing a portion of the first semiconductor layer 120. In this process, a mask or etch-resistant material (not shown) is placed on the upper surface of a portion of the second semiconductor layer 140. Etching is then performed downward until a portion of the first semiconductor layer 120 is also etched. The mask or etch-resistant material is then removed. This results in the formation of a first thickness structure 122 and a second thickness structure 124 of the first semiconductor layer 120. In one embodiment, the first thickness structure 122 has a first thickness T1, and the second thickness structure 124 has a second thickness T2. Furthermore, the portion of the first semiconductor layer 120 exposed after etching constitutes the second thickness structure 124. Therefore, the first thickness T1 is substantially greater than the second thickness T2. This process includes an etching process that can be applied to a large depth. In some embodiments, the etching process includes, but is not limited to, dry etching (e.g., plasma etching), wet etching (e.g., chemical etching), or other suitable processes and / or combinations thereof. In one embodiment, the present disclosure uses plasma etching to expose the upper surface of the second thickness structure 124 of the first semiconductor layer 120 .

[0084] like Figure 5As shown, in some embodiments, a semiconductor contact layer 150 is formed on the second thickness structure 124. In one embodiment, the width of the semiconductor contact layer 150 is substantially smaller than that of the second thickness structure 124, meaning that a portion of the upper surface of the second thickness structure 124 is still exposed after the semiconductor contact layer 150 is formed. In one embodiment, the formation or deposition method of the semiconductor contact layer 150 may include, but is not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof. The materials, materials, or components of the semiconductor contact layer 150 have been described in detail in the previous paragraph and will not be repeated here.

[0085] like Figure 6 As shown, in some embodiments, after forming Figure 5 After the light-emitting diode structure shown, a first conductive layer 160 is formed on the semiconductor contact layer 150, and a second conductive layer 170 is formed on the second semiconductor layer 140. The width of the first conductive layer 160 is substantially smaller than that of the semiconductor contact layer 150, and the width of the second conductive layer 170 is substantially smaller than that of the second semiconductor layer 140. That is, after the first conductive layer 160 and the second conductive layer 170 are formed, portions of the upper surfaces of the semiconductor contact layer 150 and the second semiconductor layer 140 are still exposed. In one embodiment, the method of forming or depositing the first conductive layer 160 includes, but is not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof. Here, the materials, materials, or components of the first conductive layer 160 have been described in detail in the previous paragraph and will not be repeated here. In one embodiment, the second conductive layer 170 is formed or deposited by, but is not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof. The materials, materials, or components of the second conductive layer 170 have been described in detail in the previous paragraphs and will not be repeated here.

[0086] Next, please refer to Figure 7 ,exist Figure 6 An insulating layer 180 is formed on the formed light emitting diode structure, and an etching process or a drilling process is performed to form a first opening 182 and a second opening 184. In order to concisely describe the necessary technology, the step of pre-setting the resist layer is not shown in the figure. Figure 7Specifically, the first opening 182 exposes a portion of the upper surface of the first conductive layer 160, that is, the insulating layer 180 covers the two side walls and another portion of the upper surface of the first conductive layer 160. At the same time, the insulating layer 180 covers the two side walls of the semiconductor contact layer 150 and the portion of the upper surface that is not in contact with the first conductive layer 160. The second opening 184 exposes a portion of the upper surface of the second conductive layer 170, that is, the insulating layer 180 covers the other portion of the upper surface of the second conductive layer 170 and the two side walls of the second conductive layer 170. In one embodiment, the method of forming the insulating layer 180 includes, but is not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating or other suitable processes and / or combinations thereof. In one embodiment, the etching method for forming the first opening 182 and the second opening 184 includes, but is not limited to, wet etching, dry etching, chemical etching, physical etching, selective etching or other suitable processes and / or combinations thereof.

[0087] like Figure 8 As shown, in some embodiments, a first conductive pad 190a is formed in the first opening 182 and on a portion of the upper surface of the insulating layer 180. The first conductive pad 190a is electrically connected to the first conductive layer 160. In some embodiments, a second conductive pad 190b is formed in the second opening 184 and on a portion of the upper surface of the insulating layer 180, and the second conductive pad 190b is electrically connected to the second conductive layer 170. In one embodiment, the first conductive pad 190a and the second conductive pad 190b are formed by, but not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof.

[0088] Based on the above Figures 3 to 8 , thus completing the light-emitting diode structure in some embodiments of the present disclosure. Its characteristic is that a semiconductor contact layer 150 is formed on the second thickness structure 124 of the first semiconductor layer 120. By reducing the energy gap required for carrier transmission between the first semiconductor layer 120 and the first conductive layer 160, the forward operating voltage is reduced, the alloy temperature and device waste heat are lowered, and the output power is increased and device reliability is improved.

[0089] Example 2

[0090] Please refer to Figure 9 , Figure 9 Schematic cross-sectional view of a light emitting diode structure according to some other embodiments of the present disclosure. Figure 9 The features can be referenced at the same time Figure 6 and Figure 7 , and are detailed below.

[0091] In some embodiments, the aforementioned Figure 6 The step of forming the first conductive layer 160 can be performed with Figure 7 The steps for forming the insulating layer 180 and the first and second openings 182 and 184 are reversed. That is, after first forming the second conductive layer 170 on the second semiconductor layer 140, the insulating layer 180 is directly formed on the LED structure, and then etched to form the first and second openings 182 and 184. Specifically, the first opening 182 exposes a portion of the upper surface of the semiconductor contact layer 150. In other words, the insulating layer 180 covers both sidewalls and another portion of the upper surface of the semiconductor contact layer 150.

[0092] As mentioned above, Figure 6 and Figure 7 After the steps are reversed, the first conductive layer 160 is formed or deposited in the first opening 182 on the semiconductor contact layer 150. In one embodiment, the width of the first conductive layer 160 is substantially equal to the width of the first opening 182 ( Figure 9 ), the width of the first conductive layer 160 is smaller than the width of the semiconductor contact layer 150. Therefore, after the first conductive layer 160 is formed, the insulating layer 180 is located on both side walls of the first conductive layer 160, and the entire upper surface of the first conductive layer 160 is exposed in the first opening 182.

[0093] In this embodiment, the subsequent steps are the same as those in Example 1, namely, forming a first conducting pad 190a in the first opening 182, on the first conductive layer 160, and on a portion of the upper surface of the insulating layer 180. The first conducting pad 190a is electrically connected to the first conductive layer 160. Furthermore, a second conducting pad 190b is formed in the second opening 184 and on a portion of the upper surface of the insulating layer 180, and the second conducting pad 190b is electrically connected to the second conductive layer 170.

[0094] It should be noted that for the sake of simplicity, the order of exchange described in this embodiment is as follows: Figure 9 The preceding steps are only described in words and not shown in the figures. However, the aforementioned process sequence should still be included in the scope of the rights described in this disclosure. Moreover, the process types for forming or manufacturing the aforementioned components are the same as those in Example 1, so they will not be repeated here.

[0095] Example 3

[0096] For other embodiments of the present disclosure, please refer to Figure 10 , Figure 10 FIG2 is a cross-sectional view of a light emitting diode structure according to another embodiment of the present disclosure. Figure 10 In the light emitting diode structure shown, compared with Figure 2The main difference lies in the semiconductor contact layer 150'. In one embodiment, the semiconductor contact layer 150' includes multiple sub-contact layers 151, 152, 153, and 154. Note that the four sub-contact layers 151, 152, 153, and 154 are merely exemplary and should not be construed as limiting the present disclosure. A greater or lesser number of sub-contact layers is also within the scope of the present disclosure.

[0097] In some embodiments, the doping concentration of each sub-contact layer 151, 152, 153, and 154 may be different, and each sub-contact layer 151, 152, 153, and 154 may be stacked in order from top to bottom according to the level of doping concentration. That is, the doping concentration of each sub-contact layer 151, 152, 153, and 154 decreases gradually from the position close to the first conductive layer 160 toward the second thickness structure 124 of the first semiconductor layer 120. Specifically, in one embodiment of the present disclosure, the silicon doping concentration of the sub-contact layer 151 is about 2x10 19 / cm 3 The silicon doping concentration of the sub-contact layer 152 is about 4x10 19 / cm 3 The silicon doping concentration of the sub-contact layer 153 is about 6x10 19 / cm 3 , and the silicon doping concentration of the sub-contact layer 154 is about 8x10 19 / cm 3 .

[0098] In other embodiments, all sub-contact layers 151, 152, 153, and 154 have two or more doping concentrations and are stacked alternately from top to bottom according to the doping concentrations. That is, each sub-contact layer 151, 152, 153, and 154 can be stacked alternately from top to bottom according to the two or more doping concentrations. Specifically, in one embodiment of the present disclosure, the silicon doping concentration of the sub-contact layer 151 is about 4x10 19 / cm 3 The silicon doping concentration of the sub-contact layer 152 is about 8x10 19 / cm 3 The silicon doping concentration of the sub-contact layer 153 is about 4x10 19 / cm 3 , and the silicon doping concentration of the sub-contact layer 154 is about 8x10 19 / cm 3 It can be seen from this that the stacking method of each sub-contact layer 151, 152, 153 and 154 can be stacked alternately from top to bottom according to two or more doping concentrations.

[0099] In some other embodiments, each of the sub-contact layers 151, 152, 153, and 154 includes Alx Ga y In 1-x-y N, where 0 ≤ x, y ≤ 1. And when x + y = 1 for each of the sub-contact layers 151, 152, 153, and 154, the doping concentration of the sub-contact layer 154 adjacent to the first conductive layer 160 is greater than that of the other sub-contact layers 151, 152, and 153. Specifically, in one embodiment of the present disclosure, each of the sub-contact layers 151, 152, 153, and 154 is Al x Ga y In 1-x-y N, and when 0 ≤ x, y ≤ 1 and x + y = 1, each of the sub-contact layers 151, 152, 153, and 154 does not contain indium (In). For example, the sub-contact layer 151 is Al 0.3 Ga 0.7 N, the sub-contact layer 152 is Al 0.2 Ga 0.8 N, the sub-contact layer 153 is Al 0.1 Ga 0.9 N, and the sub-contact layer 154 is GaN. At this time, the silicon doping concentration of the sub-contact layer 151 is about 2 x 10 19 / cm 3 The silicon doping concentration of the sub-contact layer 152 is about 2.5 x 10 19 / cm 3 The silicon doping concentration of the sub-contact layer 153 is about 3.8 x 10 19 / cm 3 And the silicon doping concentration of the sub-contact layer 154 is about 6 x 10 19 / cm 3 .

[0100] In some further embodiments, each of these sub-contact layers 151, 152, 153, and 154 includes Al x Ga y In 1-x-y N, where 0 ≤ x, y ≤ 1. Among them, the sub-contact layer 154 adjacent to the first conductive layer 160 is Ga y In 1-y N, where 0 < y < 1. That is, the sub-contact layers 151, 152, and 153 may contain indium (In) or not, and the sub-contact layer 154 adjacent to the first conductive layer 160 does not contain aluminum and must contain indium. The contact resistance with the first conductive layer 160 can be effectively reduced through the indium gallium nitride with a narrow surface energy gap, and at the same time, the lattice mismatch between the indium gallium nitride and the underlying first semiconductor layer 120 can be buffered through the other graded aluminum indium gallium nitride. Specifically, in one embodiment of the present disclosure, the sub-contact layer 151 is Al 0.3 Ga 0.7 N, the sub-contact layer 152 is Al 0.2 Ga0.7 In 0.1 N, the sub-contact layer 153 is Al 0.1 Ga 0.8 In 0.1 N, and the sub-contact layer 154 is Ga 0.9 In 0.1 N. That is, the sub-contact layers 151, 152, and 153 include Al x Ga y In 1-x-y N, where 0 ≤ x, y ≤ 1. Also, the sub-contact layer 154 adjacent to the first conductive layer 160 is Ga y In 1-y N, where 0 < y < 1. In short, the sub-contact layers 151, 152, and 153 may contain indium (In) or not, and the sub-contact layer 154 adjacent to the first conductive layer 160 does not contain aluminum and must contain indium.

[0101] In some other embodiments, each of the sub-contact layers 151, 152, 153, and 154 may be stacked in sequence according to the energy gap or at least two energy gaps may be stacked alternately. All of the sub-contact layers 151, 152, 153, and 154 have more than two energy gaps and are stacked alternately from top to bottom according to the energy gaps. That is, each of the sub-contact layers 151, 152, 153, and 154 may be stacked alternately from top to bottom according to more than two energy gaps. Specifically, in one embodiment of the present disclosure, the energy gap of the sub-contact layer 151 is about 2.4 eV, the energy gap of the sub-contact layer 152 is about 2.1 eV, the energy gap of the sub-contact layer 153 is about 2.0 eV, and the energy gap of the sub-contact layer 154 is about 1.5 eV. Each of the sub-contact layers 151, 152, 153, and 154 may be stacked in sequence according to the energy gap. In another embodiment of the present disclosure, the energy gap of the sub-contact layer 151 is about 2.0 eV, the energy gap of the sub-contact layer 152 is about 1.5 eV, the energy gap of the sub-contact layer 153 is about 2.0 eV, and the energy gap of the sub-contact layer 154 is about 1.5 eV. Each of the sub-contact layers 151, 152, 153, and 154 may be stacked alternately from top to bottom according to more than two energy gaps.

[0102] Embodiment 4

[0103] Please first refer to Figure 11 and Figure 12 , Figure 11 which is a top view of a light-emitting diode structure according to some embodiments of the present disclosure. Figure 12 is a schematic cross-sectional view of the cross-section BB' shown in Figure 11 . Figure 11 and Figure 12 are related to the aforementioned Figure 1 and Figure 2Same LED structure, however Figure 12 Therefore Figure 11 The middle section line BB' is used as a viewing angle reference. Figure 12 It can be seen that in some embodiments, the semiconductor contact layer 150 located on the second thickness structure 124 of the first semiconductor layer 120 has a continuous and integrally formed structure. However, the semiconductor contact layer 150 described in the present disclosure may also have a discontinuous or non-integrally formed structure, the characteristics and structure of which are described in detail below.

[0104] In some other embodiments, please also refer to Figure 13 and Figure 14 , Figure 13 In order to illustrate the top view of the light emitting diode structure according to some other embodiments of the present disclosure, it should be noted that the first semiconductor layer 120, the light emitting layer 130 and the second semiconductor layer 140 are not shown. Figure 13 middle. Figure 14 To illustrate the basis Figure 13 In some other embodiments of the present disclosure, as shown in FIG. Figure 13 As shown, the semiconductor contact layer 150 includes a plurality of independent contact layers 155 and an insulating portion 156, with any two adjacent independent contact layers 155 separated by the insulating portion 156. Specifically, the independent contact layers 155 and the insulating portion 156 are arranged alternately. Furthermore, each independent contact layer 155 is electrically connected to the first semiconductor layer 120 and the first conductive layer 160. Furthermore, in one embodiment, the insulating portion 156 is connected to the subsequently formed insulating layer 180 and covers the light-emitting diode structure. In one embodiment, after forming the semiconductor contact layer 150, the independent contact layers 155 are formed by etching methods including, but not limited to, wet etching, dry etching, chemical etching, physical etching, selective etching, or other suitable processes and / or combinations thereof. In one embodiment, the insulating portion 156 is formed between each independent contact layer 155 by deposition methods including, but not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof. In one embodiment, the insulating portion 156 may be made of, but not limited to, silicon oxide, silicon nitride, silicon oxynitride, epoxy resin, or other suitable insulating materials. In one embodiment, the insulating portion 156 may be formed in, but not limited to, a dot, a block, a sphere, or other suitable shapes.

[0105] As described above, when the semiconductor contact layer 150 is processed to form a plurality of independent contact layers 155, the overall area of the semiconductor contact layer 150 is reduced, thereby reducing the probability of light absorption by the semiconductor contact layer 150. Furthermore, because the insulating portion 156 is filled between each independent contact layer 155, the current is dispersed, further reducing the forward operating voltage.

[0106] Example 5

[0107] Please also refer to Figure 4 、 Figure 15 and Figure 16 , Figure 15 FIG2 is a top view illustrating a light emitting diode structure according to some further embodiments of the present disclosure. Figure 16 To illustrate the basis Figure 15 The cross-sectional diagram of the middle section line DD' should be noted for easy reference. Figure 16 The insulating layer 180 and the conductive pad 190 are not shown in FIG. Figure 15 In some further embodiments of the present disclosure, Figure 4 In the etching step, the etched portion can be adjusted to form a Figure 15 The light emitting diode structure shown. Specifically, Figure 15 In the embodiment, the portion where the semiconductor contact layer 150 is provided is the etched portion, and is different from the Figure 4 Etching is performed only on one end of the light emitting diode structure. Further, through the section line DD', the light emitting diode structure after the etching is adjusted is as follows Figure 16 The semiconductor contact layer 150 is located at the second thickness structure 124 , and both sides away from the semiconductor contact layer 150 may have a layered structure consisting of the first thickness structure 122 of the first semiconductor layer 120 , the light emitting layer 130 and the second semiconductor layer 140 .

[0108] As described above, in this embodiment, three layered structures are formed, including the first thickness structure 122 of the first semiconductor layer 120, the light-emitting layer 130, and the second semiconductor layer 140. However, it should be noted that the configurations shown here are merely exemplary, and more or fewer layered structures or semiconductor contact layers 150 are also within the scope of this disclosure.

[0109] Example 6

[0110] Please also refer to Figure 17 as well as Figure 18 , Figure 17 In order to illustrate the top view of the light emitting diode structure according to some other embodiments of the present disclosure, it should be noted that the first semiconductor layer 120 is not shown in FIG. Figure 15 middle. Figure 18 To illustrate the basis Figure 17 Schematic diagram of the cross section along the middle section line EE'. Figure 13 and Figure 14In this embodiment, the semiconductor contact layer 150 includes a plurality of independent contact layers 155 and an insulating portion 156, and any two adjacent independent contact layers 155 are separated from each other by the insulating portion 156. In addition, in one embodiment, the insulating portion 156 is connected to the insulating layer 180 formed subsequently and covers the light-emitting diode structure. Moreover, each independent contact layer 155 is electrically connected to the first semiconductor layer 120 and the first conductive layer 160. In one embodiment, the etching and formation methods of the independent contact layers 155 and the insulating portion 156 described in this embodiment are the same as those in the aforementioned embodiment 4, and therefore will not be repeated here. Furthermore, the material of the insulating portion 156 is also the same as that in embodiment 4.

[0111] As described above, when the semiconductor contact layer 150 is processed to form a plurality of independent contact layers 155, the overall area of the semiconductor contact layer 150 is reduced, thereby reducing the probability of light absorption by the semiconductor contact layer 150. Furthermore, because the insulating portion 156 is filled between each independent contact layer 155, the current is dispersed, further reducing the forward operating voltage.

[0112] Example 7

[0113] Please also refer to Figure 19 as well as Figure 20 , Figure 19 FIG2 is a top view illustrating a light emitting diode structure according to some further embodiments of the present disclosure. Figure 20 To illustrate the basis Figure 19 The cross-sectional diagram along the middle section line FF' should be noted for ease of reference. Figure 20 The conductive connection layer CL, the insulating layer 180 and the conductive pad 190a are not shown in FIG. Figure 19 In. Figure 19 As shown, in the case of a top view, it can be seen that the light emitting diode structure of the present disclosure includes a plurality of semiconductor contact layers 150 and a plurality of first conductive layers 160 located on the plurality of semiconductor contact layers 150. Next, with reference to the cross section line FF' Figure 20 Since each semiconductor contact layer 150 is electrically isolated from each other, a conductive connection layer CL is provided to electrically connect each semiconductor contact layer 150 to each other and further electrically connect each semiconductor contact layer 150 to the first conductive pad 190a. In one embodiment, after forming the Figure 3After the light-emitting diode structure is shown, a plurality of holes are formed by drilling or etching. The aforementioned plurality of holes may be formed by, but not limited to, wet etching, dry etching, chemical etching, physical etching, selective etching, or other suitable processes and / or combinations thereof. Next, each semiconductor contact layer 150 and the first conductive layer 160 are formed in the holes by, but not limited to, chemical vapor deposition, physical vapor deposition, plasma-assisted chemical vapor deposition, atomic layer deposition, electroplating, or other suitable processes and / or combinations thereof. In one embodiment, the material of the conductive connection layer CL includes, but is not limited to, a light-transmitting conductive material including indium tin oxide, indium zinc oxide, aluminum zinc oxide, or a material having a light-transmitting conductive effect; or an opaque metal material, for example, chromium, gold, titanium, aluminum, vanadium, or similar opaque metal materials.

[0114] As described above, the overall area of each semiconductor contact layer 150 is reduced, thereby reducing the probability of light absorption by the semiconductor contact layer 150 and further reducing the forward operating voltage. It should be noted that the aspects depicted here are merely exemplary, and more or fewer semiconductor contact layers 150 are intended to be within the scope of this disclosure.

[0115] Example 8

[0116] See also Figure 21 , Figure 21 Schematic cross-sectional views of light-emitting diode structures according to some further embodiments of the present disclosure are shown. In this embodiment, the light-emitting diode structure includes a substrate 110, a first conductive layer 160, an insulating layer 180, a second conductive layer 170, a second semiconductor layer 140, a light-emitting layer 130, a semiconductor contact layer 150, and a first semiconductor layer 120. In one embodiment, as Figure 21As shown, a second conductive layer 170 is disposed on a substrate 110. A second semiconductor layer 140 is disposed on the second conductive layer 170. A light-emitting layer 130 is disposed on the second semiconductor layer 140. A first semiconductor layer 120 is disposed on the light-emitting layer 130. The doping type of the first semiconductor layer 120 is different from the doping type of the second semiconductor layer 140. A first conductive layer 160 is disposed between the substrate 110 and the second conductive layer 170. The first conductive layer 160 includes a base portion 160a and a protrusion 160b. The protrusion 160b penetrates the second conductive layer 170, the second semiconductor layer 140, and the light-emitting layer 130 to electrically connect to the first semiconductor layer 120. An insulating layer 180 is disposed between the first conductive layer 160 and the second conductive layer 170. A semiconductor contact layer 150 is disposed between the protrusion 160b of the first conductive layer 160 and the first semiconductor layer 120. The doping type of the semiconductor contact layer 150 is the same as the doping type of the first semiconductor layer 120. The protrusion 160b of the first conductive layer 160 and the semiconductor contact layer 150 are electrically isolated from the second conductive layer 170, the second semiconductor layer 140, and the light-emitting layer 130 by the extension 180b of the insulating layer 180. It should be noted that the materials and formation methods of the light-emitting diode structure and its components described in this embodiment have been described in the aforementioned embodiments and will not be repeated here.

[0117] Example 9

[0118] Regarding the semiconductor contact layer 150 formed in the aforementioned embodiments 1 to 8, which may have a plurality of through holes 157, it should be noted that for the sake of simplicity, the through holes 157 are not shown in FIG. Figures 1 to 21 Regarding the plurality of through holes 157, please refer to Figure 22 , Figure 22 FIG2 is a schematic diagram illustrating a semiconductor contact layer 150 in a light emitting diode structure according to some further embodiments of the present disclosure. Figure 22It can be seen that after magnifying the semiconductor contact layer 150 and the first conductive layer 160 in the light-emitting diode structure, the semiconductor contact layer 150 has a plurality of through-holes 157. Regarding the through-holes 157, when the semiconductor contact layer 150 is formed through a secondary growth process and the thickness of the formed semiconductor contact layer 150 is relatively thin, the semiconductor contact layer 150 will be in an incomplete film. In other words, the semiconductor contact layer 150 will have a plurality of randomly distributed through-holes 157. Then, when the first conductive layer 160 is formed on the semiconductor contact layer 150 in a subsequent process, portions of the first conductive layer 160 will fill these through-holes 157. Furthermore, the contact area between the semiconductor contact layer 150 and the first conductive layer 160 is increased, which can effectively reduce the contact resistance. In one embodiment of the present disclosure, the thickness of the semiconductor contact layer 150 formed through the secondary growth process is between approximately 400 nm and approximately 50 nm.

[0119] In summary, the present disclosure forms an ohmic contact with the N-type electrode by growing a thin semiconductor contact layer (also known as an ohmic contact layer) on the surface of the N-type semiconductor not covered by the light-emitting layer. This reduces forward operating voltage, alloy temperature, and device waste heat, while increasing output power and improving device reliability, all without compromising the quality of the light-emitting layer epitaxial crystal.

[0120] The foregoing disclosure summarizes the features of several embodiments so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art will understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures to achieve the same purpose and / or achieve the same benefits as the embodiments introduced in the present disclosure. Those skilled in the art should also understand that although the present disclosure has been disclosed above in a variety of embodiments, it is not intended to limit the present disclosure. Anyone familiar with this art can make various changes and modifications without departing from the spirit and scope of the present disclosure. Therefore, the scope of protection of the present disclosure shall be subject to the scope defined by the appended claims.

Claims

1. A light emitting diode structure, characterized in that: include: substrate; A first semiconductor layer is disposed on the substrate; a light-emitting layer disposed on the first semiconductor layer; A second semiconductor layer is disposed on the light emitting layer, wherein the doping type of the second semiconductor layer is different from the doping type of the first semiconductor layer; A semiconductor contact layer is disposed on the first semiconductor layer and includes Al x Ga y In 1-x-y N, where x+y=1, and the doping concentration of the semiconductor contact layer is greater than 1x10 19 / cm 3 ; A first conductive layer is disposed on the semiconductor contact layer; a second conductive layer disposed on the second semiconductor layer; A first conductive pad is disposed on the first conductive layer; as well as The second conducting pad is disposed on the second conducting layer.

2. The light emitting diode structure according to claim 1, wherein: The width of the first conductive layer is substantially smaller than the width of the semiconductor contact layer.

3. The light emitting diode structure according to claim 1, wherein: The invention also includes an insulating layer, which is arranged on the first conductive layer and the second conductive layer.

4. The light emitting diode structure according to claim 3, characterized in that: The insulating layer includes a first opening, and the first opening does not overlap or contact the semiconductor contact layer in a vertical direction.

5. The light emitting diode structure according to claim 1, wherein: A thickness of the semiconductor contact layer is between 1 nm and 500 nm.

6. The light emitting diode structure according to claim 1, characterized in that: The doping concentration of the semiconductor contact layer is higher than the doping concentration of the first semiconductor layer.

7. The light emitting diode structure according to claim 1, characterized in that: The semiconductor contact layer includes a plurality of sub-contact layers, and each of the sub-contact layers is stacked in sequence according to the doping concentration.

8. The light emitting diode structure according to claim 7, characterized in that: Each of the sub-contact layers comprises Al x Ga y In 1-x- y N, 0≤x, y≤1.

9. The light emitting diode structure according to claim 7 or 8, characterized in that: The doping concentration of each sub-contact layer decreases gradually from a position close to the first conductive layer toward the first semiconductor layer.

10. The light emitting diode structure according to claim 1, wherein: The semiconductor contact layer comprises a plurality of sub-contact layers, and each of the sub-contact layers is arranged in a manner of alternately stacking two or more doping concentrations.

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