Power conversion device

Abstract

This power conversion device is provided with: inductors (Lc1, Lc2), one end of which is connected to power supply terminals (P, N); a converter circuit (20) provided with a switch (Q1) and a resonance circuit (30) connected between input terminals (3, 4) connected to the other ends of the inductors (Lc1, Lc2) and the input terminals (3, 4); an X capacitor (Cx) connected between the input terminals (3, 4); and Y capacitors (Cy1, Cy2) connected between the input terminals (3, 4) and a ground line (E). A combined capacitance of the X capacitor (Cx) and the Y capacitors (Cy1, Cy2) constitutes part of the converter circuit (20). The inductors (Lc1, Lc2) and the Y capacitors (Cy1, Cy2) form a filter loop.

Description

Technical Field

[0001] The present invention relates to a power conversion device. Background Art

[0002] Conventionally, power conversion devices that utilize LC resonance between switching elements and an LC resonant circuit for power conversion are known. In the conventional power conversion device described in Patent Document 1, for example, low-frequency AC power with an effective voltage of 200V and a frequency of 50Hz is converted into high-frequency AC power, which is then boosted using a Class E inverter circuit that utilizes LC resonance between switching elements and an LC resonant circuit. This power conversion device is a so-called Class E² power conversion device that rectifies the high-frequency AC power into DC power using a Class E rectifier circuit.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2021-145433

[0006] Problems to be solved by the invention

[0007] In Patent Document 1, the switching elements are operated at a high frequency to improve power conversion efficiency by operating them at the resonant frequency of the resonant circuit. Furthermore, due to voltage resonance in the resonant circuit, the voltage across the switching elements increases relative to the input voltage. Consequently, the switching elements generate high-voltage electromagnetic noise at high frequencies. To remove this high-frequency, high-voltage electromagnetic noise, a multi-stage noise filter is required, which increases the circuit size and costs. Summary of the Invention

[0008] An object of the present invention is to provide a power conversion device that can achieve low loss by zero-voltage switching of a converter circuit and reduce the number of stages of noise filters by utilizing the noise suppression effect, thereby achieving miniaturization and cost reduction.

[0009] A power conversion device according to one embodiment of the present invention includes: a first inductor having one end connected to a first power terminal; a second inductor having one end connected to a second power terminal; a converter circuit having a first input terminal connected to the other end of the first inductor, a second input terminal connected to the other end of the second inductor, a switch connected between the first and second input terminals, and a resonant circuit; an X capacitor connected between the first and second input terminals; a first Y capacitor connected between the first input terminal and a grounding line; and a second Y capacitor connected between the second input terminal and the grounding line. The combined capacitance of the X capacitor, the first Y capacitor, and the second Y capacitor constitutes part of the converter circuit. The first inductor and the first Y capacitor constitute a first filter circuit, and the second inductor and the second Y capacitor constitute a second filter circuit.

[0010] Effects of the Invention

[0011] According to one aspect of the present invention, a power conversion device can be provided that can achieve low loss by zero-voltage switching of a converter circuit and can reduce the number of stages of noise filters due to the noise suppression effect, thereby achieving size reduction and cost reduction. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a circuit diagram showing the configuration of the power conversion device according to the first embodiment.

[0013] Figure 2 This is a graph showing the voltage across both ends of a switch and the drain current in the power conversion device according to the first embodiment.

[0014] Figure 3 This is a graph showing the amplitude of the noise voltage at the switching frequency and its higher harmonic frequency in the power conversion device according to the first embodiment, as well as the filter performance of the filter circuit composed of the first inductor, the first X capacitor, the second inductor, and the second X capacitor.

[0015] Figure 4 This is a graph comparing the noise terminal voltage of the power conversion device according to the first embodiment and that of a conventional power conversion device.

[0016] Figure 5 This is a circuit diagram showing the configuration of a power conversion device according to the second embodiment.

[0017] Figure 6 This is a circuit diagram showing the configuration of a power conversion device according to a third embodiment.

[0018] Figure 7 This is a circuit diagram showing the configuration of a power conversion device according to a fourth embodiment.

[0019] Figure 8 This is a circuit diagram showing the configuration of a power conversion device according to a fifth embodiment.

[0020] Figure 9 This is a circuit diagram showing the configuration of a power conversion device according to the sixth embodiment.

[0021] Figure 10 This is a circuit diagram showing the configuration of a power conversion device according to the seventh embodiment. DETAILED DESCRIPTION

[0022] Hereinafter, several embodiments of the power conversion device of the present invention will be described in detail with reference to the accompanying drawings. In the drawings of the power conversion device of each embodiment, the same or corresponding parts are denoted by the same reference numerals, and their description will be omitted.

[0023] (First embodiment)

[0024] use Figures 1 to 4 A first embodiment will be described. Figure 1 This is a circuit diagram showing the configuration of a power conversion device 10 according to the first embodiment. The power conversion device 10 includes a first power supply terminal P and a second power supply terminal N, first and second inductors Lc1 and Lc2, an X capacitor Cx, first and second Y capacitors Cy1 and Cy2, and a converter circuit 20. The first and second power supply terminals P and N are connected to, for example, a DC power supply (not shown). One end of the first inductor Lc1 is connected to the first power supply terminal P. One end of the second inductor Lc2 is connected to the second power supply terminal N.

[0025] The converter circuit 20 includes a first input terminal 3, a second input terminal 4, a switch Q1, a resonant circuit 30, a first output terminal 5, and a second output terminal 6. The other end of the first inductor Lc1 is connected to the first input terminal 3. The other end of the second inductor Lc2 is connected to the second input terminal 4. The switch Q1 is connected between the first input terminal 3 and the second input terminal 4. The switch Q1 is formed of a semiconductor switching element such as an N-channel MOSFET. The resonant circuit 30 is connected between one end of the switch Q1 and the first output terminal 5. The resonant circuit 30 is a series resonant circuit composed of a resonant inductor Lr and a resonant capacitor Cr connected in series. The second output terminal 6 is connected to the other end of the switch Q1. The load 2 is connected between the first output terminal 5 and the second output terminal 6.

[0026] The X-capacitor Cx is connected between the first input terminal 3 and the second input terminal 4. The X-capacitor Cx is used to reduce normal-mode (differential-mode) noise. The first Y-capacitor Cy1 is connected between the first input terminal 3 and the ground line E. The second Y-capacitor Cy2 is connected between the second input terminal 4 and the ground line E. The first and second Y-capacitors Cy1 and Cy2 are used to bypass common-mode noise to the ground line E. The first inductor Lc1, the second inductor Lc2, the X-capacitor Cx, the first and second Y-capacitors Cy1 and Cy2 are each formed by separate components. However, this is not limiting. For example, the first and second Y-capacitors Cy1 and Cy2 may also be formed by parasitic capacitance of the switch Q1.

[0027] In addition, the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 functions as a parallel capacitor in a portion of the converter circuit 20. The converter circuit 20, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 form an E-class inverter circuit. Furthermore, the switch Q1 is turned on and off at a switching frequency fs corresponding to the resonant frequency of the resonant circuit 30. The switching frequency fs is typically a high frequency of several tens of kHz to several MHz. The power from the DC power supply input to the power supply terminals P and N is converted into high-frequency power at the switching frequency fs and output to the output terminals 5 and 6. At this time, as shown in FIG. Figure 2 As shown, in the converter circuit 20 , when the voltage Vds across the switch Q1 is zero, the switch Q1 is turned on, and zero voltage switching can be achieved in which the drain current Id flows through the switch Q1 .

[0028] Furthermore, the first and second inductors Lc1 and Lc2, which function as common-mode choke coils, and the first and second Y-capacitors Cy1 and Cy2, which bypass common-mode noise to ground line E, function as a filter circuit. More specifically, the first inductor Lc1 and first Y-capacitor Cy1 form a first filter circuit, while the second inductor Lc2 and second Y-capacitor Cy2 form a second filter circuit. If the inductance of the first and second inductors Lc1 and Lc2 is L, and the capacitance of the first and second Y-capacitors Cy1 and Cy2 is C, the cutoff frequencies fc of the first and second filter circuits are expressed as (Equation 1).

[0029]

[0030] Moreover, for example, Figure 3As shown, the inductance L and capacitance C are set so that the cutoff frequency fc of the first and second filter circuits is lower than the switching frequency fs. With this configuration, the power converter 10 can suppress the noise voltage of components of the switching frequency fs and its higher harmonic frequencies 2fs, 3fs, etc. Not limited to this, the inductance L and capacitance C can also be set so that the cutoff frequency fc of the first and second filter circuits is lower than predetermined harmonics of the higher harmonic frequencies 2fs, 3fs, etc. In this case, the noise voltage of components higher than the predetermined harmonics of the higher harmonic frequencies 2fs, 3fs, etc. can be suppressed. Since the first inductor Lc1, the second inductor Lc2, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 are each formed from separate components, the cutoff frequency fc can be easily adjusted. Furthermore, if the first and second Y capacitors Cy1 and Cy2 are formed from the parasitic capacitance of the switch Q1, cost reduction can be achieved by eliminating separate components.

[0031] Figure 4 The simulation result (solid line) of the noise terminal voltage when a LISN (Line Impedance Stabilization Network) is connected to the first power terminal P and the second power terminal N of the power conversion device 10 is shown. Figure 3 As shown, the power conversion device 10 is set so that the cutoff frequency fc is lower than the switching frequency fs. Figure 4 The LISN is connected to the Figure 1 The simulation results (dashed line) of the noise terminal voltage for a conventional power converter are shown. Thus, by setting the cutoff frequency fc lower than the switching frequency fs, the power converter 10 of the first embodiment can achieve a 14 dB noise suppression effect compared to the conventional power converter.

[0032] Thus, the power conversion device 10 of the first embodiment can achieve low loss based on zero-voltage switching of the converter circuit 20 , and can reduce the number of stages of noise filters, thereby achieving device miniaturization and cost reduction.

[0033] (Second embodiment)

[0034] use Figure 5 A second embodiment will be described. Figure 5This is a circuit diagram showing the configuration of a power converter 11 according to the second embodiment. The power converter 11 differs from the power converter 10 according to the first embodiment in that a rectifier circuit 40 is provided in the subsequent stage (latter stage) of the converter circuit 20, and a load 2 is connected to the subsequent stage of the rectifier circuit 40. The remaining configuration of the power converter 11 is the same as that of the power converter 10 according to the first embodiment. Therefore, descriptions of the power converter 11 other than the rectifier circuit 40 will be omitted.

[0035] The rectifier circuit 40 is used to rectify the high-frequency current of the converter circuit 20 and is connected to the first output terminal 5 and the second output terminal 6 of the converter circuit 20. The rectifier circuit 40 includes a diode D1, a rectifier-side parallel capacitor C1, an output choke inductor L1, an output capacitor C2, a third output terminal 7, and a fourth output terminal 8. The diode D1 is connected between the first output terminal 5 and the second output terminal 6. The rectifier-side parallel capacitor C1 is connected in parallel with the diode D1. One end of the output choke inductor L1 is connected to one end of the rectifier-side parallel capacitor C1. The output capacitor C2 is connected between the other end of the output choke inductor L1 and the other end of the rectifier-side parallel capacitor C1. The third output terminal 7 is connected to one end of the output capacitor C2. The fourth output terminal 8 is connected to the other end of the output capacitor C2. The load 2 is connected between the third output terminal 7 and the fourth output terminal 8. The rectifier circuit 40 is configured as a so-called class E rectifier.

[0036] The cutoff frequencies fc of the first filter circuit formed by the first inductor Lc1 and the first Y-capacitor Cy1, and the second filter circuit formed by the second inductor Lc2 and the second Y-capacitor Cy2, are set to be the same as those in the first embodiment. The power converter 11 of the second embodiment also has the same noise voltage suppression effect as the power converter 10 of the first embodiment.

[0037] The power converter 11 of the second embodiment, like the power converter 10 of the first embodiment, can also achieve low losses due to zero-voltage switching of the converter circuit 20 and can reduce the number of noise filter stages, thereby achieving device miniaturization and cost reduction.

[0038] In addition, the same effect can be obtained by using another rectification circuit such as a so-called class D rectification circuit composed of four diodes connected in a bridge form instead of the rectification circuit 40 .

[0039] (Third embodiment)

[0040] use Figure 6 A third embodiment will be described. Figure 6This is a circuit diagram showing the structure of the power conversion device 12 of the third embodiment. The power conversion device 12 is different from the power conversion device 10 of the first embodiment in that Figure 6 The converter circuit 21 shown replaces Figure 1 The converter circuit 20 is shown. Furthermore, a low-frequency commercial AC power source (not shown), such as 50 Hz, is connected to the first power supply terminal P and the second power supply terminal N of the power conversion device 12. The remaining configuration of the power conversion device 12 is the same as that of the power conversion device 10 of the first embodiment, and therefore a detailed description thereof will be omitted.

[0041] Figure 6 The illustrated converter circuit 21 includes a first input terminal 3, a second input terminal 4, a switch group 33 comprising a first switch Q1 and a second switch Q2 connected in series, a resonant circuit 30, a first output terminal 5, and a second output terminal 6. The switch group 33 comprising the first switch Q1 and the second switch Q2 connected in series is connected between the first input terminal 3 and the second input terminal 4. The first switch Q1 and the second switch Q2 are formed of semiconductor switching elements such as N-channel MOSFETs. The switch group 33 may also have a structure comprising three or more switches connected in series. The resonant circuit 30 is connected between one end of the switch group 33 and the first output terminal 5. The resonant circuit 30 is a series resonant circuit comprising a resonant inductor Lr and a resonant capacitor Cr connected in series. The second output terminal 6 is connected to the other end of the switch group 33. The load 2 is connected between the first output terminal 5 and the second output terminal 6.

[0042] The combined capacitance of the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 functions as a parallel capacitor in the converter circuit 21. The converter circuit 21, the X capacitor Cx, the first Y capacitor Cy1, and the second Y capacitor Cy2 form a class E power factor improvement circuit.

[0043] Depending on the polarity of the AC voltage input to the first input terminal 3 and the second input terminal 4, one of the first switch Q1 and the second switch Q2 is switched on / off at a switching frequency fs corresponding to the resonant frequency of the resonant circuit 30. Furthermore, the other of the first switch Q1 and the second switch Q2 is turned on. At this time, the switch of the converter circuit 21 is switched on. Figure 2 As shown, this is a zero voltage switch. Furthermore, when the polarity of the AC voltage is switched, the operation of the first switch Q1 and the second switch Q2 also switches. This structure allows the circuit to function as a power factor correction circuit in the power converter 12.

[0044] The cutoff frequencies fc of the first filter circuit formed by the first inductor Lc1 and the first Y-capacitor Cy1, and the second filter circuit formed by the second inductor Lc2 and the second Y-capacitor Cy2, are set to be the same as those in the first embodiment. The third embodiment differs from the first embodiment in that an AC power source is connected to the first power terminal P and the second power terminal N, and a switch group 33 is used in which a first switch Q1 and a second switch Q2 are connected in series. However, the effect of suppressing noise voltage is the same as that of the first embodiment.

[0045] The power converter 12 of the third embodiment, like the power converter 10 of the first embodiment, can also achieve low losses due to zero-voltage switching of the converter circuit 21 and can reduce the number of noise filter stages, thereby achieving device miniaturization and cost reduction.

[0046] (Fourth embodiment)

[0047] use Figure 7 A fourth embodiment will be described. Figure 7 This is a circuit diagram showing the configuration of a power conversion device 13 according to a fourth embodiment. The power conversion device 13 differs from the power conversion device 12 according to the third embodiment in that a rectifier circuit 40 similar to that of the second embodiment is disposed downstream of the converter circuit 21, and a load 2 is connected downstream of the rectifier circuit 40.

[0048] The cutoff frequencies fc of the first filter circuit formed by the first inductor Lc1 and the first Y-capacitor Cy1, and the second filter circuit formed by the second inductor Lc2 and the second Y-capacitor Cy2, are set to be the same as those in the first embodiment. The power converter 13 of the fourth embodiment also has the same noise voltage suppression effect as the power converter 10 of the first embodiment.

[0049] The power converter 13 of the fourth embodiment can also achieve low loss based on zero voltage switching of the converter circuit 21 , and similarly to the power converter 10 of the first embodiment, can reduce the number of noise filter stages, thereby achieving device miniaturization and cost reduction.

[0050] In addition, the same effect can be obtained by using another rectification circuit such as a so-called class D rectification circuit composed of four diodes connected in a bridge form instead of the rectification circuit 40 .

[0051] (Fifth embodiment)

[0052] use Figure 8 A fifth embodiment will be described. Figure 81 is a circuit diagram showing the structure of the power conversion device 14 of the fifth embodiment. The power conversion device 14 is different from the power conversion device 10 of the first embodiment in that Figure 8 The converter circuit 22 shown replaces Figure 1 The converter circuit 20 is shown. The other structures of the power conversion device 14 are the same as those of the power conversion device 10 of the first embodiment, and therefore detailed description thereof will be omitted.

[0053] Figure 8 The converter circuit 22 shown includes a first input terminal 3 , a second input terminal 4 , a switch Q1 , a first series circuit 31 of a resonant inductor Lr and a first diode D2 , a first output terminal 5 , and a second output terminal 6 .

[0054] The switch Q1 is connected between the first input terminal 3 and the second input terminal 4. The switch Q1 is composed of a semiconductor switching element such as an N-channel MOSFET. The first series circuit 31 is connected between one end of the switch Q1 and the first output terminal 5. The second output terminal 6 is connected to the other end of the switch Q1. A load 2 is connected between the first output terminal 5 and the second output terminal 6. In addition, the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1 and the second Y capacitor Cy2 connected in parallel with the switch Q1 functions as a resonant capacitor. The voltage resonance type boost chopper circuit is composed of the converter circuit 22, the X capacitor Cx, the first Y capacitor Cy1 and the second Y capacitor Cy2. The switching frequency fs of the switch Q1 is set to a value corresponding to the resonant frequency of the resonant capacitor, that is, the combined capacitance of the resonant inductor Lr and the X capacitor Cx, the first Y capacitor Cy1 and the second Y capacitor Cy2. As a result, the switch Q1 of the converter circuit 22 is as follows. Figure 2 This is shown as zero voltage switching.

[0055] Furthermore, the cutoff frequency fc of the first filter circuit formed by the first inductor Lc1 and the first Y capacitor Cy1, and the second filter circuit formed by the second inductor Lc2 and the second Y capacitor Cy2, are set to be the same as in the first embodiment. While the structure of the converter circuit 22 of the power conversion device 14 of the fifth embodiment differs from that of the first embodiment, the effect of suppressing noise voltage is the same as that of the power conversion device 10 of the first embodiment.

[0056] The power converter 14 of the fifth embodiment, like the power converter 10 of the first embodiment, can also achieve low loss by zero-voltage switching of the converter circuit 22 and can reduce the number of noise filter stages, thereby achieving device miniaturization and cost reduction.

[0057] (Sixth embodiment)

[0058] use Figure 9 A sixth embodiment will be described. Figure 9 1 is a circuit diagram showing the structure of the power conversion device 15 according to the sixth embodiment. In the power conversion device 15, the structure of the converter circuit 23 is the same as that of Figure 8 The converter circuit 22 of the power converter 14 shown is different in that the switch Q1 is replaced by a second series circuit 32 of a second diode D3 and the switch Q1. The rest of the structure of the power converter 15 is the same as that of the power converter 14 of the fifth embodiment.

[0059] Right now, Figure 9 The converter circuit 23 shown includes a first input terminal 3 , a second input terminal 4 , a first series circuit 31 of a resonant inductor Lr and a first diode D2 , a second series circuit 32 of a second diode D3 and a switch Q1 , a first output terminal 5 , and a second output terminal 6 .

[0060] The second series circuit 32 of the second diode D3 and the switch Q1 is connected between the first input terminal 3 and the second input terminal 4. The switch Q1 is composed of a semiconductor switching element such as an N-channel MOSFET. The first series circuit 31 is connected between one end of the second series circuit 32 and the first output terminal 5. The second output terminal 6 is connected to the other end of the second series circuit 32. A load 2 is connected between the first output terminal 5 and the second output terminal 6. In addition, the combined capacitance of the X capacitor Cx, the first Y capacitor Cy1 and the second Y capacitor Cy2 connected in parallel with the second series circuit 32 functions as a resonant capacitor. The voltage resonance type boost chopper circuit is composed of the converter circuit 23, the X capacitor Cx, the first Y capacitor Cy1 and the second Y capacitor Cy2. The switching frequency fs of the switch Q1 is set to a value corresponding to the resonant frequency of the resonant capacitor, that is, the combined capacitance of the resonant inductor Lr and the X capacitor Cx, the first Y capacitor Cy1 and the second Y capacitor Cy2. As a result, the switch Q1 of the converter circuit 23 is as follows. Figure 2 This is shown as zero voltage switching.

[0061] Furthermore, the cutoff frequency fc of the first filter circuit formed by the first inductor Lc1 and the first Y capacitor Cy1, and the second filter circuit formed by the second inductor Lc2 and the second Y capacitor Cy2, are set to be the same as in the first embodiment. While the structure of the converter circuit 23 in the power conversion device 15 of the sixth embodiment differs from that of the first embodiment, the effect of suppressing noise voltage is the same as that of the power conversion device 10 of the first embodiment.

[0062] The power converter 15 of the sixth embodiment, like the power converter 10 of the first embodiment, can achieve low loss by zero-voltage switching of the converter circuit 23 and can reduce the number of noise filter stages, thereby achieving device miniaturization and cost reduction.

[0063] (Seventh embodiment)

[0064] use Figure 10 A seventh embodiment will be described. Figure 10 This is a circuit diagram showing the configuration of the power conversion device 16 according to the seventh embodiment. Figure 6 The power converter 12 of the third embodiment shown is different in that it uses a heat sink 9. The rest of the configuration of the power converter 16 is the same as that of the power converter 12 of the third embodiment, and therefore detailed description thereof will be omitted.

[0065] In the power conversion device 16, a switch group 33 in which the first switch Q1 and the second switch Q2 are connected in series is cooled using a conductive heat sink 9. The heat sink 9 is connected to an interconnection line E.

[0066] In the power conversion device 16, parasitic capacitance generated between the heat sink 9 and the first and second switches Q1 and Q2 can be used as the first and second Y capacitors Cy1 and Cy2, instead of separate components, to reduce costs by eliminating separate components. In this case, the combined capacitance of the separate X capacitor Cx and the parasitic capacitance of the first and second Y capacitors Cy1 and Cy2 functions as a parallel capacitor within the converter circuit 21. The converter circuit 21, the X capacitor Cx, and the parasitic capacitance of the first and second Y capacitors Cy1 and Cy2 form a class E power factor correction circuit.

[0067] Furthermore, when using parasitic capacitance as the first and second Y-capacitors Cy1 and Cy2, the capacitance C of the first and second Y-capacitors Cy1 and Cy2 becomes smaller than when using separate components. Consequently, the cutoff frequency fc of the first filter loop composed of the first inductor Lc1 and first Y-capacitor Cy1, and the second filter loop composed of the second inductor Lc2 and second Y-capacitor Cy2, may not be lower than the switching frequency fs. However, in this case, by setting the cutoff frequency fc to be lower than a specified harmonic among the higher harmonic frequencies 2fs, 3fs, etc., it is possible to suppress noise voltage components higher than the specified harmonics.

[0068] The power converter 16 of the seventh embodiment, like the power converter 10 of the first embodiment, can also achieve low loss by zero-voltage switching of the converter circuit 21 and can reduce the number of noise filter stages, thereby achieving device miniaturization and cost reduction.

[0069] As described above, several embodiments of the present invention are described, but it should not be understood that the discussion and drawings forming part of this disclosure are limiting contents of the present invention. For those skilled in the art, various alternative embodiments, examples, and application technologies can be obtained from this disclosure.

[0070] Explanation of symbols

[0071] 2: Load

[0072] 3: First input terminal

[0073] 4: Second input terminal

[0074] 5: First output terminal

[0075] 6: Second output terminal

[0076] 7: The third output terminal

[0077] 8: Fourth output terminal

[0078] 9: Heat dissipation components

[0079] 10-16: Power conversion device

[0080] 20-23: Converter circuit

[0081] 30: Resonant Circuit

[0082] 31: First series circuit

[0083] 32: Second series circuit

[0084] 33: Switch group

[0085] Cr: Resonant capacitor

[0086] Cx: X capacitor

[0087] Cy1: First Y capacitor

[0088] Cy2: Second Y capacitor

[0089] E: Connect the wires

[0090] fc: cutoff frequency

[0091] fs: switching frequency

[0092] Lc1: First inductor

[0093] Lc2: Second inductor

[0094] Lr: resonant inductor

[0095] N: Second power terminal

[0096] P: First power terminal

[0097] Q1: switch (first switch)

[0098] Q2: Second switch

Claims

1. A power conversion device comprising: a first power terminal and a second power terminal; a first inductor, one end of which is connected to the first power terminal; a second inductor, one end of which is connected to the second power terminal; a converter circuit having: a first input terminal connected to the other end of the first inductor, a second input terminal connected to the other end of the second inductor, a switch connected between the first input terminal and the second input terminal, and a resonant circuit; an X capacitor connected between the first input terminal and the second input terminal; a first Y capacitor connected between the first input terminal and a ground line; a second Y capacitor connected between the second input terminal and the grounding line, The combined capacitance of the X capacitor, the first Y capacitor and the second Y capacitor forms part of the converter loop, The first inductor and the first Y capacitor form a first filter loop, The second inductor and the second Y capacitor form a second filter loop.

2. The power conversion device according to claim 1, wherein: The cutoff frequencies of the first filter circuit and the second filter circuit are set to be lower than the switching frequency of the switch.

3. The power conversion device according to claim 1 or 2, wherein: The converter circuit is a Class E inverter circuit having: the switch; The resonant circuit is connected to one end of the switch and is connected in series with a resonant inductor and a resonant capacitor; A parallel capacitor is the combined capacitance of the X capacitor, the first Y capacitor, and the second Y capacitor.

4. The power conversion device according to claim 1 or 2, wherein: The converter circuit is a Class E power factor improvement circuit, which has: The switch comprises at least two switching elements connected in series; The resonant circuit is connected to one end of the switch and is connected in series with a resonant inductor and a resonant capacitor; A parallel capacitor is the combined capacitance of the X capacitor, the first Y capacitor, and the second Y capacitor.

5. The power conversion device according to claim 1 or 2, wherein: The converter circuit is a voltage resonance type boost chopper circuit, which has: the switch; a series circuit of a resonant inductor and a diode connected to one end of the switch; a resonant capacitor, which is the combined capacitance of the X capacitor, the first Y capacitor, and the second Y capacitor, The resonant inductor and the resonant capacitor constitute the resonant tank.

6. The power conversion device according to claim 1 or 2, wherein: The converter circuit is a voltage resonance type boost chopper circuit, which has: a first series circuit of a resonant inductor and a first diode; a second series circuit of the switch and the second diode, connected between the first input terminal and the second input terminal; a resonant capacitor, which is the combined capacitance of the X capacitor, the first Y capacitor, and the second Y capacitor, One end of the first series circuit is connected to one end of the second series circuit, The resonant inductor and the resonant capacitor constitute the resonant tank.

7. The power conversion device according to any one of claims 1 to 6, wherein: The first Y capacitor and the second Y capacitor are formed of separate components.

8. The power conversion device according to any one of claims 1 to 6, wherein: The first Y capacitor and the second Y capacitor are formed by parasitic capacitance of the switch.

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