Junction temperature testing device and method for high electron mobility transistor

Abstract

The invention discloses a junction temperature testing device and method for a high-electron-mobility transistor. A current measuring module in the junction temperature testing device for the high-electron-mobility transistor is used for acquiring current flowing through a tested device; the power supply module is electrically connected with the other end of the switch module, and the power supply module and the switch module are connected in parallel with the bus capacitor; the control module is electrically connected with the control end, the driving end and the regulation and control end of the switch module, and the control module is used for providing switching signals for the control end, the driving end and the regulation and control end of the switch module so as to control the switching states of the switch protection module, the tested device and the switch module; the heating plate is used for heating a tested device; the temperature detection module is used for measuring the temperature of the detected device; and the waveform analysis module is electrically connected with the control module, the temperature detection module and the current measurement module, and is used for obtaining and forming an experimental oscillogram of the tested device at the temperature according to the temperature, the current and the conduction time of the tested device controlled by the control module.

Description

Technical Field

[0001] The present invention relates to the technical field of junction temperature testing, and in particular to a junction temperature testing device and method for a high electron mobility transistor. Background Art

[0002] In high-temperature and microwave high-power applications, AlGaN / GaN high electron mobility transistors (HEMTs) have a very broad development prospect and have attracted widespread attention over the past few decades. This is mainly due to the many excellent properties of GaN materials, such as wide bandgap, high breakdown field strength, and high saturation electron drift velocity. Although AlGaN / GaN HEMTs have great potential in the future, the thermal reliability of the devices remains a bottleneck restricting their development.

[0003] In high-temperature applications, the significant self-heating of AlGaN / GaN HEMT devices can increase junction temperature and degrade material parameters, severely impacting the device's electrical characteristics and reliability. Accurately measuring device junction temperature is essential to analyze the impact of device temperature on various characteristics and reliability.

[0004] Currently, junction temperature measurements of AlGaN / GaN HEMT devices are typically performed using infrared or electrical methods. However, the spatial resolution of infrared measurement is only 2.5 μm. Since HEMT gate lengths are typically less than 1 μm, and the source-drain spacing is only a few microns, the resolution of infrared measurement falls far short of the required measurement, resulting in significant measurement errors. Improving the reliability of HEMT junction temperature measurements has become a pressing technical challenge. Summary of the Invention

[0005] The present invention provides a junction temperature testing device and method for a high electron mobility transistor, so as to improve the junction temperature testing efficiency and reliability of a device under test.

[0006] In a first aspect, the present invention provides a junction temperature test device for a high electron mobility transistor, comprising: a power supply module, a bus capacitor, a current measurement module, a temperature detection module, a control module, a switch module, a switch protection module, a heating plate, and a waveform analysis module;

[0007] The switch protection module includes a third terminal, a fourth terminal, and a control terminal, and the device under test includes a first terminal, a second terminal, and a driving terminal; the third terminal is electrically connected to one terminal of the bus capacitor and one terminal of the switch module, respectively, the fourth terminal is electrically connected to the first terminal, and the second terminal is electrically connected to the other terminal of the bus capacitor through the current measurement module; the current measurement module is used to obtain the current flowing through the device under test;

[0008] The power supply module is electrically connected to the other end of the switch module, and the power supply module and the switch module are connected in parallel with the bus capacitor;

[0009] The control module is electrically connected to the control end, the driving end and the regulating end of the switch module respectively, and is used to provide a switching signal to the control end, the driving end and the regulating end of the switch module to control the switching state of the switch protection module, the device under test and the switch module;

[0010] The heating plate is used to heat the device under test; the temperature detection module is used to measure the temperature of the device under test;

[0011] The waveform analysis module is electrically connected to the control module, the temperature detection module and the current measurement module respectively, and is used to obtain and control the time when the device under test is on according to the temperature, the current and the control module, to form an experimental waveform diagram of the device under test at the temperature.

[0012] Optionally, the rated current of the switch protection module is I0, and the short-circuit current of the device under test is I1;

[0013] Among them, I0>I1.

[0014] Optionally, the switch protection module includes a transistor.

[0015] Optionally, the power supply module includes a voltage control unit;

[0016] The voltage control unit is used to adjust the supply voltage output by the power supply module.

[0017] In a second aspect, the present invention provides a method for testing the junction temperature of a high electron mobility transistor, which is implemented using the high electron mobility transistor junction temperature testing device described in the first aspect. The junction temperature testing method includes:

[0018] Obtaining experimental waveforms corresponding to various experimental parameter groups of the device under test in a hard switching state or a soft switching state;

[0019] According to each of the experimental waveforms, obtaining a corresponding short-circuit current-temperature curve diagram of the device under test in the hard switching state and a corresponding short-circuit current-temperature curve diagram in the soft switching state;

[0020] A current short-circuit current of the device under test in the working circuit is obtained, and a temperature corresponding to the current short-circuit current is determined as a current junction temperature of the device under test according to a corresponding curve graph of the short-circuit current and the temperature.

[0021] Optionally, obtaining an experimental waveform corresponding to each experimental parameter group of the device under test in a hard switching state or a soft switching state includes:

[0022] Acquire multiple experimental parameter groups, and use a group of the experimental parameter groups to be tested as the experimental parameter group to be tested; the experimental parameter group includes a test temperature, a test driving voltage, and a test power supply voltage;

[0023] Controlling the device under test to be at a test temperature corresponding to the test parameter group to be tested;

[0024] After the switch module is in the on state for a duration greater than or equal to a first preset duration, the switch module is controlled to be in the off state;

[0025] Controlling the device under test to be in the hard switching state or the soft switching state, and obtaining the experimental waveform diagram in the hard switching state or the soft switching state at the test temperature; the experimental waveform diagram is a corresponding curve diagram of current and time;

[0026] The next experimental parameter group is used as the experimental parameter group to be tested, and the control of the device to be at the test temperature corresponding to the experimental parameter to be tested is returned to execute until the experimental waveforms of the device to be tested under each experimental parameter group are measured.

[0027] Optionally, controlling the device under test to be in a hard switching state includes:

[0028] In the first stage, the switch protection module is controlled to be in the on state for a time period greater than or equal to a first preset time;

[0029] In the second stage, the switch protection module and the device under test are controlled to be in the on state for a time period greater than or equal to a second preset time;

[0030] In the third stage, the device under test is controlled to be in an off state, and the switch protection module is controlled to be in an on state for a time period greater than or equal to a third preset time;

[0031] In the fourth stage, the switch protection module is controlled to be in an off state.

[0032] Optionally, obtaining the experimental waveform diagram in the hard switching state at the test temperature includes:

[0033] The current flowing through the device under test at each moment in the second stage is obtained, and the corresponding relationship between each current current and each moment is plotted into the experimental waveform diagram.

[0034] Optionally, controlling the device under test to be in a soft switching state includes:

[0035] In the fifth stage, the duration of the device under test being in the on state is controlled to be greater than or equal to a fourth preset time;

[0036] In the sixth stage, the switch protection module and the device under test are controlled to be in the on state for a time period greater than or equal to a fifth preset time;

[0037] In the seventh stage, the switch protection module is controlled to be in an off state, and the duration of the device under test being in an on state is controlled to be greater than or equal to a sixth preset time;

[0038] In the eighth stage, the device under test is controlled to be in a disconnected state.

[0039] Optionally, obtaining the experimental waveform diagram in the soft switching state at the test temperature includes:

[0040] The current flowing through the device under test at each moment in the sixth stage is obtained, and the corresponding relationship between each current current and each moment is plotted into the experimental waveform diagram.

[0041] The technical solution provided by the present invention provides a bus capacitor so that after the power supply module fully charges the bus capacitor through the switch module, the switch module is disconnected, thereby cutting the power supply module out of the circuit. This prevents the voltage of the power supply module from being directly applied to the device under test when the junction temperature of the device under test is tested through the power supply module, thereby burning the device under test, thereby ensuring the safety of the device under test. By providing a switch protection module and a temperature detection module, and then regulating the conduction time of the device under test and the switch protection module through the control module, the waveform analysis module can be used to obtain experimental waveforms of the device under test at various temperatures, thereby improving the efficiency and reliability of the junction temperature test of the device under test. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 A schematic structural diagram of a junction temperature testing device for a high electron mobility transistor provided by an embodiment of the present invention;

[0043] Figure 2 A schematic structural diagram of another device for testing junction temperature of a high electron mobility transistor provided by an embodiment of the present invention;

[0044] Figure 3 A flow chart of a method for testing junction temperature of a high electron mobility transistor provided by an embodiment of the present invention;

[0045] Figure 4 An experimental waveform diagram under a hard switching state provided by an embodiment of the present invention;

[0046] Figure 5 Another experimental waveform diagram under hard switching state provided by an embodiment of the present invention;

[0047] Figure 6 A real waveform diagram in another hard switching state provided by an embodiment of the present invention;

[0048] Figure 7 A corresponding curve diagram of short-circuit current-temperature in a hard switching state provided by an embodiment of the present invention;

[0049] Figure 8 An experimental waveform diagram under a soft switching state provided by an embodiment of the present invention;

[0050] Figure 9 A short-circuit current-temperature corresponding curve diagram provided by an embodiment of the present invention;

[0051] Figure 10 A schematic structural diagram of a working circuit provided by an embodiment of the present invention;

[0052] Figure 11 A control signal timing diagram of a working circuit provided by an embodiment of the present invention;

[0053] Figure 12 A short-circuit current measurement waveform diagram of a device under test in a working circuit provided by an embodiment of the present invention;

[0054] Figure 13 A flow chart of another method for testing junction temperature of a high electron mobility transistor provided by an embodiment of the present invention;

[0055] Figure 14 A timing diagram for controlling a device under test to be in a hard switching state provided by an embodiment of the present invention;

[0056] Figure 15 A timing diagram for controlling a device under test to be in a soft switching state is provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0057] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.

[0058] Figure 1 A schematic diagram of a junction temperature test device for a high electron mobility transistor according to an embodiment of the present invention is shown in FIG. Figure 1As shown, the junction temperature test device of the high electron mobility transistor includes a power supply module 10, a bus capacitor C1, a current measurement module 20, a temperature detection module (not shown in the figure), a control module 30, a switch module 40, a switch protection module 50, a heating plate 60 and a waveform analysis module 70. The switch protection module 50 includes a third terminal I3, a fourth terminal I4 and a control terminal O2, and the device under test DUT includes a first terminal I1, a second terminal I2 and a driving terminal O1. The third terminal I3 is electrically connected to one end of the bus capacitor C1 and one end of the switch module 40 respectively, the fourth terminal I4 is electrically connected to the first terminal I1, and the second terminal I2 is electrically connected to the other end of the bus capacitor C1 through the current measurement module 20. The current measurement module 20 is used to obtain the current flowing through the device under test DUT. The power supply module 10 is electrically connected to the other end of the switch module 40, and the power supply module 10 and the switch module 40 are connected in parallel with the bus capacitor C1. The control module 30 is electrically connected to the control terminal O2, the drive terminal O1, and the control terminal of the switch module 40. The control module 30 is used to provide switching signals to the control terminal O2, the drive terminal O1, and the control terminal of the switch module 40 to control the switching states of the switch protection module 50, the device under test (DUT), and the switch module 40. The heating plate is used to heat the DUT; the temperature detection module is used to measure the temperature of the DUT. The waveform analysis module 70 is electrically connected to the control module 30, the temperature detection module, and the current measurement module 20. It is used to obtain and, based on the temperature and current, control the DUT's conduction time, to generate an experimental waveform diagram of the DUT at that temperature.

[0059] The power supply module 10 includes a high-voltage DC power supply, etc. The busbar capacitor C1 includes an electrolytic capacitor, a ceramic capacitor, or a film capacitor, etc. The switch module 40 includes a relay or an electronic switch, etc. The current measurement module 20 includes a device or sampling circuit capable of measuring current signals, etc. The temperature detection module includes a thermocouple or thermistor sensor, etc., and can be configured according to actual needs and is not specifically limited here.

[0060] The control module 30 may include a main controller, a digital signal-to-analog signal converter, a first drive unit, a second drive unit, and a third drive unit. The main controller is configured to output a first digital signal for controlling the first drive unit to output a first drive signal, a second digital signal for controlling the second drive unit to output a second drive signal, and a third digital signal for controlling the third drive unit to output a third drive signal. The digital signal-to-analog signal converter is configured to convert the first digital signal into a first analog signal, the second digital signal into a second analog signal, and the third digital signal into a third analog signal, thereby transmitting the first analog signal to the drive terminal O1, the second analog signal to the control terminal O2, and the third analog signal to the control terminal of the switch module 40. The specific structure of the control module 30 is not limited to the above description and can be configured according to actual needs.

[0061] The heating plate 60 may be made of a metal material or a heat-insulating material, such as an iron plate. The waveform analysis module 70 may include an oscilloscope, etc. The device under test (DUT) may include a P-type GaN high electron mobility transistor (HEMT) or a P-type AlGaN high electron mobility transistor (HEMT). HEMTs are heterojunction-based field-effect transistors that utilize the high mobility of a two-dimensional electron gas (2DEG) to achieve high-speed, low-power electron transmission.

[0062] It should be noted that Figure 1 All other electrical components except the waveform analysis module 70, the control module 30 and the power supply module 10 are located in the circuit board. In this way, all electrical components can be integrated into the circuit board. When it is necessary to perform a loss test on the device under test DUT, the device under test DUT can be set at a corresponding position in the circuit board so that the device under test DUT is located in the current loop of the junction temperature test device, and then the junction temperature test is performed on the device under test DUT, thereby improving the ease of testing. In addition, after the device under test DUT is set in the current loop of the junction temperature test device, the device under test DUT can be completely wrapped with silicone grease, so that the silicone grease is in contact with the heating plate 60. The silicone grease has good thermal conductivity, and the heating temperature provided by the heating plate 60 can be transmitted to the device under test DUT through the silicone grease. The temperature detection device can be set in the silicone grease to detect the current temperature of the device under test DUT.

[0063] Specifically, the control module 30 controls the switch module 40 to be in the on state, and controls the device under test (DUT) and the switch protection module 50 to be in the off state, so that the power supply module 10 charges the bus capacitor C1 through the switch module 40. After the control module 30 controls the switch module 40 to be in the on state for a preset period of time, the bus capacitor C1 is fully charged. The control module 30 controls the switch module 40 to be in the off state, and the power supply module 10 does not participate in the subsequent power supply. Subsequent power supply is provided by the bus capacitor C1. The heating plate 60 can heat the device under test (DUT).

[0064] The control module 30 can obtain the current temperature of the device under test (DUT) through the temperature detection module. If the current temperature reaches a preset temperature, the control module 30 can control the timing of providing switching signals to the drive terminal O1 and the control terminal O2 to control the DUT in a hard switching state or a soft switching state. The current measurement module can obtain the short-circuit current of the DUT in the hard switching state and the soft switching state respectively. The waveform analysis module can obtain an experimental waveform diagram of the short-circuit current of the DUT under the same test conditions and time.

[0065] After the short-circuit current curve under the same test conditions is measured, the control module 30 controls the device under test (DUT) and the switch protection module 50 to be in the disconnected state, the heating plate 60 stops heating, and the current temperature of the device under test (DUT) is obtained in real time through the temperature detection module. If the current temperature no longer changes, that is, it remains constant, the heating plate 60 heats the device under test (DUT), and the control module 30 can obtain the current temperature of the device under test (DUT) through the temperature detection module. If the current temperature reaches the next preset temperature, the control module 30 can control the timing of providing switching signals to the drive terminal O1 and the control terminal O2 to control the device under test (DUT) to be in a hard switching state or a soft switching state. The short-circuit current of the device under test (DUT) in the hard switching state and the soft switching state is obtained respectively through the current measurement module, and the waveform analysis module can obtain the experimental waveform of the short-circuit current and time of the device under test (DUT) under the test conditions.

[0066] By repeating the above process, the experimental waveform diagram of the short-circuit current and time under different test conditions can be obtained. The corresponding relationship between the short-circuit current peak value and the preset temperature under different test conditions is extracted and fitted to form a calibration curve of the short-circuit current peak value and temperature of the device under test. During the subsequent normal operation of the device under test DUT, the current short-circuit current of the device under test DUT can be obtained, and then the temperature corresponding to the current short-circuit current can be determined according to the calibration curve as the current junction temperature of the device under test DUT. In this way, the technical solution of the present invention can obtain the experimental waveform diagram of the device under test under different test conditions through the junction temperature test device of the high electron mobility transistor, which is convenient for the subsequent junction temperature measurement of the device under test in an online working state, and improves the accuracy and safety of the junction temperature measurement.

[0067] The technical solution of the present invention provides a bus capacitor so that after the power supply module fully charges the bus capacitor through the switch module, the switch module is disconnected, thereby cutting the power supply module out of the circuit. This prevents the voltage of the power supply module from being directly applied to the device under test when the junction temperature of the device under test is tested through the power supply module, thereby burning the device under test, thereby ensuring the safety of the device under test. By providing a switch protection module and a temperature detection module, and then regulating the conduction time of the device under test and the switch protection module through the control module, the waveform analysis module can be used to obtain experimental waveforms of the device under test at various temperatures, thereby improving the efficiency and reliability of the junction temperature test of the device under test.

[0068] In an optional embodiment, Figure 2 A schematic structural diagram of another high electron mobility transistor junction temperature testing device provided by an embodiment of the present invention is shown in FIG. Figure 2 As shown, the junction temperature test device for a high electron mobility transistor further includes a second capacitor C2, a third capacitor C3, and a diode D1. The second capacitor C2 and the third capacitor C3 are connected in parallel to both ends of the device under test (DUT). The anode of the diode D1 is electrically connected to the fourth terminal I4 of the switch protection module 50, and the cathode of the diode D1 is electrically connected to the third terminal I3 of the switch protection module 50.

[0069] The second capacitor C2 and the third capacitor C3 include electrolytic capacitors, ceramic capacitors, or film capacitors, etc. The diode D1 includes a Schottky barrier diode or a Zener diode, etc., and can be configured according to actual needs, which is not specifically limited here.

[0070] Specifically, by connecting the second capacitor C2 and the third capacitor C3 in parallel at both ends of the device under test DUT, when the switch protection module 50 is in the on state, the bus capacitor C1 can charge the second capacitor C2 and the third capacitor C3 through the switch protection module 50, thereby suppressing the transient drain-source voltage spike of the device under test DUT when it is turned on or off. The diode D1 is used to prevent the drain-source voltage of the device under test DUT from dropping, so as to protect the device under test DUT and improve the safety of the device under test DUT.

[0071] Optional, reference Figure 1 or Figure 2 , the rated current of the switch protection module 50 is I0, and the short-circuit current of the device under test DUT is I1; wherein, I0>I1.

[0072] Specifically, by setting the short-circuit current I1 of the device under test DUT to be smaller than the rated current I0 of the switch protection module 50, when the device under test DUT is in a short-circuit state, the short-circuit current of the device under test DUT will not affect the switch protection module 50, thereby ensuring the working safety and service life of the junction temperature test device.

[0073] It should be noted that, provided that the rated current I0 of the switch protection module 50 is greater than the short-circuit current I1 of the device under test (DUT), the specific structure of the switch protection module 50 can be configured according to actual needs. In an optional embodiment, the switch protection module 50 includes a transistor. Transistors have the characteristics of high voltage and high current resistance, and are small in size, light in weight, low in power consumption, low in heat generation, stable in performance, and low in noise. They have a minimal impact on junction temperature testing and can reduce the overall size of the junction temperature tester, making the junction temperature tester more compact.

[0074] Optionally, the power supply module 10 includes a voltage control unit; the voltage control unit is used to adjust the supply voltage output by the power supply module 10.

[0075] The voltage control unit includes a boost circuit or a buck circuit, etc., which can be configured according to actual needs and is not specifically limited here.

[0076] Specifically, by setting the power supply module 10 to include a voltage control unit, the voltage adjustment unit can boost or reduce the voltage signal received by the power supply module 10 according to actual needs and output the corresponding voltage signal to the switch module 40, so as to adapt to the different power supply requirements of the junction temperature testing device and improve the practicality of the junction temperature testing device.

[0077] Based on the same inventive concept, the present invention further provides a junction temperature testing method for a high electron mobility transistor, which is implemented using the junction temperature testing device for a high electron mobility transistor provided by any embodiment of the present invention. Figure 3A flow chart of a method for testing the junction temperature of a high electron mobility transistor provided by an embodiment of the present invention is shown in FIG. Figure 3 As shown, the junction temperature test method includes:

[0078] S101 , obtaining experimental waveforms corresponding to various experimental parameter groups of the device under test in a hard switching state or a soft switching state.

[0079] A hard switching state refers to a state in which both voltage and current are applied during switching transitions. During this state, the current flowing through the device and the voltage across the device can change dramatically. A soft switching state switches the device on and off with zero current or zero voltage, minimizing the crossover between the current and voltage waveforms. The experimental parameter set includes the drive voltage supplied to the device under test (DUT), the preset temperature of the DUT, and the supply voltage of the power supply module 10. Other parameters are also possible and are not specifically limited here.

[0080] Specifically, refer to Figure 1 or Figure 2 After the busbar capacitor is fully charged by the switch module 40 and the switch module 40 is controlled to be in the off state, the control module 30 can control the DUT to be in a hard switching state or a soft switching state by adjusting the turn-on time of the switch protection module 50 and the DUT. Then, based on the temperature obtained by the temperature detection module and the current parameter obtained by the waveform analysis module 70, the experimental waveform corresponding to each experimental parameter group is obtained.

[0081] S102 , obtaining a corresponding short-circuit current-temperature curve diagram of the device under test in a hard switching state and a corresponding short-circuit current-temperature curve diagram in a soft switching state according to each experimental waveform diagram.

[0082] Among them, the experimental waveform is a curve diagram of current and time.

[0083] Specifically, by adjusting the power supply voltage provided by the power supply module 10, the driving voltage provided by the control module 30 to the device under test DUT, and regulating the set temperature of the device under test DUT, a corresponding waveform diagram of the short-circuit current flowing through the device under test DUT and time under the corresponding experimental parameter group can be obtained, that is, an experimental waveform diagram. For the same experimental waveform diagram, the correspondence between the maximum value of the short-circuit current and the temperature in the experimental waveform diagram is used as a discrete point in the corresponding curve diagram. The experimental waveform diagrams in each experimental parameter group with the same experimental parameters except the preset temperature are used as multiple groups of reference waveform diagrams of a corresponding curve diagram; then the correspondence between the maximum short-circuit current and the temperature in each experimental waveform diagram is used as multiple discrete points of the corresponding curve diagram, and each discrete point is fitted to obtain a corresponding curve diagram of short-circuit current-temperature.

[0084] It is understood that the corresponding short-circuit current-temperature curves in the hard switching state or the soft switching state can be obtained by referring to the above description and will not be repeated here. The duration of controlling the device under test (DUT) in the hard switching state or the soft switching state can be set according to actual needs. For example, the duration of the device under test (DUT) in the hard switching state or the soft switching state is 10 μs, but other values are possible and are not specifically limited here.

[0085] For example, Figure 4 This is an experimental waveform diagram under a hard switching state provided by an embodiment of the present invention, such as Figure 4 As shown, the device under test DUT is in a hard switching state, the power supply voltage provided by the power supply module 10 is 25V, and the driving voltage provided by the control module 30 to the device under test DUT is 6V. The experimental waveforms of the short-circuit current Id and the time Time at preset temperatures are 125.2°C, 102.5°C, 85°C, 64.5°C, 45°C and 27°C respectively. Figure 5 Another experimental waveform diagram under hard switching state provided by the embodiment of the present invention is as follows: Figure 5 As shown, the device under test DUT is in a hard switching state, the power supply voltage provided by the power supply module 10 is 100V, and the driving voltage provided by the control module 30 to the device under test DUT is 6V. The experimental waveforms of the short-circuit current Id and the time Time at preset temperatures are 101°C, 85.5°C, 67°C, 47°C and 27°C respectively. Figure 6 Another real waveform diagram under hard switching state provided by the embodiment of the present invention is as follows: Figure 6 As shown, the device under test DUT is in a hard switching state, the power supply voltage provided by the power supply module 10 is 25V, and the driving voltage provided to the device under test DUT by the control module 30 is 4V. The experimental waveforms of the short-circuit current Id and the time Time at preset temperatures are 121°C, 104.7°C, 94.2°C, 78.1°C, 61.6°C, 45°C and 22.3°C respectively. Figure 7 A corresponding curve diagram of short-circuit current-temperature in a hard switching state provided by an embodiment of the present invention is shown in FIG. Figure 7As shown, the yellow curve represents the corresponding short-circuit current-temperature curve of the device under test DUT under the experimental parameters that the device under test DUT is in a hard switching state, the power supply voltage provided by the power supply module 10 is 25V, and the control module 30 provides a driving voltage of 4V to the device under test DUT; the green curve represents the corresponding short-circuit current-temperature curve of the device under test DUT under the experimental parameters that the device under test DUT is in a hard switching state, the power supply voltage provided by the power supply module 10 is 100V, and the control module 30 provides a driving voltage of 6V to the device under test DUT; the purple curve represents the corresponding short-circuit current-temperature curve of the device under test DUT under the experimental parameters that the device under test DUT is in a hard switching state, the power supply voltage provided by the power supply module 10 is 25V, and the control module 30 provides a driving voltage of 6V to the device under test DUT.

[0086] Accordingly, Figure 8 This is an experimental waveform diagram under a soft switching state provided by an embodiment of the present invention, such as Figure 8 As shown, the device under test DUT is in a soft switching state, the power supply voltage provided by the power supply module 10 is 25V, and the driving voltage provided by the control module 30 to the device under test DUT is 6V. The experimental waveforms of the short-circuit current Id and the time Time at preset temperatures are 104.1°C, 85.2°C, 63.3°C, 46°C and 22.1°C respectively. Figure 9 A short-circuit current-temperature corresponding curve diagram provided by an embodiment of the present invention is as follows: Figure 9 As shown in the figure, the purple curve represents the corresponding short-circuit current-temperature curve of the device under test (DUT) under the experimental parameters of hard switching, 25V power supply voltage provided by the power supply module 10, and 6V drive voltage provided by the control module 30 to the DUT. The blue curve represents the corresponding short-circuit current-temperature curve of the device under test (DUT) under the experimental parameters of soft switching, 25V power supply voltage provided by the power supply module 10, and 6V drive voltage provided by the control module 30 to the DUT.

[0087] S103 , obtaining a current short-circuit current of the device under test in the working circuit, and determining, based on a corresponding curve diagram of short-circuit current-temperature, a temperature corresponding to the current short-circuit current as a current junction temperature of the device under test.

[0088] The working circuit represents the actual circuit used by the device under test and can be set according to actual needs. The working circuit includes a switch protection module connected in series with the device under test. For example, Figure 10 A schematic diagram of a working circuit according to an embodiment of the present invention is shown in FIG. Figure 10As shown, except for the switch protection module 50, the remaining components form a Buck converter. By placing the switch protection module 50 in the working circuit, the DUT can be placed in a hard switching state or a soft switching state by controlling the turn-on time of the switch protection module 50 and the DUT. Figure 11 A control signal timing diagram of a working circuit provided by an embodiment of the present invention, Figure 12 The short-circuit current measurement waveform of the device under test in a working circuit provided by an embodiment of the present invention is shown in FIG. Figure 11 and Figure 12 Before providing the on-drive signal Swich On to the device under test DUT, that is, when the device under test DUT is in the off state, a signal for controlling the switch protection module 50 to be in the on state is first provided to the control terminal of the switch protection module 50. Bypass , so that the electric energy on the fifth capacitor C5 can be released through the inductor L, the resistor R and the switch protection module 50. During the period when the switch protection module 50 is in the on state, the device under test DUT is controlled to be in the on state, so that the electric energy on the fourth capacitor C4 is quickly applied to the device under test DUT, causing the current Id on the device under test DUT to have a momentary spike, such as Figure 12 As shown, the current peak value is the current short-circuit current of the device under test DUT in the working circuit. There are other ways to obtain the current short-circuit current of the device under test DUT in the working circuit, which are not specifically limited here.

[0089] It should be noted that if the current short-circuit current is obtained when the DUT is in a hard-switching state, the current junction temperature corresponding to the current short-circuit current must be determined based on the corresponding short-circuit current-temperature curve of the DUT in the hard-switching state. This ensures the accuracy and reliability of the current junction temperature determination.

[0090] Specifically, the current short-circuit current of the device under test in the working circuit can be obtained through a sampling circuit, etc. Based on the corresponding curve diagram of short-circuit current-temperature, the temperature corresponding to the current short-circuit current is used as the current junction temperature of the device under test.

[0091] The technical solution of the embodiments of the present invention obtains experimental waveforms corresponding to various experimental parameter groups for the device under test in either the hard-switching or soft-switching state, and then obtains corresponding short-circuit current-temperature curves for the device under test in the hard-switching state and the short-circuit current-temperature curves for the device under test in the soft-switching state based on the experimental waveforms. When the device under test is operating in a working circuit, the current short-circuit current of the device under test in the working circuit can be obtained. Based on the corresponding short-circuit current-temperature curves, the temperature corresponding to the current short-circuit current is determined as the current junction temperature of the device under test, thereby improving the accuracy and reliability of determining the current junction temperature of the device under test.

[0092] Based on the above embodiments, the embodiments of the present invention describe the situation of obtaining experimental waveforms corresponding to various experimental parameter groups of the device under test in a hard switching state or a soft switching state. Figure 13 A flow chart of another method for testing junction temperature of a high electron mobility transistor provided by an embodiment of the present invention is shown in FIG. Figure 13 As shown, the junction temperature test method of the high electron mobility transistor includes:

[0093] S201: Acquire multiple experimental parameter groups, and use a group of experimental parameter groups to be tested as the experimental parameter group to be tested.

[0094] The experimental parameter group includes test temperature, test driving voltage and test supply voltage.

[0095] Specifically, the experimental parameter group can be set according to the actual operating parameters of the device under test (DUT). Since there are multiple experimental parameter groups, an experiment of a single experimental parameter group can be performed on the device under test to ensure experimental reliability.

[0096] S202 , controlling the device under test to be at a test temperature corresponding to the experimental parameter group to be tested.

[0097] Specifically, the heating plate can be controlled to heat the device under test, and the current temperature of the device under test can be obtained in real time through the temperature detection module. If the current temperature is constant and the difference with the test temperature is small or equal to the test temperature, it means that the device under test is at the test temperature corresponding to the experimental parameter group to be tested.

[0098] S203 , after the switch module is in the on state for a duration greater than or equal to a first preset duration, the switch module is controlled to be in the off state.

[0099] The first preset time length may be a fixed value or a non-fixed value, and is related to parameters of the bus capacitor C1 and may be set according to actual needs. For example, the first preset time length is 10 μs.

[0100] Specifically, refer to Figure 1 or Figure 2 , the on-time of the switch module 40 can be controlled by the control module 30. When the on-time is greater than or equal to the first preset time, it indicates that the bus capacitor C1 is fully charged, and the switch module 40 can be controlled to be in the off state.

[0101] S204 , controlling the device under test to be in a hard switching state or a soft switching state, and obtaining an experimental waveform diagram in the hard switching state or the soft switching state at a test temperature.

[0102] Among them, the experimental waveform is a corresponding curve diagram of current and time.

[0103] Specifically, refer to Figure 1 or Figure 2 The method for controlling the device under test (DUT) to be in a hard switching state is as follows: first, the switch protection module 50 is controlled to be in an on state, and during the time period when the switch protection module 50 is in the on state, the device under test (DUT) is controlled to be in an on state so that the voltage on the bus capacitor C1 can be quickly applied to both ends of the device under test (DUT), so that the device under test (DUT) is in a hard switching state. The method for controlling the device under test (DUT) to be in a soft switching state is as follows: first, the device under test (DUT) is controlled to be in an on state, and during the time period when the device under test (DUT) is in the on state, the switch protection module 50 is controlled to be in an on state so that the zero current or zero voltage on the device under test (DUT) changes rapidly, so that the device under test (DUT) is in a soft switching state. In addition, while the device under test (DUT) is in a hard switching state or a soft switching state, a curve of the current flowing through the device under test (DUT) over time, i.e., an experimental waveform, is obtained through the current measurement module 20.

[0104] Optional, Figure 14 A timing diagram for controlling a device under test to be in a hard switching state is provided in an embodiment of the present invention, with reference to Figure 1 and Figure 14 Controlling the device under test to be in a hard switching state includes a first stage, controlling the switch protection module to be in an on state for a time period greater than or equal to a first preset time t1; a second stage, controlling the switch protection module and the device under test to be in an on state for a time period greater than or equal to a second preset time t2; a third stage, controlling the device under test to be in an off state, controlling the switch protection module to be in an on state for a time period greater than or equal to a third preset time t3; and a fourth stage, controlling the switch protection module to be in an off state.

[0105] Among them, the first preset time t1 is related to the conduction and opening rate of the switch protection module 50. The faster the conduction and opening rate of the switch protection module 50, the shorter the first preset time t1. The second preset time t2 is related to the relevant parameters of the device under test DUT and can be set according to actual needs. The third preset time t3 is related to the opening and closing rate of the device under test DUT. The faster the opening and closing rate of the device under test DUT, the shorter the third preset time t1. Optionally, the value range of the first preset time t1 is 4μs to 6μs, the value range of the second preset time t2 is 5μs to 10μs, and the value range of the first preset time t1 is 2μs to 5μs. Exemplarily, the first preset time t1 is 5μs, the second preset time t2 is 10μs, and the first preset time t1 is 3μs. It can also be other values, which are not specifically limited here.

[0106] Specifically, in the first stage, the switch protection module 50 is set to be in the on state for a duration greater than or equal to the first preset time t1, thereby ensuring that the switch protection module 50 is in the on state after the first preset time t1. In the second stage, the switch protection module 50 and the device under test (DUT) are controlled to be in the on state for a duration greater than or equal to the second preset time t2, thereby ensuring that the short-circuit current of the device under test (DUT) can be measured. In the third stage, the device under test (DUT) is controlled to be in the off state, and the switch protection module 50 is controlled to be in the on state for a duration greater than or equal to the third preset time t3, thereby ensuring that the device under test (DUT) is in the off state after the third preset time t3, thereby preventing the device under test (DUT) from being burned due to being in the hard switching state for a long time. Subsequently, in the fourth stage, the switch protection module is controlled to be in the off state, and the junction temperature test in the hard switching state is completed.

[0107] Optionally, an experimental waveform diagram is obtained under the test temperature and hard switching state, including obtaining the current current flowing through the device under test at each moment in the second stage, and drawing the corresponding relationship between each current current and each moment into an experimental waveform diagram.

[0108] Specifically, in the second stage, the device under test is in a hard switching state, and the corresponding relationship between the current flowing through the device under test and the time in this time period can be obtained, thereby obtaining an experimental waveform diagram.

[0109] Optional, Figure 15 A timing diagram for controlling a device under test to be in a soft switching state is provided in an embodiment of the present invention, with reference to Figure 1 and Figure 15 , controlling the device under test to be in a soft switching state, including a fifth stage, controlling the device under test to be in an on-state for a time period greater than or equal to a fourth preset time t4; a sixth stage, controlling the switch protection module and the device under test to be in an on-state for a time period greater than or equal to a fifth preset time t5; a seventh stage, controlling the switch protection module to be in an off-state, controlling the device under test to be in an on-state for a time period greater than or equal to a sixth preset time t6; and an eighth stage, controlling the device under test to be in an off-state.

[0110] Among them, the fourth preset time t4 is related to the conduction turn-on rate of the device under test DUT. The faster the conduction turn-on rate of the device under test DUT, the shorter the fourth preset time t4. The fifth preset time t5 is related to the relevant parameters of the device under test DUT and can be set according to actual needs. The sixth preset time t6 is related to the opening and closing rate of the switch protection module 50. The faster the opening and closing rate of the switch protection module 50, the shorter the sixth preset time t6. Optionally, the value range of the fourth preset time t4 is 2μs to 5μs, the value range of the fifth preset time t5 is 5μs to 10μs, and the value range of the sixth preset time t6 is 4μs to 6μs. Exemplarily, the fourth preset time t4 is 3μs, the fifth preset time t5 is 10μs, and the sixth preset time t6 is 5μs. It can also be other values, which are not specifically limited here.

[0111] Specifically, by setting the duration of the DUT being in the on-state during the fifth stage to be greater than or equal to the fourth preset time t4, the DUT is ensured to be in the on-state after the fourth preset time t4. During the sixth stage, the switch protection module 50 and the DUT are controlled to be in the on-state for a duration greater than or equal to the fifth preset time t5, to ensure that the short-circuit current of the DUT can be measured. During the seventh stage, the switch protection module 50 is controlled to be in the off-state, and the duration of the DUT being in the on-state is controlled to be greater than or equal to the sixth preset time t6, to ensure that the switch protection module 50 is in the off-state after the sixth preset time t6, thereby preventing the DUT from being burned due to being in the soft switching state for a long time. Subsequently, during the eighth stage, the DUT is controlled to be in the off-state, and the junction temperature test in the soft switching state is completed.

[0112] Optionally, an experimental waveform diagram is obtained in the soft switching state at the test temperature, including obtaining the current current flowing through the device under test at each moment in the sixth stage, and drawing the corresponding relationship between each current current and each moment into an experimental waveform diagram.

[0113] Specifically, in the sixth stage, the device under test is in a soft switching state, and the corresponding relationship between the current flowing through the device under test and the time in this time period can be obtained, thereby obtaining an experimental waveform diagram.

[0114] S205 , taking the next experimental parameter group as the experimental parameter group to be tested, and returning to execute S202 , until each experimental waveform diagram of the device under test under each experimental parameter group is measured.

[0115] Specifically, when the test of an experimental parameter group is completed, the process can return to execute the steps of controlling the device under test to be in the test temperature corresponding to the experimental parameter group to be tested, to controlling the device under test to be in a hard switching state or a soft switching state, and obtaining the experimental waveform diagrams in the hard switching state or the soft switching state at the test temperature, so as to obtain the experimental waveform diagrams of the device under test under each experimental parameter group.

[0116] It can be understood that in order to avoid the influence of the previous set of experimental results on the next set of experimental results, after the next experimental parameter group is used as the experimental parameter group to be tested, the heating plate can be controlled to stop heating first. When the temperature detection module obtains the current value of the device under test and drops to a constant value, the device under test is controlled to be at the test temperature corresponding to the experimental parameter group to be tested, until the device under test is controlled to be in a hard switching state or a soft switching state, and each step of obtaining the experimental waveform diagram under the test temperature, hard switching state or soft switching state is carried out to improve the reliability and accuracy of the experimental waveform diagram.

[0117] S206 , obtaining a corresponding short-circuit current-temperature curve diagram of the device under test in a hard switching state and a corresponding short-circuit current-temperature curve diagram of the device under test in a soft switching state according to each experimental waveform diagram.

[0118] S207 , obtaining the current short-circuit current of the device under test in the working circuit, and determining, based on a corresponding curve diagram of the short-circuit current and the temperature, the temperature corresponding to the current short-circuit current as the current junction temperature of the device under test.

[0119] The technical solution provided by the present invention obtains multiple experimental parameter groups, takes a group of experimental parameter groups to be tested as the experimental parameter group to be tested, controls the device under test to be at the test temperature corresponding to the experimental parameter group to be tested, controls the switch module to be in the on state after the on time is greater than or equal to a first preset time, and then controls the switch module to be in the off state; controls the device under test to be in a hard switching state or a soft switching state, obtains the experimental waveform diagram of the hard switching state or the soft switching state at the test temperature, takes the next experimental parameter group as the experimental parameter group to be tested, and returns to execute the step of controlling the device under test to be at the test temperature corresponding to the experimental parameter group to be tested, until each experimental waveform diagram of the device under test under each experimental parameter group is measured. In this way, each experimental waveform diagram of the device under test under different experimental parameter groups can be obtained, thereby improving the accuracy and reliability of obtaining the experimental waveform diagrams, and further improving the reliability of determining the current junction temperature of the device under test based on each experimental waveform diagram.

[0120] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, combinations, and substitutions are possible for those skilled in the art without departing from the scope of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A junction temperature test device for a high electron mobility transistor, characterized in that: include: Power supply module, busbar capacitor, current measurement module, temperature detection module, control module, switch module, switch protection module, heating plate and waveform analysis module; The switch protection module includes a third terminal, a fourth terminal, and a control terminal, and the device under test includes a first terminal, a second terminal, and a driving terminal; the third terminal is electrically connected to one terminal of the bus capacitor and one terminal of the switch module, respectively, the fourth terminal is electrically connected to the first terminal, and the second terminal is electrically connected to the other terminal of the bus capacitor through the current measurement module; the current measurement module is used to obtain the current flowing through the device under test; The power supply module is electrically connected to the other end of the switch module, and the power supply module and the switch module are connected in parallel with the bus capacitor; The control module is electrically connected to the control end, the driving end and the regulating end of the switch module respectively, and is used to provide a switching signal to the control end, the driving end and the regulating end of the switch module to control the switching state of the switch protection module, the device under test and the switch module; The heating plate is used to heat the device under test; the temperature detection module is used to measure the temperature of the device under test; The waveform analysis module is electrically connected to the control module, the temperature detection module and the current measurement module respectively, and is used to obtain and control the time when the device under test is on according to the temperature, the current and the control module, to form an experimental waveform diagram of the device under test at the temperature.

2. The junction temperature testing device according to claim 1, wherein: The rated current of the switch protection module is I0, and the short-circuit current of the device under test is I1; Among them, I0>I1.

3. The junction temperature testing device according to claim 2, wherein: The switch protection module includes a transistor.

4. The junction temperature testing device according to claim 1, wherein: The power supply module includes a voltage control unit; The voltage control unit is used to adjust the supply voltage output by the power supply module.

5. A method for testing the junction temperature of a high electron mobility transistor, implemented by using the junction temperature testing device of a high electron mobility transistor according to any one of claims 1 to 4, characterized in that: The junction temperature testing method includes: Obtaining experimental waveforms corresponding to various experimental parameter groups of the device under test in a hard switching state or a soft switching state; According to each of the experimental waveforms, obtaining a corresponding short-circuit current-temperature curve diagram of the device under test in the hard switching state and a corresponding short-circuit current-temperature curve diagram in the soft switching state; A current short-circuit current of the device under test in the working circuit is obtained, and a temperature corresponding to the current short-circuit current is determined as a current junction temperature of the device under test according to a corresponding curve graph of the short-circuit current and the temperature.

6. The junction temperature testing method according to claim 5, characterized in that: Obtaining experimental waveforms corresponding to various experimental parameter groups of the device under test in a hard switching state or a soft switching state, including: Acquire multiple experimental parameter groups, and use a group of the experimental parameter groups to be tested as the experimental parameter group to be tested; the experimental parameter group includes a test temperature, a test driving voltage, and a test power supply voltage; Controlling the device under test to be at a test temperature corresponding to the test parameter group to be tested; After the switch module is in the on state for a duration greater than or equal to a first preset duration, the switch module is controlled to be in the off state; Controlling the device under test to be in the hard switching state or the soft switching state, and obtaining the experimental waveform diagram in the hard switching state or the soft switching state at the test temperature; the experimental waveform diagram is a corresponding curve diagram of current and time; The next experimental parameter group is used as the experimental parameter group to be tested, and the control of the device to be at the test temperature corresponding to the experimental parameter to be tested is returned to execute until the experimental waveforms of the device to be tested under each experimental parameter group are measured.

7. The junction temperature testing method according to claim 6, wherein: Controlling the device under test to be in a hard switching state includes: In the first stage, the switch protection module is controlled to be in the on state for a time period greater than or equal to a first preset time; In the second stage, the switch protection module and the device under test are controlled to be in the on state for a time period greater than or equal to a second preset time; In the third stage, the device under test is controlled to be in an off state, and the switch protection module is controlled to be in an on state for a time period greater than or equal to a third preset time; In the fourth stage, the switch protection module is controlled to be in an off state.

8. The junction temperature testing method according to claim 7, wherein: Acquiring the experimental waveform diagram under the hard switching state at the test temperature includes: The current flowing through the device under test at each moment in the second stage is obtained, and the corresponding relationship between each current current and each moment is plotted into the experimental waveform diagram.

9. The junction temperature testing method according to claim 6, wherein: Controlling the device under test to be in a soft switching state includes: In the fifth stage, the duration of the device under test being in the on state is controlled to be greater than or equal to a fourth preset time; In the sixth stage, the switch protection module and the device under test are controlled to be in the on state for a time period greater than or equal to a fifth preset time; In the seventh stage, the switch protection module is controlled to be in an off state, and the duration of the device under test being in an on state is controlled to be greater than or equal to a sixth preset time; In the eighth stage, the device under test is controlled to be in a disconnected state.

10. The junction temperature testing method according to claim 9, wherein: Acquiring the experimental waveform diagram in the soft switching state at the test temperature includes: The current flowing through the device under test at each moment in the sixth stage is obtained, and the corresponding relationship between each current current and each moment is plotted into the experimental waveform diagram.

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