Optical proximity correction method, simulation model, electronic device, and storage medium

Abstract

Embodiments of the present disclosure relate to an optical proximity correction method, a simulation model, an electronic device and a storage medium. The method comprises: performing optical proximity correction on a first part in a layout to generate a first corrected part; determining an initial offset value for performing optical proximity correction on original layout data of a second part based on the original layout data of the first part and corrected layout data of the first corrected part; and performing optical proximity correction on the second part based on the initial offset value to generate a second corrected part. The technical solutions of the present disclosure can significantly improve the computing efficiency, enhance the applicability and reduce the training cost.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure mainly relate to integrated circuits, and more particularly, to optical proximity correction methods, simulation models, electronic devices, and storage media. BACKGROUND

[0002] With the semiconductor process entering the nanometer level, the diffraction effect of light in the lithography process causes the mask pattern to deviate seriously from the actual pattern of the wafer. Optical proximity correction (OPC) is widely used in the semiconductor manufacturing process to reduce the difference between the wafer pattern and the mask pattern. OPC compensates for distortion by adjusting the mask pattern, in which bias correction is a core means, including rule-based bias correction, model-based bias correction, and bias correction value predicted by artificial intelligence (AI).

[0003] Rule-based bias correction is to apply a fixed offset to specific patterns (such as line width, pitch) according to empirical formulas, which cannot adapt to the non-linear effects of complex patterns and advanced processes. Model-based bias correction iteratively optimizes the mask pattern through a lithography simulation model, which is suitable for advanced processes. However, as the precision increases, the computational complexity also increases, and multiple rounds of iterative simulation are needed to converge. The way of directly outputting the correction amount by learning the mapping relationship between the pattern characteristics and the bias in the historical data through AI can greatly improve the efficiency of bias correction, but it faces the problems of high cost of training data acquisition and strong data dependency, and limited generalization ability.

[0004] Therefore, how to accelerate bias correction has become a technical problem to be solved in the current electronic design automation (EDA) field. SUMMARY

[0005] According to example embodiments of the present disclosure, an optical proximity correction scheme is provided to at least partially overcome the above or other potential deficiencies.

[0006] According to an aspect of the present disclosure, an optical proximity correction method is provided. The method includes performing optical proximity correction on a first portion of a layout to generate a first corrected portion; determining an initial offset value for performing optical proximity correction on a second portion based on original layout data of the first portion and corrected layout data of the first corrected portion; and performing optical proximity correction on the second portion based on the initial offset value to generate a second corrected portion.

[0007] In a second aspect of the disclosure, an electronic device is provided. The electronic device includes a processor; and a memory coupled with the processor, the memory having stored therein instructions that, when executed by the processor, cause the device to perform actions comprising: performing optical proximity correction on a first portion in a layout to generate a first corrected portion; determining, based on original layout data of the first portion and corrected layout data of the first corrected portion, an initial offset value for performing optical proximity correction on original layout data of a second portion; and performing optical proximity correction on the second portion based on the initial offset value to generate a second corrected portion.

[0008] In some embodiments, determining, based on the original layout data of the first portion and the corrected layout data of the first corrected portion, the initial offset value for performing optical proximity correction on the original layout data of the second portion comprises: determining, based on the original layout data of the first portion and the corrected layout data of the first corrected portion, first training data; and training an AI subsystem with the first training data to predict the initial offset value.

[0009] In some embodiments, determining the first training data based on the original layout data of the first portion and the corrected layout data of the first corrected portion comprises: determining, as the first training data, layout data that satisfies a predetermined condition and the corrected layout data.

[0010] In some embodiments, the layout data that satisfies the predetermined condition comprises layout data in which an average value of at least one of the following parameters is within a corresponding threshold range: a critical dimension; a pitch; and a pitch.

[0011] In some embodiments, determining, as the first training data, the layout data that satisfies the predetermined condition and the corrected layout data comprises: performing mask rule checking on the corrected layout data of the first corrected portion; and in response to the corrected layout data complying with a constraint condition of a mask rule, determining, as the training data, the corrected layout data and the original layout data corresponding to the corrected layout data.

[0012] In some embodiments, the method further comprises: taking the initial offset value as an initial offset value for each of the remaining portions in the layout; and performing optical proximity correction on each of the portions based on the initial offset value, respectively.

[0013] In some embodiments, the method further comprises: iteratively predicting an initial offset value for a subsequent portion based on training data from a previous portion to perform optical proximity correction on the subsequent portion until optical proximity correction on each of the portions of the layout is completed.

[0014] In some embodiments, the method further comprises iteratively feeding back the initial offset value based on the training data from the previous portion and updating the network weights of the AI subsystem to predict the initial offset value for the next portion, so as to perform optical proximity correction on the next portion, until the optical proximity correction on each portion of the layout is completed.

[0015] In some embodiments, performing optical proximity correction on the second portion based on the initial offset value to generate the second corrected portion comprises iteratively performing optical proximity correction starting from the initial offset value to determine a corresponding simulation value and a target value, and determining the second corrected portion as the second corrected portion in response to a difference between the simulation value and the target value satisfying a predetermined condition.

[0016] In some embodiments, the method further comprises, after the optical proximity correction on each portion other than the first portion is completed, training the AI subsystem based on corresponding training data to respectively determine new network weights, and updating the network weights of the AI subsystem with the new network weights respectively.

[0017] In some embodiments, the layout is divided into a plurality of blocks, and each portion includes a corresponding number of blocks, and the method further comprises: allocating the plurality of blocks to corresponding nodes of the distributed architecture according to a predetermined order; and respectively performing optical proximity correction on the blocks at the corresponding nodes at the respective nodes.

[0018] In a third aspect of the present disclosure, a computer-readable storage medium is provided, having stored thereon machine executable instructions which, when executed by a processor, implement the method according to the first aspect of the present disclosure.

[0019] It will be appreciated from the following description that the technical solutions of the present disclosure can significantly improve the computing efficiency, enhance the applicability, and reduce the training cost.

[0020] The summary is provided to introduce some aspects of the concepts in a simplified form that are further described below in the detailed description. The summary is not intended to identify key or essential features of the disclosure, nor is it intended to limit the scope of the disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 A schematic diagram showing an example environment in which embodiments of the present disclosure can be implemented;

[0022] Figure 2 A flowchart showing a method for optical proximity correction according to some embodiments of the present disclosure;

[0023] Figure 3 A schematic diagram showing the principle of offsetting a layout when performing optical proximity correction;

[0024] Figure 4 FIG. 1 shows a schematic diagram of training and prediction of an AI subsystem for optical proximity correction, according to some embodiments of the present disclosure;

[0025] Figure 5 FIG. 1 shows a block diagram of a computing device that can implement various embodiments of the present disclosure.

[0026] In the various drawings, like or corresponding elements are denoted by like or corresponding reference numerals. DETAILED DESCRIPTION

[0027] The principles of the present disclosure will now be described, by way of example only, with reference to the various example embodiments illustrated in the drawings. It is to be understood that the description of these embodiments is merely intended to illustrate the general principles of the present disclosure and to further enable its implementation to those of ordinary skill in the art. It is noted that like or corresponding elements are denoted by like or corresponding reference numbers in the drawings, and like or corresponding reference numbers can denote like or corresponding functions. Those of ordinary skill in the art will readily recognize that alternative embodiments of the structures and methods explained herein can be employed without departing from the principles of the present disclosure described herein.

[0028] As used herein, the term “includes” and its variants are intended to be open-ended, meaning that there are items or concepts that are not listed that are also subject to the disclosure. The term “or” is intended to mean “and / or” unless specifically noted otherwise. The term “based on” is intended to mean “based, at least in part, on” unless specifically noted otherwise. The term “one example embodiment” and “an example embodiment” are intended to mean “at least one example embodiment.” The term “another embodiment” is intended to mean “at least one additional embodiment.” The terms “a first,” “a second,” etc. are intended to be interpreted to mean different or similar objects unless otherwise noted.

[0029] As mentioned previously, bias correction is the core means to compensate distortion, which includes rule-based bias correction, model-based bias correction, and AI prediction of bias correction values. While these techniques have certain applications in their respective fields, their technical implementation and practical application still face the following significant shortcomings:

[0030] 1. Poor adaptability: Rule-based bias correction cannot respond to process fluctuations in real time, resulting in a deviation between the correction result and the actual situation, and failing in advanced processes, which requires manual intervention to correct model parameters and has poor adaptability.

[0031] 2. Long computation time and large consumption of computing resources: model-based bias correction needs to rely on high-precision lithography simulation to iteratively optimize mask patterns pixel by pixel. As the process enters the 3nm and below nodes, a single chip design contains billions of polygons, and each simulation needs to traverse all pattern units and calculate the coupling effects of multiple physical fields such as optics and photoresist chemical reactions, resulting in a long time of up to tens of hours or even days for a single full-chip correction. At the same time, model-based bias correction requires extremely high hardware computing resources, relying on large-scale CPU / GPU cluster parallel computing.

[0032] 3. High cost of training data acquisition and strong data dependence, limited generalization ability: AI learns the mapping relationship between pattern features and bias in historical data to directly output the correction amount. This method needs to rely on a large amount of historical data (mapping relationship between pattern features and measured bias) for training, but the data distribution of different process nodes, lithography equipment or design types is significantly different, and the model is prone to failure in new scenarios. Moreover, high-quality training data relies on wafer fabrication and scanning electron microscope (SEM) detection, and the cost of acquisition is high.

[0033] Therefore, the present disclosure provides an improved solution.

[0034] Embodiments of the present disclosure provide an improved optical proximity correction method. The method comprises: performing optical proximity correction on a first part of a layout to generate a first corrected part; determining an initial offset value for performing optical proximity correction on original layout data of a second part based on the original layout data of the first part and the corrected layout data of the first corrected part; and performing optical proximity correction on the second part based on the initial offset value to generate a second corrected part.

[0035] Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0036] Figure 1 A schematic diagram of an example environment 100 in which embodiments according to the present disclosure can be implemented is shown. As shown, the example environment 100 includes a computing device 110 and a client 120. Figure 1 The computing device 110 can interact with the client 120. For example, the computing device 110 can receive an input message from the client 120 and output a feedback message to the client 120. In some embodiments, the input message from the client 120 can be layout data. The computing device 110 can perform corresponding mathematical operations on the layout data and output the corresponding operation results to the client 120.

[0037] The computing device 110 can interact with the client 120. For example, the computing device 110 can receive an input message from the client 120 and output a feedback message to the client 120. In some embodiments, the input message from the client 120 can be layout data. The computing device 110 can perform corresponding mathematical operations on the layout data and output the corresponding operation results to the client 120.

[0038] In some embodiments, the computing device 110 can include, but is not limited to, a personal computer, a server computer, a handheld or laptop device, a mobile device such as a mobile phone, a personal digital assistant (PDA), a media player, etc., a consumer electronic product, a mini computer, a mainframe computer, a cloud computing resource, etc.

[0039] It should be understood that the structure and function of the example environment 100 described for illustrative purposes only are not intended to limit the scope of the subject matter described herein. The subject matter described herein can be implemented in different structures and / or functions. The environment is merely illustrative and is not intended to limit the applicability of the embodiments of the present disclosure to the environment.

[0040] To more clearly explain the principles of the present disclosure scheme, the following will be described in more detail with reference to Figure 2

[0041] Figure 2 A flowchart of a method 200 for optical proximity correction is shown according to some embodiments of the present disclosure.

[0042] At block 202, a first portion in a layout is subjected to optical proximity correction to generate a first corrected portion. The layout can be divided into two or more portions, any of which can serve as the first portion.

[0043] In some embodiments, the layout can also be divided into a large number of tiles. In some embodiments, the layout can be partitioned into up to millions of tiles by an EDA tool. Each portion includes a corresponding number of tiles, and the number of tiles in each portion can be the same or different. It should be understood that the present disclosure is not limited thereto, and the layout can also not be divided into multiple tiles. The advantage of dividing into a large number of tiles is that it facilitates distributed processing of the tiles, such as by a distributed processing (DP) architecture or a multi-threading architecture. In the case of division into multiple tiles, the multiple tiles can be assigned to respective DP nodes of the distributed architecture according to a predetermined order; and the tiles at each node are subjected to optical proximity correction at the respective node. The DP nodes can be client or CPU cores.

[0044] In some embodiments, the tiles can be divided by rows and columns, and each tile corresponds to a unique number, such as the first row, the first column, denoted as Tile[1, 1]. The tiles can be assigned in a specific order, such as row by row, i.e., in the order of [0, 0], [0, 1],..., [0, n], [1, 0], [1, 1],..., [1, n]... Embodiments of the present disclosure are not limited thereto, and the tiles can be assigned in various other manners as needed.​

[0045] The first portion can include a predetermined number of tiles, such as 1000, and the OPC correction can be performed on the tiles of the first portion. The OPC correction can be performed using a conventional OPC correction scheme to generate a first correction. In some embodiments, after the correction is performed, the relevant data can be used to generate training data, which is described further below.

[0046] At block 204, initial offset values for performing OPC on the second portion of the original layout data are determined based on the original layout data of the first portion and the corrected layout data of the first correction portion.

[0047] In some embodiments, the original layout data of the first portion and the corrected layout data of the first correction portion can be analyzed using conventional methods to determine a deviation between the original layout data and the corrected layout data. Based on the deviation, the initial offset values for performing OPC on the second portion of the original layout data can be predicted. The principle of this method is that since the lithography conditions for the same layout are consistent, the offset conditions, such as the initial offset values, for the remaining portion of the layout can be predicted based on the data from the previous portion of the layout.

[0048] In some embodiments, the AI subsystem can be used to predict the initial offset values for the subsequent portions. Specifically, the AI subsystem can be trained using training data to predict the initial offset values for the subsequent portions. It should be understood that the present disclosure is not limited in this regard. In some embodiments, the AI subsystem can be used to predict the initial offset values for the subsequent portions directly based on the data input to the AI subsystem without training.

[0049] In some embodiments, when the OPC correction is completed for the tiles of the portion DP, such as the first portion (e.g., 1000 tiles), the portion data is selected to form a training data set based on the corresponding input layout information and the final offset results.

[0050] The portion data mentioned above can be input layout data (as input) and corresponding final offset data (as output). The training of the AI subsystem often relies on a set of input (input) and output (output) data sets. Through training, the AI subsystem can directly infer the offset data based on the input layout information. The selection of the portion data is to select a more typical data set, such as a data set with (almost) empty layout, which is filtered out, thereby improving the training efficiency and quality. The data set with (almost) empty layout can be understood as a layout without (or almost without) graphics. In addition, as mentioned above, some AI systems can also directly predict the initial offset values for the subsequent portions based on the data input to the AI system without training.

[0051] In some embodiments, the first training data can be determined based on the original layout data of the first part and the corrected layout data of the first correction part; and the AI subsystem is trained with the first training data to predict the initial offset value.

[0052] In some embodiments, the layout data satisfying the predetermined condition and the corrected layout data are determined as the first training data. The predetermined condition can be set by the user according to actual needs or set according to other relevant standards.

[0053] In some embodiments, the layout data satisfying the predetermined condition includes layout data whose average value of at least one of the following parameters is within a corresponding threshold range: critical dimension (CD); space; and pitch. That is, whether the average critical dimension, space, and pitch of the pattern in the case are within the corresponding threshold range can be determined as whether it is typical layout data.

[0054] The following is a further explanation of the three parameters. In the EDA (Electronic Design Automation) industry, especially in the physical design, manufacturing process, and lithography of chips, CD, space, and pitch are the most basic and key concepts to describe the size and spacing of geometric patterns on integrated circuit layout. Their definitions are as follows:

[0055] 1) Critical Dimension (CD);

[0056] Meaning: It refers to the width of a line on a layout (for wiring layers) or the side length of a via / contact hole (for via layers), etc. the most critical design dimension.

[0057] Importance: CD is usually the main basis for naming a certain manufacturing process node (such as 28nm, 14nm, 7nm, the number refers to the typical minimum channel length or gate CD of the node). It directly reflects the minimum feature size that the process can achieve, and determines the performance of the transistor and the density of the circuit.

[0058] Example: On a photomask, the width of a metal trace is its CD. The width of the metal line formed after actual exposure on the wafer is called printed CD or final CD. The difference between the design target CD and the actual printed CD (caused by optical effects, etching effects, etc.) is an important indicator for process development and lithography model correction.

[0059] 2) Space, also known as spacing;

[0060] Definition: The minimum distance between two adjacent, same-type geometric shapes on the layout.

[0061] Importance: The space specifies the minimum safe distance between different structures (e.g., between wires on the same layer, between contact holes). Adhering to this minimum space is to ensure that: during manufacturing, the patterns will not stick together (bridge) because they are too close; during circuit operation, the electrical isolation requirements are met, avoiding short circuits or signal crosstalk; the structure has sufficient mechanical strength (such as metal wires).

[0062] Example: The minimum distance between the edges of two parallel metal wires is the minimum space of the metal layer. The minimum distance between the active regions of two adjacent transistors is the minimum space of the active layer.

[0063] 3) Pitch, also known as spacing (note the difference from Space).

[0064] Definition: The distance from the center of a set of regular, repeating geometric units of the same type on the layout to the center of the adjacent unit. In simpler terms, it is the length of a complete structural unit (such as a line plus its space with adjacent lines) in the repeating direction.

[0065] Calculation: Pitch = CD + Space (for parallel lines with equal width and equal spacing).

[0066] For example, if the CD of a line is 50 nm and the minimum space with the adjacent line is 50 nm, then their pitch is 50 nm + 50 nm = 100 nm.

[0067] Importance: The pitch directly reflects the integration density of the circuit. The smaller the pitch, the more components (wires, transistors, etc.) can be placed in a unit area, resulting in a more powerful and lower-cost chip. However, reducing the pitch is one of the biggest challenges in process manufacturing, as it is more difficult than simply reducing the CD (subject to the combined constraints of lithography resolution limit, etching precision, overlay precision, etc.).

[0068] Example: The array structure of memory (such as DRAM, SRAM) usually has a very small pitch (called half-pitch), which is an important indicator of storage density. The gate pitch of transistors in the standard logic cell library is also a key process parameter.

[0069] Summary and relationship:

[0070] Width (CD): The minimum size of a single feature.

[0071] Space (Space): The minimum distance between two adjacent features.

[0072] Pitch: the sum of CD and adjacent space, representing the length of the minimum repeating unit.

[0073] Simple formula: Pitch = CD + Space (applicable to uniform line width, space, and adjacent same direction structures).

[0074] The core significance of the above three parameters is that the three parameters jointly define the geometric rules and physical limits of the integrated circuit layout. EDA tools must strictly comply with the process design rules provided by the manufacturer during the design stage (routing, DRC, OPC, etc.), and a large number of these rules specify the minimum CD (min CD), minimum space (min Space), and minimum pitch (min Pitch) under different layers and different scenarios. Optimizing and continuously reducing CD, space, and pitch are the core goals driving the continuous development of semiconductor processes.

[0075] In addition, it should be pointed out that the layout data that meets the predetermined conditions is not limited to the CD, space, and pitch-related data described above, but other data can be selected as typical data according to actual needs.

[0076] The above embodiments describe the manner of determining the first training data, and the embodiments of the present disclosure are not limited thereto. Other manners of determining the first training data can be adopted as needed, as long as the selected data helps to improve training efficiency and quality.

[0077] In some embodiments, the correction layout data of the first correction part can be subjected to mask rule check (MRC); and in the case where the correction layout data meets the constraint conditions of the mask rule, the correction layout data and the original layout data corresponding to the correction layout data are determined as training data. Specifically, whether the final offset result violates the basic constraints (such as mask rule check constraints, etc.) can be judged through the final offset result, and it is decided whether to use the selected data as training data; for example, the MRC check is performed on the final offset result, and if it is found that the final offset result does not meet the MRC constraint, the layout data corresponding thereto is not used as training data.

[0078] After the design pattern is subjected to OPC processing (post-OPC), mask rule check (MRC) is usually performed before it is sent to the mask production factory. MRC checks the "post-OPC" data to confirm that all patterns therein are suitable for mask preparation processes. The rules in MRC are provided by the mask factory, and the OPC engineer inputs these rules into the MRC software.

[0079] The MRC rules mainly include the following contents:

[0080] (1) Specify the minimum line width (minWidth) and minimum line spacing (minSpace) of the graphics; or set minimum values ​​for the line width and spacing of sub-resolution assist features (SRAF).

[0081] (2) Specify the minimum value of the corner-to-corner spacing of the graphics; or specify the distance between the sub-resolution auxiliary graphics (SRAF) and the main graphics.

[0082] (3) Limit the minimum area of ​​the auxiliary figure.

[0083] The defined training data (e.g., the first training data) can be used by the AI ​​subsystem to predict the initial offset values ​​of the layout in subsequent parts (e.g., the second part). As is known in the industry, the initial offset values ​​are used as the initial values ​​for iterations in the OPC process. In other words, the initial offset values ​​are the values ​​of the original layout after initial bias. The lithography simulation system performs iterative simulation processing based on the initial values ​​of the iterations, and determines whether convergence has occurred based on the difference between the simulation results and the target values. The layout corresponding to convergence can be identified as the OPC-corrected layout. This will be further described later.

[0084] As mentioned earlier, in some embodiments, the AI ​​subsystem can be trained using the first training data to predict initial offset values ​​for optical proximity correction of the original map data in the second part. The second part may include a second number of blocks. The second number may be the same as or different from the first number.

[0085] In computational lithography, bias is an action that can be defined as follows:

[0086] Definition: In the photolithography mask design stage, the distortion of silicon wafer patterns caused by light diffraction and interference is offset by pre-compensating geometric deviations of the pattern (such as edge offset, auxiliary pattern addition).

[0087] Technical goal: To ensure that the final silicon wafer pattern (such as chip linewidth) is consistent with the design goal and to avoid defects such as "bridging" (adjacent lines sticking together) or "line shortening".

[0088] The following reference Figure 3 , Figure 3 This diagram illustrates the principle of offsetting the layout during optical proximity correction. Specifically, Figure 3The diagram illustrates the process of correcting deviations in the layout. Based on the results of the photolithography simulation, the edges of the original layout are moved to generate a new layout, and then the photolithography simulation is performed again, and so on.

[0089] like Figure 3 As shown, Figure 3 The original layout is shown in (A), where point 310 on the edge 302 of the layout graphic is a cutting point, which is used to indicate the cutting position where the edge that makes up the layout is divided into several small segments.

[0090] Figure 3 (B) shows the first offset edge 304 obtained by performing the first round of offset on the edges of the original layout;

[0091] Figure 3 (C) shows the k-th offset edge 306 obtained by offsetting the edges of the original layout in the k-th round;

[0092] Figure 3 The nth offset edge 308 is shown in (D) as obtained by offsetting the edges of the original layout in the nth round.

[0093] That is, through n rounds of offset, the original layout is finally corrected to look like the "nth round offset (bias)". Such a layout (according to the results of photolithography simulation) will produce the most ideal effect when photolithographically ...

[0094] In some embodiments, the AI ​​subsystem can be trained in real time using a training dataset to predict the initial offset values ​​of subsequent blocks, such as... Figure 3 The value corresponding to the first offset edge 304 shown in (B). That is, the initial offset value is the value of the original layout after initial offset. Then, this initial offset value is used for OPC correction of subsequent DP blocks. After some subsequent DP blocks have completed OPC correction, training data is selected from them and fed back to the AI ​​subsystem (i.e., training the AI ​​subsystem) to update the network weights until all DP blocks have completed OPC correction. Because the lithography conditions of the same layout are consistent, the initial offset value of the remaining parts of the layout can be predicted based on the training data from the previous part of the layout. The training of the AI ​​subsystem can adopt the traditional training method.

[0095] As mentioned earlier, in some embodiments, the initially predicted initial offset value can be used for OPC correction of all subsequent blocks. This approach eliminates the need for subsequent AI subsystem training, thereby accelerating the entire correction process.

[0096] In other embodiments, the initially predicted initial offset values can be used for OPC correction of the second portion of the blocks; then, the AI subsystem can be fed back the initial offset values from the second portion and update the network weights of the AI subsystem to predict the initial offset values for the third portion. And so on. In this case, the initial offset values for each portion are different. In this way, by constantly selecting training data from each portion, feeding back to the AI subsystem (i.e., training the AI subsystem), and updating the network weights, the network performance can be optimized to better fit the training data and improve the prediction accuracy.

[0097] Based on the initial offset values predicted by the AI subsystem, the simulation convergence can be accelerated, thereby significantly reducing the number of iterations of the model-based bias simulation and accelerating the OPC correction process.

[0098] At block 206, the second portion is subjected to optical proximity correction based on the initial offset values to generate a second corrected portion.

[0099] The optical proximity correction here can be performed in a conventional OPC correction manner. In this process, the initial offset values are used as initial values for the lithography simulation model to perform optical proximity correction to determine the corresponding simulation values and the difference between the simulation values and the target values; and in the case where the difference between the simulation values and the target values meets a predetermined condition, the corrected second portion is determined as the second corrected portion, i.e., it is determined that the OPC correction meets the expectation.

[0100] When the OPC correction of the second portion of blocks is completed, a training data set is again selected from the second portion of blocks, the AI subsystem is trained in real time, and the initial offset values for subsequent blocks (third portion of blocks) are predicted for OPC correction of the third portion of blocks.

[0101] In some embodiments, the optical proximity correction of the second portion based on the initial offset values to generate a second corrected portion can include iteratively performing optical proximity correction starting from the initial offset values to determine the corresponding simulation values and the target values; and in response to the difference between the simulation values and the target values meeting a predetermined condition, determining the corrected second portion as the second corrected portion.

[0102] In some embodiments, the second training data can be determined based on the original layout data of the second portion and the corrected layout data of the second corrected portion; the AI subsystem is trained with the second training data to predict the initial offset values for optical proximity correction of the original layout data of the third portion. And so on, the initial offset values for the subsequent portion can be iteratively predicted based on the training data from the previous portion to perform optical proximity correction on the subsequent portion until the optical proximity correction of each portion of the layout is completed.

[0103] In some embodiments, the initial offset value may be used as the initial offset value for the remaining portions of the layout; and optical proximity correction may be performed on each portion based on the initial offset value.

[0104] Therefore, in some embodiments, the initial offset value can be iteratively fed back based on the training data from the previous part and the network weights of the AI ​​subsystem can be updated to predict the initial offset value of the next part, thereby performing optical proximity correction on the next part until the optical proximity correction of each part of the layout is completed.

[0105] In some embodiments, after optical proximity correction is completed in each part other than the first part, the AI ​​subsystem is trained based on the corresponding training data to determine new network weights respectively; and the network weights of the AI ​​subsystem are updated with the new network weights respectively.

[0106] The following is combined with Figure 4 Describe it. Figure 4 A schematic diagram illustrating the training and prediction of an AI subsystem for optical proximity correction according to some embodiments of the present disclosure is shown.

[0107] like Figure 4 As shown, this illustrates the AI ​​subsystem and the first, second, and Nth blocks. Figure 4 As shown, the block is divided into N parts, where N can be an integer greater than or equal to 2. The output data for each part is an offset value (essentially what each pattern should ultimately look like after correction), used to guide the initial correction of subsequent blocks.

[0108] In some embodiments of this disclosure, the AI ​​subsystem may employ a Convolutional Neural Network (CNN) or Graph Neural Network (GNN) architecture to compress complex physical models into lightweight networks through knowledge distillation, reducing inference time. The model can be encapsulated as a Python / C++ library (or other forms of library as needed) and integrated into EDA tools. It should be understood that the embodiments of this disclosure are not limited thereto.

[0109] Knowledge distillation is a machine learning model compression method that aims to transfer the knowledge of large models to small models to improve model performance and generalization ability. The core idea of knowledge distillation is to transform the knowledge of complex models into more concise and effective representations, so that they can maintain high performance while reducing computational complexity and resource requirements. As an advanced machine learning technology, its core concept is to extract and "inoculate" the knowledge and experience of a complex and large model (usually called a teacher model) to a smaller and simpler model (student model). This process not only preserves the predictive ability and accuracy of the teacher model, but also significantly improves the running efficiency and computational performance of the student model, making it perform well in resource-constrained environments.

[0110] In some embodiments of the present disclosure, the first partial block can be first subjected to OPC correction to generate a corrected first partial block (which can be referred to as a first corrected block). By performing OPC correction on the first partial block, an offset result can be obtained. The offset result is fed back to the AI subsystem, as shown by the arrow in Figure 4 .

[0111] As mentioned earlier, data can be selected from the first partial block to initially train the AI subsystem. After training is complete, the initial offset value of the second partial block can be inferred. Specifically, data can be selected based on the layout information (input) of the first partial block and the corresponding offset result as training data. In other words, training data can be selected based on the original layout data and the corrected layout data. The AI subsystem predicts the initial offset value of the second partial block by using the training data, i.e., the first offset initial value as shown in Figure 4 .

[0112] The second partial block is subjected to OPC correction to generate the offset result of the partial block, which can be fed back to the AI subsystem, as shown in Figure 4 . By feeding back the result of the second partial block to the AI subsystem, the network weights can be updated to make the AI subsystem more accurate (compared to the initial training). The third partial block uses a more accurate AI subsystem to infer the offset initial value, and the result is fed back to the AI subsystem again. In this way, for example Figure 4 , the OPC correction of the Nth partial block can be based on the (N-1)th offset initial value, and N is an integer greater than 2.

[0113] In some embodiments, the Nth portion is predicted based on the 1st, 2nd, …, N-1th portion training data, instead of only the N-1th portion training data. Thus, in some embodiments, the initial offset value can be iteratively fed back based on the training data from the previous portion and the network weights of the AI subsystem are updated to predict the initial offset value of the subsequent portion, so as to perform optical proximity correction on the subsequent portion, until the optical proximity correction of each portion of the layout is completed.

[0114] Updating the network weights in a neural network can optimize the network performance, enabling it to better fit the training data and improve prediction accuracy. By continuously adjusting the weights in the network, the neural network can adapt to the training data, thereby improving the prediction ability on the test data. In addition, in a non-stationary environment (such as real-time streaming data), continuously updating the weights enables the model to track data changes.

[0115] In summary, the AI subsystem completes the initial training through the first portion block, and after each subsequent portion is completed, the AI subsystem is continuously fed back and updated, so that the inference of the AI subsystem becomes more and more accurate.

[0116] In addition, in some embodiments of the present disclosure, the size of each block can be the same or different. In addition, the number of blocks in each portion can be the same or different.

[0117] In some embodiments of the present disclosure, the AI subsystem can be trained, predicted, and dynamically fed back in real time. In some embodiments of the present disclosure, the AI subsystem is trained in real time. AI training refers to adjusting model parameters through a data set to enable it to learn the inherent laws of the data, and AI inference refers to applying the trained model to new data to generate a prediction result. By selecting the input layout and the corresponding final offset data, the AI subsystem is trained to enable it to predict offset values based on input layouts. Then, the input layout data of the subsequent block can be fed to the AI subsystem, and the offset data is inferred through the AI subsystem, i.e., the initial offset value of the subsequent block is predicted.

[0118] In known conventional solutions, each block has no initial offset value, or can be understood as having an initial offset value of 0. An initial offset value of 0 means that iterative simulation processing is started based on the original layout. In some embodiments of the present disclosure, the initial offset value is predicted based on the AI subsystem, and the offset initial value is close to or equal to the final offset value (the final offset result, or the final corrected layout). Therefore, the model-based offset iterative simulation can quickly converge, thereby significantly reducing the number of model-based offset iterative simulations.

[0119] In some embodiments of the present disclosure, when the partial block is completed with OPC correction, a training data set is selected from the partial block to train the AI subsystem in real time, predict the initial offset value of the subsequent block, and feedback according to the offset result of the subsequent block. This process design mechanism is one of the key cores of the embodiments of the present disclosure. This process design mechanism improves the model-based offset calculation efficiency, reduces the training cost, and has wide applicability.

[0120] If the AI subsystem does not predict the initial offset value, it can be understood that the initial offset value is 0. At this time, the final offset value is obtained through many rounds of model-based offset iteration simulation: the offset value Based-1 is obtained through the first round of simulation, the offset value Based-2 is obtained through the second round of simulation if it is found that there is no convergence, and so on until the offset value Based-k is obtained through the kth round of simulation, and finally the convergence is obtained. By predicting the initial offset value through the AI subsystem, the offset value Based-i is directly obtained, which is close to the offset value Based-k. Therefore, only one or two iterations are required to obtain the offset value Based-k. Therefore, the number of model-based deviation iteration simulations can be significantly reduced. Bias-k can be understood as the result of the kth offset.

[0121] That is, if there is no AI subsystem, the final converged result is obtained through complete n rounds of calculation simulation starting from the original layout. In the present application, under the prediction of the AI subsystem, the result close to the nth offset value (bias) is obtained before the first lithography simulation, so only a few lithography simulations are required to achieve convergence.

[0122] In some embodiments of the present disclosure, after the rest of the block except the first part is completed with optical proximity correction, the AI subsystem is trained based on the corresponding training data to determine new network weights; and the network weights before the AI subsystem are updated with the new network weights.

[0123] In some embodiments of the present disclosure, as shown in Figure 4 The AI subsystem and the lithography simulation model jointly act on the OPC correction process.

[0124] Some embodiments of the present disclosure can significantly accelerate the OPC process of the layout by combining the AI subsystem with the lithography simulation system.

[0125] The above embodiments describe in detail the acceleration design method of offset correction, which significantly improves the speed of model-based offset correction, reduces the consumption of computing resources for offset correction, and the scheme of the embodiments of the present disclosure uses real-time training, does not depend on historical data, has wide applicability, and is effective for different process nodes, lithography equipment or design types.

[0126] Embodiments of the present disclosure provide a simulation model, comprising: a lithography model; and an artificial intelligence subsystem coupled with the lithography model; wherein the lithography model and the artificial intelligence subsystem are configured to perform the method in the above embodiments.

[0127] Embodiments of the present disclosure propose a model-based bias correction method, which trains in real time through an AI subsystem and predicts the initial bias value of a block, significantly accelerating the bias correction process. Specifically, the method trains the AI subsystem in real time according to the bias results of the blocks that have been corrected in the OPC process, and predicts the initial bias value of the blocks that have not been corrected, thereby reducing the number of iterations of the model-based bias correction, accelerating the simulation convergence, and saving the consumption of computing time and computing resources.

[0128] Some embodiments of the present disclosure provide a method for optical proximity correction. It should be noted that the examples in the above embodiments are only for illustrating the schemes of the embodiments of the present disclosure, and are not used to limit the schemes of the present disclosure. The embodiments of the present disclosure can be corrected and deformed as needed, for example, the AI subsystem trains in real time and predicts without a feedback mechanism. Without the feedback mechanism, it means that the network weights of the AI subsystem are not updated.

[0129] The schemes of some embodiments of the present disclosure have the following advantages:

[0130] Improving computing efficiency: the number of blocks of a chip layout in OPC usually reaches millions, and by training the AI subsystem in real time and predicting the initial bias value, the number of iterations of the model-based bias of most blocks is significantly reduced, the computing time is reduced, and the consumption of computing resources is reduced. A reasonable initial bias value can accelerate convergence, even if the initial prediction is not accurate enough, it can be gradually corrected through iterative optimization, avoiding redundant calculation caused by completely random initialization, so it also does not affect the runtime efficiency. "Completely random initialization" means that in a typical OPC, the initial bias value of the graph is the value of completely random initialization before the first round of lithography simulation, which is corrected by using a lithography simulation model.

[0131] Enhancing applicability: the embodiments of the present disclosure greatly improve the applicability by real-time training, which is effective for different process nodes, lithography equipment or design types.

[0132] Reducing training cost: the present disclosure avoids relying on historical data by real-time training, thereby greatly reducing the training cost.

[0133] As can be seen, the schemes of the embodiments of the present disclosure have brought significant beneficial effects in computing efficiency, applicability, training cost, etc.

[0134] An electronic device is also disclosed in embodiments of this disclosure. The electronic device includes: a processor; and a memory coupled to the processor, the memory having instructions stored therein, the instructions causing the device to perform actions when executed by the processor, the actions including: performing optical proximity correction on a first portion of a layout to generate a first corrected portion; determining an initial offset value for performing optical proximity correction on the original layout data of a second portion based on the original layout data of the first portion and the corrected layout data of the first corrected portion; and performing optical proximity correction on the second portion based on the initial offset value to generate a second corrected portion.

[0135] The embodiments of this disclosure also disclose a computer-readable storage medium having machine-executable instructions stored thereon, which, when executed by a processor, implement the method according to the embodiments of this disclosure.

[0136] It should be understood that the embodiments shown in the accompanying drawings are merely illustrative of some embodiments of this disclosure and are not intended to limit this disclosure. Embodiments of this disclosure may also have various other forms.

[0137] Figure 5 Schematic block diagrams of electronic devices according to some exemplary embodiments of the present disclosure are shown. The electronic devices are intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic devices may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0138] like Figure 5 As shown, device 500 includes a CPU 501, which can perform various appropriate actions and processes based on a computer program stored in read-only memory (ROM) 502 or a computer program loaded from storage unit 508 into random access memory (RAM) 503. RAM 503 may also store various programs and data required for the operation of device 500. CPU 501, ROM 502, and RAM 503 are interconnected via bus 504. Input / output (I / O) interface 505 is also connected to bus 504.

[0139] A plurality of components in the device 500 are connected to the I / O interface 505, including an input unit 506, such as a keyboard, a mouse, etc., an output unit 507, such as various types of displays, speakers, etc., a storage unit 508, such as a magnetic disk, a compact disk, etc., and a communication unit 509, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 509 allows the device 500 to exchange information / data with other devices through a computer network, such as the Internet, and / or various telecommunication networks.

[0140] The various processes and processes described above, such as the method 200, can be performed by the CPU 501. For example, in some embodiments, the method 200 can be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 508. In some embodiments, part or all of the computer program can be loaded and / or installed on the device 500 via the ROM 502 and / or the communication unit 509. When the computer program is loaded into the RAM 503 and executed by the CPU 501, one or more steps of the method 200 described above can be performed.

[0141] The schemes according to embodiments of the present disclosure can be a method, an apparatus, a system, and / or a computer program product. The computer program product can include a computer readable storage medium having computer readable program instructions embodied therewith to carry out various aspects of the present disclosure. The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable program instructions can be downloaded to various computing / processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and / or a wireless network.

[0142] The above has described the embodiments of the present disclosure, and the above description is exemplary, only optional embodiments of the present disclosure, and is not exhaustive, and is not used to limit the present disclosure. Although the claims in the present application have been drafted with respect to a specific combination of features, it should be understood that the scope of the present disclosure also includes any novel feature or any novel combination of features disclosed herein, explicitly or implicitly, or any generalization thereof, regardless of whether it is involved in any of the presently claimed schemes. It should be understood that new claims can be drafted to these features and / or combinations of features during the examination of the present application or any further application derived therefrom.

[0143] The selection of the terms to be used in this document is intended to best explain the principles of the embodiments, practical application, or technical improvement over the prior art, or to enable other ordinarily skilled in the art to understand the embodiments disclosed herein. Various modifications and changes can be made thereto by those skilled in the art which fall within the scope of the disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the disclosure should be included in the protection scope of the disclosure.

Claims

1. An optical proximity correction method, comprising: performing optical proximity correction on a first portion of a layout divided into two or more portions to generate a first corrected portion, wherein the layout is divided into a plurality of tiles and the first portion includes a first number of tiles therein; determining an initial offset value for performing optical proximity correction on original layout data of a second portion based on original layout data of the first portion and corrected layout data of the first corrected portion, wherein the second portion includes a second number of tiles therein; and performing optical proximity correction on the second portion based on the initial offset value to generate a second corrected portion.

2. The method of claim 1, wherein determining an initial offset value for performing optical proximity correction on original layout data of a second portion based on original layout data of the first portion and corrected layout data of the first corrected portion comprises: determining first training data based on original layout data of the first portion and corrected layout data of the first corrected portion; and training an AI subsystem with the first training data to predict the initial offset value.

3. The method of claim 2, wherein determining first training data based on original layout data of the first portion and corrected layout data of the first corrected portion comprises: determining layout data satisfying predetermined conditions and the corrected layout data as the first training data.

4. The method of claim 3, wherein the layout data satisfying predetermined conditions includes layout data whose average value of at least one of the following parameters is within a corresponding threshold range: critical dimension; pitch; and period.

5. The method of claim 3, wherein determining layout data satisfying predetermined conditions and the corrected layout data as the first training data comprises: performing mask rule checking on corrected layout data of the first corrected portion; and determining the corrected layout data and original layout data corresponding to the corrected layout data as the first training data in response to the corrected layout data complying with constraint conditions of mask rules.

6. The method of claim 1, further comprising: using the initial offset value as an initial offset value for each of remaining portions in the layout; and performing optical proximity correction on the each of the portions based on the initial offset value, respectively.

7. The method of claim 2, further comprising: iteratively predicting an initial offset value for a next portion based on training data from a previous portion to perform optical proximity correction on the next portion until optical proximity correction on each of the portions of the layout is completed.

8. The method of claim 2, further comprising: iteratively feeding back an initial offset value based on training data from a previous portion and updating network weights of the AI subsystem to predict an initial offset value for a next portion to perform optical proximity correction on the next portion until optical proximity correction on each of the portions of the layout is completed.

9. The method of claim 1, wherein performing optical proximity correction on the second portion based on the initial offset value to generate a second corrected portion comprises: ​ ​ ​ iteratively performing optical proximity correction starting from the initial offset value to determine a corresponding simulation value and a target value; and in response to a difference between the simulation value and the target value satisfying a predetermined condition, determining the second portion of correction as the second correction portion.

10. The method of claim 2, further comprising: after each portion other than the first portion completes optical proximity correction, training an AI subsystem based on corresponding training data to determine new network weights, respectively; and updating network weights of the AI subsystem with the new network weights, respectively.

11. The method of any one of claims 1-10, further comprising: allocating the plurality of tiles to respective nodes of a distributed architecture according to a predetermined order; and performing the optical proximity correction on the tiles at respective nodes, respectively.

12. An emulation model, comprising: a lithography model; and an artificial intelligence subsystem coupled to the lithography model; wherein the lithography model and the artificial intelligence subsystem are configured to perform the method of any one of claims 1-11.

13. An electronic device, comprising: a processor; and a memory coupled to the processor, the memory having stored therein instructions which when executed by the processor cause the device to perform acts comprising: performing optical proximity correction on a first portion of a layout divided into two or more portions to generate a first correction portion, wherein the layout is divided into a plurality of tiles and the first portion includes a first number of tiles; determining an initial offset value for performing optical proximity correction on original layout data of a second portion based on original layout data of the first portion and corrected layout data of the first correction portion, wherein the second portion includes a second number of tiles; and performing optical proximity correction on the second portion based on the initial offset value to generate a second correction portion.

14. A computer-readable storage medium having stored thereon machine executable instructions which when executed by a processor cause the processor to implement the method of any one of claims 1-11. ​

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