Distributed low-latency cache system and cache data aggregation and expulsion method

Abstract

The invention relates to the technical field of cloud storage, and discloses a distributed low-latency cache system and a cache data aggregation and expulsion method.According to the distributed low-latency cache system, aggregation scheduling is conducted on cache data according to access operation through a cache layout module based on semantic sensitivity; according to the method, the data which is frequently accessed by the application client and has semantic correlation can be aggregated and stored together, so that the delay of accessing the cache system by the application client in a single operation is remarkably reduced in a distributed environment, and the cache access efficiency is improved. Furthermore, through a cost-based cache expelling module, the cache data access frequency and the acquisition cost are comprehensively considered by utilizing a self-adaptive exponential smoothing method, which cache data do not conform to the retention condition of the current cache system can be accurately judged, and the cache data which do not conform to the condition are expelled to a persistent storage system; the cache hit rate is increased, the delay of accessing the cache data by the application client is reduced, and the overall performance and stability of the cache system are further improved.

Description

Technical Field

[0001] The present invention relates to the field of cloud storage technology, and in particular to a distributed low-latency cache system, a cache data aggregation and eviction method. Background Art

[0002] Data storage systems are essential infrastructure in modern society and serve as the underlying data foundation for internet applications. In real-world production environments, data loss can have serious consequences, even costing businesses and individuals financially. Therefore, an ideal data storage system must ensure data is protected under all circumstances. To achieve this, modern data storage systems incorporate persistent data storage, integrating non-volatile persistent storage at the lowest level of the system. However, this non-volatile persistent storage often exhibits high data access latency, requiring a lengthy process for application clients to read or write data. To address this issue, developers have proposed inserting a fast cache system between application clients and non-volatile persistent storage. This ensures data persistence while providing fast read and write services for application clients.

[0003] However, the current cache system has the following problems that lead to high latency: (1) low cache hit rate; (2) the data that application clients want to access is scattered across multiple different storage areas or different physical nodes, resulting in a low access speed for application clients to access data, which in turn increases the latency of application clients accessing data. Summary of the Invention

[0004] In view of this, the present invention provides a distributed low-latency cache system, cache data aggregation and eviction method to solve the current problem of high latency in the cache system.

[0005] In a first aspect, the present invention provides a distributed low-latency cache system, which is connected to an application client and a persistent storage system respectively; the low-latency cache system includes: a semantically sensitive cache layout module, a cache data module, and a cost-based cache eviction module;

[0006] The semantically sensitive cache layout module is used to receive multiple access operations sent by the application client and multiple initial cache data sent by the persistent storage system; the semantically sensitive cache layout module is also used to aggregate and schedule multiple initial cache data according to multiple access operations, obtain multiple target cache data corresponding to each access operation, and send the multiple target cache data corresponding to each access operation to the cache data module for storage; the cost-based cache eviction module is used to obtain multiple target cache data corresponding to each access operation in the cache data module, and use the adaptive exponential smoothing method to evict unqualified target cache data to the persistent storage system based on the access frequency and acquisition cost of each target cache data.

[0007] The distributed low-latency cache system provided by the present invention connects the distributed low-latency cache system to the application client and the persistent storage system respectively, so that the application client can quickly access the cache data, reduce the frequency of direct access to high-latency persistent storage, and improve the overall system response speed. Furthermore, through the semantically sensitive cache layout module, the cache data is aggregated and scheduled according to the access operation, and the data frequently accessed by the application client and having semantic relevance can be aggregated and stored together. In a distributed environment, the delay of the application client's single operation accessing the cache system is significantly reduced, and the cache access efficiency is improved. Furthermore, through the cost-based cache eviction module, the adaptive exponential smoothing method is used to comprehensively consider the cache data access frequency and acquisition cost, and it is possible to accurately determine which cache data does not meet the retention conditions of the current cache system, and evict the cache data that does not meet the conditions to the persistent storage system, thereby improving the cache hit rate, reducing the delay of the application client accessing the cache data, and further improving the overall performance and stability of the cache system.

[0008] In an optional embodiment, the low-latency cache system also includes: a background terminal, used to monitor and obtain the number of working threads of the low-latency cache system, and input the number of working threads into a preset long short-term memory network prediction model to obtain the physical CPU number of each working thread, where the working threads include read working threads and write working threads.

[0009] The distributed low-latency cache system provided by the present invention can dynamically allocate physical CPU resources according to the actual needs of worker threads through background monitoring and combined with a preset long-short-term memory network prediction model, avoiding idle waste or excessive competition of read / write worker thread resources, alleviating CPU competition, eliminating the context switching cost caused by frequent CPU switching, and improving the processing performance of the cache system.

[0010] In an optional embodiment, the low-latency cache system further includes: a cache pre-fetch module, configured to obtain a plurality of initial cache data from a persistent storage system, and send the plurality of initial cache data to a semantically sensitive cache layout module.

[0011] The distributed low-latency cache system provided by the present invention further reduces the access delay of application clients and improves the response speed of the cache system by pre-fetching data that may be accessed by application clients into the cache system in advance, and cooperates with a semantically sensitive cache layout module, thereby enabling upper-layer applications to have a smoother user experience.

[0012] In an optional embodiment, the low-latency cache system further includes: a persistence module, configured to send the received target cache data that does not meet the conditions and is evicted by the cost-based cache eviction module to a persistent storage system.

[0013] The distributed low-latency cache system provided by the present invention sends the target cache data that does not meet the conditions evicted by the cost-based cache eviction module to the persistent storage system, ensuring the persistent storage of data and preventing data loss. At the same time, it enables the cache system to operate continuously and efficiently, maintaining the orderliness of system data storage and cache management.

[0014] In an optional implementation, the cache data module is further configured to, upon receiving an access operation from the application client, send corresponding multiple target cache data to the application client according to the access operation.

[0015] The distributed low-latency cache system provided by the present invention sends corresponding multiple target cache data to the application client upon receiving an access operation from the application client, thereby achieving fast data response, directly meeting the data requirements of the application client, reducing data transmission time, and improving the efficiency of interaction between the application client and the cache system.

[0016] In a second aspect, the present invention provides a cache data aggregation method for use in a semantically sensitive cache layout module in a distributed low-latency cache system according to the first aspect or any corresponding embodiment thereof; the method comprises:

[0017] Acquire multiple initial cache data and multiple access operations of the application client; determine multiple access data of each access operation in the multiple initial cache data based on the multiple access operations; calculate multiple scheduling costs of the multiple access data of each access operation; and aggregate and schedule the multiple access data of each access operation based on the multiple scheduling costs to obtain multiple target cache data corresponding to each access operation.

[0018] The cache data aggregation method provided by the present invention can accurately filter out multiple access data related to each access operation from multiple initial cache data based on multiple access operations received from application clients, thereby avoiding interference from irrelevant data, narrowing the data processing scope, and improving data processing efficiency, thereby ensuring that the data processed by the cache system fits the actual needs of the application client and improving data access efficiency. Furthermore, by calculating the scheduling cost, the cost of different data scheduling schemes can be quantified, providing an objective basis for selecting the optimal scheduling strategy, and avoiding blind scheduling that leads to resource waste or performance degradation. Finally, the access data is aggregated and scheduled according to the scheduling cost, and data with relevance and low scheduling cost are aggregated together, which improves the cache hit rate, reduces the number of times data is read from the persistent storage system, improves the response speed of the cache system, reduces the overall system delay, and ensures the stable and efficient operation of the cache system.

[0019] In a third aspect, the present invention provides a cache data eviction method, which is used in a cost-based cache eviction module in a distributed low-latency cache system according to the first aspect or any corresponding embodiment thereof; the method comprises:

[0020] Acquire multiple target cache data corresponding to each access operation in the cache data module; obtain the access frequency observation value and the acquisition cost observation value of each target cache data; based on the access frequency observation value and the acquisition cost observation value of each target cache data, use the adaptive exponential smoothing method to evict the target cache data that does not meet the conditions to the persistent storage system.

[0021] The cache data eviction method provided by the present invention quantifies the importance and difficulty of obtaining cache data by obtaining the access frequency and acquisition cost observation values of each target cache data, and can more comprehensively judge the value of each target cache data to the cache system. Furthermore, through the adaptive exponential smoothing method, the prediction model parameters can be flexibly adjusted according to the dynamic changes of the data, and the fluctuations of the data access frequency and acquisition cost can be quickly responded to, so that the cache eviction decision can adapt to the ever-changing cache data usage. Furthermore, by continuously and reasonably evicting data that does not meet the conditions, the performance degradation of the cache system due to storing too much low-value data is avoided, the cache hit rate is maintained at a high level, and it is ensured that the application client can quickly and stably obtain the required data, thereby improving the stability and reliability of the cache system.

[0022] In an optional embodiment, based on the access frequency observation value and the acquisition cost observation value of each target cache data, an adaptive exponential smoothing method is used to evict target cache data that does not meet the conditions to a persistent storage system, including:

[0023] Based on the access frequency observation value and acquisition cost observation value of each target cache data, the target prediction value of each target cache data is obtained through adaptive exponential smoothing method; the target cache data to be evicted is determined according to the target prediction value of each target cache data; and the target cache data to be evicted is evicted to the persistent storage system.

[0024] The cache data eviction method provided by this invention uses an adaptive exponential smoothing method to comprehensively consider historical data and changing trends of access frequency and acquisition cost to predict the future value of each target cache data item. Furthermore, based on the predicted value, the target cache data to be evicted can be accurately screened and moved to a persistent storage system. This avoids blind evictions that impact system performance, making cache eviction operations more scientific and rational, ensuring efficient operation of the cache system, and thus continuously providing low-latency services to application clients.

[0025] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the cache data aggregation method of the second aspect or any corresponding embodiment thereof, or the cache data eviction method of the third aspect or any corresponding embodiment thereof.

[0026] In a fifth aspect, the present invention provides a computer program product comprising computer instructions, the computer instructions being used to enable a computer to execute the cache data aggregation method of the second aspect or any corresponding embodiment thereof, or the cache data eviction method of the third aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0028] Figure 1 is an architectural diagram of a traditional cache system according to an embodiment of the present invention;

[0029] Figure 2 is a schematic diagram of a situation where a traditional cache system generates high latency according to an embodiment of the present invention;

[0030] Figure 3 is a structural block diagram of a distributed low-latency cache system according to an embodiment of the present invention;

[0031] Figure 4is a schematic diagram of predicting the number of physical CPUs required for read / write worker threads according to an embodiment of the present invention;

[0032] Figure 5 is a flow chart of a cache data aggregation method according to an embodiment of the present invention;

[0033] Figure 6 This is a schematic diagram of cache data aggregation scheduling according to an embodiment of the present invention;

[0034] Figure 7 is a flow chart of a cache data eviction method according to an embodiment of the present invention;

[0035] Figure 8 is a flow chart of another cache data eviction method according to an embodiment of the present invention;

[0036] Figure 9 Schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0037] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.

[0038] First, the architecture and internal components of the current cache system are analyzed, such as Figure 1 shown.

[0039] As can be seen from the architecture, the cache system sits between application clients and persistent storage, and contains several functional modules. For a cache system, cached data is the core of the system. Therefore, a functional module within the cache system is responsible for organizing and managing cached data. Generally speaking, there is often a large amount of cached data, and it is very important for application clients to quickly retrieve cached data. Therefore, an index structure based on cached data is required in the cache system. It is worth noting that in modern cache systems, the scale of data and users is constantly increasing. Traditional single-machine cache systems cannot meet the needs of flexible expansion as the scale of users and data increases. Therefore, a large number of distributed cache systems with multi-node deployment capabilities have emerged. In addition, to ensure fault tolerance in a multi-node environment, many distributed cache systems also provide backup mechanisms for cached data.

[0040] Caching systems are often built on storage media with fast read and write speeds. These storage media are often expensive and have limited capacity. Therefore, when the cache system's storage capacity reaches its upper limit, a cache eviction module is required to evict some cached data from the system. Furthermore, evicted cached data needs to be written back to persistent storage. It's worth noting that many cache systems require strong consistency with persistent storage, which requires frequently triggering the persistence module to write back cached data.

[0041] When application clients read data directly from persistent storage, this reduces the cache hit rate, leading to higher read latency. Therefore, to improve cache hit efficiency, the cache prefetch module can pre-fetch data from persistent storage that will be accessed by the application client. Furthermore, sequential access to data in the storage medium offers better performance than random access. The layout of cached data in the storage medium also significantly impacts the performance of application client access to data. Therefore, the cache system requires a cache data layout strategy. Whenever new cached data is read from persistent storage, the cache layout module selects an optimal data layout.

[0042] Furthermore, from the architecture, it can be seen that if application clients frequently access the required data from persistent storage, the latency of application clients accessing data will increase, such as Figure 2 As shown in (1) above; conversely, if application clients can always read data from a cache system with lower latency, that is, with a higher cache hit rate, this will significantly improve the performance of application clients accessing data. Therefore, a low cache hit rate is a disadvantageous factor that causes high latency in a cache system.

[0043] Continuous access to data has lower latency than random access to data. If the data that the application client intends to access is scattered across multiple storage areas or different physical nodes, this will increase the latency of data access, such as Figure 2 As shown in (2) in the figure. Conversely, if highly correlated data can be aggregated into a continuous storage area based on the relevance of data accessed by application clients, this can significantly speed up data access and reduce latency for application clients. Therefore, semantically unrelated data layout is a disadvantageous factor that causes high latency in cache systems.

[0044] The functional modules in the cache system can be divided into read data workflow and write data workflow. The read / write data workflows have completely different characteristics and are composed of different functional modules. If the read / write workflows simultaneously occupy limited system resources, this will cause unnecessary mutual interference and restrict the performance of the cache system. Figure 2As shown in Figure ③. Specifically, the cache prefetch thread in the read data workflow and the dirty data refresh thread in the write data workflow take turns preempting the same CPU, resulting in frequent CPU context switching, unnecessary resource waste, and increased latency in the cache system processing application client operations. Conversely, if the read / write workflows were isolated and used independently, mutual interference between the read / write workflows could be avoided. Therefore, the coupling of read / write workflows is a detrimental factor that causes high latency in cache systems.

[0045] The present invention provides a distributed low-latency cache system to effectively reduce the tail latency of applications accessing a distributed storage system, allowing the distributed storage system to have stronger performance stability, thereby enabling upper-layer applications to have a smoother user experience.

[0046] In this embodiment, a distributed low-latency cache system is provided. Figure 3 As shown, the distributed low-latency cache system 1 is connected to the application client 2 and the persistent storage system 3 respectively.

[0047] Furthermore, the distributed low-latency cache system 1 includes: a semantically sensitive cache layout module 11, a cache data module 12, a cost-based cache eviction module 13, a cache prefetch module 14, a persistence module 15 and a background terminal 16.

[0048] In some optional embodiments, the semantically sensitive cache layout module 11 is used to receive multiple access operations sent by the application client and multiple initial cache data sent by the persistent storage system. Furthermore, after receiving multiple access operations and multiple initial cache data, the multiple initial cache data are aggregated and scheduled according to the multiple access operations to obtain multiple target cache data corresponding to each access operation.

[0049] In a distributed cache system, if the data an application client intends to access is scattered across multiple nodes, this increases the cost of data access. Specifically, to complete a single operation, the application client must search for relevant data across multiple nodes, incurring multiple network communications. Conversely, if highly relevant data can be aggregated into a contiguous storage area based on the relevance of the data being accessed by the application client, this can significantly reduce the latency of data access by the application client in a distributed environment.

[0050] Therefore, in this embodiment, a semantically sensitive cache layout module 11 is used to aggregate and schedule cache data using access operations, so that data that is frequently accessed by application clients and has semantic relevance can be aggregated and stored together. In a distributed environment, the latency of a single operation of the application client to access the cache system is significantly reduced, thereby improving cache access efficiency.

[0051] Specifically, the application client 2 directly reading data from the persistent storage system 3 will reduce the cache hit rate, thereby resulting in a higher read delay. Therefore, in order to improve the efficiency of cache hits, the cache prefetch module 14 can be used to pull multiple initial cache data to be accessed by the application client 2 from the persistent storage system 3 in advance.

[0052] Furthermore, the cache pre-fetching module 14 sends the acquired multiple initial cache data to the semantically sensitive cache layout module 11 .

[0053] Furthermore, the layout of cached data in the storage medium greatly affects the performance of application client 2 in accessing data, and operations that occur frequently require repeated access to the same set of data. Therefore, in this embodiment, in the semantically sensitive cache layout module 11, the data that is frequently accessed by application client 2 and has semantic relevance in multiple initial cached data can be aggregated and scheduled in advance based on multiple access operations sent by application client 2, that is, all data that need to be accessed by the operation are gathered on one node, and the data scheduling strategy with the lowest cost is selected for data scheduling to form corresponding multiple target cached data.

[0054] Furthermore, by sending the aggregated multiple target cache data to the cache data module 12 for storage, and combining it with the semantically sensitive cache layout module 11, the application client access delay is further reduced, the cache system response speed is improved, and the upper-layer application usage experience is smoother.

[0055] In some optional implementations, the cache data module 12 is further configured to, upon receiving an access operation from the application client 2 , send corresponding multiple target cache data to the application client 2 according to the access operation.

[0056] Specifically, the semantically sensitive cache layout module 11 stores multiple target cache data corresponding to each access operation after layout into the cache data module 12 .

[0057] Furthermore, when the cache data module 12 receives a new access operation sent by the application client 2, it can find multiple target cache data corresponding to the new access operation in the stored multiple target cache data according to the received access operation and return them to the application client 2, thereby reducing the application client access delay, improving the cache system response speed, and making the upper-level application usage experience smoother.

[0058] In some optional embodiments, the cost-based cache eviction module 13 is used to obtain multiple target cache data corresponding to each access operation in the cache data module 12, and use an adaptive exponential smoothing method to evict unqualified target cache data to the persistent storage system 3 based on the access frequency and acquisition cost of each target cache data.

[0059] Access frequency can be calculated by recording the number of times data is accessed and the time interval between accesses. Acquisition cost can be determined by comprehensively evaluating factors such as the data's storage location (e.g., local disk, remote server), transmission bandwidth usage, and data size. For example, large amounts of data stored on remote servers have a relatively high acquisition cost. Adaptive exponential smoothing is a statistical method used for time series forecasting that automatically adjusts the smoothing coefficient based on data changes to improve forecast accuracy.

[0060] Existing cache systems often feature distributed deployment. Distributed deployment means that the accessed data may need to span multiple nodes, which increases the cost of obtaining cached data. Specifically, in a distributed cache system, some cached data may not be used frequently recently, but re-obtaining the cached data from persistent storage requires multiple network communications. Once the data is retrieved, system performance will be significantly reduced. Traditional cache eviction algorithms (for example, the LRU algorithm) prioritize eliminating the least frequently used data. If the evicted data happens to be very expensive to obtain, it will actually lower the overall performance of the system. Therefore, in modern distributed cache systems, the cache eviction strategy needs to consider both the frequency with which the cached data has been recently accessed and the cost of obtaining the cached data.

[0061] Furthermore, to improve prediction accuracy, this embodiment proposes an exponential smoothing-based method to predict the future access frequency and acquisition cost of cached data. Exponential smoothing is a time series prediction method that generates predictions by taking a weighted average of past observations. When weighting, more recent observations are given greater weight and predictive value, while more recent observations are given less weight and predictive value. This cost model is well-suited to the characteristics of client access to cache systems.

[0062] Furthermore, there are various specific exponential smoothing methods, including double exponential smoothing, triple exponential smoothing, and adaptive exponential smoothing. Cache system clients often randomly change their data access patterns, and these changes are often sudden. However, adaptive exponential smoothing is particularly well-suited for short-term forecasting scenarios that require rapid response to data changes and is suitable for handling sudden changes. Therefore, in this embodiment, adaptive exponential smoothing is used to evict cached data.

[0063] Specifically, the cost-based cache eviction module 13 can trigger data acquisition operations at certain time intervals (such as every 5 minutes) or according to the status change of the cache data module 12 (such as the cache usage rate reaches a threshold), to ensure that the latest cache data information is obtained.

[0064] Furthermore, the cost-based cache eviction module 13 may calculate the access frequency and acquisition cost of each target cache data using an adaptive exponential smoothing method.

[0065] Furthermore, by comprehensively considering the access frequency and acquisition cost of each target cache data, the target cache data that does not meet the conditions can be accurately screened out and expelled to the persistent storage system 3 through the persistence module 15, effectively avoiding the expulsion of high-cost data, improving the cache hit rate, allowing the cache space to be reasonably utilized, further reducing the delay of application clients accessing cache data, and improving the overall performance and stability of the cache system.

[0066] In some optional implementations, the background terminal 16 is used to monitor and obtain the number of working threads of the low-latency cache system 1, and input the number of working threads into a preset long short-term memory network prediction model to obtain the number of physical CPUs for each working thread.

[0067] Among them, the working threads include read working threads and write working threads; the preset long-short term memory network prediction model (Long-Short Term Memory, LSTM prediction model) represents a special recurrent neural network (RNN), which is mainly used to process and predict time series data.

[0068] In a cache system, data reading and writing are implemented by different functional modules, forming read and write workflows within the system. Each read / write workflow contains specific worker threads and data structures. Furthermore, the worker threads and data structures in the read / write workflow are disjoint. This means that switching between read / write worker threads on the same physical CPU is costly, requiring the CPU to flush all cached data and reload new cached data.

[0069] Currently, many operating systems provide thread affinity or thread binding technology, which can bind a specific thread to a specific physical CPU to run, thereby ensuring that the thread is always executed on the same CPU core, avoiding context switches caused by preemption of other threads. In the problem faced by this patent, the read / write worker threads have different properties and different CPU contexts, and need to be well isolated. Using thread binding technology, the read / write worker threads can be bound to different physical CPUs, thereby isolating the read / write worker threads well. Specifically, in the Linux operating system, the taskset command line tool can be used to view and set the affinity of a thread to the CPU.

[0070] However, the number of physical CPUs required by read / write worker threads is not fixed; it changes with the needs of the application. Therefore, consistently allocating a fixed number of physical CPUs to read / write worker threads can either lead to idle resources or excessive resource competition. Therefore, finding the optimal number of CPUs for read / write worker threads, or even employing dynamic CPU allocation techniques, is a challenge that needs to be addressed.

[0071] In this embodiment, the background terminal 16 regularly monitors and obtains the number of read / write working threads of the low-latency cache system 1, and then the physical CPU can be allocated to the read / write workflow in proportion to the number of background working threads through the LSTM prediction model.

[0072] Specifically, the backend terminal 16 integrates TensorFlow (an open source deep learning framework). The TensorFlow framework includes multiple APIs (Application Programming Interfaces), and each API can implement a corresponding deep learning model. Therefore, the API provided by TensorFlow can provide an LSTM prediction model for predicting the number of physical CPUs required for read / write worker threads.

[0073] Furthermore, LSTM can effectively process and predict time series data with long-term dependencies, can grasp the correlation between a certain application client and the number of background threads of the cache system, and can also grasp the dependency between the two when the application client runs for a long time. Therefore, by inputting the number of read / write working threads obtained by the background terminal 16 into the LSTM prediction model, the number of physical CPUs of the read / write working threads can be predicted, avoiding idle waste or excessive competition of read / write working thread resources, alleviating CPU competition, eliminating the context switching cost caused by frequent CPU switching, and improving the processing performance of the cache system.

[0074] In one example, Figure 4 As shown in the figure, at each moment, the number of cache system worker threads is monitored and input into the LTSM prediction model, and the number of physical CPUs bound to the read / write worker threads is output and configured.

[0075] The distributed low-latency cache system provided in this embodiment connects the distributed low-latency cache system to the application client and the persistent storage system respectively, so that the application client can quickly access the cache data, reduce the frequency of direct access to high-latency persistent storage, and improve the overall system response speed. Furthermore, through the semantically sensitive cache layout module, the cache data is aggregated and scheduled according to the access operation, and the data that is frequently accessed by the application client and has semantic relevance can be aggregated and stored together. In a distributed environment, the latency of the application client's single operation accessing the cache system is significantly reduced, thereby improving the cache access efficiency. Furthermore, through the cost-based cache eviction module, the adaptive exponential smoothing method is used to comprehensively consider the cache data access frequency and acquisition cost, and it is possible to accurately determine which cache data does not meet the retention conditions of the current cache system, and evict the cache data that does not meet the conditions to the persistent storage system, thereby improving the cache hit rate, reducing the latency of the application client accessing the cache data, and further improving the overall performance and stability of the cache system.

[0076] According to an embodiment of the present invention, an embodiment of a cache data aggregation method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0077] This embodiment provides a cache data aggregation method that can be used to Figure 3 The distributed low-latency cache system 1 shown in FIG. 1 is based on a semantically sensitive cache layout module 11. Figure 5 is a flow chart of a cache data aggregation method according to an embodiment of the present invention. Figure 5 As shown, the process includes the following steps:

[0078] Step S501: Acquire multiple initial cache data and multiple access operations of the application client.

[0079] The specific process can refer to the description of the interaction between the distributed low-latency cache system 1, the application client 2 and the persistent storage system 3 in the above embodiment, as well as the functional description of the semantic-sensitive cache layout module 11, which will not be repeated here.

[0080] Step S502 : determining a plurality of access data for each access operation from a plurality of initial cache data according to a plurality of access operations.

[0081] Specifically, different access operations sent by the application client 2 correspond to different access data.

[0082] Furthermore, after receiving multiple access operations sent by the application client 2, each access operation may be analyzed (eg, semantic analysis) to understand the specific meaning and data requirements of each access operation.

[0083] Furthermore, the access data corresponding to the access operation can be determined according to the specific meaning and data requirements obtained through the analysis, and then the access data corresponding to each access operation can be found in the multiple acquired initial cache data.

[0084] Step S503 : calculating multiple scheduling costs of multiple access data of each access operation.

[0085] Specifically, the multiple initial cache data may be marked as D0, D1, D2, ..., D n , where n represents the amount of data. At the same time, the nodes in the distributed low-latency cache system 1 are marked as N0, N1, N2, ..., N m , where m represents the number of nodes.

[0086] Furthermore, in order to find the data scheduling strategy with the minimum cost, it is assumed that there is a scheduling cost matrix as shown in the following relation (1):

[0087]

[0088] Among them, the element in the i-th row and j-th column of the matrix Represents data D i Dispatch to N j the price.

[0089] Furthermore, suppose that the application client 2 intends to initiate an operation to the distributed low-latency cache system 1, which is marked as O. Operation O needs to access a series of data from different nodes, that is, multiple access data, which are marked as D0, D1, D2, ..., D k , where k is the amount of data accessed by operation O, data D0, D1, D2, ..., D k The nodes are marked as N0, N1, N2, ..., N k .

[0090] Furthermore, for each data D accessed by operation O i ,i∈[0,k], use the following relationship (2) to calculate the scheduling of other data to data D i Node N i The cost:

[0091]

[0092] Step S504 : performing aggregate scheduling on the multiple access data of each access operation according to the multiple scheduling costs to obtain multiple target cache data corresponding to each access operation.

[0093] Specifically, based on the multiple scheduling costs calculated, the data with the minimum scheduling cost can be selected, and the other data can be scheduled to the node where the data is located, that is, multiple target cache data corresponding to each access operation are aggregated at the node.

[0094] In one example, Figure 6 As shown, suppose an operation O needs to access three data D0, D1, and D2, which are located on three different nodes N0, N1, and N2 respectively. The scheduling cost matrix of the three data is as follows Figure 6 As shown. For the three data, the scheduling cost is iteratively calculated respectively It can be seen The scheduling cost is the smallest. Therefore, we choose to schedule data D0 and D1 to the node N2 where D2 is located.

[0095] The cache data aggregation method provided in this embodiment can accurately filter out multiple access data related to each access operation from multiple initial cache data based on multiple access operations received from the application client, thereby avoiding interference from irrelevant data, narrowing the data processing scope, and improving data processing efficiency, thereby ensuring that the data processed by the cache system fits the actual needs of the application client and improving data access efficiency. Furthermore, by calculating the scheduling cost, the cost of different data scheduling schemes can be quantified, providing an objective basis for selecting the optimal scheduling strategy, and avoiding blind scheduling that leads to resource waste or performance degradation. Finally, the access data is aggregated and scheduled according to the scheduling cost, and data with correlation and low scheduling cost are aggregated together, which improves the cache hit rate, reduces the number of times data is read from the persistent storage system, improves the response speed of the cache system, reduces the overall system latency, and ensures the stable and efficient operation of the cache system.

[0096] This embodiment provides a cache data eviction method that can be used to Figure 3 The cost-based cache eviction module 13 in the distributed low-latency cache system 1 shown, Figure 7 is a flow chart of a cache data eviction method according to an embodiment of the present invention. Figure 7 As shown, the process includes the following steps:

[0097] Step S701: Acquire multiple target cache data corresponding to each access operation in the cache data module.

[0098] For the specific process, please refer to the description of the interaction between the cost-based cache eviction module 13 and the cache data module 12 in the distributed low-latency cache system 1 in the above embodiment, as well as the functional description of the cost-based cache eviction module 13, which will not be repeated here.

[0099] Step S702 : Obtain the access frequency observation value and the acquisition cost observation value of each target cache data.

[0100] For the specific process, reference may be made to the functional description of the cost-based cache eviction module 13 in the distributed low-latency cache system 1 in the above embodiment, which will not be repeated here.

[0101] Step S703 : Based on the access frequency observation value and the acquisition cost observation value of each target cache data, an adaptive exponential smoothing method is used to evict target cache data that does not meet the conditions to a persistent storage system.

[0102] Specifically, the adaptive exponential smoothing method can be used to calculate the access frequency and acquisition cost of each target cache data. Then, by comprehensively considering the access frequency and acquisition cost of each target cache data, the target cache data that does not meet the conditions is accurately screened out and expelled to the persistent storage system 3 through the persistence module 15.

[0103] In some optional implementations, such as Figure 8 As shown, the above step S703 includes:

[0104] Step S7031 : Based on the access frequency observation value and the acquisition cost observation value of each target cache data, a target prediction value of each target cache data is obtained by processing with an adaptive exponential smoothing method.

[0105] First, consider simple exponential smoothing: in, is the predicted value at time t+1, Y t is the actual observation value at time t, is the observation value at time t, α is the smoothing coefficient, 0<α<1.

[0106] Furthermore, the adaptive exponential smoothing method is based on the simple exponential smoothing method and can quickly respond to short-term prediction scenarios of data changes by dynamically adjusting the smoothing coefficient. Specifically, the smoothing coefficient α at time t is t yes: Among them, β is a regulation coefficient used to control α t range of change. is the absolute forecast error at time t. It is used to normalize the denominator of the error to prevent α t Too large or too small. Dynamically adjusted smoothing coefficient α tWill be used to update the prediction formula:

[0107]

[0108] Furthermore, in this embodiment, let the actual observation value Y at time t be t =w A A+w B B, where A is the observed value of cache data access frequency, B is the observed value of cache data acquisition cost, and w A and w B The corresponding weights are as follows. Among them, cached data with smaller access frequency observation value A will be evicted from the cache system first, and cached data with smaller acquisition cost observation value B will be evicted from the cache system first.

[0109] Furthermore, in the initial state, that is, time 0, the predicted value Equal to the actual observation value Y0. In the iteration process, based on the actual observation value Y at time t t , using the adaptive exponential smoothing method, we can get the predicted value of the next moment t+1

[0110] Finally, through the above process, the target prediction value of each target cache data at time t+1 can be calculated

[0111] In one example, as shown in Table 1 below, at time 0, the predicted value Equal to the actual observation value Y0; at time 1, the predicted value The actual observation value Y0 at time 0 and the predicted value Calculated; at time 2, the predicted value The actual observation value Y1 at time 1 and the predicted value Calculated.

[0112] Table 1. Predicted and observed values at different times

[0113]

[0114] Step S7032 : determining target cache data to be evicted according to the target prediction value of each target cache data.

[0115] Specifically, all target cache data can be calculated according to the target prediction value at time t+1. Sort by size.

[0116] Furthermore, the minimum target prediction value The corresponding target cache data is used as the target cache data to be evicted.

[0117] Step S7033: evict the target cache data to be evicted to the persistent storage system.

[0118] Specifically, the target cache data to be evicted can be evicted to the persistent storage system 3, avoiding the impact of blind eviction on system performance, making the cache eviction operation more scientific and reasonable, ensuring the efficient operation of the cache system, and thus being able to continuously provide low-latency services to application clients.

[0119] The cache data eviction method provided in this embodiment quantifies the importance and difficulty of obtaining cache data by obtaining the access frequency and acquisition cost observation values of each target cache data, and can more comprehensively judge the value of each target cache data to the cache system. Furthermore, the adaptive exponential smoothing method can comprehensively consider the historical data and change trends of the access frequency and acquisition cost to predict the future value of each target cache data. Furthermore, based on the predicted value, the target cache data to be evicted can be accurately screened and the determined data to be evicted can be moved to the persistent storage system, avoiding the impact of blind eviction on system performance, making the cache eviction operation more scientific and reasonable, ensuring the efficient operation of the cache system, and thus being able to continuously provide low-latency services to application clients.

[0120] The embodiment of the present invention also provides a computer device for executing the above Figure 5 The cache data aggregation method shown, or Figure 7 and Figure 8 The cache data eviction method shown.

[0121] See also Figure 9 , Figure 9 is a structural diagram of a computer device provided by an optional embodiment of the present invention, such as Figure 9 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of a GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 9 A processor 10 is taken as an example.

[0122] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0123] The memory 20 stores instructions that can be executed by at least one processor 10, so as to enable at least one processor 10 to execute the method shown in the above embodiment.

[0124] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0125] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0126] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0127] The embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0128] A portion of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0129] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention. Such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A distributed low-latency cache system, connected to an application client and a persistent storage system respectively; characterized in that: The low-latency cache system includes: a semantically sensitive cache layout module, a cache data module, and a cost-based cache eviction module; The semantically sensitive cache layout module is configured to receive multiple access operations sent by the application client and multiple initial cache data sent by the persistent storage system; The semantically sensitive cache layout module is further configured to aggregate and schedule the multiple initial cache data according to the multiple access operations, obtain multiple target cache data corresponding to each access operation, and send the multiple target cache data corresponding to each access operation to the cache data module for storage; The cost-based cache eviction module is used to obtain the multiple target cache data corresponding to each access operation in the cache data module, and use an adaptive exponential smoothing method to evict unqualified target cache data to the persistent storage system based on the access frequency and acquisition cost of each target cache data.

2. The low-latency cache system according to claim 1, wherein: The low-latency cache system further includes: The backend terminal is used to monitor and obtain the number of working threads of the low-latency cache system, and input the number of working threads into a preset long-short-term memory network prediction model to obtain the number of physical CPUs for each working thread, where the working threads include read working threads and write working threads.

3. The low-latency cache system according to claim 1, wherein: The low-latency cache system further includes: A cache pre-fetch module is used to obtain the multiple initial cache data of the persistent storage system and send the multiple initial cache data to the semantically sensitive cache layout module.

4. The low-latency cache system according to claim 1, wherein: The low-latency cache system further includes: The persistence module is configured to send the received target cache data that does not meet the conditions and is evicted by the cost-based cache eviction module to the persistent storage system.

5. The low-latency cache system according to claim 1, wherein: The cache data module is further configured to, upon receiving an access operation from the application client, send the corresponding plurality of target cache data to the application client according to the access operation.

6. A cache data aggregation method, characterized in that: A semantically sensitive cache layout module in a distributed low-latency cache system according to any one of claims 1 to 5; the method comprising: Obtain multiple initial cache data and multiple access operations of application clients; determining a plurality of access data for each access operation in the plurality of initial cache data according to the plurality of access operations; Calculating a plurality of scheduling costs of the plurality of access data for each access operation; The multiple access data of each access operation are aggregated and scheduled according to the multiple scheduling costs to obtain multiple target cache data corresponding to each access operation.

7. A cache data eviction method, characterized in that: A cost-based cache eviction module for a distributed low-latency cache system according to any one of claims 1 to 5; the method comprising: Obtain multiple target cache data corresponding to each access operation in the cache data module; Obtain access frequency observations and acquisition cost observations for each target cache data; Based on the access frequency observation value and the acquisition cost observation value of each target cache data, an adaptive exponential smoothing method is used to evict target cache data that does not meet the conditions to a persistent storage system.

8. The method according to claim 7, characterized in that Based on the access frequency observation value and the acquisition cost observation value of each target cache data, an adaptive exponential smoothing method is used to evict target cache data that does not meet the conditions to a persistent storage system, including: Based on the access frequency observation value and the acquisition cost observation value of each target cache data, a target prediction value of each target cache data is obtained by processing with an adaptive exponential smoothing method; Determine the target cache data to be evicted according to the target prediction value of each target cache data; The target cache data to be evicted is evicted to the persistent storage system.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the cache data aggregation method according to claim 6, or execute the cache data eviction method according to claim 7 or 8.

10. A computer program product, characterized in that The method comprises computer instructions, wherein the computer instructions are used to enable a computer to execute the cache data aggregation method according to claim 6, or the cache data eviction method according to claim 7 or 8.

Images