Parallel structured mesh generation method and system suitable for FDTD algorithm

Abstract

The invention provides a parallel structured network subdivision system suitable for an FDTD algorithm, and belongs to the technical field of electromagnetism. Surface fitting is conducted on each triangular surface element through a surface fitting module, a triangular surface element complexity list is generated, the load process of each triangular surface element in the complexity list is dynamically allocated based on a greedy algorithm, and a global interface file containing surface data is generated; carrying out internal grid filling on the target object subjected to surface fitting through a medium filling module, creating a Cartesian structure for each grid plane process needing to be filled, and carrying out filling in a parallel mode to generate a grid model; and realizing cross-module data transmission through the global interface file, and outputting a grid file containing a grid model. According to the method, the problem of resource idleness caused by the difference of the calculated amount of the triangular surface elements is effectively solved, the parallel efficiency is remarkably improved, the surface fitting module can achieve the acceleration effect close to linearity, and the method is particularly suitable for large-scale geometric models with complex structures.

Description

Technical Field

[0001] The present invention belongs to the technical field of electromagnetics, and in particular relates to a parallel structured grid generation method and system suitable for FDTD algorithm. Background Art

[0002] Finite-Difference Time-Domain (FDTD) is one of the most widely used numerical calculation methods for solving electromagnetic field problems. Before using the FDTD algorithm to solve electromagnetic field problems, it is necessary to discretize the space into a series of subregions or cells, that is, to perform meshing. In the FDTD algorithm, the commonly used mesh structure is the Yee cell, which can accurately describe the distribution of the electromagnetic field in three-dimensional space. Meshing plays an important role in the FDTD algorithm and is the basis for its implementation. The mesh structure and size directly affect the accuracy and speed of subsequent numerical calculations. With the rapid development of modern science and technology, the complexity of simulation objects continues to increase, and the scale of calculations is growing exponentially. Traditional serial meshing algorithms are no longer able to meet the requirements of computational efficiency and handling large-scale problems. Introducing parallel meshing can effectively solve this problem.

[0003] Although existing parallel structured meshing methods based on MPI (Message Passing Interface) have achieved certain results in theory and application, they still have defects and shortcomings in practical use. First, there is insufficient load balancing. Traditional methods use a uniform distribution strategy based on cumulative complexity. By using a balanced approach to ensure that each process receives a roughly equal amount of work, the efficiency and balance of parallel computing are improved. However, this distribution method is data-dependent. If the complexity of the triangles is unevenly distributed (for example, the complexity of some consecutive triangles is much higher than that of other parts), sequential distribution may cause some processes to receive a significantly higher workload than others. In this case, the workload between processes will become unbalanced, thereby reducing the overall parallel efficiency.

[0004] Based on the above background, the present invention proposes a new technical solution to solve the above problems. Summary of the Invention

[0005] The purpose of the present invention is to overcome the above-mentioned shortcomings and provide a parallel structured grid generation method and system suitable for the FDTD algorithm.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions: In a first aspect, the present invention provides a parallel structured network partitioning system applicable to the FDTD algorithm, comprising: The surface fitting module is used to traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; The medium filling module is used to fill the internal grid of the target object after the surface fitting is completed. A Cartesian structure is created for each grid plane process that needs to be filled, and the filling is performed in parallel to generate a grid model. The file output module is used to realize cross-module data transmission between the surface fitting module and the medium filling module through the global interface file, and output a grid file containing a grid model.

[0007] The surface fitting module performs surface fitting on each triangle based on the projection intersection method. Its time complexity is related to the total number of triangle face elements and the amount of calculation for each triangle face element. Any triangle face element exists independently of each other and is operated in parallel with data.

[0008] In a second aspect, the present invention provides a parallel structured network partitioning method applicable to the FDTD algorithm, comprising the following steps: Traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; Perform internal grid filling on the surface data in the global interface file, create a Cartesian structure for each grid plane process that needs to be filled, and fill it in parallel to generate a grid model; Outputs a mesh file containing the mesh model.

[0009] The method for generating the triangle face complexity list is as follows: For each triangle face, we project it onto the XOY, XOZ and YOZ coordinate planes, and count the area of the rectangle covering its shadow, that is, the total number of grids, which is recorded as The sum of the number of grids constitutes the complexity of the triangle surface element, and the complexity of all triangle surfaces constitutes the triangle surface element complexity list.

[0010] The specific method of dynamically allocating the load process of each triangle face in the complexity list based on the greedy algorithm is as follows: Traverse the triangle face complexity list and select the process with the smallest current load for each triangle face; Update the load of the selected process by adding the complexity of the current triangle element to the load of the process; Repeat this process until all triangles are assigned.

[0011] In the medium filling module, during the process of filling the internal grid of the target object after surface fitting, ray tracing and normal vector discrimination method are used to determine whether it is the interior of the target by simulating the intersection of rays and the object surface.

[0012] The specific method for the steps of creating a Cartesian structure for each mesh plane process that needs to be filled, and filling in parallel to generate a mesh model is as follows: The sampling ray is sampled along the rectangular coordinate axis z direction, and the number of sampling rays is equal to the number of grids on the two-dimensional plane XOY perpendicular to it; For each grid plane process that needs to be filled, create a Cartesian structure that defines the dimensions of the processor grid and the size of each dimension; Each process is assigned a specific Cartesian coordinate, which maps directly to a specific grid area on the XOY plane; Each process is only responsible for ray tracing calculations within its corresponding specific grid area, processing the set of rays corresponding to its coordinates.

[0013] In the step of outputting the grid file containing the grid model, the parallel I / O writing technology is used to merge the sub-matrices responsible for each process into a result matrix, and the file is re-output according to the rows and columns of the new matrix.

[0014] In a third aspect, the present invention provides an electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of a parallel structured network decomposition method applicable to the FDTD algorithm when executing the computer program.

[0015] In a fourth aspect, the present invention provides a storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the steps of a parallel structured network decomposition method applicable to the FDTD algorithm are implemented.

[0016] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a parallel structured network partitioning system suitable for an FDTD algorithm, comprising: a surface fitting module, used for traversing all triangular face elements of a target object, performing surface fitting on each triangular face element, generating a triangular face element complexity list, dynamically allocating a load process of each triangular face element in the complexity list based on a greedy algorithm, and generating a global interface file containing surface data; a medium filling module, used for performing internal grid filling on the target object after surface fitting, creating a Cartesian structure for each grid plane process to be filled, performing the filling in a parallel manner, and generating a grid model; and a file output module, used for realizing cross-module data transmission between the surface fitting module and the medium filling module through the global interface file, and outputting a grid file containing the grid model. In the surface fitting module, a greedy algorithm is used to dynamically allocate the load process of each triangle element in the complexity list, effectively solving the problem of idle resources caused by differences in the calculation amount of triangle elements, significantly improving the parallel efficiency, and enabling the surface fitting module to achieve a near-linear acceleration effect, which is especially suitable for large-scale, complex geometric models; the medium filling module uses a Cartesian topology structure to map the process to the XOY plane grid area. Each process only handles the ray tracing calculation of its corresponding area, strengthening data locality through spatial partitioning and improving parallel execution efficiency.

[0017] Furthermore, the partitioned parallel strategy based on Cartesian topology not only optimizes data locality and reduces the need for cross-process communication, but also helps achieve ideal linear speedup. When the number of processors is increased, since each processor is responsible for a smaller data area, computational efficiency can theoretically achieve a near-perfect linear improvement.

[0018] Furthermore, the use of parallel I / O writing technology can significantly increase data writing speed and reduce bottleneck effects. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 Flow chart of the method of the present invention; Figure 2 Schematic diagram of calculating triangle surface complexity in the present invention; Figure 3 A schematic diagram of the partition parallelism based on the Cartesian topology structure in the present invention; Figure 4 This is a schematic diagram of parallel IO output in the present invention; Figure 5 This is a system diagram of Example 3 of the present invention. DETAILED DESCRIPTION

[0020] In order to further understand the content of the present invention, the present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the embodiments are only for explaining the present invention and are not intended to limit it.

[0021] Example 1 A parallel structured mesh generation system suitable for FDTD algorithm, including: Surface fitting module: used to traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; The medium filling module is used to fill the internal grid of the target object after the surface fitting is completed. A Cartesian structure is created for each grid plane process that needs to be filled, and the filling is performed in parallel to generate a grid model. The file output module is used to realize cross-module data transmission between the surface fitting module and the medium filling module through the global interface file, and output a grid file containing a grid model.

[0022] Example 2 like Figure 1 As shown in FIG, a parallel structured network partitioning method suitable for the FDTD algorithm includes the following steps: S1: Traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; S2: Fill the internal grid of the surface data in the global interface file, create a Cartesian structure for each grid plane process that needs to be filled, fill it in parallel, and generate a grid model; S3: Outputs a mesh file containing the mesh model.

[0023] Specifically, in S1, the surface fitting module uses the triangular face metadata provided by the STL file of the target object as the input file, traverses all the triangular face elements of the target object, and performs surface fitting on each triangle based on the projection intersection method. Its time complexity is related to the total number of triangular face elements and the amount of calculation for each triangular face element. Any triangular face element exists independently of each other, so data parallelism can be applied for operation.

[0024] In parallel computing applications, especially when processing complex geometries and 3D models, identifying and addressing the disparity in computational effort between different triangles is key to improving overall computational efficiency. This disparity stems primarily from the geometric complexity and uneven spatial distribution of each triangle. The computational resources required to process these triangles also vary greatly. Smaller triangles may require only a small amount of computation, while larger triangles may involve intensive data processing. To optimize the efficiency of parallel computing and maximize resource utilization, the concept of "triangle complexity" was introduced. This metric assesses the processing difficulty of each triangle based on the number of projected meshes on three coordinate planes.

[0025] like Figure 2 As shown, for each triangle face, we project it onto the three coordinate planes XOY, XOZ and YOZ, and count the rectangular area covering its shadow, that is, the total number of grids, which is recorded as The sum of these mesh counts constitutes the complexity of the triangle. The complexities of all triangles form the triangle complexity list, which is used as the basis for process allocation decisions. By associating computational load with triangle complexity, tasks can be dynamically allocated across processors to achieve optimal load balancing.

[0026] After the calculation of the complexity of all triangles is completed and the complexity data of each triangle is stored, process allocation is required. The present invention proposes a process allocation strategy based on a greedy algorithm. The greedy algorithm is an algorithm that takes the best option in the current state in each selection step in the hope of reaching the global optimal solution. The algorithm is based on the strategy of deriving the global optimal solution from the local optimal solution. The specific implementation steps for process allocation according to this strategy are as follows: initialize the list, record the current load of each process, and set the initial load value of all processes to 0. Traverse the pre-calculated triangle complexity list and select the process with the smallest current load for each triangle. Update the load of the selected process and add the complexity of the current triangle to the load of the process. Repeat this process until all triangles are allocated and generate a global interface file containing surface data. Through this allocation method, the parallel program of the surface fitting module using this allocation method can achieve a near-linear acceleration effect.

[0027] Specifically, in S2, in the medium filling module, after completing the fitting of the target object surface, the internal grid of the object needs to be filled. Ray tracing and normal vector discrimination method are used to determine whether it is the interior of the target by simulating the intersection of rays and the object surface.

[0028] The time complexity of this module is related to the number of sampled rays. Typically, sampling rays are taken along the rectangular coordinate axis z, and the number of sampled rays is often equal to the number of grid cells on the perpendicular two-dimensional plane XOY. By incorporating a Cartesian topology into parallel computing, the allocation and execution of parallel tasks can be more efficiently managed. A Cartesian topology is created for each process, defining the dimensions of the processor grid and the size of each dimension. With this topology, each process is assigned specific Cartesian coordinates that map directly to a specific grid region on the XOY plane. Therefore, each process is responsible only for ray tracing calculations within its specific grid region, processing the set of rays corresponding to its coordinates. This partitioned parallel strategy based on Cartesian topology not only optimizes data locality and reduces the need for inter-process communication, but also helps achieve ideal linear speedup. As the number of processors increases, computational efficiency theoretically improves almost linearly, as each processor is responsible for a smaller data region.

[0029] like Figure 3 As shown in the figure, assuming that four processes are used for parallel acceleration and ray tracing is performed to fill the internal grid along the Z direction, the entire three-dimensional space is divided once along the X direction and once along the Y direction to form four areas with the same number of grids. The data corresponding to the four areas are respectively managed by proc1, proc2, proc3, and proc4. At the same time, the four processes form a two-dimensional topological structure in the XOY plane with coordinates of (0,0), (0,1), (1,0), and (1,1). The corresponding process can be accessed according to the two-dimensional coordinates.

[0030] Specifically, in S3, the file output module primarily contains interface files for data connection and the final mesh file to be output. The surface fitting module performs global array data parallelism, while the internal filling module performs local array partition parallelism, necessitating data connection between the two modules.

[0031] Because MPI process communication is expensive, a file interface is used for data aggregation and distribution. In high-performance computing, implementing parallel I / O for file output involves multiple processes working together to write to a single or multiple files. This strategy can significantly increase data writing speed and reduce bottlenecks.

[0032] When outputting result files in parallel, it is necessary to merge the sub-matrices responsible for each process into the result matrix and re-output the file according to the rows and columns of the new matrix. Figure 4 As shown, it is assumed that there are 4 processes for parallel acceleration, each process is responsible for 4 4 A quarter of the space matrix, and forms 2 2 sub-matrices. According to the data correspondence, Proc1 is responsible for data 、 、 、 ; Proc2 is responsible for data 、 、 、 ; Proc3 is responsible for data 、 、 、 ; Proc4 is responsible for data 、 、 、 Each process independently writes its portion of the data to the file based on a pre-calculated offset. In the case of a shared file, the write operations of each process must be ensured not to interfere with each other.

[0033] Example 3 like Figure 5 As shown, the present invention also provides an electronic device 100 for a parallel structured network decomposition method suitable for an FDTD algorithm; the electronic device 100 includes a memory 101, at least one processor 102, a computer program 103 stored in the memory 101 and executable on the at least one processor 102, and at least one communication bus 104.

[0034] The memory 101 can be used to store the computer program 103. The processor 102 implements the steps of the parallel structured network decomposition method applicable to the FDTD algorithm described in Example 1 by running or executing the computer program stored in the memory 101 and calling the data stored in the memory 101. The memory 101 can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, an application required for at least one function (such as a sound playback function, an image playback function, etc.); the data storage area can store data (such as audio data) created according to the use of the electronic device 100. In addition, the memory 101 can include a non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device.

[0035] The at least one processor 102 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The processor 102 may be a microprocessor or any conventional processor, etc. The processor 102 is the control center of the electronic device 100 and connects various parts of the entire electronic device 100 using various interfaces and lines.

[0036] The memory 101 in the electronic device 100 stores a plurality of instructions to implement a parallel structured network partitioning method applicable to the FDTD algorithm. The processor 102 can execute the plurality of instructions to implement: Traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; Perform internal grid filling on the surface data in the global interface file, create a Cartesian structure for each grid plane process that needs to be filled, and fill it in parallel to generate a grid model; Outputs a mesh file containing the mesh model.

[0037] Example 4 If the module / unit integrated in the electronic device 100 is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the process in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device that can carry the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory and read-only memory (ROM, Read-Only Memory).

[0038] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0039] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0040] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0041] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0042] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A parallel structured network partitioning system suitable for FDTD algorithm, characterized by: include: The surface fitting module is used to traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; The medium filling module is used to fill the internal grid of the target object after the surface fitting is completed. A Cartesian structure is created for each grid plane process that needs to be filled, and the filling is performed in parallel to generate a grid model. The file output module is used to realize cross-module data transmission between the surface fitting module and the medium filling module through the global interface file, and output a grid file containing a grid model.

2. A parallel structured network decomposition system suitable for FDTD algorithm according to claim 1, characterized in that: The surface fitting module performs surface fitting on each triangle based on the projection intersection method. Its time complexity is related to the total number of triangle face elements and the amount of calculation for each triangle face element. Any triangle face element exists independently of each other and is operated in parallel with data.

3. A parallel structured network partitioning method applicable to the FDTD algorithm, based on the parallel structured network partitioning system applicable to the FDTD algorithm according to claim 1 or 2, characterized in that: The steps include: Traverse all triangles of the target object, perform surface fitting on each triangle, generate a triangle complexity list, dynamically allocate the load process of each triangle in the complexity list based on a greedy algorithm, and generate a global interface file containing surface data; Perform internal grid filling on the surface data in the global interface file, create a Cartesian structure for each grid plane process that needs to be filled, and fill it in parallel to generate a grid model; Outputs a mesh file containing the mesh model.

4. A parallel structured network partitioning method suitable for FDTD algorithm according to claim 3, characterized in that: The method for generating the triangle face complexity list is as follows: For each triangle face, we project it onto the XOY, XOZ and YOZ coordinate planes, and count the area of the rectangle covering its shadow, that is, the total number of grids, which is recorded as The sum of the number of grids constitutes the complexity of the triangle surface element, and the complexity of all triangle surfaces constitutes the triangle surface element complexity list.

5. A parallel structured network partitioning method suitable for FDTD algorithm according to claim 4, characterized in that: The specific method of dynamically allocating the load process of each triangle face in the complexity list based on the greedy algorithm is as follows: Traverse the triangle face complexity list and select the process with the smallest current load for each triangle face; Update the load of the selected process by adding the complexity of the current triangle element to the load of the process; Repeat this process until all triangles are assigned.

6. A parallel structured network partitioning method suitable for FDTD algorithm according to claim 3, characterized in that: In the medium filling module, during the process of filling the internal grid of the target object after surface fitting, ray tracing and normal vector discrimination method are used to determine whether it is the interior of the target by simulating the intersection of rays and the object surface.

7. A parallel structured network partitioning method suitable for FDTD algorithm according to claim 6, characterized in that: The specific method for the steps of creating a Cartesian structure for each mesh plane process that needs to be filled, and filling in parallel to generate a mesh model is as follows: The sampling ray is sampled along the rectangular coordinate axis z direction, and the number of sampling rays is equal to the number of grids on the two-dimensional plane XOY perpendicular to it; For each grid plane process that needs to be filled, create a Cartesian structure that defines the dimensions of the processor grid and the size of each dimension; Each process is assigned a specific Cartesian coordinate, which maps directly to a specific grid area on the XOY plane; Each process is only responsible for ray tracing calculations within its corresponding specific grid area, processing the set of rays corresponding to its coordinates.

8. A parallel structured network partitioning method suitable for FDTD algorithm according to claim 7, characterized in that: In the step of outputting the grid file containing the grid model, the parallel I / O writing technology is used to merge the sub-matrices responsible for each process into a result matrix, and the file is re-output according to the rows and columns of the new matrix.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the parallel structured network decomposition method applicable to the FDTD algorithm according to any one of claims 3 to 8 are implemented.

10. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the parallel structured network decomposition method applicable to the FDTD algorithm according to any one of claims 3 to 8 are implemented.

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