Control circuit of dual-mode BOOST switching converter

Abstract

A control circuit of a dual-mode BOOST switching converter comprises a PWM loop controller, an LVC comparator, a zero cross detection circuit (ZCD), a five-bit counter circuit, a first RS trigger RS1, a logic circuit, a first switching tube MS1, a second switching tube MS2, a first divider resistor RF1 and a second divider resistor RF2. The limit of light and heavy load switching in the BOOST mode is defined, and the problem that the converter control mode is switched back and forth when the load is at the critical value in the BOOST mode is avoided; the switching converter can select a proper control mode in the BOOST mode, so that the efficiency of the converter is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of microelectronics, and specifically designs a control circuit of a dual-mode BOOST switching converter. Background Art

[0002] Boost switching converters are often used to boost low input voltages to the required output voltage to support the stable operation of various electronic devices. However, with the widespread application of portable devices and low-power systems, improving the conversion efficiency and extending the service life of boost switching converters has become a hot research topic.

[0003] Boost switching converters can use different control methods to improve efficiency under different loads. For example, PFM control can be used to reduce switching losses under light loads, while PWM control can be used under heavy loads.

[0004] Due to the diverse range of use cases, BOOST switching converters face a blind spot when switching between different operating modes. When the load decreases from a heavy load, the control method in BOOST mode will jump back and forth between PWM and PFM control, causing the converter to operate unstable. Summary of the Invention

[0005] To improve the efficiency of a BOOST switching converter, the present invention provides a control circuit for a dual-mode BOOST switching converter. By defining the boundaries between light and heavy load switching in BOOST mode, the switching converter can select an appropriate control mode in BOOST mode, thereby improving the converter's efficiency. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The present invention provides a control circuit for a dual-mode BOOST switching converter, characterized in that it includes a control chip, wherein the control chip includes a PWM loop control, an LVC comparator, a zero-crossing detection circuit (ZCD), a five-bit counter circuit, a first RS trigger RS1, a logic circuit, a first switching tube MS1, a second switching tube MS2, a first voltage divider resistor RF1, and a second voltage divider resistor RF2.

[0007] The first feedback resistor RF1 and the second feedback resistor RF2 are connected in series between the output terminal VOUT of the control chip and the ground terminal GND, and a feedback voltage VOUTFB is generated at a feedback point between the first feedback resistor RF1 and the second feedback resistor RF2;

[0008] The first input end of the logic circuit is connected to the PWM loop control, the second input end is connected to the output end of the zero-crossing detection circuit (ZCD), the third input end is connected to the output end of the first RS trigger RS1 (105), the fourth input end is connected to the signal VREF, and the fifth input end is connected to the signal VOUTFB; the first output end of the logic circuit (106) outputs a signal S1 connected to the gate of the first switch tube MS1, and the second output end outputs a signal S2 connected to the gate of the second switch tube MS2;

[0009] In one embodiment of the present invention, the input terminal of the five-bit counter is connected to the output terminal of the zero-crossing detection circuit (ZCD); the five-bit counter circuit is connected to the set terminal of the first RS flip-flop RS1; when the output signal PFMIN of the five-bit counter circuit is high, the output signal PFMEN of the first RS flip-flop RS1 is high; the operating mode of the converter is switched from the PWM mode to the PFM mode; when the output signal PFMOUT of the LVC comparator is connected to the reset terminal of the first RS flip-flop RS1; when the signal PFMOUT is high, the operating mode of the converter is switched from the PFM mode to the PWM mode;

[0010] In one embodiment of the present invention, the control circuit of the dual-mode BOOST switching converter is characterized in that the logic circuit includes a PFM control circuit and a sleep comparator;

[0011] The PFM control circuit generates a PFMD signal to control the first switch MS1 and the second switch MS2; the sleep comparator has a positive input connected to the VOUTFB signal, a negative input connected to the VREF signal, and an output connected to generate a SLEEP signal to turn off the first switch MS1 and the second switch MS2; the PFM control circuit has a first input connected to the SLEEP signal, a second input connected to the PFMEN signal, a third input connected to the ZCD signal, and a fourth input connected to the PFMD signal;

[0012] In one embodiment of the present invention, the PFM control circuit is characterized by comprising a constant on-time control circuit and a second RS flip-flop RS2;

[0013] The constant on-time module generates the COT signal; the reset terminal of the second RS flip-flop RS2 is connected to the COT signal, the set terminal is connected to the zero-crossing detection circuit (ZCD) module, and the output terminal generates the PFMD signal;

[0014] In one embodiment of the present invention, the constant on-time control circuit is characterized by comprising an amplifier OP1, a passive resistor R1; a negative feedback clamp transistor NM1, proportional current mirrors PM1, PM2, PM3, PM, a capacitor C1, a comparator CMP1, and a third RS trigger RS3;

[0015] The amplifier OP1 is coupled to the negative feedback clamp tube NM1 in a closed loop to form a unity gain amplifier, and VREF is introduced into the control circuit; the proportional current mirrors PM1, PM2, PM3, and PM1 mirror the current generated by VREF and the passive resistor R1 to charge the capacitor C1; the set terminal of the third RS trigger RS3 is connected to the output terminal of the comparator CMP1, the reset terminal is connected to the zero current detection module, and the output terminal is connected to the switch tube NM2;

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] 1. The control circuit of a dual-mode BOOST switching converter designed in this invention clarifies the boundary between light and heavy load switching in BOOST mode, avoiding the problem of converter control mode switching back and forth when the load is at a critical value in BOOST mode;

[0018] 2. The control circuit of a dual-mode BOOST switching converter designed in the present invention enables the switching converter to select an appropriate control mode, thereby improving the efficiency of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 1 is a schematic structural diagram of a dual-mode BOOST switching converter provided by an embodiment of the present invention;

[0020] Figure 2 1 is a schematic diagram of a control circuit of a dual-mode BOOST switching converter provided by an embodiment of the present invention;

[0021] Figure 3 This is a waveform diagram of light-load and heavy-load switching provided by an embodiment of the present invention;

[0022] Figure 4 A schematic structural diagram of a constant on-time circuit provided by an embodiment of the present invention;

[0023] Figure 5 1 is a waveform diagram of each node of a constant on-time circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] In order to further illustrate the technical means and effects adopted by the present invention to achieve the predetermined invention purpose, the following

[0025] The accompanying drawings and specific embodiments illustrate a control circuit for a dual-mode BOOST switching converter proposed by the present invention.

[0026] The technical content, features, and effects of the present invention will be described in detail below in conjunction with the accompanying drawings. This description of the specific embodiments will provide a clearer understanding of the technical means employed by the present invention to achieve its intended objectives and their effects. However, the accompanying drawings are provided for reference and illustration purposes only and do not limit the technical solutions of the present invention in any way.

[0027] See Figure 1 , Figure 1 A control circuit for a dual-mode BOOST switching converter provided in an embodiment of the present invention is characterized in that it includes a control chip 10, which includes a PWM loop control 101, an LVC comparator 102, a zero-crossing detection circuit (ZCD) 103, a five-bit counter circuit 104, a first RS trigger RS1105, a logic circuit 106, a first switch tube MS1, a second switch tube MS2, a first voltage divider resistor RF1, and a second voltage divider resistor RF2.

[0028] The first feedback resistor RF1 and the second feedback resistor RF2 are connected in series between the output terminal VOUT of the control chip and the ground terminal GND, and a feedback voltage VOUTFB is generated at a feedback point between the first feedback resistor RF1 and the second feedback resistor RF2;

[0029] The logic circuit 106 has a first input connected to the PWM loop control 101, a second input connected to the output of the zero-crossing detection (ZCD) circuit 103, a third input connected to the output of the first RS flip-flop RS1105, a fourth input connected to the signal VREF, and a fifth input connected to the signal VOUTFB; the logic circuit 106 has a first output outputting a signal S1 connected to the gate of the first switch MS1, and a second output outputting a signal S2 connected to the gate of the second switch MS2;

[0030] See Figure 1 , Figure 1A control circuit for a dual-mode BOOST switching converter provided by an embodiment of the present invention is characterized in that the input end of the five-bit counter 104 is connected to the output end of the zero-crossing detection circuit (ZCD) circuit 103; the five-bit counter circuit 104 is connected to the set end of the first RS flip-flop RS1105; when the output signal PFMIN of the five-bit counter circuit 104 is high, the output signal PFMEN of the first RS flip-flop RS1105 is high; the converter operating mode is switched from PWM mode to PFM mode; when the output signal PFMOUT of the LVC comparator 102 is connected to the reset end of the first RS flip-flop RS1105; when the signal PFMOUT is high, the converter operating mode is switched from PFM mode to PWM mode;

[0031] In order to clearly define the boundary between light and heavy load switching in BOOST mode, Figure 2 A control circuit for a dual-mode BOOST switching converter provided by an embodiment of the present invention is characterized in that the logic circuit 106 includes a PFM control circuit and a sleep comparator;

[0032] The PFM control circuit generates a PFMD signal to control the first switch MS1 and the second switch MS2; the sleep comparator has a positive input connected to the VOUTFB signal, a negative input connected to the VREF signal, and an output connected to generate a SLEEP signal to turn off the first switch MS1 and the second switch MS2; the PFM control circuit has a first input connected to the SLEEP signal, a second input connected to the PFMEN signal, a third input connected to the ZCD signal, and a fourth input connected to the PFMD signal;

[0033] See Figure 2 , the PFM control circuit includes a constant on-time control circuit and a second RS trigger RS2;

[0034] The constant on-time module generates the COT signal; the reset terminal of the second RS flip-flop RS2 is connected to the COT signal, the set terminal is connected to the zero-crossing detection circuit (ZCD) module, and the output terminal generates the PFMD signal;

[0035] See Figure 3 , Figure 3 1 is a schematic diagram of light-load and heavy-load switching waveforms in BOOST mode provided by an embodiment of the present invention;

[0036] When the converter operates in BOOST mode, when the load switches from heavy load to light load, the inductor current drops below 0, and the output signal of the zero-crossing detection circuit (ZCD) circuit will be set high; after the zero-crossing detection circuit (ZCD) circuit gives five consecutive pulses, the output signal PFMIN of the five-bit counter circuit will jump high and be sent to the set end of the first RS trigger RS1 to set the output end signal PFMEN of the first RS trigger RS1 high; the converter operation mode is switched from PWM mode to PFM mode; under PFM control, when the sleep comparator output signal SLEEP is low, the PFMD signal will output the PON signal through the PFM control circuit, and the signal PON will control the second switch tube MS2 through the second buffer BUF2. The PFMD signal will output a NON signal through the PFM control circuit. The NON signal controls the first switch MS1 through the first buffer BUF1. When the PFMD signal is 1, the first switch MS1 is turned on and the second switch MS2 is turned off, causing the inductor current to increase. When the PFMD signal is 0, the first switch MS1 is turned off and the second switch MS2 is turned on, causing the inductor current to decrease. When the sleep comparator output signal SLEEP is high, the SLEEP signal will pass through the PFM control circuit to set the POFF signal to 1 and the NOFF signal to 0, turning off both the first and second switches MS1 and MS2. When the load switches from light load to heavy load, the PFM control can no longer provide the energy required by the load, so the output voltage decreases. When the VOUTFB signal is lower than the VREF signal, the LVC comparator output signal PFMOUT jumps high and is sent to the reset terminal of the second RS flip-flop RS2, setting the output signal PFMEN of the first RS flip-flop RS1 to 0. The converter operating mode switches from PFM mode to PWM mode.

[0037] See Figure 4 , Figure 4The present invention provides a control circuit for a dual-mode BOOST switching converter. In order to reduce the switching loss of the BOOST mode under PFM control, a constant on-time control circuit is used under PFM control, so that the switching frequency is reduced, the switching loss is reduced, and the efficiency is improved. The circuit includes an amplifier OP1, a comparator CMP1, a second RS flip-flop RS2, and a third RS flip-flop RS3. The amplifier OP1 is coupled to the negative feedback clamp tube NM1 in a closed loop to form a unity gain amplifier, and VREF is introduced into the control circuit. The passive resistor R1; the capacitor C1; the proportional current mirrors PM1, PM2, PM3, and PM1 are used to mirror the current generated by VREF and the passive resistor R1, and then charge the capacitor C1 to generate a VSLOPE voltage and send it to the comparator CMP1 for comparison with the reference voltage. When the voltage is When the voltage VSLOPE is higher than VREF, the comparator CMP1 output is high, setting the output of the third RS flip-flop RS3 to 1, turning on the switch tube NM2, pulling the voltage VSLOPE to zero, and resetting the output of the second RS flip-flop RS2 to 0, making the PFMD signal 0; when the inductor current drops to 0, the zero current detection module output is 1, resetting the output of the third RS flip-flop RS3 to 0, causing the voltage VSLOPE to start rising again, setting the output of the second RS flip-flop RS2 to 1, and making the PFMD signal 1.

[0038] The constant on-time Ton can be calculated using the following formula:

[0039]

[0040] Further, see Figure 5 This is a waveform diagram of each node of a constant on-time circuit used in a control circuit of a dual-mode BOOST switching converter provided by an embodiment of the present invention under PFM control.

[0041] The above content further describes the present invention in detail in conjunction with specific preferred embodiments, but does not mean that the specific implementation of the present invention is limited to these descriptions. Those skilled in the art of the present invention may make some simple deductions or substitutions as needed without departing from the core concept of the present invention, and such modifications and variations should be considered part of the scope of protection of the present invention.

Claims

1. A control circuit for a dual-mode BOOST switching converter, characterized in that: The control chip (10) includes a PWM loop control (101), an LVC comparator (102), a zero-crossing detection circuit (ZCD) (103), a five-bit counter circuit (104), a first RS trigger RS1 (105), a logic circuit (106), a first switch tube MS1, a second switch tube MS2, a first voltage divider resistor RF1, and a second voltage divider resistor RF2; The first feedback resistor RF1 and the second feedback resistor RF2 are connected in series to the output terminal V of the control chip OUT There is a feedback voltage V between the first feedback resistor RF1 and the ground terminal GND at the feedback point between the first feedback resistor RF1 and the second feedback resistor RF2. OUTFB ; The first input terminal of the logic circuit (106) is connected to the PWM loop control (101), the second input terminal is connected to the output terminal of the zero-crossing detection circuit (ZCD) circuit (103), the third input terminal is connected to the output terminal of the first RS trigger RS1 (105), and the fourth input terminal is connected to the signal V REF The fifth input terminal is connected to the signal V OUTFB The logic circuit (106) outputs a signal S1 at a first output terminal and is connected to the gate of the first switch tube MS1, and outputs a signal S2 at a second output terminal and is connected to the gate of the second switch tube MS2; The input end of the five-bit counter (104) is connected to the output end of the zero-crossing detection circuit (ZCD) circuit (103); the five-bit counter circuit (104) is connected to the set end of the first RS flip-flop RS1 (105); when the output signal PFMIN of the five-bit counter circuit (104) is high, the output signal PFMEN of the first RS flip-flop RS1 (105) is high; the converter operation mode is switched from the PWM mode to the PFM mode; when the output signal PFMOUT of the LVC comparator (102) is connected to the reset end of the first RS flip-flop RS1 (105); when the signal PFMOUT is high, the converter operation mode is switched from the PFM mode to the PWM mode; The logic circuit (106) includes a PFM control circuit and a sleep comparator; the PFM control circuit generates a PFMD signal to control the first switch tube MS1 and the second switch tube MS2; the positive input terminal of the sleep comparator is connected to the V OUTFB Signal, negative input terminal connected to the V REF The first input terminal of the PFM control circuit is connected to the SLEEP signal, the second input terminal is connected to the PFMEN signal, the third input terminal is connected to the ZCD signal, and the fourth input terminal is connected to the PFMD signal.

2. The PFM control circuit according to claim 1, wherein: It includes a constant on-time control circuit and a second RS trigger RS2; The constant on-time module generates the COT signal; The reset terminal of the second RS flip-flop RS2 is connected to the COT signal, the set terminal is connected to the zero-crossing detection circuit (ZCD) module, and the output terminal generates the PFMD signal.

3. A constant on-time control circuit according to claim 2, characterized in that: Including amplifier OP1, passive resistor R1; negative feedback clamp tube NM1, proportional current mirror PM1, PM2, PM3, PM, capacitor C1, comparator CMP1, and third RS trigger RS3; The amplifier OP1 is coupled with the negative feedback clamp tube NM1 to form a unity gain amplifier after the closed loop, and V REF Introduced into the control circuit; the proportional current mirrors PM1, PM2, PM3 and PM4 convert V REF The capacitor C1 is charged after being mirrored by the current generated by the passive resistor R1; the set end of the third RS trigger RS3 is connected to the output end of the comparator CMP1, the reset end is connected to the zero current detection module, and the output end is connected to the switch tube NM2.

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