GaN driving power switch power supply system and control circuit thereof

Abstract

The invention discloses a GaN driving power switch power supply system and a control circuit thereof. The control circuit comprises a driving control module, a power driving switch and a power supply transistor, the power driving switch is connected between a GaN power switch and a circuit reference ground, and the power supply transistor is connected between the GaN power switch and a power supply capacitor. The driving control module is configured to control the power driving switch to be turned on or turned off and control the state of the power supply transistor according to the power supply voltage, the load state of the GaN driving power switch power supply system and an initial control signal used for controlling the GaN power switch to be turned on or turned off, so that the power supply capacitor is charged through the power supply transistor.

Description

Technical Field

[0001] The present invention relates to the field of circuits, and in particular to a GaN driven power switch power supply system and a control circuit thereof. Background Art

[0002] Power devices based on wide-bandgap semiconductor materials (such as gallium nitride (GaN)) can significantly improve the operating frequency and efficiency of switching power supply systems due to their lack of body diode effects and their low on-resistance and parasitic capacitance. However, the current power supply methods used by switching power supply controllers for these power devices still have high system costs and low power supply efficiency. Summary of the Invention

[0003] According to an embodiment of the present invention, a control circuit is used in a GaN-driven power switch power supply system, wherein the GaN-driven power switch power supply system includes a GaN power switch and a power supply capacitor for providing a power supply voltage for the control circuit, and the control circuit includes a drive control module, a power drive switch, and a power supply transistor, and wherein: the power drive switch is connected between the GaN power switch and a circuit reference ground; the power supply transistor is connected between the GaN power switch and the power supply capacitor; and the drive control module is configured to control the power drive switch to be turned on or off and the state of the power supply transistor to charge the power supply capacitor through the power supply transistor based on the supply voltage, the load state of the GaN-driven power switch power supply system, and an initial control signal for controlling the GaN power switch to be turned on or off.

[0004] A GaN-driven power switch power supply system according to an embodiment of the present invention includes a GaN power switch, a power supply capacitor for providing a power supply voltage to the control circuit, and the above-mentioned control circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] The present invention can be better understood from the following description of specific embodiments of the present invention in conjunction with the accompanying drawings, in which:

[0006] Figure 1 This is a schematic diagram of the circuit principle of a traditional GaN-driven power switching power supply system.

[0007] Figure 2 1 is a schematic diagram of an exemplary circuit principle of a GaN driven power switch power supply system according to an embodiment of the present invention.

[0008] Figure 3A yes Figure 2 An example logic structure diagram of the control circuit is shown.

[0009] Figure 3B yes Figure 3AAn example circuit diagram of a state control unit is shown.

[0010] Figure 3C yes Figure 2 An example logic structure diagram of the control circuit is shown.

[0011] Figure 3D yes Figure 3C An example circuit diagram of a state control unit is shown.

[0012] Figure 4A 、 Figure 4B 、 Figure 5A 、 Figure 5B yes Figure 2 FIG. 1 is a schematic diagram of waveforms of related control signals of a GaN-driven power switch power supply system when the system is in a non-light-load state.

[0013] Figure 4C It is used to implement Figure 4A Circuit diagram of the control mechanism is shown.

[0014] Figure 5C It is used to implement Figure 5A Circuit diagram of the control mechanism shown.

[0015] Figure 6 yes Figure 2 FIG. 1 is a schematic diagram of waveforms of related control signals of a GaN-driven power switch power supply system when the system is in a light-load state.

[0016] Figure 7 、 Figures 9 to 12 yes Figure 2 The schematic diagram of the modified circuit principle of the GaN-driven power switching power supply system is shown.

[0017] Figure 8 yes Figure 7 FIG. 1 is a schematic diagram of waveforms of related control signals of a GaN-driven power switch power supply system when the system is in a non-light-load state. DETAILED DESCRIPTION

[0018] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the detailed description below, many specific details are proposed in order to provide a comprehensive understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement and improvement of elements, components and algorithms without departing from the spirit of the present invention. In the accompanying drawings and the following description, well-known structures and technologies are not shown in order to avoid unnecessary ambiguity in the present invention. In addition, it should be noted that the term "A is connected to B" used herein can mean "A is directly connected to B" or "A is indirectly connected to B via one or more other elements."

[0019] Figure 1 This is a schematic diagram of the circuit principle of the traditional GaN driven power switch power supply system. Figure 1 As shown, the GaN-driven power switch power supply system 100 includes components such as a full-wave rectifier BD1, a control circuit U1, a high-voltage startup unit U2, a GaN power switch M1, a transformer T1 including an auxiliary winding L2, diodes D1 and D2, an input capacitor C1, an output capacitor C2, a power supply capacitor C3, and a current detection resistor R2. The control circuit U1 includes a pulse width modulation (PWM) control module U11, a driver module U12, and a power drive switch M2. The PWM control module U11 outputs a PWM signal to the driver module U12, so that the driver module U12 controls the power drive switch M2 to turn on or off based on the PWM signal. The high-voltage startup unit U2 can be implemented by high-voltage components such as high-voltage resistors or junction field-effect transistors (JFETs) (not shown in the figure). When the GaN-driven power switch power supply system is connected to an AC power supply, the full-wave rectifier BD1 rectifies the input AC voltage VAC, generating a voltage VIN on the input capacitor C1. The voltage VIN charges the power supply capacitor C3 via the high-voltage startup unit U2, and the voltage at the VDD node of the power supply capacitor C3 (used to provide the power supply voltage for the control circuit U1) gradually increases. When the voltage at the VDD node exceeds the preset undervoltage protection voltage of the control circuit U1, the control circuit U1 begins to operate normally based on the power supply voltage provided by the VDD node (i.e., controlling the power drive switch M2 to turn on or off through the PWM control module U11 and the driver module U12, thereby controlling the GaN power switch M1 to turn on or off). At this time, the power supply capacitor C3 is charged by the auxiliary winding L2, that is, the power supply voltage of the control circuit U1 is provided by the auxiliary winding L2. Here, the generation of the power supply voltage of the control circuit U1 requires the high-voltage startup unit U2 and the auxiliary winding L2, which has high system cost and low power supply efficiency.

[0020] According to an embodiment of the present invention, the control circuit of the GaN-driven power switch power supply system uses a power supply transistor to form a unique power supply path between the GaN power switch and the power supply capacitor. By controlling the state of the power supply transistor, the charging current passing through the power supply path can be managed. The charging current charges the power supply capacitor, so that the power supply capacitor can provide a power supply voltage for the control circuit. This eliminates the high-voltage startup unit U2 and the auxiliary winding L2 of the transformer T1 required to generate the power supply voltage in the traditional solution, saving system costs. In addition, the optimized control of the drive control module can be used to reduce power supply losses and achieve efficient power supply control.

[0021] Figure 2 FIG. 1 is a schematic diagram showing an exemplary circuit principle of a GaN driven power switch power supply system according to an embodiment of the present invention. Figure 2 As shown, the GaN-driven power switch power supply system 200 includes components such as a full-wave rectifier BD1, a control circuit U20, a GaN power switch M1, a diode D1, an input capacitor C1, an output capacitor C2, a power supply capacitor C3 for providing a power supply voltage to the control circuit U20, and a current detection resistor R2. Among them, the control circuit U20 includes a pulse width modulation (PWM) control module U21, a drive control module U22, a drive module U23, a power drive switch M2, and a power supply transistor M202. The power drive switch M2 is connected between the GaN power switch M1 and the circuit reference ground. The power supply transistor M202 is connected between the GaN power switch M1 and the power supply capacitor C3. The PWM control module U21 is configured to generate an initial control signal PWM based on the system's feedback signal. The drive control module U22 is configured to control the power drive switch M2 to be turned on or off and the state of the power supply transistor M202 to charge the power supply capacitor C3 through the power supply transistor M202 based on the supply voltage VDD, the load state of the GaN drive power switch power supply system 200, and the initial control signal PWM used to control the conduction or shutdown of the GaN power switch M1. The drive module U23 is configured to receive the drive control signal sent by the drive control module U22 and use the control signal to control the conduction or shutdown of the power drive switch M2.

[0022] like Figure 2 As shown, in the control circuit U20, the power supply transistor M202 provides the only power supply path between the GaN power switch M1 and the power supply capacitor C3. The power supply transistor M202 can be a metal oxide semiconductor field effect transistor (MOSFET, for example Figure 2The M202 shown is a PMOS transistor), a bipolar junction transistor (BJT) or other transistor structure. The power supply transistor can be set to any one of a cut-off state, a first conduction state or a second conduction state. Among them, the first conduction state of the MOS transistor is a saturation state, the second conduction state of the MOS transistor is a linear working area, the first conduction state of the BJT transistor is an amplification state, and the second conduction state of the BJT transistor is a saturation conduction state. By controlling the state of the power supply transistor M202, the size of the charging current passing through the power supply path can be managed, and the charging current charges the power supply capacitor C3, so that the power supply capacitor C3 can provide the power supply voltage VDD for the control circuit. Compared Figure 1 and Figure 2 , Figure 2 The high-voltage starting unit U2 and the auxiliary winding L2 of the transformer T1 are omitted, which saves system costs, and the optimized control of the drive control module U22 can be used to reduce power supply losses and achieve efficient power supply control.

[0023] Figure 2 The states of the control circuit U20 shown may include a power-on state and a working state. When the control circuit U20 is in the working state, the GaN-driven power switch power supply system can operate normally, and the corresponding load state is light load or non-light load. The load state of the GaN-driven power switch power supply system can be determined by various mature judgment mechanisms, such as according to the current ILP output by the GaN power switch M1 (corresponding to Figure 2 The primary inductor current of transformer T1 in the GaN drive power switch power supply system determines whether the load state is light or non-light. This determination can be based on the peak value of current ILP. The actual determination can be implemented by the PWM control module U21 or the drive control module U22, and the current ILP is characterized by the current sense voltage (i.e., the voltage at the CS node) generated by current sense resistor R2 when current ILP flows through R2. The PWM control module U21 can also select the voltage at the CS node as the feedback signal required when generating the initial control signal PWM.

[0024] like Figure 2 As shown, the control circuit U20 may further include a diode D201. The diode D201 provided on the power supply path is used to prevent current backflow when the voltage of the SW node (i.e., the source of the GaN power switch M1) is lower than the VDD node. In addition to the diode D201, other types of unidirectional conductive devices may also be selected to achieve this effect. The unidirectional conductive device may be located between the GaN power switch M1 and the power supply transistor M202, or between the power supply transistor M202 and the power supply capacitor C3, as long as it is provided on the power supply path and can prevent current backflow.

[0025] In some embodiments, taking the power supply transistor M202 as a MOS transistor as an example, its initial state is a saturation state, and the initial state of the power drive switch M2 is a disconnected state. The drive control module is specifically configured as follows: when the control circuit U20 is in the power-on state and the power supply voltage VDD is greater than the minimum power supply voltage threshold, the power supply transistor M202 is controlled to be in the cut-off state, and the control circuit is determined to enter the working state; when the control circuit U20 is in the working state, the power drive switch M2 is controlled to be turned on or off and the state of the power supply transistor M202 is controlled according to the load state of the GaN drive power switch power supply system and the initial control signal PWM. Figure 2 In the illustrated embodiment, when the GaN-driven power switch power supply system is first connected to an AC power source, the control circuit U20 is in a powered-on state (i.e., in the process of being powered on), the power supply transistor M202 and the power drive switch M2 are in an initial state, and the current ILP output by the GaN power switch M1 charges the power supply capacitor C3 through the power supply transistor M202, causing the power supply voltage VDD to gradually increase. When the power supply voltage VDD rises above the minimum power supply voltage threshold (typically the undervoltage protection voltage threshold of the control circuit U20), the power supply voltage VDD is sufficient to power the control circuit U20, and the power supply transistor M202 is controlled to be in a cut-off state, with no current flowing through it. This determines that the control circuit U20 has entered a normal power supply operating state. After the control circuit U20 enters the operating state, it can control the power drive switch M2 to be on or off based on whether the load state of the GaN-driven power switch power supply system is lightly loaded and the initial control signal PWM output by the PWM control module U21, and simultaneously control the power supply transistor M202 to be in a cut-off state, a saturated state, or a linear operating region.

[0026] Figure 3A According to some embodiments, Figure 2 The example logic structure diagram of the control circuit U20 is shown in FIG. Figure 3A As shown, the drive control module U22 may include a voltage detection unit U221, a signal control unit U222, and a state control unit U223. The voltage detection unit U221 is configured to determine whether the supply voltage VDD is greater than the minimum supply voltage threshold and send a determination signal s106 to the signal control unit U222. U222 is configured to determine whether the control circuit U20 is in a power-on state or a working state based on the determination signal s106, and based on the current state of the control circuit U20, send a drive control signal s101 to the drive module U23 and send state control signals s102-s104 to the state control unit U223. The state control unit U223 adjusts the gate voltage 105 of the power supply transistor M202 based on the state control signals s102-s104, so as to control the state of M202 using 105.

[0027] In some embodiments, the state control unit U223 may include a bias current source that outputs a bias current, and a preset transistor that forms a current mirror structure with the power supply transistor, and the preset transistor is used to mirror the bias current to control the power supply transistor to be in a state corresponding to the bias current. Figure 3B yes Figure 3A The example circuit diagram of the state control unit is shown in FIG. Figure 3B As shown, the state control unit U223 may include: a preset transistor M203 that forms a current mirror structure with the power supply transistor M202, a Zener diode Dz for performing gate-source voltage clamping protection on M202 and M203, bias current sources I102-I104, and control switches M302-M304 respectively connected between the bias current sources I102-I104 and the drain of the preset transistor M203, wherein the on and off of the control switches M302-M304 are respectively controlled by state control signals s102-s104. Figure 3B In the example, both the power supply transistor M202 and the preset transistor M203 are MOS transistors. Assuming the mirror ratio of the current mirror structure formed by the preset transistor M203 and the power supply transistor M202 is 1:k, and the clamping voltage of the Zener diode Dz is V0, then when M302 is on and M303 and M304 are off, the power supply transistor M202 is in a linear operating region. At this time, the gate voltage I05 of M202 is V105 = V107 - V0, and the current flowing through the power supply transistor M202 is controlled by the source-drain voltage Vds and internal resistance Ron of M202. When M303 is on and M302 and M304 are off, the power supply transistor M202 is in a saturated state, and the current flowing through the power supply transistor M202 is K*I103. When M304 is on and M302 and M303 are off, the power supply transistor M202 is in a saturated state, and the current flowing through the power supply transistor M202 is K*I104.

[0028] like Figure 3A and 3B As shown, in some embodiments, when signal s101 is at a high level, power drive switch M2 is turned on; otherwise, power drive switch M2 is turned off. When any of signals s102-s104 is at a low level, the corresponding control switch is turned off; otherwise, it is turned on. When gate voltage 105 is at a high level, M202 is turned off because it is in the off state; otherwise, it is turned on.

[0029] Figure 3C According to other embodiments, Figure 2 An example logical structure diagram of the control circuit U20 is shown. Figure 3C The power supply transistor is implemented as a BJT transistor, specifically a PNP transistor. That is, Figure 3C Will Figure 3A The PMOS transistor M202 in the circuit is replaced by the PNP transistor Q202. Figure 3C The diode D201 to prevent current backflow is not required. Figure 3C As shown, the state control unit U223 adjusts the base voltage 105 of the PNP transistor Q202 based on the state control signals s102 - s104 to control the state of the PNP transistor Q202 using 105 .

[0030] Figure 3D yes Figure 3C The example circuit diagram of the state control unit is shown in FIG. Figure 3D As shown, in the state control unit U223, a preset PNP transistor Q203 and a power supply PNP transistor Q202 form a current mirror structure, and a Zener diode Dz is used to clamp the base-emitter voltage of Q202 and Q203. Assuming that the mirror ratio of the current mirror structure formed by the preset PNP transistor Q203 and the power supply PNP transistor Q202 is 1:k, and the clamping voltage of the Zener diode Dz is V0, when M302 is on and M303 and M304 are off, the power supply transistor Q202 is in a saturated on state. At this time, the base voltage of Q202 (i.e., I105) is V105 = V107 - V0, and a large current flows through the collector and emitter of the power supply transistor Q202. When M303 is on and M302 and M304 are off, the power supply transistor Q202 is in an amplified state, and the current flowing through the power supply transistor Q202 is K*I103. When M304 is turned on and M302 and M303 are turned off, the power supply transistor Q202 is in an amplifying state, and the current flowing through the power supply transistor M202 is K*I104.

[0031] like Figure 3C and 3D As shown, in some embodiments, when signal s101 is at a high level, power drive switch M2 is turned on; otherwise, power drive switch M2 is turned off. When any of signals s102-s104 is at a low level, the corresponding control switch is turned off; otherwise, it is turned on. When base voltage 105 is at a high level, Q202 is turned off because it is in the off state; otherwise, it is turned on.

[0032] Furthermore, when the control circuit U20 is in an operating state, the load state of the GaN-driven power switch power supply system is light load or non-light load, and the corresponding control mechanism of the drive control module U22 is different. In some embodiments, the drive control module U22 is configured to: when the control circuit is in an operating state and the load state of the GaN-driven power switch power supply system is light load, when the initial control signal PWM is low, control the power supply transistor M202 to be in a first conduction state and control the power drive switch M2 to be off, and when the initial control signal PWM is high, control the power supply transistor M202 to be in a cut-off state and control the power drive switch M2 to be on; and when the control circuit is in an operating state and the load state of the GaN-driven power switch power supply system is non-light load, control the power supply transistor M202 to be in a second conduction state or cut-off state based on the supply voltage and the transition edge of the initial control signal PWM, control the power drive switch M2 to be on when the initial control signal PWM is high and the power supply transistor M202 is cut-off, otherwise control the power drive switch M2 to be off.

[0033] In some embodiments, when the GaN-driven power switching power supply system is in a non-light-load state, controlling the power supply transistor M202 to be in the second on-state or off-state based on the supply voltage and the transition edge of the initial control signal PWM specifically includes: controlling the power supply transistor M202 to be in the second on-state or off-state based on the supply voltage and the rising edge of the initial control signal PWM, or controlling the power supply transistor M202 to be in the second on-state or off-state based on the supply voltage and the falling edge of the initial control signal PWM.

[0034] Specifically, when the GaN-driven power switching power supply system is in a non-light-load state, when the power supply transistor M202 is controlled to be in the second conduction state, the power supply capacitor C3 is charged through the power supply transistor M202; when the power supply transistor M202 is controlled to be in the cut-off state, the charging of the power supply capacitor C3 is stopped. Therefore, when the GaN-driven power switching power supply system is in a non-light-load state, there are at least two ways of controlling the power supply transistor M202. One is not to judge the size of the power supply voltage and the preset charging threshold, and the charging time is negatively correlated with the power supply voltage. The other is to charge the power supply capacitor C3 for a preset charging time through the power supply transistor M202 when the power supply voltage is less than the preset charging threshold, and the preset charging time is fixed. In the first idea, when the load state of the GaN-driven power switching power supply system is non-light-load, controlling the power supply transistor M202 specifically includes: when the initial control signal PWM jumps, controlling the power supply transistor M202 to be in the second conduction state, maintaining the charging time negatively correlated with the power supply voltage, and then controlling the power supply transistor M202 to become cut-off. In the second idea, when the load state of the GaN-driven power switching power supply system is not light load, controlling the power supply transistor specifically includes: when the initial control signal PWM jumps and the power supply voltage is less than the preset charging threshold, controlling the power supply transistor M202 to be in the second conduction state, and maintaining the preset charging time after controlling the power supply transistor M202 to become the cut-off state.

[0035] Figure 4A According to some embodiments, Figure 2 The waveform diagram of the related control signal when the GaN driven power switch power supply system is in a non-light load state is shown in FIG. Figure 4A As shown, in the case where the power supply transistor is a PMOS transistor M202, at the rising edge of the initial control signal PWM, the power supply transistor M202 is controlled to maintain a charging time in a linear working area that is negatively correlated with the power supply voltage, and s103 and s104 maintain a logic low level during the entire working process. As shown in FIG4, Figure 3A The control circuit U20 shown can implement the following control mechanism:

[0036] At time t1, the initial control signal PWM jumps from a low level to a high level, and the signal control unit U222 outputs a high-level state control signal s102. The state control unit U223 generates a low-level gate voltage 105 based on s102 to control the power supply transistor M202 to be in the linear working area, while achieving M1 conduction and power supply to the power supply capacitor C3. The current ILP gradually increases, and the supply voltage VDD gradually increases.

[0037] At time t2 after the charging time Tcharge, the signal control unit U222 outputs a low-level state control signal s102, and the gate voltage 105 accordingly changes to a high level. The power supply transistor M202 changes to a cut-off state, and the charging of the power supply capacitor C3 is suspended. At the same time, the drive control signal s101 output by the signal control unit U222 changes from a low level to a high level. The drive module U23 controls the power drive switch M2 to turn on based on the high level s101, and the current ILP flows into GND through M1, M2 and R2, thereby continuously increasing.

[0038] At time t3, the initial control signal PWM jumps from high level to low level, the signal control unit U222 restores the signal s101 to low level, s102-s104 remain low level, the power drive switch M2 is turned off, the power supply transistor M202 remains in the off state, and the current ILP is 0;

[0039] Wait until time t4 and enter the same cycle as the previous period again.

[0040] Specifically, the charging time Tcharge is negatively correlated with the supply voltage VDD; that is, the higher the supply voltage VDD, the shorter the charging time Tcharge. If the supply voltage VDD is higher than the preset maximum voltage, the charging time Tcharge = 0. At this time, the power supply transistor M202 is in the off state during the current PWM switching cycle, and the power supply capacitor C3 is not charged. The CS waveform refers to the voltage at the CS node, which is generated when the current ILP passes through the current sensing resistor R2.

[0041] Figure 4C According to some embodiments, Figure 4A The circuit diagram of the control mechanism is shown in Figure 2. Figure 4CAs shown, the drive control module includes a time control unit 400, which is used to achieve a charging time Tcharge that is negatively correlated with the supply voltage VDD. The time control unit 400 may include a transconductance amplifier I401, a capacitor C4, a switch K4, a comparator I402, an inverter I403, and voltage-divider resistors R41 and R42 connected in series between the supply voltage VDD and the circuit reference ground. The non-inverting input of the transconductance amplifier I401 is connected to the divided voltage of the supply voltage VDD (i.e., the voltage at the junction of R41 and R42), and the inverting input of the transconductance amplifier I401 is connected to a first reference voltage Vth1. The output of the transconductance amplifier I401, the first terminal of the capacitor C4, and the first terminal of the switch K4 are connected to the non-inverting input of the comparator I402. The second terminal of the capacitor C4 and the second terminal of the switch K4 are connected to the circuit reference ground. The on and off of the switch K4 is controlled by the output of the inverter I403. The input of the inverter I403 is the initial control signal PWM. The inverting input terminal of the comparator I402 is connected to the second reference voltage Vth2, and the comparator I402 outputs a control signal indicating the charging duration Tcharge (ie, a control signal with a pulse width of Tcharge, which can be directly used as the signal s102). Figure 4C As shown, assuming that the transconductance coefficient of the transconductance amplifier I401 is gm, the pulse width Tcharge of the control signal is calculated as follows:

[0042] Tcharge=(C4*Vth2) / (gm*((VDD*R2 / (R1+R2)-Vth1)).

[0043] As the power supply voltage VDD increases, the charging time Tcharge gradually decreases, and the charging time Tcharge is negatively correlated with the power supply voltage VDD.

[0044] Figure 4B According to some embodiments, Figure 2 The waveform diagram of the related control signal when the GaN driven power switch power supply system is in a non-light load state is shown in FIG. Figure 4B As shown, in the case where the power supply transistor is a PMOS transistor M202, at the rising edge of the initial control signal PWM and when the power supply voltage VDD is less than the preset charging threshold VDD_low, the power supply transistor M202 is controlled to maintain the preset charging time Tcharge0 in the linear working area. The preset charging time Tcharge0 is a fixed value. Figure 4B As shown, Figure 3A The control circuit U20 shown can implement the following control mechanism:

[0045] At time t1, the initial control signal PWM changes from low level to high level, and the supply voltage VDD is less than the preset charging threshold VDD_low. At this time, the power supply transistor M202 is controlled to be in the linear working area and maintains the charging time Tcharge0;

[0046] At time t2, the power supply transistor M202 is controlled to be turned off, and the power drive switch M2 is controlled to be turned on until time t3;

[0047] At time t3, the initial control signal PWM changes from high level to low level, controlling the power drive switch M2 to be turned off;

[0048] At time t4, the initial control signal PWM changes from a low level to a high level, and the supply voltage VDD is not less than the preset charging threshold VDD_low. Therefore, there is no need to supply power to the supply capacitor C3, and the power supply transistor M202 remains in the off state, directly controlling the power drive switch M2 to turn on until time t5.

[0049] At time t5 , when the initial control signal PWM changes from a high level to a low level, the power drive switch M2 is controlled to be turned off.

[0050] Figure 5A According to some embodiments, Figure 2 The waveform diagram of the related control signal when the GaN driven power switch power supply system is in a non-light load state is shown in FIG. Figure 5A As shown, when the power supply transistor is a PMOS transistor M202, at the falling edge of the initial control signal PWM, the power supply transistor M202 is controlled to maintain a charging time in a linear working area that is negatively correlated with the power supply voltage, and s103 and s104 remain at a low level during the entire working process. Figure 5A As shown, Figure 3A The control circuit U20 shown can implement the following control mechanism:

[0051] At time t1, the initial control signal PWM jumps from a low level to a high level, and the drive control signal s101 output by the signal control unit U222 changes from a low level to a high level. The drive module U23 controls the power drive switch M2 to turn on based on the high level s101, and the current ILP flows into GND through M1, M2 and R2, so the current ILP gradually increases;

[0052] At time t2, the initial control signal PWM jumps from a high level to a low level, the signal control unit U222 restores the drive control signal s101 to a low level, the power drive switch M2 is turned off, and at the same time, the signal control unit U222 outputs a high-level state control signal s102. The state control unit U223 generates a low-level gate voltage 105 based on s102 to control the power supply transistor M202 to be in the linear working area. M1 continues to be turned on and supplies power to the power supply capacitor C3 through the power supply transistor M202. The supply voltage VDD gradually increases, and the current ILP continues to increase.

[0053] At time t3 after the charging time Tcharge, the signal control unit U222 outputs a low-level state control signal s102, and the gate voltage 105 accordingly becomes high, controlling the power supply transistor M202 to become cut off, suspending charging of the power supply capacitor C3, and the current ILP becomes 0;

[0054] At time t4, the same cycle as the previous period is entered again.

[0055] Specifically, the charging time Tcharge is negatively correlated with the power supply voltage VDD, that is, the higher the power supply voltage VDD is, the shorter the charging time Tcharge is. If the power supply voltage VDD is higher than the preset maximum voltage, the charging time Tcharge = 0. At this time, the power supply transistor M202 is in the off state during the PWM switching cycle and will not charge the power supply capacitor C3.

[0056] Figure 5C According to some embodiments, Figure 5A The circuit diagram of the control mechanism is shown in Figure 2. Figure 5C As shown, the drive control module includes a time control unit 500, which is used to achieve a charging time Tcharge that is negatively correlated with the supply voltage VDD. The time control unit 500 may include a transconductance amplifier I501, a capacitor C5, a switch K5, a comparator I502, and voltage-dividing resistors R51 and R52 connected in series between the supply voltage VDD and the circuit reference ground. The non-inverting input of the transconductance amplifier I501 is connected to the divided voltage of the supply voltage VDD (i.e., the voltage at the connection point between R51 and R52), and the inverting input of the transconductance amplifier I501 is connected to a first reference voltage Vth1. The output of the transconductance amplifier I501, the first end of the capacitor C5, and the first end of the switch K5 are connected to the non-inverting input of the comparator I502, and the second end of the capacitor C5 and the second end of the switch K5 are connected to the circuit reference ground. The on and off of the switch K5 is controlled by the initial control signal PWM. The inverting input terminal of the comparator I502 is connected to the second reference voltage Vth2, and the comparator I502 outputs a control signal indicating the charging duration Tcharge (ie, a control signal with a pulse width of Tcharge, which can be directly used as the signal s102). Figure 5CAs shown, the pulse width Tcharge of the control signal is calculated as follows:

[0057] Tcharge=(C5*Vth2) / (gm*((VDD*R2 / (R1+R2)-Vth1)).

[0058] Figure 5B According to some embodiments, Figure 2 The waveform diagram of the related control signal when the GaN driven power switch power supply system is in a non-light load state is shown in FIG. Figure 5B As shown, in the case where the power supply transistor is a PMOS transistor M202, at the falling edge of the initial control signal PWM and when the power supply voltage VDD is less than the preset charging threshold VDD_low, the power supply transistor M202 is controlled to maintain the preset charging time Tcharge0 in the linear working area. The preset charging time Tcharge0 is a fixed value. Figure 5B As shown, Figure 3A The control circuit U20 shown can implement the following control mechanism:

[0059] At time t1, the initial control signal PWM changes from high level to low level, and the supply voltage VDD is less than the preset charging threshold VDD_low. At this time, the power supply transistor M202 is controlled to be in the linear working area and maintain the charging time Tcharge0;

[0060] At time t2, the power supply transistor M202 is controlled to be in the cut-off state;

[0061] At time t3, the initial control signal PWM changes from low level to high level, controlling the power drive switch M2 to turn on;

[0062] At time t4, when the initial control signal PWM changes from a high level to a low level, the power drive switch M2 is controlled to be turned off. At this time, since the supply voltage VDD is not less than the preset charging threshold VDD_low, there is no need to supply power to the power supply capacitor C3, and the power supply transistor M202 remains in the off state.

[0063] At time t5, when the initial control signal PWM changes from a low level to a high level, the power driving switch M2 is controlled to be turned on.

[0064] Figure 6 According to some embodiments, Figure 2 The waveform diagram of the related control signals when the GaN driven power switch power supply system is in a light load state is shown in FIG. Figure 6 As shown, when the power supply transistor is a PMOS transistor M202, when the GaN driving power switch power supply system is in a light load state, the signals s102 and s104 remain at a low level. Figure 6 As shown, Figure 3AThe control circuit U20 shown can implement the following control mechanism:

[0065] When the initial control signal PWM is at a high level (i.e., the t1-t2 time period), the signal s103 output by the signal control unit U222 is at a low level. Based on the signal s103 state, the control unit U223 outputs the gate voltage 105 to control the power supply transistor M202 to be in the cut-off state. The signal control unit U222 also controls the power drive switch M2 to be in the on state by driving the control signal s101.

[0066] When the initial control signal PWM is at a low level (i.e., the t2-t3 time period), the signal control unit U222 controls the power drive switch M2 to be in the off state by driving the control signal s101, the signal s103 output by the signal control unit U222 is at a high level, and the state control unit U223 controls the power supply transistor M202 to be in a saturation state based on the gate voltage 105 output by the signal s103.

[0067] like Figure 6 As shown, in the PWM low level stage, the power supply transistor M202 is in a saturated state, and the charging current flowing through the power supply transistor M202 to charge the power supply capacitor C3 is Ichar, achieving high-efficiency power supply control under light load.

[0068] The control process when the power supply transistor is a PNP transistor Q202 is similar to the control process when the power supply transistor is a PMOS transistor M202 and will not be described in detail here.

[0069] Figure 7 yes Figure 2 Variation of the GaN-driven power switch power supply system shown. Figure 2 and Figure 7 The connection method of the current detection resistor R2 and the power supply capacitor C3 is slightly different. Figure 2 As shown, the current detection resistor R2 is connected between the system state feedback terminal (i.e., CS node) of the control circuit U20 and the system reference ground (triangle in the figure), the power supply capacitor C3 is connected between the power supply terminal (i.e., VDD node) of the control circuit U20 and the system reference ground, and the circuit reference ground (i.e., GND node) of the control circuit U20 is connected to the system reference ground. Figure 7 As shown, the current detection resistor R2 is connected between the circuit reference ground (i.e., GND node) of the control circuit U20 and the system reference ground, the power supply capacitor C3 is connected between the power supply terminal (i.e., VDD node) of the control circuit and the circuit reference ground of the control circuit U20, and the system state feedback terminal (i.e., CS node) of the control circuit is connected to the system reference ground. The system reference ground here refers to the reference ground terminal of the GaN drive power switch power supply system.

[0070] Figure 8 According to some embodiments, Figure 7 The waveform diagram of the related control signal when the GaN driven power switch power supply system is in a non-light load state is shown in FIG. Figure 8 As shown, at the rising edge of the initial control signal PWM, the power supply transistor M202 is controlled to maintain a charging time in a linear working area that is negatively correlated with the power supply voltage. Figure 8 The voltage at the CS node is exactly opposite to the current ILP.

[0071] It should be noted that although Figure 2 The GaN driven power switch power supply system shown in the figure adopts a flyback architecture, but is combined with Figure 2 The control circuit U20 described in the GaN drive power switch power supply system shown can also be applied to Figures 9 to 12 The GaN driven power switch power supply system shown in FIG. That is, the control circuit U20 can also be applied to a boost (BOOST) architecture (see FIG. Figure 9 and Figure 10 ), Buck architecture (see Figure 11 and Figure 12 ), or buck-boost (BUCK-BOOST) GaN driven power switch power supply system. Figures 9-12 In FIG, the current ILP output by the GaN power switch M1 corresponds to the inductor current of the inductor L1.

[0072] The present invention may be implemented in other specific forms without departing from its spirit and essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the present invention. Therefore, the present embodiments are to be considered in all respects as illustrative and not restrictive, the scope of the invention is defined by the appended claims rather than the foregoing description, and all modifications coming within the meaning and scope of equivalents of the claims are intended to be included within the scope of the present invention.

Claims

1. A control circuit for use in a GaN-driven power switch power supply system, wherein: The GaN driven power switch power supply system includes a GaN power switch and a power supply capacitor for providing a power supply voltage for the control circuit. The control circuit includes a drive control module, a power drive switch, and a power supply transistor, and wherein: The power drive switch is connected between the GaN power switch and a circuit reference ground; The power supply transistor is connected between the GaN power switch and the power supply capacitor; and The drive control module is configured to control the power drive switch to be turned on or off and the state of the power supply transistor to charge the power supply capacitor through the power supply transistor according to the supply voltage, the load state of the GaN drive power switch power supply system and the initial control signal for controlling the GaN power switch to be turned on or off.

2. The control circuit according to claim 1, wherein: The initial state of the power supply transistor is a first on state, the initial state of the power drive switch is an off state, and the drive control module is further configured as follows: When the control circuit is in a power-on state and the supply voltage is greater than a minimum supply voltage threshold, controlling the power supply transistor to be in a cut-off state and determining that the control circuit enters a working state; When the control circuit is in an operating state, the power drive switch is controlled to be turned on or off and the power supply transistor is controlled to be in a first on state, a second on state or an off state according to a load state of the GaN-driven power switch power supply system and the initial control signal.

3. The control circuit according to claim 2, wherein: The drive control module is further configured to: When the control circuit is in an operating state and the load state of the GaN-driven power switch power supply system is a light-load state, when the initial control signal is at a low level, the power supply transistor is controlled to be in a first on-state and the power drive switch is controlled to be in an off-state; when the initial control signal is at a high level, the power supply transistor is controlled to be in an off-state and the power drive switch is controlled to be in an on-state; as well as When the control circuit is in an operating state and the load state of the GaN-driven power switch power supply system is a non-light-load state, the power supply transistor is controlled to be in a second on-state or off-state based on the supply voltage and the transition edge of the initial control signal. When the initial control signal is at a high level and the power supply transistor is in the off-state, the power drive switch is controlled to be on; otherwise, the power drive switch is controlled to be off.

4. The control circuit according to claim 3, wherein: When the load state of the GaN driven power switch power supply system is non-light load, controlling the power supply transistor includes: When the initial control signal jumps and the power supply voltage is less than a preset charging threshold, the power supply transistor is controlled to be in a second on-state, and after maintaining a preset charging time, the power supply transistor is controlled to be in a cut-off state.

5. The control circuit according to claim 3, wherein: When the load state of the GaN driven power switch power supply system is non-light load, controlling the power supply transistor includes: When the initial control signal jumps, the power supply transistor is controlled to be in the second conduction state, and after maintaining a charging time that is negatively correlated with the power supply voltage, the power supply transistor is controlled to be in the cut-off state.

6. The control circuit according to claim 5, wherein: The drive control module includes a time control unit, which includes a transconductance amplifier, a capacitor, a switch and a comparator. The first input end of the transconductance amplifier is connected to the divided voltage of the power supply voltage, the second input end of the transconductance amplifier is connected to the first reference voltage, the output end of the transconductance amplifier, the first end of the capacitor, and the first end of the switch are connected to the first input end of the comparator, the second end of the capacitor and the second end of the switch are connected to the circuit reference ground, the on and off of the switch is controlled by the initial control signal, the second input end of the comparator is connected to the second reference voltage, and the comparator outputs a control signal indicating the charging time.

7. The control circuit according to claim 3, wherein controlling the power supply transistor to be in the second on-state or off-state based on the power supply voltage and the transition edge of the initial control signal comprises: controlling the power supply transistor to be in a second on-state or off-state based on the power supply voltage and the rising edge of the initial control signal, Alternatively, the power supply transistor is controlled to be in a second on-state or off-state based on the power supply voltage and a falling edge of the initial control signal.

8. The control circuit according to claim 3, wherein: The drive control module is further configured to: The load state of the GaN-driven power switch power supply system is determined to be a light-load state or a non-light-load state according to the current output by the GaN power switch.

9. The control circuit according to claim 2, wherein: The drive control module includes a state control unit, which includes: a bias current source that outputs a bias current, and a preset transistor that forms a current mirror structure with the power supply transistor, wherein the preset transistor is used to mirror the bias current to control the power supply transistor to be in a state corresponding to the bias current.

10. The control circuit according to any one of claims 2 to 9, wherein: The power supply transistor is a MOS transistor or a BJT transistor, the first conduction state of the MOS transistor is a saturation state, the second conduction state of the MOS transistor is a linear working area, the first conduction state of the BJT transistor is an amplification state, and the second conduction state of the BJT transistor is a saturation conduction state.

11. A GaN driven power switch power supply system, comprising a GaN power switch, a power supply capacitor for providing a power supply voltage to the control circuit, and the control circuit according to any one of claims 1 to 10.

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