Data processing method, electronic equipment and computer readable storage medium

Abstract

The invention discloses a data processing method, electronic equipment and a computer readable storage medium. The method comprises the steps of obtaining a storage page corresponding to data to be processed; wherein different positions of the storage page have corresponding original bit error rates; dividing the storage page according to preset granularity to obtain a plurality of storage areas; according to a preset mapping mode, mapping the target data corresponding to the plurality of storage areas into the corresponding code words; wherein each code word comprises at least two storage areas, and indexes of the at least two storage areas are discontinuous; and carrying out decoding processing according to the code word to obtain to-be-processed data. By means of the mode, the problems that due to the fact that the areas with the high original bit error rate are concentrated in the same code word, the probability of ECC error correction failure of the code word is high, and data reliability is caused are solved.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a data processing method, an electronic device, and a computer-readable storage medium. Background Art

[0002] Storage devices are used to store corresponding data. Data reliability within storage devices is unevenly distributed. For example, within the same storage page, bits in different regions have their own RBER (Raw Bit Error Rate). In related technologies, data within a storage page is divided based on codeword length. For example, a 16KB storage page is divided into four 4KB codewords, each with a length of 4KB.

[0003] The inventors of this application have discovered that, with this arrangement, when the RBER distribution of the bit data within a storage page is uneven, for example, when the RBER is high in a certain area of the storage page, the distribution variance of the highest error bit counts of different codewords within the same storage page increases. In other words, the RBER of the worst codeword will be higher than the RBERs of other codewords. This increases the probability of ECC error correction failure for this worst codeword, leading to data reliability issues or excessive decoding times. Summary of the Invention

[0004] The data processing method, electronic device, and computer-readable storage medium provided in this application solve the problem of high original bit error rate areas being concentrated in the same codeword, resulting in a high probability of ECC error correction failure of the codeword and causing data reliability issues.

[0005] In a first aspect, the present application provides a data processing method, which includes: obtaining a storage page corresponding to the data to be processed; wherein different positions of the storage page have corresponding original bit error rates; dividing the storage page according to a preset granularity to obtain several storage areas; according to a preset mapping method, mapping the target data corresponding to the several storage areas to corresponding codewords; wherein each codeword includes at least two storage areas, and the indexes of at least two storage areas are discontinuous; performing decoding processing according to the codeword to obtain the data to be processed.

[0006] The target data corresponding to the plurality of storage areas are mapped to corresponding code words according to a preset mapping method, including: mapping the target data corresponding to the plurality of storage areas to different code words in sequence according to the index order of the plurality of storage areas.

[0007] Among them, according to a preset mapping method, the target data corresponding to several storage areas are mapped to the corresponding codewords, including: determining a target storage area, a padding storage area and a normal storage area among the several storage areas; wherein the original bit error rate corresponding to the target storage area is greater than the original bit error rate corresponding to the padding storage area and the normal storage area; dividing the target storage area into several sub-target storage areas, and dividing the padding storage area into several sub-padding storage areas; according to the index order of the normal storage area, mapping the target data corresponding to the normal storage area to the corresponding target codeword in turn, and retaining the preset area in the target codeword; according to the index order of the several sub-target storage areas, mapping the target data corresponding to the several sub-target storage areas to the preset areas of different target codewords in turn; using the target data corresponding to the several sub-padding storage areas to be mapped to different target codewords to fill the target codeword.

[0008] The original bit error rate corresponding to the padded storage area is smaller than the original bit error rate corresponding to the normal storage area.

[0009] The number of the filling storage areas is equal to the number of the target storage areas.

[0010] In response to the target storage area being greater than or equal to 2, dividing the target storage area into a plurality of sub-target storage areas includes: dividing the target storage area into a plurality of sub-target storage areas according to a corresponding division ratio of each target storage area.

[0011] The division ratio of the target storage area corresponds to the number of code words.

[0012] Determining the target storage area, the filling storage area, and the normal storage area among the plurality of storage areas includes: obtaining a preset number; and obtaining a preset number of target storage areas and a preset number of filling storage areas from the plurality of storage areas.

[0013] In a second aspect, the present application provides an electronic device comprising a processor and a memory coupled to the processor; wherein the memory is used to store a computer program, and the processor is used to execute the computer program to implement the method provided in the first aspect.

[0014] In a third aspect, the present application provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the method provided in the first aspect.

[0015] The beneficial effects of the present application are: different from the existing technology, the data processing method, electronic device and computer-readable storage medium provided by the present application divide the storage page according to a preset granularity to obtain several storage areas, and map the target data corresponding to the several storage areas to the corresponding codewords according to a preset mapping method, and ensure that the indexes of at least two storage areas in the codeword are discontinuous, that is, the high RBER areas in the storage page are scattered and mapped to different codewords, avoiding the high RBER areas from being concentrated in the same codeword, thereby reducing the probability of ECC error correction failure of the codeword, improving data reliability, or reducing the decoding time of the codeword. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without inventive efforts. Among them:

[0017] Figure 1 This is a flow chart of an embodiment of a data processing method provided by the present application;

[0018] Figure 2 This is a schematic diagram of an application scenario of the data processing method provided by this application;

[0019] Figure 3 This is a flow chart of another embodiment of the data processing method provided by the present application;

[0020] Figure 4 This is a flow chart of another embodiment of the data processing method provided by the present application;

[0021] Figure 5 This is a schematic diagram of another application scenario of the data processing method provided by this application;

[0022] Figure 6 This is a schematic diagram of another application scenario of the data processing method provided by this application;

[0023] Figure 7 This is a structural diagram of an embodiment of an electronic device provided by the present application;

[0024] Figure 8 It is a structural diagram of an embodiment of a computer-readable storage medium provided by this application. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It will be understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some, rather than all, structures related to the present application are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0026] References to "embodiments" herein mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0027] Storage devices are used to store corresponding data. Data reliability within storage devices is unevenly distributed. For example, within the same storage page, bits in different regions have their own RBER (Raw Bit Error Rate). In related technologies, data within a storage page is divided based on codeword length. For example, a 16KB storage page is divided into four 4KB codewords, each with a length of 4KB.

[0028] The inventors of this application have discovered that, with this arrangement, when the RBER distribution of the bit data within a storage page is uneven, for example, when the RBER is high in a certain area of the storage page, the distribution variance of the highest error bit counts of different codewords within the same storage page increases. In other words, the RBER of the worst codeword will be higher than the RBERs of other codewords. This increases the probability of ECC error correction failure for this worst codeword, leading to data reliability issues or excessive decoding times.

[0029] Based on this, the present application proposes dividing a storage page according to a preset granularity to obtain several storage areas, and mapping the target data corresponding to the several storage areas to corresponding codewords according to a preset mapping method, and ensuring that the indexes of at least two storage areas in the codeword are discontinuous. That is, the high RBER areas in the storage page are scattered and mapped to different codewords to avoid the high RBER areas from being concentrated in the same codeword, thereby reducing the probability of ECC error correction failure of the codeword, improving data reliability, or reducing the decoding time of the codeword. For details, please refer to any of the following embodiments.

[0030] See Figure 1 , Figure 1 : This is a flow chart of an embodiment of a data processing method provided by this application. The method includes:

[0031] Step 11: Obtain a storage page corresponding to the data to be processed; wherein different positions of the storage page have corresponding original bit error rates.

[0032] In some embodiments, in response to a data read instruction, a storage page of the corresponding data is determined according to the data read instruction.

[0033] In some embodiments, for data in a storage page, bit data with a high original bit error rate tends to cluster. It can be understood that data in a storage page is stored in bits.

[0034] Step 12: Divide the storage pages according to a preset granularity to obtain several storage areas.

[0035] In some embodiments, the preset granularity can be set according to actual conditions. For example, if the conventional granularity is 1 KB, the preset granularity can be 64B, 128B, 256B, or 512B. That is, the preset granularity is smaller than the conventional granularity.

[0036] In some embodiments, two granularities can be set. First, the storage pages are divided according to the conventional granularity to obtain several storage areas. Then, a storage area that meets the requirements is found from these storage areas. These storage areas that meet the requirements are further divided to form sub-storage areas. The storage areas that meet the requirements are storage areas with a higher original bit error rate. For example, the granularity is divided according to 1KB. After the storage area that meets the requirements is determined, the 1KB storage area that meets the requirements is further divided according to the preset granularity of 64B, 128B, 256B or 512B to form several sub-storage areas.

[0037] Step 13: Map the target data corresponding to the plurality of storage areas to corresponding code words according to a preset mapping method.

[0038] Each codeword includes at least two storage areas, and indexes of the at least two storage areas are discontinuous.

[0039] In some embodiments, if the preset granularity is smaller than the conventional granularity, the number of storage areas divided according to the preset granularity is greater than the number of storage areas divided according to the conventional granularity. During the mapping process, if the indexes of at least two storage areas in each codeword are discontinuous, the storage areas with higher original bit error rates are dispersed into different codewords after division. For example, if the storage area with higher original bit error rates includes continuous 1KB of data, through division with a granularity of less than 1KB, the storage area with higher original bit error rates is divided into at least two parts and dispersed into two codewords. This reduces the highest original bit error rate of these codewords.

[0040] Step 14: Decode the codeword to obtain the data to be processed.

[0041] In this embodiment, the storage page is divided according to a preset granularity to obtain several storage areas, and the target data corresponding to the several storage areas are mapped to the corresponding codewords according to a preset mapping method, and it is ensured that the indexes of at least two storage areas in the codeword are discontinuous, that is, the high RBER areas in the storage page are scattered and mapped to different codewords to avoid the high RBER areas from being concentrated in the same codeword, thereby reducing the probability of ECC error correction failure of the codeword, improving data reliability, or reducing the decoding time of the codeword.

[0042] See Figure 2 , Figure 2 : This is a flow chart of another embodiment of the data processing method provided by this application. The method includes:

[0043] Step 21: Obtain a storage page corresponding to the data to be processed; wherein different positions of the storage page have corresponding original bit error rates.

[0044] Step 22: Divide the storage pages according to a preset granularity to obtain several storage areas.

[0045] In some embodiments, the preset granularity can be set according to actual conditions. For example, if the conventional granularity is 1 KB, the preset granularity can be 64B, 128B, 256B, or 512B. That is, the preset granularity is smaller than the conventional granularity.

[0046] In this embodiment, the storage pages may be evenly divided according to a preset granularity to obtain a plurality of storage areas.

[0047] Step 23: Map the target data corresponding to the plurality of storage areas to different code words in sequence according to the index order of the plurality of storage areas.

[0048] Each codeword includes at least two storage areas, and indexes of the at least two storage areas are discontinuous.

[0049] In some embodiments, combined Figure 3 To explain:

[0050] The entire storage page is divided according to a preset granularity, for example, divided into 256B units, to form several storage areas, and then each storage area is mapped to a different ECC codeword in turn. Figure 3 As shown, a memory page is divided into 256B units to form memory regions 0 to n. Where n is greater than 15. Memory regions 0 to n are sequentially mapped to codewords 0 to 3. For example, memory region 0 is mapped to codeword 0, memory region 1 is mapped to codeword 1, memory region 2 is mapped to codeword 2, memory region 3 is mapped to codeword 3, and so on. Subsequent memory regions are sequentially mapped to different codewords.

[0051] That is, in Figure 3 In the example, the size of each storage area is L_unit, and the entire storage page (page) is divided into page_len / L_unit storage areas. Each storage area is mapped to a different codeword in turn. The above figure uses the method of mapping the codeword index to unit_index%K, where K represents the number of codewords. That is, the index of the storage area is used to perform a modulo operation on the number of codewords, and the resulting value represents the codeword index. That is, the relationship between the index of the storage area and the codeword index is determined, and then the data corresponding to the index of the storage area is mapped to the codeword corresponding to the codeword index.

[0052] Step 24: Decode the codeword to obtain data to be processed.

[0053] That is, in this embodiment, a storage page is evenly divided into several storage areas, and the areas are mapped to different codewords in a dispersed manner, so as to avoid high RBER areas being concentrated in the same codeword.

[0054] In this embodiment, the storage page is divided according to a preset granularity to obtain several storage areas, and the target data corresponding to the several storage areas are mapped to the corresponding codewords according to a preset mapping method, and it is ensured that the indexes of at least two storage areas in the codeword are discontinuous, that is, the high RBER areas in the storage page are scattered and mapped to different codewords to avoid the high RBER areas from being concentrated in the same codeword, thereby reducing the probability of ECC error correction failure of the codeword, improving data reliability, or reducing the decoding time of the codeword.

[0055] See Figure 4 , Figure 4 : This is a flow chart of another embodiment of the data processing method provided by this application. The method includes:

[0056] Step 41: Obtain the storage page corresponding to the data to be processed.

[0057] Different locations of the storage page have corresponding original bit error rates.

[0058] Step 42: Divide the storage pages according to a preset granularity to obtain a number of storage areas.

[0059] In this embodiment, the preset granularity can be determined using a conventional partitioning method. For example, a 16KB memory page can be partitioned into 1KB units to obtain 16 memory regions. For example, a 32KB memory page can be partitioned into 1KB units to obtain 32 memory regions. The preset granularity is determined specifically based on the size of the memory page.

[0060] Step 43: Determine a target storage area, a padding storage area, and a normal storage area among the plurality of storage areas.

[0061] The original bit error rate corresponding to the target storage area is greater than the original bit error rates corresponding to the filling storage area and the normal storage area.

[0062] Because different areas have their own raw bit error rates, the raw bit error rate of each storage area can be calculated. For example, the storage area with a raw bit error rate greater than a preset value is selected as the target storage area. Then, from the remaining storage area, a number of padding storage areas corresponding to the target storage area is determined. The remaining storage area is the normal storage area.

[0063] In some embodiments, the target storage area, padding storage area, and normal storage area among the plurality of storage areas can be determined by: obtaining a preset number; obtaining the preset number of target storage areas and the preset number of padding storage areas from the plurality of storage areas. The preset number can be determined in advance based on test data or statistical data. The preset number ensures that storage areas that meet the original bit error rate requirements are selected as target storage areas.

[0064] Step 44: Divide the target storage area into several sub-target storage areas, and divide the filling storage area into several sub-filling storage areas.

[0065] Due to the original bit error rate of the target storage area, it is divided again to obtain a plurality of sub-target storage areas. Synchronously, the filling storage area also needs to be divided. In some embodiments, the division ratio of the target storage area can be the same as the division ratio of the filling storage area, or it can be different. If the target storage area is divided into four sub-target storage areas, the filling storage area is also divided into four sub-filling storage areas.

[0066] In some embodiments, the target storage area is divided into four sub-target storage areas in a ratio corresponding to the number of codewords. For example, if the number of codewords is 4, each target storage area is divided into four sub-target storage areas. The data in each sub-target storage area is mapped to one codeword.

[0067] In some embodiments, the target storage area is divided into a ratio greater than the number of codewords. For example, if the number of codewords is 4, each target storage area can be divided into 5 sub-target storage areas. While ensuring that each codeword is mapped with data from a sub-target storage area, one codeword is mapped with data from an additional sub-target storage area.

[0068] For example, if the number of code words is 4, each target storage area can be divided into 8 sub-target storage areas, and the data of every two sub-target storage areas are mapped to one code word.

[0069] For example, if the number of code words is 4, each target storage area can be divided into 12 sub-target storage areas, and the data of every three sub-target storage areas are mapped to one code word.

[0070] Specifically, data mapping may be performed according to the index order of the sub-target storage areas.

[0071] Step 45: Map the target data corresponding to the normal storage area to the corresponding target codeword in sequence according to the index order of the normal storage area, and reserve a preset area in the target codeword.

[0072] The codeword also has a corresponding code length. The data of the normal storage area is first mapped to the codeword, but a preset area (preset code length) needs to be reserved in the codeword for data mapping of the sub-target storage area and the sub-filling storage area.

[0073] In other embodiments, the normal storage areas may be mapped to the corresponding target codewords in sequence according to the index order, or may not be mapped to the corresponding target codewords in sequence according to the index order.

[0074] Step 46: Map the target data corresponding to the sub-target storage areas to the preset areas of different target code words in sequence according to the index order of the sub-target storage areas.

[0075] Step 47: Map the target data corresponding to the plurality of sub-filling storage areas to different target code words to fill the target code words.

[0076] In some embodiments, the original bit error rate corresponding to the padding storage area is lower than the original bit error rate corresponding to the normal storage area. Based on this, the original bit error rate corresponding to the codeword will be further reduced, thereby further reducing the probability of ECC error correction failure of the formed codeword. That is, a preset number of storage areas with high original bit error rates among the multiple storage areas are used as target storage areas, and a preset number of storage areas with low original bit error rates are used as padding storage areas. For example, after dividing the multiple storage areas, they are sorted from high to low according to the original bit error rate, and the storage areas at the front that meet the preset requirements are used as target storage areas, the storage areas at the back and last are used as padding storage areas, and the storage areas in the middle are used as normal storage areas. For example, if there are 16 storage areas sorted from high to low according to the original bit error rate, the first two storage areas are used as target storage areas, the last two storage areas are used as padding storage areas, and the 12 storage areas in the middle are used as normal storage areas.

[0077] In some embodiments, the number of padding storage areas is equal to the number of target storage areas. Because the target storage area is divided and distributed among different codewords, there are still some free areas in the codewords that need to be padded. Therefore, it is necessary to ensure that the number of padding storage areas is equal to the number of target storage areas so that the free areas of all codewords can be filled.

[0078] In some embodiments, in response to the target storage area being greater than or equal to 2, the target storage area may be divided into a plurality of sub-target storage areas according to a corresponding division ratio of each target storage area.

[0079] Step 48: Decode the codeword to obtain data to be processed.

[0080] In some embodiments, combined Figure 5 To explain:

[0081] like Figure 5 As shown, a memory page of 16kb and a codeword length of 4kb are used as an example. The parameters involved are as follows:

[0082] page_region[16 / lenth][lenth]. The data stored in the page is divided into intervals using the set granularity, for example Figure 5 In the example, the granularity is 1kb, i.e., lenth = 1kb, where lenth is the length of the storage region. page_region represents an array of specifically divided storage regions.

[0083] high_rber_index[n] indicates the area with a higher RBER than other storage areas after the interval is divided in the page. For example, Figure 5 In the example, n=2 and high_rber_index[2]={7,8}, which means that the RBER of the storage areas with indices 7 and 8 is higher than that of other storage areas.

[0084] P represents the partition ratio for further evenly partitioning the storage area with higher REBR, for example, Figure 5 In the example, P=4, that is, the storage areas with indexes 7 and 8 are evenly divided into P=4.

[0085] padding_region_index[m] indicates the storage area filled with high RBER data. Figure 5 In the example, padding_region_index[2]={0, 15}, indicating that the storage regions with indices 0 and 15 are padding storage regions.

[0086] normal_region_index[(16 / lenth)-nm] is not used for filling and is not a high RBER storage area, that is, the normal storage area mentioned above.

[0087] Take ECC_chunck[4][4], 4kb codeword as an example, Figure 5 The mapping of each codeword in is as follows:

[0088] Codeword 0: ECC_chunck[0][0:2]=normal_region_index[0:2], ECC_chunck[0][3]=page_region[high_rber_index[0]][[0:lenth / P)]+page_region[high_rber_index[1][[0:lenth / P)]+page_region[pad_region_index[0]][[0:lenth / P)]+page_region[padding_region_index[1][[0:lenth / P)]. That is, index 0 in codeword 0 maps to storage area 1, index 1 maps to storage area 2, index 2 maps to storage area 3, and index 3 maps to a sub-storage area in storage area 7, a sub-storage area in storage area 8, a sub-storage area in storage area 0, and a sub-storage area 1 in storage area 15.

[0089] Codeword 1: ECC_chunck[1][0:2]=normal_region_index[3:5], ECC_chunck[1][3]=page_region[high_rber_index[0]][[lenth / P:2*lenth / P)]+page_region[high_rber_index[1][[lenth / P:2*lenth / P)]+page_region[padding_region_index[0]][[lenth / P:2*lenth / P)]+page_region[padding_region_index[1][[lenth / P:2*lenth / P)]. That is, index 0 in codeword 1 maps to storage area 4, index 1 maps to storage area 5, index 2 maps to storage area 6, and index 3 maps to a sub-storage area in storage area 7, a sub-storage area in storage area 8, a sub-storage area in storage area 0, and a sub-storage area 1 in storage area 15.

[0090] Codeword 2: ECC_chunck[2][0:2]=normal_region_index[6:8], ECC_chunck[2][3]=page_region[high_rber_index[0]][[2*lenth / P:3*lenth / P)]+page_region[high_rber_index[1][[2*lenth / P:3*lenth / P)]+page_region[padding_region_index[0]][[2*lenth / P:3*lenth / P)]+page_region[padding_region_index[1][[2*lenth / P:3*lenth / P)]. That is, index 0 in codeword 2 maps to storage area 9, index 1 maps to storage area 10, index 2 maps to storage area 11, and index 3 maps to a sub-storage area in storage area 7, a sub-storage area in storage area 8, a sub-storage area in storage area 0, and a sub-storage area 1 in storage area 15.

[0091] Codeword 3: ECC_chunck[3][0:2]=normal_region_index[9:11], ECC_chunck[3][3]=page_region[high_rber_index[0]][[3*lenth / P:lenth)]+page_region[high_rber_index[1][[3*lenth / P:lenth)]+page_region[padding_region_index[0]][[3*lenth / P:lenth)]+page_region[padding_region_index[1][[3*lenth / P:lenth)]. That is, index 0 in codeword 3 maps to storage area 12, index 1 maps to storage area 13, index 2 maps to storage area 14, and index 3 maps to a sub-storage area in storage area 7, a sub-storage area in storage area 8, a sub-storage area in storage area 0, and a sub-storage area 1 in storage area 15.

[0092] In some embodiments, combined Figure 6 Public explanation:

[0093] The storage area with high RBER can be divided more flexibly according to the actual situation, such as Figure 6 As shown, storage area 7 / storage area 8 can be divided in different ways. The mapping of the high RBER storage area after division can be index%4, which is mapped to the last 1kb position of each codeword. The unfilled codewords are filled with the pre-set filling storage area.

[0094] In this embodiment, a storage page is divided according to a preset granularity to obtain several storage areas, and a high RBER target storage area is determined from the several storage areas, which is further divided to form sub-target storage areas. Then, the target data corresponding to these several storage areas and sub-target storage areas are mapped to corresponding codewords, that is, the high RBER areas in the storage page are scattered and mapped to different codewords to avoid the high RBER areas from being concentrated in the same codeword, thereby reducing the probability of ECC error correction failure of the codeword, improving data reliability, or reducing the decoding time of the codeword.

[0095] See Figure 7 , Figure 7 This is a second aspect of a structural diagram of an embodiment of an electronic device provided by the present application. The electronic device 70 includes a processor 71 and a memory 72 coupled to the processor 71; wherein the memory 72 is used to store a computer program, and the processor 71 is used to execute the computer program to implement the following method:

[0096] Obtain a storage page corresponding to the data to be processed; wherein different positions of the storage page have corresponding original bit error rates; divide the storage page according to a preset granularity to obtain a plurality of storage areas; map the target data corresponding to the plurality of storage areas to corresponding codewords according to a preset mapping method; wherein each codeword includes at least two storage areas, and the indexes of at least two storage areas are discontinuous; perform decoding processing according to the codeword to obtain the data to be processed.

[0097] It can be understood that the processor 71 is also used to execute computer programs to implement the method of any of the above embodiments.

[0098] In some embodiments, the electronic device 70 may be a storage device, the processor 71 may be a main control chip in the storage device, and the memory 72 may include at least two types of areas, one for storing computer programs and the other for storing normal read and write data. For example, the storage device may be a NAND Flash storage device.

[0099] In some embodiments, the processor 71 in the electronic device 70 may be a CPU, etc., and the memory may be a storage device. The storage device includes a main control chip and storage particles. Some storage particles are used to store computer programs, while other storage particles are used to store normal read and write data.

[0100] See Figure 8 , Figure 8 1 is a schematic diagram of the structure of an embodiment of a computer-readable storage medium provided by the present application. The computer-readable storage medium 80 stores a computer program 81. When the computer program 81 is executed by a processor, the following method is implemented:

[0101] Obtain a storage page corresponding to the data to be processed; wherein different positions of the storage page have corresponding original bit error rates; divide the storage page according to a preset granularity to obtain a plurality of storage areas; map the target data corresponding to the plurality of storage areas to corresponding codewords according to a preset mapping method; wherein each codeword includes at least two storage areas, and the indexes of at least two storage areas are discontinuous; perform decoding processing according to the codeword to obtain the data to be processed.

[0102] It can be understood that when the computer program 81 is executed by a processor, it can also implement the method of any of the above embodiments.

[0103] In summary, the data processing method, electronic device, and computer-readable storage medium provided by the present application divide the storage pages according to a preset granularity to obtain several storage areas, and map the target data corresponding to the several storage areas to the corresponding codewords according to a preset mapping method, and ensure that the indexes of at least two storage areas in the codeword are discontinuous, that is, the high RBER areas in the storage page are scattered and mapped to different codewords to avoid the high RBER areas from being concentrated in the same codeword, thereby reducing the probability of ECC error correction failure of the codeword, improving data reliability, or reducing the decoding time of the codeword.

[0104] In the several embodiments provided in this application, it should be understood that the disclosed methods and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is merely a logical functional division. In actual implementation, other division methods may be used, such as combining or integrating multiple units or components into another system, or ignoring or not implementing certain features.

[0105] If the integrated units in the above other embodiments are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0106] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A data processing method, characterized in that: The method comprises: Obtaining a storage page corresponding to the data to be processed; wherein different positions of the storage page have corresponding original bit error rates; Dividing the storage page according to a preset granularity to obtain a plurality of storage areas; Mapping target data corresponding to a plurality of storage areas to corresponding codewords according to a preset mapping method; wherein each codeword includes at least two storage areas, and the indexes of the at least two storage areas are discontinuous; Decoding is performed according to the codeword to obtain the data to be processed.

2. The method according to claim 1, characterized in that Mapping target data corresponding to a plurality of storage areas to corresponding code words according to a preset mapping method includes: According to the index order of the plurality of storage areas, target data corresponding to the plurality of storage areas are mapped to different code words in sequence.

3. The method according to claim 1, characterized in that Mapping target data corresponding to a plurality of storage areas to corresponding code words according to a preset mapping method includes: Determining a target storage area, a padding storage area, and a normal storage area among the plurality of storage areas; wherein an original bit error rate corresponding to the target storage area is greater than an original bit error rate corresponding to the padding storage area and the normal storage area; Dividing the target storage area into a plurality of sub-target storage areas, and dividing the filling storage area into a plurality of sub-filling storage areas; Mapping the target data corresponding to the normal storage area to the corresponding target codeword in sequence according to the index order of the normal storage area, and reserving a preset area in the target codeword; Mapping the target data corresponding to the plurality of sub-target storage areas to the preset areas of different target codewords in sequence according to the index order of the plurality of sub-target storage areas; The target data corresponding to the plurality of sub-filling storage areas are mapped to different target code words to fill the target code words.

4. The method according to claim 3, characterized in that An original bit error rate corresponding to the filling storage area is smaller than an original bit error rate corresponding to the normal storage area.

5. The method according to claim 3, characterized in that The number of the filling storage areas is equal to the number of the target storage areas.

6. The method according to claim 3, characterized in that In response to the target storage area being greater than or equal to 2, dividing the target storage area into a plurality of sub-target storage areas comprises: According to the division ratio corresponding to each target storage area, the target storage area is divided into a plurality of sub-target storage areas.

7. The method according to claim 3, characterized in that The division ratio of the target storage area corresponds to the number of the code words.

8. The method according to claim 3, characterized in that The determining of the target storage area, the filling storage area, and the normal storage area among the plurality of storage areas comprises: Get the preset quantity; The preset number of target storage areas and the preset number of filling storage areas are acquired from the plurality of storage areas.

9. An electronic device, characterized in that: The electronic device includes a processor and a memory coupled to the processor; The memory is used to store a computer program, and the processor is used to execute the computer program to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements the method according to any one of claims 1 to 8.

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