Cascade-type energy storage converter for suppressing second harmonic current and control method

Abstract

The application relates to the field of power electronics, and particularly discloses a cascade energy storage converter for inhibiting secondary harmonic current and a control method; the cascade energy storage converter adds a decoupling inductor and a decoupling capacitor on the AC side of a sub-module, provides a low-impedance bypass for the secondary harmonic current, and thus replaces a traditional grid-side inductor; the control method comprises the following steps: generating a differential mode modulation signal of an H-bridge sub-module through proportional integral control according to a grid voltage, an output current and active and reactive power references; detecting and extracting a secondary harmonic current component according to battery cluster currents on the DC side of each sub-module, accurately inhibiting the secondary harmonic current component through closed-loop control, and generating a common mode modulation signal of the sub-module according to the secondary harmonic current component; and driving power switching devices to work through superposition of the differential mode and common mode modulation signals; the application can effectively reduce the demand of the cascade energy storage system on capacitors, realize effective inhibition of the secondary harmonic current, and improve the economy and reliability of the cascade energy storage system.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a cascaded energy storage converter and control method for suppressing second harmonic current. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] Energy storage systems based on cascaded H-bridge converters can directly output high voltages above 6kV by connecting multiple H-bridge converters in series. These systems can be directly connected to medium-voltage distribution networks without the need for step-up transformers, thus offering advantages such as high efficiency and large capacity. However, when the H-bridge outputs AC power, its instantaneous power includes a component at twice the power frequency. This component is transmitted to the DC side, generating a large-amplitude second-harmonic current. Excessive second-harmonic current can adversely affect battery life and the stable operation of the system.

[0004] Many methods for suppressing DC-side second harmonics have been disclosed in the prior art, but they all struggle to balance system cost and suppression effectiveness. For example:

[0005] (1) The second harmonic current on the battery side is suppressed by connecting an LC filter in series on the DC side of the H-bridge; however, since the frequency of the second harmonic current is low, the inductor and capacitor required in the LC filter are large, which leads to an increase in system size and cost.

[0006] (2) By injecting a third harmonic into the modulation signal, the second harmonic component is converted into a higher harmonic component, thereby reducing the amplitude of the second harmonic current. However, the suppression effect of this method still has certain limitations: on the one hand, injecting a third harmonic may lead to the introduction of a fourth harmonic current on the DC side; on the other hand, the modulation signal is prone to overshoot, affecting the suppression effect. Therefore, the existing control strategy based on third harmonic injection is still limited in its effectiveness in suppressing second harmonic current and is difficult to meet the requirements of high-performance power electronic conversion systems.

[0007] (3) By connecting an active power filter in parallel on the DC side of the H-bridge, the amplitude of the ripple current can be reduced; however, this scheme requires additional power devices, and the system cost and control complexity are also increased. Summary of the Invention

[0008] To address the aforementioned issues, this invention proposes a cascaded energy storage converter and control method for suppressing second harmonic current. The proposed method is based on a differential topology cascaded energy storage converter and achieves effective suppression of second harmonic current on the battery side of the energy storage system through active power decoupling control, thereby improving system stability and battery life.

[0009] In some implementations, the following technical solutions are adopted:

[0010] A cascaded energy storage converter for suppressing second harmonic current includes: a cascaded unit consisting of N sub-modules connected in series, with each phase of a three-phase power grid connected to one cascaded unit; each sub-module includes: a battery cluster, a DC-side LC filter, and an H-bridge inverter connected in sequence, wherein each arm of the H-bridge inverter is connected to the power grid after being connected in series with a decoupling inductor, and each decoupling inductor is connected to the negative terminal of the battery cluster after being connected in series with a decoupling capacitor.

[0011] In other embodiments, the following technical solutions are adopted:

[0012] A control method for a cascaded energy storage converter to suppress second harmonic current includes:

[0013] Establish a mathematical model of a cascaded energy storage converter and determine the parameters of the AC-side decoupling capacitor.

[0014] Extract the grid angular frequency signal, transform the grid-side voltage and current to the dq coordinate system, and obtain the ideal modulation voltage of the converter based on the transformed current and voltage; collect the state of charge (SOC) signals of each battery cluster, combine them with the transformed current, and generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization; combine them with the ideal modulation voltage of the converter to generate a differential mode modulation signal.

[0015] Based on the average DC current of each phase battery cluster, an adaptive adjustment coefficient is calculated; the average second harmonic current of each phase battery cluster is separated into positive and negative sequences to obtain the positive and negative sequence components of the second harmonic current, and then a corresponding common-mode modulation signal is generated through closed-loop PI control to suppress the second harmonic current; the adaptive adjustment coefficient and the common-mode modulation signal are multiplied to obtain a common-mode modulation signal suitable for each submodule.

[0016] The differential-mode modulation signal and the common-mode modulation signal are superimposed, and the PWM control signal of each sub-module switching device is generated by carrier phase-shift modulation.

[0017] As a further approach, based on the transformed current and voltage, the ideal modulation voltage of the converter is obtained, and the specific process is as follows:

[0018] The current after dq transformation is compared with the current reference value of the converter in the dq coordinate system, and the current command is tracked and controlled by PI control. Combining the voltage after dq transformation and the decoupled current after dq transformation, the ideal modulation voltage of the converter is obtained through dq / abc transformation. ,i=a,b,c .

[0019] As a further approach, a differential-mode modulation signal is generated by combining the ideal modulation voltage of the converter, specifically:

[0020] The SOC status signals of each battery cluster are collected and combined with the transformed current to generate a modulation signal for inter-phase SOC equalization. and modulation signal used for in-phase SOC equalization ;

[0021] Interphase SOC equalization modulation signal With the ideal modulation voltage of the converter After addition, the voltage obtained by scaling is combined with the modulation signal used for in-phase SOC equalization. Add them together to obtain the differential modulated signal. ; i=a,b, c , j= 1,2,…,N; N is the number of submodules.

[0022] As a further approach, an adaptive adjustment coefficient is calculated based on the average DC current of each phase battery cluster, specifically:

[0023] The battery cluster output current signal is passed through a low-pass filter and then averaged to extract the average DC current of each phase battery cluster.

[0024] The adaptive adjustment coefficient is calculated based on the average value of the DC current, specifically as follows:

[0025] ;

[0026] in, The output current of the battery cluster in the i-th phase and j-th submodule is... This represents the average output current of all battery clusters in phase i.

[0027] As a further approach, the average second harmonic current of each phase battery cluster is separated into positive and negative sequences to obtain the positive and negative sequence components of the second harmonic current. These components are then used to generate the corresponding common-mode modulation signal via closed-loop PI control. Specifically:

[0028] The battery cluster output current signal passes through a bandpass filter. H bp ( s After extracting the second harmonic component, the average value of the second harmonic current in each phase is obtained by averaging.

[0029] The mean value of the second harmonic current is separated into positive and negative sequences to obtain the positive and negative sequence components of the second harmonic current.

[0030] The positive and negative sequence components are subjected to coordinate transformations respectively, and then the coordinates are inversely transformed after passing through a PI controller. The values ​​obtained are added together to obtain a common-mode modulation signal, which is used to control the second harmonic current component to zero.

[0031] As a further solution, the differential-mode modulation signal and the common-mode modulation signal are superimposed, specifically as follows:

[0032] The differential-mode modulation signal and the common-mode modulation signal of the j-th submodule of each phase are added together to obtain the modulation signal required for the U-bridge arm of the corresponding submodule; the differential-mode modulation signal and the common-mode modulation signal of the j-th submodule of each phase are subtracted to obtain the modulation signal required for the V-bridge arm of the corresponding submodule.

[0033] The modulation signals required for the U-bridge arm and the modulation signals required for the V-bridge arm are generated by carrier phase-shift modulation to produce PWM control signals for the corresponding submodule switching devices.

[0034] In other embodiments, the following technical solutions are adopted:

[0035] A control system for a cascaded energy storage converter for suppressing second harmonic current includes:

[0036] The model building module is configured to build a mathematical model of a cascaded energy storage converter and determine the AC-side decoupling capacitor parameters.

[0037] The differential-mode modulation signal generation module is configured to extract the grid angular frequency signal, transform the grid-side voltage and current to the dq coordinate system, obtain the ideal modulation voltage of the converter based on the transformed current and voltage, acquire the SOC status signal of each battery cluster, combine it with the transformed current to generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization, and generate a differential-mode modulation signal by combining it with the ideal modulation voltage of the converter.

[0038] The common-mode modulation signal generation module is configured to calculate an adaptive adjustment coefficient based on the average DC current of each phase battery cluster; to separate the positive and negative sequence of the average second harmonic current of each phase battery cluster to obtain the positive and negative sequence components of the second harmonic current, and then generate a corresponding common-mode modulation signal through closed-loop PI control to suppress the second harmonic current; the adaptive adjustment coefficient and the common-mode modulation signal are multiplied to obtain a common-mode modulation signal suitable for each sub-module;

[0039] The control module is configured to superimpose the differential-mode modulation signal and the common-mode modulation signal, and generate PWM control signals for the switching devices of each submodule using a carrier phase-shift modulation method.

[0040] In other embodiments, the following technical solutions are adopted:

[0041] A terminal device includes a processor and a memory, the processor being used to implement instructions; the memory being used to store multiple instructions adapted to be loaded by the processor and executed by the processor to control a cascaded energy storage converter for suppressing second harmonic currents as described above.

[0042] In other embodiments, the following technical solutions are adopted:

[0043] A computer-readable storage medium storing a plurality of instructions adapted for loading and execution by a processor of a terminal device of the above-described control method for suppressing second harmonic currents in a cascaded energy storage converter.

[0044] Compared with the prior art, the beneficial effects of the present invention are:

[0045] (1) The cascaded energy storage converter topology of the present invention adds decoupling inductors and decoupling capacitors on the AC side. The AC-side decoupling inductor in each submodule serves as a filter for that module and can also be shared with other submodules, thus eliminating the need for traditional grid-side inductors. The decoupling capacitors create a conduction path for the second harmonic current, thereby reducing the second harmonic current flowing through the battery cluster. On the other hand, they form a high-pass filter, providing a path for the high-order harmonics of the submodule converter output voltage, thus improving the quality of the converter output voltage. Compared with traditional cascaded energy storage systems, the above topology can effectively reduce the demand for DC-side filter capacitors in the submodules, thereby reducing system costs.

[0046] In the cascaded energy storage converter topology of the present invention, a decoupling capacitor with a small rated voltage is added to the AC side of each of the two bridge arms of the submodule. On the grid side of the cascaded energy storage system, it can be equivalent to a capacitor with a large rated voltage and a small capacitance. This equivalent capacitor is beneficial to improving the quality of the output voltage waveform of the cascaded energy storage converter.

[0047] (2) The present invention achieves grid-connected power control by controlling the differential mode modulation signal output by the H-bridge, which can control the energy storage to exchange power with the grid; the differential mode modulation signal is used to decouple power control from second harmonic current suppression, ensuring that second harmonic current control does not affect power control.

[0048] This invention achieves second harmonic current suppression by controlling the common-mode modulation signal output by the H-bridge, using only one controller combined with an adaptive adjustment coefficient k. ij This enables simultaneous control of the second harmonic current of all battery clusters in the entire system, reducing the amount of computation.

[0049] This invention superimposes differential-mode modulation signals and common-mode modulation signals, eliminating the need for additional switching devices, and simultaneously achieving power control and second harmonic current suppression in the output of a single H-bridge submodule.

[0050] Other features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0051] Figure 1 This is a schematic diagram of a cascaded energy storage converter structure used to suppress second harmonic current in an embodiment of the present invention;

[0052] Figure 2 This is a graph showing the relationship between the minimum value of the AC side decoupling capacitor and the capacitor voltage utilization rate, maximum voltage, and maximum current in an embodiment of the present invention.

[0053] Figure 3 This is a power control block diagram of the cascaded energy storage converter in an embodiment of the present invention;

[0054] Figure 4 This is a block diagram of the second harmonic current suppression control of the cascaded energy storage converter in an embodiment of the present invention;

[0055] Figure 5 This is a schematic diagram illustrating the synthesis of differential-mode modulated signals and common-mode modulated signals in an embodiment of the present invention;

[0056] Figure 6 This is a diagram illustrating the suppression effect of DC-side second harmonic current in an embodiment of the present invention. Detailed Implementation

[0057] It should be noted that the following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0058] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0059] Example 1

[0060] In one or more embodiments, a cascaded energy storage converter for suppressing second harmonic currents is disclosed, combined with... Figure 1Specifically, it includes: a cascaded unit consisting of N sub-modules connected in series, with each phase of the three-phase power grid connected to one cascaded unit; each sub-module includes: a battery cluster, a DC-side LC filter, and an H-bridge converter connected in sequence. Each H-bridge converter contains two bridge arms, U and V, with decoupling inductors connected to their AC sides respectively. L u and L u The circuit is then connected to the power grid, and the decoupling inductor is connected in series with the decoupling capacitor C. u and C u Then connect to the negative terminal of the battery cluster. Normally, C... u and C u The difference is negligible, so it is uniformly represented by capacitor C.

[0061] This embodiment optimizes the AC side circuit structure so that the AC side decoupling inductor in each phase submodule can both serve as a filter for that module and be shared with other submodules, thus eliminating the need for traditional grid-side inductors. L ac Therefore, the AC-side filter inductor of each submodule can be equivalent to:

[0062] (1)

[0063] In this embodiment, the cascaded energy storage converter adds a decoupling capacitor with a small rated voltage to the AC side of both arms of the submodule. On the grid side of the cascaded energy storage system, this capacitor can be equivalent to a capacitor with a large rated voltage and a small capacitance. This equivalent capacitor creates a conduction path for the second harmonic current, thereby reducing the second harmonic current flowing through the battery cluster. On the other hand, it forms a high-pass filter, providing a path for the high-order harmonics of the submodule converter output voltage, which is beneficial to improving the quality of the output voltage waveform of the cascaded energy storage converter.

[0064] Example 2

[0065] Based on the cascaded energy storage converter disclosed in Embodiment 1, this embodiment further discloses a control method for suppressing second harmonic current in a cascaded energy storage converter, specifically including the following process:

[0066] S101: Establish a mathematical model of the cascaded energy storage converter and determine the parameters of the AC side decoupling capacitor.

[0067] In this embodiment, based on the cascaded energy storage converter structure of Embodiment 1, a mathematical model of the cascaded energy storage converter in the dq coordinate system is established; according to Kirchhoff's laws, under ideal grid voltage conditions, the grid-side dynamic model of the converter can be expressed as:

[0068] (2)

[0069] in, and These represent the converter output current, and These represent the differential voltages output by the submodules. and These represent the grid voltage; Here, N represents the AC-side filter inductor for each submodule, and N represents the number of submodules per phase in the cascaded energy storage system. L u and L u These are the AC-side inductors for the U-bridge arm and V-bridge arm of the submodule, respectively.

[0070] AC side capacitor C Stored energy It can be represented as:

[0071] (3)

[0072] in, u c It is the AC side capacitor of the submodule. C u and C v The common-mode voltage is used to eliminate AC output line frequency voltage. and These are the AC side capacitors of the submodules. C u and C v Voltage at both ends, The magnitude of the grid voltage. ω is the angular frequency of the power grid.

[0073] When ωt=0, the minimum amount of energy that the AC side capacitor can store is:

[0074] (4)

[0075] Ignoring energy losses during charging and discharging, the minimum energy stored in the capacitor should be sufficient to meet the power requirements of the converter during capacitor charging and discharging:

[0076] (5)

[0077] in, K 0 is the coefficient representing the initial energy state stored in the capacitor. Since the energy stored in a capacitor is always positive, K The range of values ​​for 0 must satisfy the following conditions: K 0≥1, This represents the second harmonic power flowing through the AC-side capacitor. This indicates the amplitude of the converter's output current. The phase angle represents the second harmonic power.

[0078] Combining equations (4) and (5), the common-mode voltage of the capacitor can be obtained. for:

[0079] (6)

[0080] when hour, Has maximum value V cmax ,when hour, It has a minimum value V cmin Then the utilization rate of the capacitor voltage. It can be represented as:

[0081] (7)

[0082] in, and These represent the maximum and minimum values ​​of the AC side capacitor voltage, respectively.

[0083] It can be seen that when K When 0 approaches 1, voltage utilization increases. = V cmax At this time, it has the strongest second harmonic current suppression capability. To ensure effective suppression of second harmonic current, the minimum value of the AC side decoupling capacitor can be designed as follows:

[0084] (8)

[0085] in, V Amax This indicates the maximum amplitude of the AC output voltage of the H-bridge. This indicates the maximum amplitude of the AC output current of the H-bridge.

[0086] When the mains voltage is constant, the minimum value of the required AC-side decoupling capacitor varies with different voltage levels. V Amax , as well as Relationship such as Figure 2 As shown in the figure, it can be seen that, for a given maximum power, the selection of the AC side decoupling capacitor is related to the capacitor voltage. and V cmax Inversely proportional. When higher or Vcmax When the capacitance is too large, the required capacitance value decreases, thereby reducing the size and cost of passive components. However, this requires the switching device to withstand greater current stress. Therefore, in practical applications, the capacitance value should be reasonably determined based on the specific device type and its rated parameters. and V cmax The selection range is used to design the AC side decoupling capacitor value that meets the performance and cost requirements.

[0087] S102: Extract the grid angular frequency signal, transform the grid-side voltage and current to the dq coordinate system, and obtain the ideal modulation voltage of the converter based on the transformed current and voltage;

[0088] The SOC status signal of each battery cluster is collected, and combined with the transformed current, a modulation signal for inter-phase SOC equalization and a modulation signal for intra-phase SOC equalization are generated; combined with the ideal modulation voltage of the converter, a differential mode modulation signal is generated.

[0089] This embodiment achieves grid-connected power control by controlling the differential-mode modulation signal output by the H-bridge; specifically, in conjunction with... Figure 3 When the three-phase power grid voltage is balanced, the instantaneous power is calculated from the reference power value according to the instantaneous power theory. dq0 Reference current values ​​in the coordinate system:

[0090] (9)

[0091] in, p ref It is the active power reference value. q ref This is the reactive power reference value, when q ref When =0, the system operates in unity power factor mode; , They are respectively dq0 Reference value of current in the coordinate system.

[0092] Based on the grid-side voltage signal, the grid angular frequency signal ωt is extracted through a phase-locked loop, and the grid-side voltage is then converted into a signal. With current Transform to dq coordinate system to obtain voltage , and current and .

[0093] Current With current reference value Differential current With current reference value The difference is calculated, and the resulting difference is then passed through a PI controller. Gpc (s) Implement tracking control of the current command to obtain the differential control signal required by the submodule; in the dq coordinate system, the differential control signal required by the submodule and It can be represented as:

[0094] (10)

[0095] in, and These are the proportional coefficient and integral coefficient in current control, respectively.

[0096] Combined with the voltage after dq transformation , And the current decoupling after dq transformation, and the ideal modulation voltage of the converter is obtained through dq / abc transformation. , i=a,b,c .

[0097] To ensure the SOC balance of each battery cluster during the operation of the cascaded energy storage system, this embodiment integrates inter-phase and intra-phase battery cluster balancing strategies. This is achieved by collecting the SOC status signals of each battery cluster. SOC ij Combined with the direction of the output current, a modulation signal for phase-to-phase SOC equalization is generated. and for in-phase SOC equalization modulation signals .

[0098] Specifically, to ensure the consistency of the State of Charge (SOC) of all battery clusters in a cascaded H-bridge energy storage system during charging and discharging, an ideal modulation voltage is required. A suitable zero-sequence signal is injected to achieve interphase and intraphase voltage balance; the zero-sequence voltage corresponding to the intraphase voltage balance of the battery cluster can be expressed as:

[0099] (11)

[0100] in, K 0 represents the proportional gain for interphase SOC balance. This represents the average SOC of all battery clusters in the entire battery energy storage system. ， Indicates the first i SOC of the phase cell cluster The phase angle of the zero-sequence voltage. This indicates the magnitude of voltage imbalance between different energy storage clusters.

[0101] Based on the differences in SOC between battery clusters within the same phase, differential mode modulation of the signal within the phase is required. u ij Inject different zero-order components:

[0102] (12)

[0103] in, It is a proportional gain used to control the SOC equilibrium rate of the cell clusters within a phase. This represents the SOC of the j-th battery cluster in the i-th phase. For output current The phase angle, based on the current and get.

[0104] Interphase SOC equalization modulation signal With the ideal modulation voltage of the converter After addition, the voltage obtained by scaling by 1 / N is combined with the modulation signal used for in-phase SOC equalization. Add them together to obtain the differential modulated signal. To achieve power control; i=a,b,c , j= 1,2,…,N; N is the number of submodules.

[0105] S103: Based on the average DC current of each phase battery cluster, the adaptive adjustment coefficient is calculated; the average second harmonic current of each phase battery cluster is separated into positive and negative sequences to obtain the positive and negative sequence components of the second harmonic current, and then the corresponding common-mode modulation signal is generated through closed-loop PI control to suppress the second harmonic current; the adaptive adjustment coefficient and the common-mode modulation signal are multiplied to obtain the common-mode modulation signal applicable to each submodule.

[0106] As a specific implementation method, combined with Figure 4 Second harmonic current suppression is achieved by controlling the differential common-mode modulation signal output by the H-bridge; the specific process is as follows:

[0107] This embodiment designs a second-order bandpass filter. Used to extract the second and third harmonic components from the DC-side current:

[0108] (13)

[0109] in, This represents the damping coefficient of a second-order bandpass filter.

[0110] Considering that the output current of each submodule may differ after adding balance control, a scheme combining mean control and deviation adjustment is designed to significantly reduce the computational burden on the controller. The specific implementation process is as follows:

[0111] Battery cluster output current signal After bandpass filter Extracting the second harmonic component as After averaging, the average value of the second harmonic current of each phase can be obtained. .

[0112] Specifically, calculate the average value of the second harmonic current for each phase. Specifically:

[0113] (14)

[0114] The mean of the extracted second harmonic current By separating the positive and negative sequences, the positive sequence components of the second harmonic current can be obtained. and negative order components Subsequently, closed-loop PI control is applied to the positive-sequence and negative-sequence components in the dq coordinate system to generate the ideal common-mode modulation signal required by the system. This is to achieve effective suppression of second harmonic current under ideal conditions.

[0115] In this embodiment, a common-mode modulation signal can be obtained through a PI controller to control the second harmonic current component to zero. The PI controller is as follows:

[0116] (15)

[0117] in, and These are the proportional gain and integral gain of the PI controller, respectively.

[0118] To ensure that all submodules can suppress the second harmonic current within an acceptable range, deviation adjustment is also required. Specifically, this involves adjusting the battery cluster output current signal. Through a low-pass filter The DC component can be obtained. Then, after averaging, the average DC current of each phase battery cluster can be extracted. .

[0119] In this embodiment, a low-pass filter is used to extract the DC component of the battery output current. It can be designed as:

[0120] (16)

[0121] in, This represents the damping ratio of the low-pass filter.

[0122] Average DC current of all battery clusters in each phase It can be represented as:

[0123] (17)

[0124] Based on average DC current Calculations yielded i Xiangdi j The adaptive adjustment coefficient of the common-mode modulation signal of each submodule;

[0125] (18)

[0126] Finally, the ideal common-mode modulation signal required by the system. Multiply to obtain the reference common-mode modulation signal required by each submodule. Its expression is:

[0127] (19)

[0128] S104: The differential-mode modulation signal and the common-mode modulation signal are superimposed, and the PWM control signal of each sub-module switching device is generated by carrier phase-shift modulation.

[0129] Specifically, in combination Figure 5 The differential-mode modulation signal and the common-mode modulation signal of the j-th submodule in each phase are added together to obtain the modulation signal required for the U-arm of the corresponding submodule; the differential-mode modulation signal and the common-mode modulation signal of the j-th submodule in each phase are subtracted to obtain the modulation signal required for the V-arm of the corresponding submodule.

[0130] The modulation signals required for the U-bridge arm and the V-bridge arm are modulated using carrier phase-shift modulation to generate the PWM control signal for the j-th sub-module switching device in that phase; thus, the PWM control signal for the j-th sub-module switching device in each phase is obtained. S 1ij , S 2ij , S 3ij and S 4ij .

[0131] Figure 6 Simulation results of the DC-side second harmonic current suppression method described in this invention are presented under a 6 kV power grid environment with N=8 submodules, a total system inductance of 27 mH, and a total capacitance of 54000 μF. The figures show that the peak-to-peak value of the battery cluster output current fluctuation is only 10.1 A, accounting for 5.8% of its average output, indicating that the proposed method has a significant effect in suppressing second harmonic current.

[0132] In summary, the battery cluster second harmonic current suppression method for a cascaded H-bridge energy storage system based on differential topology proposed in this embodiment achieves active power control by constructing a common-mode current loop on the AC side of the H-bridge and generating a differential-mode modulation signal through closed-loop control based on grid-connected current. Simultaneously, it generates a common-mode modulation signal by extracting and controlling the second harmonic component in the battery cluster current through closed-loop control. Finally, the differential-mode and common-mode modulation signals are superimposed to effectively suppress the second harmonic current, reduce current fluctuations, and improve system stability and battery life.

[0133] Example 2

[0134] In one or more embodiments, a control system for suppressing second harmonic current in a cascaded energy storage converter is disclosed, comprising:

[0135] The model building module is configured to build a mathematical model of a cascaded energy storage converter and determine the AC-side decoupling capacitor parameters.

[0136] The differential-mode modulation signal generation module is configured to extract the grid angular frequency signal, transform the grid-side voltage and current to the dq coordinate system, obtain the ideal modulation voltage of the converter based on the transformed current and voltage, acquire the SOC status signal of each battery cluster, combine it with the transformed current to generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization, and generate a differential-mode modulation signal by combining it with the ideal modulation voltage of the converter.

[0137] The common-mode modulation signal generation module is configured to calculate an adaptive adjustment coefficient based on the average DC current of each phase battery cluster; to separate the positive and negative sequence of the average second harmonic current of each phase battery cluster to obtain the positive and negative sequence components of the second harmonic current, and then generate a corresponding common-mode modulation signal through closed-loop PI control to suppress the second harmonic current; the adaptive adjustment coefficient and the common-mode modulation signal are multiplied to obtain a common-mode modulation signal suitable for each sub-module;

[0138] The control module is configured to superimpose the differential-mode modulation signal and the common-mode modulation signal, and generate PWM control signals for the switching devices of each submodule using a carrier phase-shift modulation method.

[0139] It should be noted that the specific implementation methods of the above modules are exactly the same as those in Example 1, and will not be described in detail again.

[0140] Example 3

[0141] In one or more embodiments, a terminal device is disclosed, comprising a processor and a memory, wherein the processor is used to implement instructions; and the memory is used to store multiple instructions adapted to be loaded by the processor and executed by the processor to control the cascaded energy storage converter for suppressing second harmonic current as described in Embodiment 1.

[0142] It should be understood that in this embodiment, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor, etc.

[0143] Memory may include read-only memory and random access memory, and provides instructions and data to the processor. A portion of memory may also include non-volatile random access memory. For example, memory may also store information about the device type.

[0144] In the implementation process, each step of the above method can be completed by the integrated logic circuits in the processor hardware or by software instructions.

[0145] Example 4

[0146] In one or more embodiments, a computer-readable storage medium is disclosed, wherein a plurality of instructions are stored, the instructions being adapted to be loaded by a processor of a terminal device and executed by the control method for suppressing second harmonic currents of a cascaded energy storage converter as described in Embodiment 1.

[0147] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.

Claims

1. A control method for a cascaded energy storage converter for suppressing second harmonic current, characterized in that, include: A cascaded energy storage converter for suppressing second harmonic current includes: a cascaded unit consisting of N sub-modules connected in series, with each phase of a three-phase power grid connected to one cascaded unit; each sub-module includes: a battery cluster, a DC-side LC filter, and an H-bridge inverter connected in sequence, wherein each half-bridge of the H-bridge inverter is connected to the power grid after being connected in series with a decoupling inductor, and each decoupling inductor is connected to the negative terminal of the battery cluster after being connected in series with a decoupling capacitor; A mathematical model of the cascaded energy storage converter is established to determine the parameters of the AC-side decoupling capacitor; the minimum value of the AC-side decoupling capacitor is: in, V Amax This indicates the maximum amplitude of the AC output voltage of the H-bridge. This indicates the maximum amplitude of the AC output current of the H-bridge. N This indicates the number of sub-modules in each phase of the cascaded energy storage system. The angular frequency of the power grid. This represents the maximum value of the AC-side capacitor voltage. Capacitor voltage utilization rate; Extract the grid angular frequency signal, transform the grid-side voltage and current to the dq coordinate system, and obtain the ideal modulation voltage of the converter based on the transformed current and voltage; collect the state of charge (SOC) signal of each battery cluster, combine it with the transformed current, and generate modulation signals for inter-phase SOC equalization and intra-phase SOC equalization; combine it with the ideal modulation voltage of the converter to generate a differential mode modulation signal. Based on the average DC current of each phase battery cluster, the adaptive adjustment coefficient is calculated as follows: The battery cluster output current signal is passed through a low-pass filter and then averaged to extract the average DC current of each phase battery cluster. ; The adaptive adjustment coefficient is calculated based on the average value of the DC current, specifically as follows: ； in, The output current of the battery cluster in the j-th submodule of the i-th phase; The average second harmonic current of each phase battery cluster is separated into positive and negative sequences to obtain the positive and negative components of the second harmonic current. Then, a corresponding common-mode modulation signal is generated through closed-loop PI control to suppress the second harmonic current. The adaptive adjustment coefficient is multiplied by the common-mode modulation signal to obtain a common-mode modulation signal suitable for each sub-module. The differential-mode modulation signal and the common-mode modulation signal are superimposed, and the PWM control signal of each sub-module switching device is generated by carrier phase-shift modulation.

2. The control method for a cascaded energy storage converter for suppressing second harmonic current as described in claim 1, characterized in that, Based on the transformed current and voltage, the ideal modulation voltage of the converter is obtained. The specific process is as follows: The current after dq transformation is compared with the current reference value of the converter in the dq coordinate system, and the current command is tracked and controlled by PI control; combined with the voltage after dq transformation and the decoupled current after dq transformation, the ideal modulation voltage of the converter is obtained by dq / abc transformation.

3. The control method for a cascaded energy storage converter for suppressing second harmonic current as described in claim 1, characterized in that, By combining the ideal modulation voltage of the converter, a differential-mode modulation signal is generated, specifically as follows: The SOC status signal of each battery cluster is collected, and combined with the transformed current, a modulation signal for inter-phase SOC equalization and a modulation signal for intra-phase SOC equalization are generated. The modulation signal for phase-to-phase SOC equalization is added to the ideal modulation voltage of the converter, and the voltage obtained by scaling is added to the modulation signal for intra-phase SOC equalization to obtain the differential-mode modulation signal.

4. The control method for a cascaded energy storage converter for suppressing second harmonic current as described in claim 1, characterized in that, The average second harmonic current of each battery cluster is separated into positive and negative sequences to obtain the positive and negative sequence components of the second harmonic current. These components are then used to generate the corresponding common-mode modulation signal via closed-loop PI control. Specifically: The battery cluster output current signal passes through a bandpass filter. H bp ( s After extracting the second harmonic component, the average value of the second harmonic current in each phase is obtained by averaging. The mean value of the second harmonic current is separated into positive and negative sequences to obtain the positive and negative sequence components of the second harmonic current. The positive and negative sequence components are subjected to coordinate transformations respectively, and then the coordinates are inversely transformed after passing through a PI controller. The values ​​obtained are added together to obtain a common-mode modulation signal, which is used to control the second harmonic current component to zero.

5. The control method for a cascaded energy storage converter for suppressing second harmonic current as described in claim 1, characterized in that, The differential-mode modulation signal and the common-mode modulation signal are superimposed, specifically as follows: The differential-mode modulation signal and the common-mode modulation signal of the j-th submodule of each phase are added together to obtain the modulation signal required for the U-bridge arm of the corresponding submodule; the differential-mode modulation signal and the common-mode modulation signal of the j-th submodule of each phase are subtracted to obtain the modulation signal required for the V-bridge arm of the corresponding submodule. The modulation signals required for the U-bridge arm and the modulation signals required for the V-bridge arm are generated by carrier phase-shift modulation to produce PWM control signals for the corresponding submodule switching devices.

6. A control system for a cascaded energy storage converter for suppressing second harmonic current as described in claim 1, characterized in that, include: The model building module is configured to establish a mathematical model of the cascaded energy storage converter and determine the AC-side decoupling capacitor parameters; the minimum value of the AC-side decoupling capacitor is: The differential mode modulation signal generation module is configured to extract the grid angular frequency signal, transform the grid-side voltage and current to the dq coordinate system, and obtain the ideal modulation voltage of the converter based on the transformed current and voltage; collect the SOC status signal of each battery cluster, and combine it with the transformed current to generate modulation signals for inter-phase SOC equalization and modulation signals for intra-phase SOC equalization. By combining the ideal modulation voltage of the converter, a differential-mode modulation signal is generated; The common-mode modulation signal generation module is configured to calculate the adaptive adjustment coefficient based on the average DC current of each phase battery cluster, specifically: The battery cluster output current signal is passed through a low-pass filter and then averaged to extract the average DC current of each phase battery cluster. The adaptive adjustment coefficient is calculated based on the average value of the DC current, specifically as follows: ； in, The output current of the battery cluster in the i-th phase and j-th submodule is... This represents the average output current of all battery clusters in phase i; The average second harmonic current of each phase battery cluster is separated into positive and negative sequences to obtain the positive and negative components of the second harmonic current. Then, a corresponding common-mode modulation signal is generated through closed-loop PI control to suppress the second harmonic current. The adaptive adjustment coefficient is multiplied by the common-mode modulation signal to obtain a common-mode modulation signal suitable for each sub-module. The control module is configured to superimpose the differential-mode modulation signal and the common-mode modulation signal, and generate PWM control signals for the switching devices of each submodule using a carrier phase-shift modulation method.

7. A terminal device comprising a processor and a memory, the processor for implementing instructions; the memory for storing multiple instructions, characterized in that, The instructions are adapted to be loaded by a processor and executed by the control method for suppressing second harmonic currents of a cascaded energy storage converter as described in any one of claims 1-5.

8. A computer-readable storage medium storing a plurality of instructions, characterized in that, The instructions are adapted to be loaded by the processor of the terminal device and executed by the control method for suppressing second harmonic current of the cascaded energy storage converter according to any one of claims 1-5.

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