Memory, test method thereof and electronic equipment

Abstract

The invention discloses a memory, a test method thereof and electronic equipment, and the test method comprises the steps: selecting at least two memories, and obtaining a preset flash memory block in each memory; filling a flash memory page in the preset flash memory block with the same number of first analog data, and constructing the filled preset flash memory block into a partial data page write-in block; carrying out aging treatment on each memory; identifying a part of data page write-in blocks in the memory, reading a flash memory page in which data is written in the part of data page write-in blocks, recording the flash memory page as a basic flash memory page, and obtaining a first check code corresponding to the basic flash memory page; filling a preset number of flash memory pages in the partial data page write-in block with second analog data, reading the flash memory pages in which the data is written, recording the flash memory pages as progressive flash memory pages, and obtaining second check codes corresponding to the progressive flash memory pages; and establishing a relationship between the analog data volume and the check code, and determining the stability of the memory when the data volume is filled.

Description

Technical Field

[0001] The present application relates to the field of memory technology, and in particular to a memory, a testing method thereof, and an electronic device. Background Art

[0002] When performing read and write operations on the memory, due to the randomness of the amount of data written by the user and the limitation of the cache size of the memory's main controller, the written data may not be able to fill a flash memory block. This flash memory block that is not filled with data is called an open block, that is, a block where part of the data page is written; and the flash memory block that is filled with data is called a closeblock, that is, a block where the data page is full.

[0003] The principle of writing data to flash memory is to charge the floating gate transistor. For the openblock of some flash memory products, the flash memory pages that have not been written with data, that is, the flash memory pages that have not been charged with electrons, may directly affect the flash memory that has data written, causing some floating gate charges in the flash memory pages that have data written to leak, thereby causing errors in the written data and affecting the stability of the memory. Summary of the Invention

[0004] The purpose of this application is to provide a memory and its testing method, and an electronic device, which are used to detect the stability of the memory and avoid instability of the written data.

[0005] The present application discloses a memory testing method, which includes the following steps:

[0006] Selecting at least two memories and obtaining a preset flash memory block in each of the memories;

[0007] Filling the flash memory pages in the preset flash memory block with the same amount of first simulation data, and constructing the filled preset flash memory block into a partial data page write block;

[0008] performing an aging process on each of the memories;

[0009] Identifying a partial data page write block in the memory, reading a flash memory page in which data is written in the partial data page write block, recording the page as a basic flash memory page, and obtaining a first check code corresponding to the basic flash memory page;

[0010] Filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages where the data is written, which are recorded as progressive flash memory pages, and obtaining a second check code corresponding to the progressive flash memory pages; and

[0011] A relationship between the amount of simulation data and the check code is established according to the first check code, the second check code, the first simulation data, and the second simulation data to determine the stability of the memory when the data amount is filled.

[0012] Optionally, in the step of filling the flash memory pages in the preset flash memory block with the same amount of first simulation data and constructing the filled preset flash memory block into a partial data page write block, the preset flash memory block is a flash memory block with the same position and the same number in each memory.

[0013] Optionally, in the step of performing an aging treatment on the at least two memories, all memories are baked at a temperature of 85-125°C for 5-8 hours.

[0014] Optionally, in the step of identifying a partial data page write block in the memory, reading the flash memory page where data is written in the partial data page write block, recording it as a basic flash memory page, and obtaining a first verification code corresponding to the basic flash memory page, the first verification code corresponding to the basic flash memory page is obtained by sending a read flash memory instruction to the memory.

[0015] Optionally, in the step of identifying a partial data page write block in the memory, reading the flash memory page in which data is written in the partial data page write block, recording it as a basic flash memory page, and obtaining a first verification code corresponding to the basic flash memory page, the last flash memory page in which data is written in the partial data page write block is read and recorded as a basic flash memory page; in the step of filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory page in which data is written, recording it as a progressive flash memory page, and obtaining a second verification code corresponding to the progressive flash memory page, the last flash memory page in which data is written is read and recorded as a progressive flash memory page.

[0016] Optionally, the step of filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages to which the data is written (recorded as progressive flash memory pages), and obtaining a second check code corresponding to the progressive flash memory pages includes:

[0017] Single reading step: filling a preset number of flash memory pages in the partial data page write block with second simulation data, reading the last flash memory page written with the data, and obtaining a second check code corresponding to the progressive flash memory page;

[0018] Repeat the above reading step until a preset number of flash memory pages in the partial data page write block are filled with the second simulation data;

[0019] The preset number is a multiple of the preset fractional number.

[0020] Optionally, in the step of identifying a partial data page write block in the memory, reading a flash memory page in which data is written in the partial data page write block, recording it as a basic flash memory page, and obtaining a first check code corresponding to the basic flash memory page, all flash memory pages in which data is written in the partial data page write block are read and recorded as basic flash memory pages;

[0021] The step of filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages with written data (recorded as progressive flash memory pages), and obtaining a second check code corresponding to the progressive flash memory pages includes:

[0022] Single reading step: filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading all flash memory pages with written data, recording them as progressive flash memory pages, and obtaining second check codes corresponding to the progressive flash memory pages;

[0023] Repeat the above reading step until a preset number of flash memory pages in the partial data page write block are filled with the second simulation data;

[0024] The preset number is a multiple of the preset number of points.

[0025] Optionally, the preset number of points is 3, and the preset number is 24.

[0026] The present application also discloses a memory, which is tested using the memory testing method described above.

[0027] The present application also discloses an electronic device, which includes the memory as described above.

[0028] The beneficial effects of the present application are as follows: the present application first constructs a partial data page write block (open block) in the flash memory block of the memory, then performs aging processing on the memory, and then first obtains the first check code corresponding to the basic flash memory page in the partial data page write block (open block), and then fills the open block with simulated data, and then obtains the second check code corresponding to the progressive flash memory page in the open block, and analyzes the check code (Error Correcting Code, ECC value) in the corresponding flash memory page, clarifies the relationship between the amount of filled simulated data and the check code, and clarifies the impact of the amount of filled simulated data on the stability of the open block data, so as to determine under what conditions of filled simulated data amount, the data of the open block is the most stable, so as to facilitate the subsequent writing of data in the memory while ensuring the stability of the written data. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without inventive work. In the drawings:

[0030] Figure 1 This is a flow chart of a memory testing method provided in an embodiment of the present application;

[0031] Figure 2 This is a flow chart of a memory testing method provided by one embodiment of the present application;

[0032] Figure 3 is a flowchart of a memory testing method provided by another embodiment of the present application;

[0033] Figure 4 This is a relationship diagram between the amount of simulated data and the check code provided in an embodiment of the present application. DETAILED DESCRIPTION

[0034] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative. However, the present application can be implemented in many alternative forms and should not be construed as being limited to the embodiments described herein. The present invention will be described in detail below with reference to the accompanying drawings and through specific embodiments.

[0035] like Figure 1 As shown, an embodiment of the present application provides a memory testing method, the testing method comprising the steps of:

[0036] S1: Select at least two memories and obtain a preset flash memory block in each of the memories;

[0037] S2: Filling the flash memory pages in the preset flash memory block with the same amount of first simulation data, and constructing the filled preset flash memory block into a partial data page write block;

[0038] S3: performing aging processing on each of the memories;

[0039] S4: Identify a partial data page write block in the memory, read a flash memory page in which data is written in the partial data page write block, record it as a basic flash memory page, and obtain a first check code corresponding to the basic flash memory page;

[0040] S5: Filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages to which the data is written, which are recorded as progressive flash memory pages, and obtaining a second check code corresponding to the progressive flash memory pages;

[0041] S6: Establishing a relationship between the amount of simulation data and the check code according to the first check code, the second check code, the first simulation data, and the second simulation data, and determining the stability of the memory when filling the data amount.

[0042] In response to the situation where the written data of the open block is unstable, the embodiment of the present application first constructs the open block in the flash memory block of the memory, then ages the memory, and then first obtains the first check code corresponding to the basic flash memory page in the open block. Then, after filling the open block with simulated data, the second check code corresponding to the progressive flash memory page in the open block is obtained, and the check code (Error Correcting Code, ECC value) in the corresponding flash memory page is analyzed to clarify the relationship between the amount of filled simulated data (number of dummy) and the check code, and to clarify the impact of the number of filled dummy on the stability of the open block data, so as to determine under what conditions of the amount of filled simulated data, the data of the open block is the most stable, so as to facilitate the subsequent writing of data in the memory while ensuring the stability of the written data.

[0043] In step S1, the memory may be a flash memory particle. Memories of the same batch are selected for testing to reduce the deviation in testing caused by the differences in the memories themselves. As for the number of memories selected for testing, it can be selected according to the actual situation. While meeting the actual test conditions, using as many memories as possible can further improve the accuracy of the test.

[0044] In step S2, data, i.e., first simulation data, is written into the selected memory under normal temperature conditions, and the preset flash memory blocks are flash memory blocks of the same position and the same number in each memory. As a specific example, in the same batch of memories, each memory has 32 flash memory blocks, numbered flash memory block 1, flash memory block 2, flash memory block 3 to flash memory block 32, and each flash memory block contains 64 flash memory pages, i.e., flash memory page 1, flash memory page 2, flash memory page 3 to flash memory page 64; wherein, the flash memory block 1 of each memory is now tested as the preset flash memory block, and the same data is written into the flash memory blocks 1 of these memories, so that the data is only filled into flash memory pages 1 to flash memory page 20. Since some flash memory pages in flash memory block 1 are not filled and some flash memory pages have no data written therein, a partial data page write block (openblock) is formed.

[0045] In step S3, all memories are baked at a temperature of 85-125°C for 5-8 hours to simulate the problems that may occur after a period of actual use, thereby improving the effectiveness of the test. Of course, during the specific operation, the temperature and baking time can be adjusted adaptively based on the different products and their service life.

[0046] In some embodiments, other aging treatment measures may also be adopted, such as using a batch of memories in the same environment for a period of time before testing; or, adding the memories to the circuit and performing constant voltage or cyclic voltage aging; or, placing the memories in a high temperature and high humidity environment for aging treatment, without further limitation here.

[0047] In step S4, the data written in the open blocks of these memories are read at room temperature. By sending a flash memory read instruction to the memory, the extra bits (Error Correction Code bits, ECC bits) corresponding to the basic flash memory page can be obtained, which is also the first check code in step S4.

[0048] As an optional implementation, in step S4, the last flash memory page in which data is written in the open block is read and recorded as the basic flash memory page; correspondingly, in step S5, the last flash memory page in which data is written is read and recorded as the progressive flash memory page.

[0049] Specifically, such as Figure 2 As shown, in step S5, it includes:

[0050] Single reading step: filling a preset number of flash memory pages in the partial data page write block with second simulation data, reading the last flash memory page written with the data, and obtaining a second check code corresponding to the progressive flash memory page;

[0051] Repeat the above reading step until a preset number of flash memory pages in the partial data page write block are filled with the second simulation data;

[0052] The preset number is a multiple of the preset fractional number, and the second check code and the first check code are obtained in the same manner, both being extra bits (Error Correction Code bits, ECC bits).

[0053] In this embodiment, only the last flash memory page populated in the open block is read in each read step. The relationship between the extra bits read each time and the amount of simulated data is used to confirm the relationship between the two. Since only one flash memory page is read each time, reading efficiency is improved.

[0054] In an embodiment of the present application, the preset fractional quantity and the preset quantity are in a multiple relationship, the preset quantity is n times the preset fractional quantity, and n is a natural number greater than or equal to 8. Through this setting, since the number n is large, the number of repetitions of a single reading step is large, thereby increasing the number of acquisitions of the second simulation data and the second check code, increasing the number of samples, and thereby improving the test accuracy.

[0055] As some specific examples, when the memory uses SLC flash memory particles, the preset fraction is 1; when the memory uses MLC flash memory particles, the preset fraction is 2; when the memory uses TLC flash memory particles, the preset fraction is 3; and when the memory uses QLC flash memory particles, the preset fraction is 4. The preset fraction can also be 26, 27, 28, etc. The specific selection depends on the actual situation and the actual product, and is not limited here.

[0056] As another optional implementation, in step S4, all flash memory pages in which data is written in the partial data page write block are read and recorded as basic flash memory pages; correspondingly, in step S5, all flash memory pages in which data is written are read and recorded as progressive flash memory pages.

[0057] Specifically, such as Figure 3 As shown, in step S5, it includes:

[0058] Single reading step: filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading all flash memory pages with written data, recording them as progressive flash memory pages, and obtaining second check codes corresponding to the progressive flash memory pages;

[0059] Repeat the above reading step until a preset number of flash memory pages in the partial data page write block are filled with the second simulation data;

[0060] The preset number is a multiple of the preset fractional number.

[0061] Unlike the previous embodiment, this embodiment reads all flash memory pages with written data at the same time each time. Although the read content is large, the influence relationship between multiple types of flash memory pages in the open block can be analyzed through the relationship between these data. Not only can it analyze the impact of flash memory pages with no data written being written to data flash memory pages, but it can also analyze the degree of impact of flash memory pages with no data written being written to different data flash memory pages, as well as many other situations, thereby improving the test effect.

[0062] The setting of the preset quantity and the preset sub-quantity has been described in detail in the previous embodiment and will not be repeated here.

[0063] In step S6, taking TLC flash memory particles as an example, simulated data is filled into the three flash memory pages in the open block each time, and all flash memory pages with written data are read. After reading 8 times, a graph between the simulated data amount and the check code is established. Figure 4 It is a relationship diagram between the amount of simulated data and the check code, such as Figure 4 As shown in the figure, the horizontal axis represents no simulated data filling, simulated data filling in 3 flash pages in an open block, simulated data filling in 6 flash pages in an open block, simulated data filling in 9 flash pages in an open block, simulated data filling in 12 flash pages in an open block, simulated data filling in 15 flash pages in an open block, simulated data filling in 18 flash pages in an open block, simulated data filling in 21 flash pages in an open block, and simulated data filling in 24 flash pages in an open block. The vertical axis represents the average number of extra bits read from the open block.

[0064] Since ECC bits are used to correct single-bit errors and detect multiple-bit errors in a flash memory page, a higher value indicates more error-corrected data, while a lower value indicates less error-corrected data. Therefore, this value can reflect the stability of the flash memory's stored data. Figure 4 As shown in the figure, there are 9 data points in total. Each data point represents the average ECC bits value of the open block read after filling a certain amount of simulated data. It can be seen from the figure that as the number of filled dummy pages increases, the corresponding average ECC bits value of the open block gradually decreases and tends to be stable. Therefore, the change in the ECC bits value can reflect that as the number of filled dummy pages increases, the data gradually becomes stable. Furthermore, it can be analyzed that when TLC flash memory particles are used, the data stability of the flash memory particles can be guaranteed after writing data to the 18 flash memory pages in the open block.

[0065] The present application also provides a memory device that is tested using the memory testing method described above. The memory device can be a flash memory, a hard disk, or other types of storage. The memory device provided by the present application can provide excellent stability and prevent instability in written data.

[0066] An embodiment of the present application further provides an electronic device, which includes the memory as described above.

[0067] It should be noted that the limitations on the steps involved in this solution do not limit the order of the steps without affecting the implementation of the specific solution. The steps written in front can be executed first, later, or even simultaneously. As long as this solution can be implemented, it should be deemed to fall within the scope of protection of this application.

[0068] The above content is a further detailed description of the present application in conjunction with specific optional implementation methods, and the specific implementation of the present application cannot be considered to be limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, they can make several simple deductions or substitutions without departing from the concept of the present application, which should be considered to fall within the scope of protection of the present application.

Claims

1. A memory testing method, characterized in that: Including steps: Selecting at least two memories and obtaining a preset flash memory block in each of the memories; Filling the flash memory pages in the preset flash memory block with the same amount of first simulation data, and constructing the filled preset flash memory block into a partial data page write block; performing an aging process on each of the memories; Identifying a partial data page write block in the memory, reading a flash memory page in which data is written in the partial data page write block, recording the page as a basic flash memory page, and obtaining a first check code corresponding to the basic flash memory page; Filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages where the data is written, recording them as progressive flash memory pages, and obtaining a second check code corresponding to the progressive flash memory pages; as well as A relationship between the amount of simulation data and the check code is established according to the first check code, the second check code, the first simulation data, and the second simulation data to determine the stability of the memory when the data amount is filled.

2. The memory testing method according to claim 1, wherein: In the step of filling the flash memory pages in the preset flash memory block with the same amount of first simulation data and constructing the filled preset flash memory block into a partial data page write block, the preset flash memory block is a flash memory block with the same position and the same number in each memory.

3. The memory testing method according to claim 1, wherein: In the step of performing an aging treatment on the at least two memories, all memories are baked at a temperature of 85-125°C for 5-8 hours.

4. The memory testing method according to claim 1, wherein: In the step of identifying a partial data page write block in the memory, reading the flash memory page where data is written in the partial data page write block, recording it as a basic flash memory page, and obtaining a first verification code corresponding to the basic flash memory page, the first verification code corresponding to the basic flash memory page is obtained by sending a read flash memory instruction to the memory.

5. The memory testing method according to claim 1, wherein: In the step of identifying a partial data page write block in the memory, reading a flash memory page in which data is written in the partial data page write block, recording the page as a basic flash memory page, and obtaining a first check code corresponding to the basic flash memory page, a last flash memory page in which data is written in the partial data page write block is read and recorded as a basic flash memory page; In the step of filling a preset number of flash memory pages in the partial data page write block with the second simulated data, reading the flash memory pages where the data is written, which are recorded as progressive flash memory pages, and obtaining the second check code corresponding to the progressive flash memory pages, the last flash memory page where the data is written is read, which is recorded as the progressive flash memory page.

6. The memory testing method according to claim 5, wherein: The step of filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages with written data (recorded as progressive flash memory pages), and obtaining a second check code corresponding to the progressive flash memory pages includes: Single reading step: filling a preset number of flash memory pages in the partial data page write block with second simulation data, reading the last flash memory page written with the data, and obtaining a second check code corresponding to the progressive flash memory page; Repeat the above reading step until a preset number of flash memory pages in the partial data page write block are filled with the second simulation data; The preset number is a multiple of the preset fractional number.

7. The memory testing method according to claim 1, wherein: In the step of identifying a partial data page write block in the memory, reading a flash memory page in which data is written in the partial data page write block and recording it as a basic flash memory page, and obtaining a first check code corresponding to the basic flash memory page, all flash memory pages in which data is written in the partial data page write block are read and recorded as basic flash memory pages; The step of filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading the flash memory pages with written data (recorded as progressive flash memory pages), and obtaining a second check code corresponding to the progressive flash memory pages includes: Single reading step: filling a preset number of flash memory pages in the partial data page write block with second simulated data, reading all flash memory pages with written data, recording them as progressive flash memory pages, and obtaining second check codes corresponding to the progressive flash memory pages; Repeat the above reading step until a preset number of flash memory pages in the partial data page write block are filled with the second simulation data; The preset number is a multiple of the preset fractional number.

8. The memory testing method according to claim 6 or 7, wherein: The preset number of points is 3, and the preset number is 24.

9. A memory, characterized in that: The test is performed using the memory testing method according to any one of claims 1 to 8.

10. An electronic device, characterized in that: Comprising the memory as claimed in claim 9.

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