Inverter DC bus correction method and system based on dynamic voltage feedback

Abstract

The present invention relates to the field of inverter correction technology, specifically a method and system for inverter DC bus correction based on dynamic voltage feedback. The method specifically comprises: dynamically controlling the activation mode of a voltage sensor array according to a fluctuation state; constructing a DC bus voltage deviation model including a dead-zone compensation voltage and a voltage ripple spectrum model including PWM carrier sideband harmonics; obtaining a first adjustment parameter and a second adjustment parameter, respectively; generating a zero-sequence voltage injection instruction according to the second adjustment parameter, and implementing DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio. The present invention solves the problem in the prior art that the DC bus voltage under dynamic operating conditions has the risk of correction mismatch, harmonic amplification, and even capacitor overheating, which seriously restricts system stability and device life.

Description

Technical Field

[0001] The present invention relates to the technical field of frequency converter correction, in particular to a frequency converter DC bus correction method and system based on dynamic voltage feedback. Background Art

[0002] In the field of inverter DC bus voltage control, existing technologies typically employ static compensation strategies or single-dimensional ripple suppression methods, making them ineffective in addressing the coupling of dynamic disturbances under complex operating conditions. Key technical bottlenecks include: first, a lack of a coordinated monitoring mechanism for grid fluctuations and sudden load changes. Traditional voltage sampling schemes often operate at a fixed frequency, failing to dynamically improve sensing accuracy during critical periods such as grid voltage imbalance or motor torque steps, resulting in the loss of key transient characteristic data. Second, DC bus voltage deviation correction and ripple suppression models are separated, with dead-zone compensation models often focusing solely on compensating for steady-state voltage losses, resulting in a one-sided correction logic. Third, existing technologies lack adaptive correction parameters, and load sudden change sensitivity assessment often relies on low-sensitivity indicators such as load fluctuation differences, leading to under- or over-compensation under sudden load conditions. Furthermore, existing technologies cannot accurately identify overmodulation risks and lack analysis of the coupling mechanism underlying ripple sources. Existing methods lack real-time quantification of ripple surges caused by modulation wave distortion (such as three-phase imbalance) and the overmodulation operating region, resulting in delayed high-frequency oscillation suppression. In summary, these technical issues can lead to DC bus voltage correction mismatch, harmonic amplification, and even capacitor overheating risks under dynamic operating conditions, seriously restricting system stability and device life. Summary of the Invention

[0003] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the abstract and title of this application to avoid obscuring the purpose of this section, the abstract and the title of the invention, and such simplifications or omissions should not be used to limit the scope of the present invention.

[0004] The technical problem to be solved by the present invention is that in the prior art, the DC bus voltage has the risk of correction mismatch, harmonic amplification and even capacitor overheating under dynamic working conditions, which seriously restricts the system stability and device life. A method and system for inverter DC bus correction based on dynamic voltage feedback are proposed.

[0005] In order to achieve the above object, the technical solution of the inverter DC bus correction method based on dynamic voltage feedback of the present invention includes the following steps:

[0006] S1: Real-time monitoring of the fluctuation state of the dq-axis components of the grid-side input voltage and the motor load-side output current, and dynamic control of the activation mode of the voltage sensor array based on the fluctuation state;

[0007] S2: Extract the DC bus voltage data collected by the voltage sensor array when the inverter is in operation, and construct a DC bus voltage deviation model including the dead-zone compensation voltage and a voltage ripple spectrum model including the PWM carrier sideband harmonics;

[0008] S3: extracting dynamic deviation characteristic data from the DC bus voltage deviation model, calculating the inverter load sudden change sensitivity as a first correction effectiveness, and adjusting the initial correction parameters of the inverter correction module according to the first correction effectiveness to obtain a first adjustment parameter;

[0009] S4: Extract the spectrum feature data from the voltage ripple spectrum model, calculate the DC bus voltage ripple coefficient including the IGBT switching frequency coupling term in real time, and draw a trend curve of the DC bus voltage ripple coefficient over time with the overmodulation region marked;

[0010] S5: Marking data sampling points of the voltage sensor array in the DC bus voltage ripple coefficient versus time trend curve, evaluating the second correction effectiveness, and generating a second adjustment parameter according to the second correction effectiveness;

[0011] S6: Generate a zero-sequence voltage injection instruction according to the second adjustment parameter, and implement DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio.

[0012] Preferably, in S1, the real-time monitoring of the dq-axis component fluctuation states of the grid-side input voltage and the motor load-side output current includes:

[0013] Preset voltage imbalance threshold and current torque mutation rate threshold ;

[0014] Clarke transformation is performed on the grid side input voltage. When the amplitude of the negative sequence component exceeds When the power grid is abnormal, the corresponding period will be marked as the key monitoring period for abnormal power grid fluctuations;

[0015] Perform Park transformation on the load side output current. When the q-axis current component change rate exceeds When the load is suddenly changed, the corresponding period will be marked as the key monitoring period for load mutation.

[0016] Preferably, in S1, the activation mode of the dynamic control voltage sensor array includes:

[0017] Key monitoring periods for abnormal fluctuations in synchronous power grids and sudden load changes;

[0018] The high sampling rate mode of the four voltage sensors is activated by the gate drive circuit, including:

[0019] The first voltage sensor monitors the voltage between the positive pole of the DC bus and the ground terminal of the IGBT heat sink; the second voltage sensor monitors the voltage between the negative pole of the DC bus and the ground terminal of the IGBT heat sink; the third voltage sensor monitors the voltage drop of the equivalent series resistance of the filter capacitor at the DC input end of the inverter bridge; the fourth voltage sensor monitors the voltage drop of the pulsating current output by the rectifier bridge on the DC link smoothing inductor.

[0020] Preferably, in S3, the first correction effectiveness The calculation strategy is as follows:

[0021] ;

[0022] Among them, in the key monitoring period of abnormal power grid fluctuations, 1 millisecond is used as the correction validity unit analysis time, and X analysis periods are divided;

[0023] are the real-time voltage deviations of the DC bus in the xth, x-1, and x+1 time periods respectively; is the DC bus rated voltage;

[0024] is the real-time IGBT switching frequency; is the base switching frequency.

[0025] Preferably, in S3, the first adjustment parameter The acquisition strategy includes: extracting initial calibration parameters Then calculate the ratio of the IGBT dead time to the DC bus filter capacitor thermal time constant, and use the natural constant e to index the negative value of the ratio, multiply the indexed result by the first adjustment coefficient and the first correction effectiveness, and add 1, and then pass the initial correction parameter Multiply it by the sum of the product plus 1 to get the first adjustment parameter .

[0026] Preferably, S4 includes the specific steps of:

[0027] S41: Obtaining the PWM sideband energy distribution in the voltage ripple spectrum model;

[0028] S42: Calculates the DC bus voltage ripple coefficient in real time based on the voltage ripple caused by PWM switching and parasitic effects ;

[0029] S43: Draw a trend curve of the DC bus voltage ripple coefficient over time. In the trend curve, mark the area where the voltage ripple coefficient suddenly increases as the inverter overmodulation working area. Simultaneously calculate the overmodulation intensity coefficient of each overmodulation working area. The overmodulation intensity coefficient is equal to the DC bus voltage ripple coefficient corresponding to the overmodulation working area. and overmodulation threshold ratio.

[0030] Preferably, S5 includes the specific steps of:

[0031] S51: In the trend curve of the DC bus voltage ripple coefficient changing with time, mark the sampling point set of the voltage sensor array , is the sampling time;

[0032] S52: Based on the sampling point set of the voltage sensor array, the ripple variation amplitude within the switching cycle is evaluated to obtain the basic dynamic response coefficient ;

[0033] S53: extracting the overmodulation intensity coefficient of each overmodulation working area outputted in step S43, and constructing an overmodulation indication function, specifically: ;in, is the overmodulation indicator function;

[0034] S54: Evaluate the instantaneous value of the three-phase voltage and obtain the instantaneous dispersion of the phase-to-phase voltage of the three-phase modulation wave ;

[0035] S55: Perform weighted summation on the output of the overmodulation indicator function and the instantaneous dispersion K of the phase-to-phase voltage, and multiply the weighted summation by the basic dynamic response coefficient to obtain the second correction effectiveness. ;

[0036] S56: Extracting the first adjustment parameter output from step S3 And the second correction validity output in step S55 , using the second adjustment coefficient Multiply by the second correction validity To control the correction strength, first adjust the parameter Based on the multiplication and superposition of the modulation imbalance effect, the second adjustment parameter is obtained .

[0037] Preferably, S6 includes:

[0038] S61: Extracting the second adjustment parameter output in step S5 , and generate a zero-sequence voltage injection instruction;

[0039] S62: superimposing the zero-sequence voltage outputted in step S61 onto the three-phase modulation wave of the space vector modulator;

[0040] S63: Adjust the DC bus voltage operating point by changing the zero-sequence component.

[0041] In addition, the inverter DC bus correction system based on dynamic voltage feedback of the present invention includes the following modules:

[0042] a sensor activation module, a dead zone compensation model construction module, a sideband analysis model construction module, a first adjustment parameter acquisition module, a second adjustment parameter acquisition module, and a zero-sequence injection execution module;

[0043] The sensor activation module dynamically controls the activation mode of the voltage sensor array according to the fluctuation state;

[0044] The dead zone compensation model construction module is used to extract the DC bus voltage data under the inverter operation state collected by the voltage sensor array, and construct a DC bus voltage deviation model including the dead zone compensation voltage;

[0045] The sideband analysis model building module is used to extract the DC bus voltage data under the inverter operation state collected by the voltage sensor array and build a voltage ripple spectrum model including PWM carrier sideband harmonics;

[0046] The first adjustment parameter acquisition module is used to extract dynamic deviation characteristic data from the DC bus voltage deviation model, calculate the inverter load sudden change sensitivity as the first correction effectiveness, and adjust the initial correction parameter of the inverter correction module according to the first correction effectiveness to obtain the first adjustment parameter;

[0047] The second adjustment parameter acquisition module is used to evaluate the second correction effectiveness and generate a second adjustment parameter according to the second correction effectiveness;

[0048] The zero-sequence injection execution module generates a zero-sequence voltage injection instruction according to the second adjustment parameter, and implements DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio.

[0049] Compared with the existing technology, the present invention achieves the following technical effects in DC bus voltage stability control by integrating multi-dimensional dynamic monitoring and collaborative correction mechanisms:

[0050] 1. This invention significantly enhances dynamic response accuracy and anti-interference capabilities under complex operating conditions. By dynamically activating a high-bandwidth sensor array in response to the coordinated triggering of grid anomalies and sudden load changes, it accurately captures the dead-zone effect, PWM sideband harmonics, and the coupling characteristics of parasitic parameters during transient processes. This solves the correction lag problem caused by data loss during critical periods in traditional fixed sampling modes.

[0051] 2. This invention establishes a coordinated suppression system for voltage deviation and high-frequency ripple, dynamically linking the dead-zone compensation model with the ripple spectrum model. This system optimizes initial correction parameters in real time by quantifying load mutation sensitivity (i.e., the first correction effectiveness). Furthermore, it dynamically integrates multiple constraints, such as IGBT switching loss, capacitor thermal inertia, and three-phase modulation imbalance, by combining the evolution trend of the ripple coefficient in the overmodulation region (i.e., the second correction effectiveness). This fundamentally avoids the risk of undercompensation or oscillation associated with a single compensation strategy under variable-frequency operating conditions.

[0052] 3. The present invention realizes intelligent closed-loop optimization of zero-sequence injection correction. Based on the adjustment parameters generated by the dual correction effectiveness, the DC bus operating point is dynamically adjusted through a smooth injection mechanism based on ripple acceleration perception. While suppressing low-frequency voltage deviations, high-frequency harmonic energy is actively eliminated. This not only overcomes the overmodulation deterioration problem caused by traditional static injection, but also significantly improves system reliability through capacitor current stress balancing.

[0053] In summary, the synergistic mechanism of the present invention can demonstrate good voltage ripple suppression capability and device protection effect under grid fluctuations, load steps and overmodulation conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort. Among them:

[0055] Figure 1 Schematic diagram of the flow of the inverter DC bus correction method based on dynamic voltage feedback of the present invention;

[0056] Figure 2 The figure is a structural diagram of the inverter DC bus correction system based on dynamic voltage feedback of the present invention. DETAILED DESCRIPTION

[0057] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0058] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0059] Secondly, the term "one embodiment" or "embodiment" herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in various places throughout this specification does not necessarily refer to the same embodiment, nor does it refer to a separate or selective embodiment that is mutually exclusive of other embodiments.

[0060] Example 1:

[0061] like Figure 1 As shown, the inverter DC bus correction method based on dynamic voltage feedback according to the embodiment of the present invention is as follows: Figure 1 As shown, the specific steps are as follows:

[0062] S1: Use high-bandwidth differential voltage sensors to monitor the fluctuation status of the d / q axis components of the grid-side input voltage and the motor load-side output current in real time, and dynamically control the activation mode of the voltage sensor array based on the fluctuation status;

[0063] In S1, the real-time monitoring of the dq-axis component fluctuation state of the grid-side input voltage and the motor load-side output current includes:

[0064] Preset voltage imbalance threshold and current torque mutation rate threshold ;

[0065] Clarke transformation is performed on the grid side input voltage. When the amplitude of the negative sequence component exceeds When the power grid is abnormal, the corresponding period will be marked as the key monitoring period for abnormal power grid fluctuations;

[0066] Perform Park transformation on the load side output current. When the q-axis current component change rate exceeds When the load is suddenly changed, the corresponding period will be marked as the key monitoring period for load mutation.

[0067] In S1, the activation mode of the dynamic control voltage sensor array includes:

[0068] Key monitoring periods for abnormal fluctuations in synchronous power grids and sudden load changes;

[0069] The high sampling rate mode of the four voltage sensors is activated by the gate drive circuit, including:

[0070] The first voltage sensor monitors the voltage (including common-mode noise) between the positive pole of the DC bus and the ground terminal of the IGBT heat sink; the second voltage sensor monitors the voltage between the negative pole of the DC bus and the ground terminal of the IGBT heat sink; the third voltage sensor monitors the equivalent series resistance (ESR) voltage drop of the filter capacitor at the DC input end of the inverter bridge; the fourth voltage sensor monitors the voltage drop of the pulsating current output by the rectifier bridge on the DC link smoothing inductor.

[0071] S2: Extract the DC bus voltage data collected by the voltage sensor array when the inverter is in operation, and construct a DC bus voltage deviation model including the dead-zone compensation voltage and a voltage ripple spectrum model including the PWM carrier sideband harmonics;

[0072] S3: extracting dynamic deviation characteristic data from the DC bus voltage deviation model, calculating the inverter load sudden change sensitivity as a first correction effectiveness, and adjusting the initial correction parameters of the inverter correction module according to the first correction effectiveness to obtain a first adjustment parameter;

[0073] In S3, the first correction effectiveness The calculation strategy is as follows:

[0074] ;

[0075] Among them, in the key monitoring period of abnormal power grid fluctuations, 1 millisecond is used as the correction validity unit analysis time, and X analysis periods are divided;

[0076] are the real-time voltage deviations of the DC bus in the xth, x-1, and x+1 time periods respectively; is the DC bus rated voltage;

[0077] is the real-time IGBT switching frequency; is the base switching frequency.

[0078] It should be noted that It is used to quantify the acceleration of voltage mutation and reflect the sensitivity of load mutation. When the load suddenly changes, the motor torque jumps, followed by a sudden change in the DC bus current, and then the voltage change rate increases sharply, and then the second-order difference value soars. Conversely, when operating in steady state, the voltage changes smoothly, so the second-order difference approaches 0.

[0079] For the frequency coupling term When the switching frequency increases, the IGBT switching loss causes the DC bus ripple to increase. Therefore, in this embodiment, the frequency coupling term is used to achieve a dynamic increase in the correction weight of the high-frequency working condition, thereby avoiding undercompensation in the prior art during variable frequency operation.

[0080] The second-order difference used in the first correction effectiveness calculation strategy provided in this embodiment has higher sensitivity than the first-order difference and can more directly characterize the load mutation.

[0081] The first correction effectiveness calculation strategy provided in this embodiment aims to dynamically quantify the impact of load mutation and switching frequency on the DC bus to avoid under-compensation or over-compensation in variable frequency operation of the prior art. When the load mutation occurs, the second-order voltage difference increases, and the first correction effectiveness At the same time, the higher the switching frequency, the greater the correction requirement.

[0082] In S3, the first adjustment parameter The acquisition strategy includes: extracting initial calibration parameters Then calculate the ratio of the IGBT dead time to the DC bus filter capacitor thermal time constant, and use the natural constant e to index the negative value of the ratio, multiply the indexed result by the first adjustment coefficient and the first correction effectiveness, and add 1, and then pass the initial correction parameter Multiply it by the sum of the product plus 1 to get the first adjustment parameter .

[0083] Exemplarily, in this embodiment, a first adjustment parameter is provided. The acquisition strategy is as follows:

[0084] ;

[0085] in, is the initial correction parameter (compensation gain or filter cutoff frequency);

[0086] is the first adjustment coefficient; is the IGBT dead time. The longer the IGBT dead time is, the greater the voltage loss will be.

[0087] is the thermal time of the DC bus filter capacitor; it should be noted that the increase in capacitor temperature will lead to an increase in its equivalent series resistance (ESR), further affecting voltage stability and ripple. In this embodiment, a first adjustment parameter is provided. The exponential term in is intended to indicate that a stronger correction is required when the dead zone is long or the thermal state of the capacitor is poor.

[0088] It should be noted that, for the first adjustment parameter provided in this embodiment The acquisition strategy, in which the exponential decay term, when the IGBT dead time The longer it is, the greater the IGBT conduction loss is, and a stronger correction is required. However, directly increasing it proportionally will lead to over-correction, because the thermal inertia of the capacitor will delay the temperature rise, and the correction strength needs to be dynamically attenuated. Therefore, the thermal time constant of the DC bus filter capacitor is introduced; when Much smaller than When (such as low power condition), the index is close to 1, and the correction intensity fully responds to the electrical demand; near When the load is too high (such as in high-power conditions), the exponential decays to 1 / e, preventing the capacitor from overheating due to continuous high current.

[0089] For a first adjustment parameter provided in this embodiment The calculation strategy of the correction logic is: the first correction is effective The larger the value, the greater the correction intensity increase, which can avoid capacitor overheating caused by continuous strong correction during long dead time, strike a balance between loss (need strong correction) and thermal inertia (need attenuation), resolve the contradiction between strong correction demand and thermal runaway risk, and extend capacitor life.

[0090] S4: Extract the spectrum feature data from the voltage ripple spectrum model, calculate the DC bus voltage ripple coefficient including the IGBT switching frequency coupling term in real time, and draw a trend curve of the DC bus voltage ripple coefficient over time with the overmodulation region marked;

[0091] S4 includes the following specific steps:

[0092] S41: Obtaining the PWM sideband energy distribution in the voltage ripple spectrum model;

[0093] S42: Calculates the DC bus voltage ripple coefficient in real time based on the voltage ripple caused by PWM switching and parasitic effects ;

[0094] For example, in this embodiment, a strategy for obtaining a DC bus voltage ripple coefficient is provided, specifically:

[0095] First, according to the capacitor energy formula, the voltage ripple change component caused by the low-frequency harmonic energy and the PWM switching sideband harmonic energy is simultaneously evaluated to obtain the low-frequency harmonic term and PWM harmonic terms According to the formula of the induced electromotive force of the inductor, the voltage ripple change component caused by the current mutation on the parasitic inductance is evaluated to obtain the parasitic effect term ;

[0096] Then, for the low-frequency harmonic terms , PWM harmonic terms and parasitic effects Perform weighted fusion separately;

[0097] Finally, divide the weighted fusion result by the DC bus rated voltage Get the DC bus voltage ripple coefficient ;

[0098] Exemplarily, in this embodiment, the low-frequency harmonic term is specifically: ;

[0099] Where, C is the DC bus capacitance; is the DC bus rated voltage; is the accumulated energy of low-frequency harmonics within the monitoring window;

[0100] In this embodiment, the PWM harmonic term is specifically: ;

[0101] in, is the total energy of the PWM sideband; ; is the PWM sideband energy density; is the PWM carrier frequency, Bandwidth for sideband analysis;

[0102] For low-frequency harmonics , PWM harmonic terms , it should be noted that according to the capacitor energy formula, that is, , E is the energy stored in the capacitor, C is the capacitance, and V is the voltage across the capacitor;

[0103] When the energy changes, the change in voltage can be expressed as: ;

[0104] In this embodiment, the parasitic effect term is specifically: ;

[0105] in, It is the parasitic inductance of the PCB circuit; is the DC link current change rate;

[0106] For parasitic effects It should be noted that according to the induced electromotive force formula of the inductor, that is, , so when the DC link current change rate When the parasitic inductance is large An induced voltage will be generated on the DC bus, which will be directly superimposed on the DC bus to form a voltage ripple variation component;

[0107] It should be noted that, in this embodiment, the DC bus voltage ripple coefficient is intended to comprehensively quantify the severity of the DC bus voltage ripple, and it also takes into account the low-frequency harmonics. , PWM harmonic terms and parasitic effects , is an indicator of multi-factor coupling;

[0108] Among them, the low-frequency harmonic term is intended to characterize the low-frequency disturbances caused by the grid side or the load side (such as grid voltage imbalance, load torque fluctuation, etc.). These disturbances are transmitted to the DC bus through the system and manifest as low-frequency energy fluctuations. The PWM harmonic term is intended to characterize the high-frequency harmonics generated by the PWM switching action of the inverter, which are concentrated near the carrier frequency (sideband energy) and transmitted through the DC link. The parasitic effect term is intended to characterize the induced voltage generated on the parasitic inductance due to the parasitic inductance of the PCB traces or connecting wires when the DC current changes rapidly (such as at the moment of IGBT switching). The weight coefficient in this embodiment is used to adjust the contribution ratio of each item to the total ripple factor.

[0109] S43: Draw a trend curve of the DC bus voltage ripple coefficient over time. In the trend curve, mark the area where the voltage ripple coefficient suddenly increases as the inverter overmodulation working area. Simultaneously calculate the overmodulation intensity coefficient of each overmodulation working area. The overmodulation intensity coefficient is equal to the DC bus voltage ripple coefficient corresponding to the overmodulation working area. and overmodulation threshold ratio.

[0110] It should be noted that when the DC bus voltage ripple coefficient The overmodulation area is marked when there is a sudden increase. Although overmodulation can increase the output voltage, it will significantly increase the ripple and harmonics of the output voltage and DC bus voltage, causing greater voltage stress on devices such as IGBTs, and there is a risk of overvoltage breakdown.

[0111] S5: Marking data sampling points of the voltage sensor array in the DC bus voltage ripple coefficient versus time trend curve, evaluating the second correction effectiveness, and generating a second adjustment parameter according to the second correction effectiveness;

[0112] S5 includes the following specific steps:

[0113] S51: In the trend curve of the DC bus voltage ripple coefficient changing with time, mark the sampling point set of the voltage sensor array , is the sampling time;

[0114] S52: Based on the sampling point set of the voltage sensor array, the ripple variation amplitude within the switching cycle is evaluated to obtain the basic dynamic response coefficient ;

[0115] For example, in this embodiment, a method is provided to obtain a basic dynamic response coefficient by evaluating the ripple variation amplitude within a switching cycle. The implementation method is as follows:

[0116] ;

[0117] in, is the minimum control period of the switch, which is used to normalize the rate of change to the switching time scale; Indicates the instantaneous change rate of the ripple coefficient, which reflects the deterioration trend of the DC bus voltage ripple. A positive value indicates that the ripple is intensifying, while a negative value indicates that the ripple is attenuating. However, in this embodiment, the degree of deterioration is more important, so the absolute value is used to quantify the degree of deterioration.

[0118] S53: extracting the overmodulation intensity coefficient of each overmodulation working area outputted in step S43, and constructing an overmodulation indication function, specifically: ;in, is the overmodulation indicator function;

[0119] S54: Evaluate the instantaneous value of the three-phase voltage and obtain the instantaneous dispersion of the phase-to-phase voltage of the three-phase modulation wave ;

[0120] For example, in this embodiment, a method for obtaining the instantaneous dispersion of the phase-to-phase voltage by evaluating the instantaneous value of the three-phase voltage is further provided, specifically: first, the instantaneous voltage value of the three-phase modulation wave at a specific sampling moment is obtained; then, the voltage difference between each two phases (including three groups AB, BC, and CA) is calculated; then, the squares of these differences are added and divided by 3 to obtain the mean square deviation; then, the square root of the mean square deviation is taken to obtain the root mean square deviation of the phase-to-phase voltage; finally, the root mean square deviation is divided by the rated voltage of the DC bus for normalization, and finally, a phase-to-phase voltage instantaneous dispersion that characterizes the degree of asymmetry between the three-phase modulation wave is obtained. ;

[0121] S55: Perform weighted summation on the output of the overmodulation indicator function and the instantaneous dispersion K of the phase-to-phase voltage, and multiply the weighted summation by the basic dynamic response coefficient to obtain the second correction effectiveness. ;

[0122] For the second correction The calculation strategy of the basic dynamic response coefficient It is a basic amplifier. The faster the ripple changes, the more urgent the correction needs.

[0123] The instantaneous deviation term (i.e., the instantaneous dispersion K of the phase-to-phase voltage) and the overmodulation term (i.e., the output of the overmodulation indicator function) are root modulators. Unbalance and overmodulation are two independent and concurrent root causes of ripple degradation. Therefore, in this embodiment, a weighted summation is used to quantify the combined impact of the two.

[0124] For example, according to the second correction validity provided in this embodiment The calculation strategy is as follows: when the ripple deteriorates rapidly (i.e. the basic dynamic response coefficient large) and caused by high risk factors (the sum of the weighted sum is large), the output second correction is effective Significantly increased; and if the ripple does not deteriorate (i.e. the basic dynamic response coefficient ≈0), even if there is imbalance or overmodulation, strong correction is not triggered, which meets the actual control requirements.

[0125] S56: Extracting the first adjustment parameter output from step S3 And the second correction validity output in step S55 , using the second adjustment coefficient Multiply by the second correction validity To control the correction strength, first adjust the parameter Based on the multiplication and superposition of the modulation imbalance effect, the second adjustment parameter is obtained .

[0126] For example, in this embodiment, a strategy for obtaining a second adjustment parameter is provided, specifically:

[0127] ;

[0128] It should be noted that the second adjustment coefficient It is used to control the correction intensity and can effectively improve the system's ability to suppress modulation harmonics.

[0129] S6: Generate a zero-sequence voltage injection instruction according to the second adjustment parameter, and implement DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio.

[0130] S6 includes:

[0131] S61: Extracting the second adjustment parameter output in step S5 , and generate a zero-sequence voltage injection instruction;

[0132] For example, in this embodiment, considering the need to suppress ripple while avoiding the introduction of new oscillations, a zero-sequence voltage injection instruction is provided. The generation strategy is as follows:

[0133] ;

[0134] in, is the second adjustment parameter, which characterizes the total correction strength required by the system. The larger its value is, the stronger the zero-sequence injection is required. is the injection gain coefficient, which is used to convert the correction parameter into the actual voltage value, and is obtained through historical data fitting experiments;

[0135] It is the second-order derivative of the ripple coefficient, which characterizes the acceleration of ripple deterioration or improvement, that is, the sharpness of the change trend. The second-order inverse can be used to detect sudden ripples, such as IGBT short circuit, and can also provide early warning of oscillation risks;

[0136] is the adjustment coefficient of the smoothing function; adjust the input scale of the smoothing function to control the response sensitivity and smooth transition range of the ripple acceleration to the zero-sequence voltage command;

[0137] It should be noted that, in this embodiment, the smoothing function is used Saturation smoothing is performed on the acceleration, which aims to limit the second-order derivative to [−1,1], that is, to limit the output to ,This can avoid modulation distortion caused by excessive injection;

[0138] For a zero-sequence voltage injection instruction provided in this embodiment For example, when the ripple is stable (i.e. ≈0), when the smoothing function is approximately equal to 0, the zero-sequence injection is 0; and when the ripple accelerates (i.e. >0), when the smoothing function is greater than 0, the positive ;

[0139] S62: superimposing the zero-sequence voltage outputted in step S61 onto the three-phase modulation wave of the space vector modulator;

[0140] S63: Adjust the DC bus voltage operating point by changing the zero-sequence component.

[0141] It should be noted that, in this embodiment, the DC bus operating point is dynamically adjusted to suppress ripples through the zero-sequence voltage offset modulation wave, thereby actively stabilizing the DC bus voltage.

[0142] It should also be noted that, in this embodiment, by controlling the amount of injected zero-sequence voltage, it is possible to actively: 1. compensate for the voltage loss caused by the dead time and the conduction voltage drop (corresponding to the DC bus voltage deviation model in S2); 2. optimize the switching state sequence, reduce unnecessary switching or adjust the current path, thereby suppressing ripple of a specific frequency (corresponding to the voltage ripple spectrum model in S2), especially near the overmodulation region; 3. balance the current stress and temperature rise of the DC bus capacitor.

[0143] Example 2:

[0144] like Figure 2 As shown, the inverter DC bus correction system based on dynamic voltage feedback according to the embodiment of the present invention is as follows: Figure 2 As shown, it includes the following modules:

[0145] a sensor activation module, a dead zone compensation model construction module, a sideband analysis model construction module, a first adjustment parameter acquisition module, a second adjustment parameter acquisition module, and a zero-sequence injection execution module;

[0146] The sensor activation module dynamically controls the activation mode of the voltage sensor array according to the fluctuation state;

[0147] The dead zone compensation model construction module is used to extract the DC bus voltage data under the inverter operation state collected by the voltage sensor array, and construct a DC bus voltage deviation model including the dead zone compensation voltage;

[0148] The sideband analysis model building module is used to extract the DC bus voltage data under the inverter operation state collected by the voltage sensor array and build a voltage ripple spectrum model including PWM carrier sideband harmonics;

[0149] The first adjustment parameter acquisition module is used to extract dynamic deviation characteristic data from the DC bus voltage deviation model, calculate the inverter load sudden change sensitivity as the first correction effectiveness, and adjust the initial correction parameter of the inverter correction module according to the first correction effectiveness to obtain the first adjustment parameter;

[0150] The second adjustment parameter acquisition module is used to evaluate the second correction effectiveness and generate a second adjustment parameter according to the second correction effectiveness;

[0151] The zero-sequence injection execution module generates a zero-sequence voltage injection instruction according to the second adjustment parameter, and implements DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio.

[0152] Example 3:

[0153] This embodiment provides an electronic device, comprising: a processor and a memory, wherein the memory stores a computer program that can be called by the processor;

[0154] The processor executes the above-mentioned inverter DC bus correction method based on dynamic voltage feedback by calling the computer program stored in the memory.

[0155] This electronic device may vary significantly depending on its configuration or performance. It can include one or more processors (Central Processing Units, CPUs) and one or more memories, wherein the memories store at least one computer program, which is loaded and executed by the processor to implement the inverter DC bus correction method based on dynamic voltage feedback provided in the above-mentioned method embodiment. The electronic device can also include other components for implementing the device's functions. For example, the electronic device can also include components such as a wired or wireless network interface and input / output interfaces for data input and output. This embodiment is not described in detail here.

[0156] Example 4:

[0157] This embodiment provides a computer-readable storage medium having a rewritable computer program stored thereon;

[0158] When the computer program is run on a computer device, the computer device is caused to execute the above-mentioned inverter DC bus correction method based on dynamic voltage feedback.

[0159] For example, computer-readable storage media can be read-only memory (ROM), random access memory (RAM), compact disc read-only memory (CD-ROM), magnetic tape, floppy disk, and optical data storage device.

[0160] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0161] It should be understood that determining B based on A does not mean determining B based solely on A. B can also be determined based on A and / or other information.

[0162] The above embodiments can be implemented in whole or in part via software, hardware, firmware, or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. A computer program product comprises one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the processes or functions according to the embodiments of the present invention are fully or partially generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. Computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, computer instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via a wired network or / and a wireless network. The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server or data center that contains a collection of one or more available media. Available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media. The semiconductor media can be a solid-state drive.

[0163] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the present invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0164] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0165] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of units is only one type. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0166] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0167] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0168] Throughout this specification, references to terms such as "one embodiment," "example," or "specific example" indicate that the specific features, structures, materials, or characteristics described in conjunction with that embodiment or example are included in at least one embodiment or example of the present invention. In this specification, schematic representations of these terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0169] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for correcting the DC bus of an inverter based on dynamic voltage feedback, characterized in that: The method comprises: S1: monitors the fluctuation status of the dq-axis components of the grid-side input voltage and the motor load-side output current in real time, and dynamically controls the activation mode of the voltage sensor array according to the fluctuation status; S2: Extract the DC bus voltage data collected by the voltage sensor array when the inverter is in operation, and construct a DC bus voltage deviation model including the dead-zone compensation voltage and a voltage ripple spectrum model including the PWM carrier sideband harmonics; S3: extracting dynamic deviation characteristic data from the DC bus voltage deviation model, calculating the inverter load sudden change sensitivity as a first correction effectiveness, and adjusting the initial correction parameters of the inverter correction module according to the first correction effectiveness to obtain a first adjustment parameter; In S3, the first correction effectiveness The calculation strategy is as follows: ； Among them, in the key monitoring period of abnormal power grid fluctuations, 1 millisecond is used as the correction validity unit analysis time, and X analysis periods are divided; are the real-time voltage deviations of the DC bus in the xth, x-1, and x+1 time periods respectively; is the DC bus rated voltage; is the real-time IGBT switching frequency; is the reference switching frequency; S4: Extract the spectrum feature data from the voltage ripple spectrum model, calculate the DC bus voltage ripple coefficient including the IGBT switching frequency coupling term in real time, and draw a trend curve of the DC bus voltage ripple coefficient over time with the overmodulation region marked; S4 includes the following specific steps: S41: Obtaining the PWM sideband energy distribution in the voltage ripple spectrum model; S42: Calculates the DC bus voltage ripple coefficient in real time based on the voltage ripple caused by PWM switching and parasitic effects ; S43: Draw a trend curve of the DC bus voltage ripple coefficient over time. In the trend curve, mark the area where the voltage ripple coefficient suddenly increases as the inverter overmodulation working area. Simultaneously calculate the overmodulation intensity coefficient of each overmodulation working area. The overmodulation intensity coefficient is equal to the DC bus voltage ripple coefficient corresponding to the overmodulation working area. and overmodulation threshold The ratio of S5: Marking data sampling points of the voltage sensor array in the DC bus voltage ripple coefficient versus time trend curve, evaluating the second correction effectiveness, and generating a second adjustment parameter according to the second correction effectiveness; S5 includes the following specific steps: S51: In the trend curve of the DC bus voltage ripple coefficient over time, mark the sampling point set of the voltage sensor array , is the sampling time; S52: Based on the sampling point set of the voltage sensor array, the ripple variation amplitude within the switching cycle is evaluated to obtain the basic dynamic response coefficient ; S53: extracting the overmodulation intensity coefficient of each overmodulation working area outputted in step S43, and constructing an overmodulation indication function, specifically: ;in, is the overmodulation indicator function; S54: Evaluate the instantaneous value of the three-phase voltage and obtain the instantaneous dispersion of the phase-to-phase voltage of the three-phase modulation wave ; S55: Perform weighted summation on the output of the overmodulation indicator function and the instantaneous dispersion K of the phase-to-phase voltage, and multiply the weighted summation by the basic dynamic response coefficient to obtain the second correction effectiveness. ; S56: Extracting the first adjustment parameter output in step S3 And the second correction validity output in step S55 , using the second adjustment coefficient Multiply by the second correction validity To control the correction strength, first adjust the parameter Based on the multiplication and superposition of the modulation imbalance effect, the second adjustment parameter is obtained ; S6: Generate a zero-sequence voltage injection instruction according to the second adjustment parameter, and implement DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio.

2. The inverter DC bus correction method based on dynamic voltage feedback according to claim 1, characterized in that: In S1, the real-time monitoring of the dq-axis component fluctuation state of the grid-side input voltage and the motor load-side output current includes: Preset voltage imbalance threshold and current torque mutation rate threshold ; Clarke transformation is performed on the grid side input voltage. When the amplitude of the negative sequence component exceeds When the power grid is abnormal, the corresponding period will be marked as the key monitoring period for abnormal power grid fluctuations; Perform Park transformation on the load side output current. When the q-axis current component change rate exceeds When the load is suddenly changed, the corresponding period will be marked as the key monitoring period for load mutation.

3. The inverter DC bus correction method based on dynamic voltage feedback according to claim 2, characterized in that: In S1, the activation mode of the dynamic control voltage sensor array includes: Key monitoring periods for abnormal fluctuations in synchronous power grids and sudden load changes; The high sampling rate mode of the four voltage sensors is activated by the gate drive circuit, including: The first voltage sensor monitors the voltage between the positive pole of the DC bus and the ground terminal of the IGBT heat sink; the second voltage sensor monitors the voltage between the negative pole of the DC bus and the ground terminal of the IGBT heat sink; the third voltage sensor monitors the voltage drop of the equivalent series resistance of the filter capacitor at the DC input end of the inverter bridge; the fourth voltage sensor monitors the voltage drop of the pulsating current output by the rectifier bridge on the DC link smoothing inductor.

4. The inverter DC bus correction method based on dynamic voltage feedback according to claim 3, characterized in that: In S3, the first adjustment parameter The acquisition strategy includes: extracting initial calibration parameters Then calculate the ratio of the IGBT dead time to the DC bus filter capacitor thermal time constant, and use the natural constant e to index the negative value of the ratio, multiply the indexed result by the first adjustment coefficient and the first correction effectiveness, and add 1, and then pass the initial correction parameter Multiply it by the sum of the product plus 1 to get the first adjustment parameter .

5. The inverter DC bus correction method based on dynamic voltage feedback according to claim 4, characterized in that S6 include: S61: Extracting the second adjustment parameter output in step S5 , and generate a zero-sequence voltage injection instruction; S62: superimposing the zero-sequence voltage outputted in step S61 onto the three-phase modulation wave of the space vector modulator; S63: Adjust the DC bus voltage operating point by changing the zero-sequence component.

6. A frequency converter DC bus correction system based on dynamic voltage feedback, used to implement the frequency converter DC bus correction method based on dynamic voltage feedback according to any one of claims 1 to 5, characterized in that: The system comprises: a sensor activation module, a dead zone compensation model construction module, a sideband analysis model construction module, a first adjustment parameter acquisition module, a second adjustment parameter acquisition module, and a zero-sequence injection execution module; The sensor activation module dynamically controls the activation mode of the voltage sensor array according to the fluctuation state; The dead zone compensation model construction module is used to extract the DC bus voltage data under the inverter operation state collected by the voltage sensor array, and construct a DC bus voltage deviation model including the dead zone compensation voltage; The sideband analysis model building module is used to extract the DC bus voltage data under the inverter operation state collected by the voltage sensor array and build a voltage ripple spectrum model including PWM carrier sideband harmonics; The first adjustment parameter acquisition module is used to extract dynamic deviation characteristic data from the DC bus voltage deviation model, calculate the inverter load sudden change sensitivity as the first correction effectiveness, and adjust the initial correction parameter of the inverter correction module according to the first correction effectiveness to obtain the first adjustment parameter; The second adjustment parameter acquisition module is used to evaluate the second correction effectiveness and generate a second adjustment parameter according to the second correction effectiveness; The zero-sequence injection execution module generates a zero-sequence voltage injection instruction according to the second adjustment parameter, and implements DC bus correction control by dynamically adjusting the zero-sequence voltage injection ratio.

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