Diagnostic circuit, battery management system and energy storage device

Abstract

The diagnostic circuit comprises a controller, a power supply, multiplexers and a first diagnostic sub-circuit, the multiplexers comprise a first multiplexer and a second multiplexer, the first multiplexer comprises a plurality of first control pins, first pins and second pins, the first control pins are electrically connected with the controller, and the second pins are electrically connected with the first diagnostic sub-circuit. An electrical signal on the first pin is set to a first level. The second multiplexer comprises a plurality of second control pins, a third pin and a fourth pin, the second control pins are electrically connected with the controller, and the third pin is electrically connected with the controller. The input end of the first diagnosis sub-circuit is electrically connected with the second pin, and the output end is electrically connected with the fourth pin. The diagnosis circuit is configured to respond to the fact that a channel, corresponding to the second pin, in the first multiplexer is gated and a channel, corresponding to the fourth pin, in the second multiplexer is gated, and the controller diagnoses whether the multiplexer breaks down or not based on the electric signal on the third pin.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of energy storage technology, and in particular to a diagnostic circuit, a battery management system, and an energy storage device. Background Art

[0002] A multiplexer is a digital or analog electronic switch that selects one of multiple input signals based on a strobe signal and transmits it to an output. Alternatively, it selects one of multiple outputs based on a strobe signal and transmits the input signal to that output. By controlling the strobe signal, it dynamically selects input / output channels, thereby enabling data path reuse, improving resource utilization, and reducing the number of physical connections.

[0003] Multiplexers are widely used in many scenarios such as data selection, signal routing, communication systems, memory address selection, arithmetic and logic operation control, etc. Summary of the Invention

[0004] Embodiments of the present application provide a diagnostic circuit, a battery management system, and an energy storage device for detecting whether a first multiplexer and a second multiplexer are faulty.

[0005] In a first aspect, an embodiment of the present application provides a diagnostic circuit, comprising a controller, a power supply, a multiplexer, and a first diagnostic sub-circuit. The multiplexer comprises a first multiplexer and a second multiplexer. The first multiplexer comprises a plurality of first control pins, a first pin, and a second pin, the first control pin being electrically connected to the controller, and the electrical signal on the first pin being set to a first level. The second multiplexer comprises a plurality of second control pins, a third pin, and a fourth pin, the second control pin being electrically connected to the controller, and the third pin being electrically connected to the controller. The input end of the first diagnostic sub-circuit is electrically connected to the second pin, and the output end thereof is electrically connected to the fourth pin. The power supply is electrically connected to the first multiplexer, the second multiplexer, and the first diagnostic sub-circuit, respectively.

[0006] The diagnosis circuit is used to: in response to the channel corresponding to the second pin in the first multiplexer being selected and the channel corresponding to the fourth pin in the second multiplexer being selected, the controller diagnoses whether the multiplexer fails based on the electrical signal on the third pin.

[0007] In the embodiment of the present application, the diagnostic subcircuit is electrically connected between the first multiplexer and the second multiplexer. Both multiplexers participate in the detection process, and a detection signal is used to determine whether one or both of the two multiplexers has failed. A single diagnostic process diagnoses whether one or both of the two multiplexers has failed, simplifying the diagnostic method and improving diagnostic efficiency. Furthermore, the two multiplexers share the diagnostic subcircuit, resulting in a simple circuit, high reliability, low cost, and conserving I / O port resources of the controller.

[0008] In some embodiments, the first diagnosis sub-circuit is configured such that: in response to the channel corresponding to the second pin in the first multiplexer being selected, the electrical signal at the output terminal of the first diagnosis sub-circuit is inverted.

[0009] In some embodiments, the specific structure of the first diagnostic subcircuit includes a first switch, a first resistor, a second resistor, and a third resistor. The second pin is electrically connected to the first end of the first resistor, and the second end of the first resistor, the first end of the first switch, and the first end of the second resistor are electrically connected to a first node. The second end of the first switch is electrically connected to the second end of the second resistor and then to the ground terminal, and the third end of the first switch is electrically connected to the power supply through the third resistor. The third end of the first switch, the third resistor, and the fourth pin are electrically connected to the second node. The power supply is electrically connected to the power pin and the first pin of the first multiplexer, and the first level is a high level.

[0010] The embodiment of the present application utilizes a first diagnostic sub-circuit including simple components to implement diagnosis of two multiplexers, with a simple circuit structure and low cost.

[0011] In some embodiments, the diagnostic circuit further includes a second diagnostic sub-circuit, the first multiplexer further includes a fifth pin, and the second multiplexer further includes a sixth pin. An input of the second diagnostic sub-circuit is electrically connected to the fifth pin, and an output of the second diagnostic sub-circuit is electrically connected to the sixth pin. The diagnostic circuit is further configured to: in response to the channel corresponding to the fifth pin of the first multiplexer being selected, and the channel corresponding to the sixth pin of the second multiplexer being selected, the controller diagnoses whether the multiplexer has a fault based on the electrical signal on the third pin.

[0012] The present embodiment utilizes a first diagnostic subcircuit and a second diagnostic subcircuit to diagnose faults in both diagnostic pins of the first multiplexer and / or the second multiplexer. This provides higher diagnostic accuracy and more comprehensiveness than a method that diagnoses only a single diagnostic pin. For example, the use of both diagnostic subcircuits can detect a fault where, when a strobe signal switches, the strobe channel remains stuck in the previous strobe channel but remains stuck in the previous channel.

[0013] In some embodiments, the second diagnosis sub-circuit is configured such that: in response to the channel corresponding to the fifth pin in the first multiplexer being selected, the electrical signal at the output terminal of the second diagnosis sub-circuit is inverted.

[0014] In some embodiments, the specific structure of the second diagnostic subcircuit is that the second diagnostic subcircuit includes a second switch, a third switch, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor. The fifth pin is electrically connected to the first end of the fourth resistor, and the second end of the fourth resistor, the first end of the second switch, and the first end of the fifth resistor are electrically connected to a third node. The second end of the second switch is electrically connected to the second end of the fifth resistor and then electrically connected to the ground terminal, and the third end of the second switch is electrically connected to the power supply through the sixth resistor. The third end of the second switch, the first end of the third switch, and the sixth resistor are electrically connected to the fourth node. The second end of the third switch is electrically connected to the ground terminal through the seventh resistor, the second end of the third switch, the seventh resistor, and the sixth pin are electrically connected to the fifth node, and the third end of the third switch is electrically connected to the power supply. Wherein, the power supply is electrically connected to the power pin and the first pin of the first multiplexer, and the first level is a high level.

[0015] The embodiment of the present application utilizes a second diagnostic sub-circuit including simple components to implement diagnosis of two multiplexers, with a simple circuit structure and low cost.

[0016] In some embodiments, the diagnostic circuit further includes a first capacitor and a second capacitor, wherein the first capacitor is electrically connected between the first pin and the ground terminal, and the second capacitor is electrically connected between the third pin and the ground terminal. The first capacitor is used for filtering to remove interference signals from the control signal, and the second capacitor is used for filtering to remove interference signals from the detection signal, thereby improving diagnostic accuracy.

[0017] In other embodiments, the diagnostic circuit further includes a first capacitor and a third capacitor connected in parallel, and a second capacitor, wherein the first capacitor and the third capacitor are both electrically connected between the first pin and the ground terminal, and the second capacitor is electrically connected between the third pin and the ground terminal. The first capacitor and the third capacitor have different specifications. The first capacitor and the third capacitor are used for filtering to remove interference signals in the control signal, and the second capacitor is used for filtering to remove interference signals in the detection signal, thereby improving diagnostic accuracy. Filtering with two capacitors connected in parallel can increase the frequency range of filtering compared to using a single capacitor.

[0018] In some embodiments, the first switch includes one of an N-type metal oxide semiconductor field effect transistor and an NPN bipolar transistor.

[0019] In some embodiments, the second switch includes one of an N-type metal oxide semiconductor field effect transistor and an NPN bipolar transistor.

[0020] In some embodiments, the third switch includes one of a P-type metal oxide semiconductor field effect transistor and a PNP bipolar transistor.

[0021] In a second aspect, an embodiment of the present application further provides a battery management system, comprising the diagnostic circuit described in the first aspect.

[0022] In a third aspect, an embodiment of the present application further provides an energy storage device, including a battery module and the battery management system described in the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] One or more embodiments are exemplarily described by the figures in the accompanying drawings, which are not intended to limit the embodiments. Elements with the same reference numerals in the drawings represent similar elements.

[0024] Figure 1a-Figure 1b is a schematic structural diagram of a multiplexer in an embodiment of the present application;

[0025] Figure 2 This is a schematic diagram of an application scenario in which an embodiment of the present application is applied to dry contact detection;

[0026] Figure 3 1 is a schematic structural diagram of a dry contact detection circuit in an application scenario of an embodiment of the present application;

[0027] Figure 4a is a schematic structural diagram of a switch circuit in an application scenario of an embodiment of the present application;

[0028] Figure 4b is a schematic structural diagram of a detection circuit in an application scenario of an embodiment of the present application;

[0029] Figure 5a-5c is a schematic diagram of a multiplexer diagnostic circuit according to an embodiment of the present application;

[0030] Figure 6a-6d is a schematic diagram of a diagnostic circuit according to an embodiment of the present application;

[0031] Figure 7 This is a schematic diagram of the first diagnostic sub-circuit in the diagnostic circuit of an embodiment of the present application;

[0032] Figure 8 is a schematic diagram of the second diagnostic sub-circuit in the diagnostic circuit of an embodiment of the present application;

[0033] Figure 9a-9c This is a schematic diagram of part of the structure of the diagnostic circuit in the embodiment of the present application;

[0034] Figure 10 is a structural diagram of a battery management system according to an embodiment of the present application;

[0035] Figure 11 It is a structural diagram of the energy storage device according to an embodiment of the present application. DETAILED DESCRIPTION

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of them. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0037] In the embodiments of the present application, words such as "first" and "second" are only used to distinguish different objects and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0038] When an element is referred to as being “connected to” another element, it can be directly connected to the other element, or one or more intervening elements may be present therebetween.

[0039] In addition, the technical features involved in the various embodiments of the present application described below can be combined with each other as long as there is no structural conflict between them.

[0040] A multiplexer is a digital or analog electronic switch used to select one of multiple input / output channels as a transmission channel. A multiplexer includes at least one control terminal, multiple input / output terminals, and at least one common terminal. In one implementation of a multiplexer, the multiplexer includes at least one control pin, multiple input pins, and one output pin, enabling selection of an output from multiple input signals. In another implementation of a multiplexer, the multiplexer includes at least one control pin, one input pin, and multiple output pins, enabling selection of an output pin to output the input signal. In a narrow sense, the multiplexer in the first implementation is called a "multiplexer," and the multiplexer in the second implementation is called a "demultiplexer." In a broad sense, they are all collectively referred to as "multiplexers." Figure 1a A multiplexer in a narrow sense is shown, including four input pins I0-I3, control pins S0, S1 and an output pin Y.

[0041] In another implementation of a multiplexer, multiple input / output ports are bidirectional transmission channels, serving as either inputs or outputs. This type of multiplexer is narrowly referred to as a "bidirectional multiplexer," and broadly referred to as a "multiplexer."

[0042] Figure 1bThis diagram shows a narrowly defined "bidirectional multiplexer," comprising eight input / output pins (A0-A7), a common pin (A), and three control pins (S0-S2). The control pins receive a select signal, and the multiplexer uses this select signal to connect common pin A to one of pins (A0-A7) to implement different transmission channels. Table 1 illustrates one example of this control logic. For example, when pins (S0-S2) all receive a low level, transmission channel (A0-A) is connected. When pins (S0-S2) receive a low level, a low level, and a high level, respectively, transmission channel (A1-A) is connected.

[0043] Table 1

[0044] S0 S1 S2 Strobe Channel 0 0 0 A0—A 0 0 1 A1—A 0 1 0 A2—A 0 1 1 A3—A 1 0 0 A4—A 1 0 1 A5—A 1 1 0 A6—A 1 1 1 A7—A

[0045] In some implementations of the multiplexer, a power pin and / or an enable pin are also included.

[0046] Multiplexers are widely used in applications requiring multi-channel signal selection and management, such as data acquisition, circuit control, signal routing, and bus expansion. In embedded systems or resource-constrained hardware platforms, multiplexers can effectively conserve I / O port resources and improve hardware resource utilization.

[0047] In one application scenario, a multiplexer is used alone as a selection switch device to implement signal channel selection. In another application scenario, two or more multiplexers are combined to implement more complex signal switching and distribution logic.

[0048] The following example illustrates an application scenario of a multiplexer.

[0049] Dry contacts are passive switches, including limit switches, travel switches, foot switches, rotary switches, temperature switches, and liquid level switches. They have two states: closed and open. The two contacts of a dry contact have no polarity and are interchangeable. Dry contacts are important circuit components, offering advantages such as high reliability, strong anti-interference capabilities, and high control precision, providing crucial support for signal transmission in electronic devices.

[0050] Dry contact detection is crucial in industrial control. In some applications, dry contacts are placed along the signal transmission path of a device or equipment. By detecting the on / off state of dry contacts, the communication status and / or content between devices, equipment, or circuit boards can be monitored. In other applications, dry contact status detection enables device status monitoring and system linkage.

[0051] In one application scenario, the status of multiple dry contacts is detected by two multiplexers, the first multiplexer U1 and the second multiplexer U2. Figure 2 and Figure 3 The first multiplexer U1 and the second multiplexer U2 receive the same selection signal to control the corresponding channels. For example, when the selection signal is 000, the transmission channels A0-A of U1 and U2 are connected to detect the on / off status of dry contact 1. When the selection signal is 101, the transmission channels A5-A of U1 and U2 are connected to detect the on / off status of dry contact 6. U1 is used to send control signals, and U2 is used to receive detection signals and send them to the controller (not shown). The controller confirms the on / off status of the dry contacts based on the detection signals.

[0052] Figure 2 The example of detecting the on / off status of 6 dry contacts is used for illustration. The embodiment of the present application does not limit the number of dry contacts. In other embodiments, the number of dry contacts is 1, 2, 3, 4 or more.

[0053] Please refer to Figure 3 The control signal is used to control the switching circuit to conduct, connecting the power supply VCC and dry contact 1. When dry contact 1 and dry contact 2 are conductive, the power supply VCC is electrically connected to the detection circuit. When dry contact 1 and dry contact 2 are disconnected, the power supply VCC is disconnected from the detection circuit. The detection circuit generates different signals when connected to and disconnected from the power supply VCC, respectively, to indicate the different states of the dry contact.

[0054] Figure 4a A circuit structure of a switching circuit is shown. In this embodiment, the control signal is at a high level. After U3 receives the high level, pins 1 and 2 are turned on, thereby triggering pins 3 and 4 to turn on. Pin 4 is electrically connected to the ground terminal, triggering Q1 to turn on, and connecting the power supply VCC and dry contact 1. Figure 4a The control signal is only shown as a high level by way of example. In other embodiments, the control signal is a low level, which is not limited in the present application.

[0055] Figure 4b The following figure shows a circuit structure for a detection circuit. When dry contact 1 and dry contact 2 are disconnected, pins 3 and 4 of U4 are disconnected, and the detection signal is low (ground provides a low level). When dry contact 1 and dry contact 2 are connected, pin 1 of U4 is connected to power supply VCC, and pins 1 and 2 of U4 are connected, thereby triggering pins 3 and 4 to be connected, and the detection signal changes from low level to high level (power supply VCC2 provides a high level). The controller (not shown) confirms the on / off state of the dry contact based on the detection signal. For example, when the detection signal is low, the dry contact is disconnected, and when the detection signal is high, the dry contact is connected.

[0056] Figure 4bThe dry contact is disconnected when the detection signal is at a low level, and is connected when the detection signal is at a high level. In other embodiments, the dry contact is disconnected when the detection signal is at a high level, and is connected when the detection signal is at a low level. This is not a limitation in the present embodiment.

[0057] When using a multiplexer, if the multiplexer fails, it will affect the function implementation. Figure 2 In the embodiment, the accuracy of detecting the on-off state of the dry contact will be affected. Therefore, it is necessary to diagnose the multiplexer.

[0058] One or more pins of the multiplexer are set as diagnostic pins to diagnose whether the multiplexer is faulty. In one diagnostic method, the diagnostic pin is connected to a fixed level, and the level state of the common pin A is detected by the diagnostic circuit to determine whether the multiplexer is faulty. Figure 5a In the embodiment shown, pin A7 is set as a diagnostic pin, the selection signal is 111, and the A7-A channel is connected. If a low level is detected at the common pin A, the multiplexer is judged to be normal. If a high level is detected at the common pin, the multiplexer is judged to be faulty.

[0059] exist Figure 5b In the embodiment shown, the selection signal is 111, the A7-A channel is connected, if a high level is detected at the common pin A, it is determined that the multiplexer is normal, if a low level is detected at the common pin, it is determined that the multiplexer is faulty. Figure 5c In the illustrated embodiment, the select signals are 110 and 111, respectively. When the select signal is 110, the A6-A channel is connected, and when the select signal is 111, the A7-A channel is connected. If the status of the select signal and the common pin A are as shown in Table 2, the multiplexer is determined to be normal; otherwise, the multiplexer is determined to be faulty.

[0060] Table 2

[0061] S0 S1 S2 A pin status 1 1 0 0 1 1 1 1

[0062] In an application scenario using multiple multiplexers, this method requires setting a fixed level for each multiplexer and performing detection separately, which is a relatively cumbersome detection method.

[0063] In another diagnostic approach, a diagnostic circuit is provided, with diagnostic subcircuits electrically connected between two multiplexers. Both multiplexers participate in the detection process, and a single detection signal is used to determine whether one or both multiplexers are faulty. This single diagnostic process diagnoses whether one or both multiplexers are faulty, simplifying the diagnostic approach and improving diagnostic efficiency. Furthermore, the two multiplexers share the diagnostic subcircuit, resulting in a simple circuit, high reliability, low cost, and conserving controller I / O port resources.

[0064] Please refer to Figure 6a and Figure 6b , which is a circuit structure of a diagnostic circuit according to an embodiment of the present application. The diagnostic circuit 100 includes a multiplexer 10, a controller 20, a power supply 30, and a first diagnostic sub-circuit 40. The multiplexer 10 includes a first multiplexer 11 and a second multiplexer 12.

[0065] The first multiplexer 11 includes a first control pin (S0, S1, S2), a first pin (A) and a second pin (A6). The first control pin is electrically connected to the controller 20 and is used to receive a selection signal. The first pin is a common pin and is used to receive a control signal. Figure 6b In the illustrated embodiment, the first pin is electrically connected to the power supply VCC3, and the electrical signal on the first pin is set to a high level, which is transmitted as a control signal to the subsequent circuit. In other embodiments, the first pin is grounded, and the electrical signal on the first pin is set to a low level. Alternatively, a control unit (not shown) sends a high or low level to the first pin. The second pin serves as a diagnostic pin for the first multiplexer 11, used to diagnose whether the first multiplexer 11 has failed.

[0066] The second multiplexer 12 includes second control pins (S0, S1, S2), a third pin (A), and a fourth pin (A6). The second control pins are electrically connected to the controller 20 for receiving a selection signal. The third pin is a common pin electrically connected to the controller 20 for transmitting a detection signal to the controller 20. The controller 20 determines the fault status of the first multiplexer 11 and the second multiplexer 12 based on the detection signal. The fourth pin serves as a diagnostic pin for the second multiplexer 12 and is used to diagnose whether the second multiplexer is faulty.

[0067] The first diagnosis sub-circuit 40 is electrically connected between the first multiplexer 11 and the second multiplexer 12 , with its input end electrically connected to the diagnosis pin (second pin) of the first multiplexer 11 , and its output end electrically connected to the diagnosis pin (fourth pin) of the second multiplexer 12 .

[0068] The power supply 30 is electrically connected to the first multiplexer 11, the second multiplexer 12 and the first diagnostic sub-circuit 40, respectively, for supplying power to the first multiplexer 11, the second multiplexer 12 and the first diagnostic sub-circuit 40. The power supply 30 and the power supply VCC3 are the same power supply, or different power supplies.

[0069] Please refer to Figure 6a and Figure 6b After receiving the selection signal from controller 20, first multiplexer 11 and second multiplexer 12 each control channel A6-A to conduct. The control signal is transmitted via channel A6-A of first multiplexer 11 to first diagnostic sub-circuit 40. Based on the control signal, first diagnostic sub-circuit 40 performs corresponding actions, changing the state of its output signal. The output signal of first diagnostic sub-circuit 40 is transmitted via channel A6-A of second multiplexer 12 to its third pin (A). Controller 20 diagnoses whether first multiplexer 11 and / or second multiplexer 12 has a fault based on the electrical signal on the third pin.

[0070] Since both the first multiplexer 11 and the second multiplexer 12 participate in signal transmission during the detection process, with the first multiplexer 11 used to transmit control signals and the second multiplexer 12 used to transmit detection signals, if one or both of them fails, a correct electrical signal cannot be detected at the third pin of the second multiplexer 12. Therefore, the controller 20 determines whether the first multiplexer 11 and / or the second multiplexer 12 has failed based on whether a correct electrical signal is detected at the third pin of the second multiplexer 12.

[0071] The first diagnostic subcircuit 40 functions by changing the state of its output signal based on a control signal. The controller 20 confirms that the detection signal outputted by the third pin of the second multiplexer 12 has changed, confirming that the first multiplexer 11 and the second multiplexer 12 are functioning properly. For example, when channel A6-A is not selected, the first diagnostic subcircuit 40 outputs a first-level signal, which the controller 20 detects at the third pin (A). After channel A6-A is selected, the first diagnostic subcircuit 40 receives the control signal, causing its output signal to flip to a second-level signal, which the controller 20 detects at the third pin (A). Upon detecting a change in the detection signal from the first level to the second level at the third pin (A), the controller 20 confirms that the first multiplexer 11 and the second multiplexer 12 are functioning properly. Otherwise, the controller confirms that the first multiplexer 11 and / or the second multiplexer 12 are faulty.

[0072] In other embodiments of the diagnostic circuit 100, the fifth pin of the first multiplexer 11 is set as a diagnostic pin, and the sixth pin of the second multiplexer 12 is set as a diagnostic pin. The second diagnostic sub-circuit 50 detects whether the first multiplexer 11 and / or the second multiplexer 12 are faulty via the fifth and sixth pins. The second diagnostic sub-circuit 50 is electrically connected between the first multiplexer 11 and the second multiplexer 12, with its input electrically connected to the fifth pin of the first multiplexer 11 and its output electrically connected to the sixth pin of the second multiplexer 12.

[0073] Figure 6c Another structure of the diagnostic circuit 100 is shown. Figure 6c The diagnostic process is as follows: After receiving the selection signal from controller 20, first multiplexer 11 and second multiplexer 12 each control channel A7-A to conduct. The control signal is transmitted via channel A7-A of first multiplexer 11 to second diagnostic sub-circuit 50. Based on the control signal, second diagnostic sub-circuit 50 performs corresponding actions, changing the state of its output signal. The output signal of the second diagnostic sub-circuit is then transmitted via channel A7-A of second multiplexer 12 to its third pin (A). Controller 20 diagnoses whether first multiplexer 11 and / or second multiplexer 12 has a fault based on the electrical signal on the third pin.

[0074] The second diagnostic subcircuit 50 functions by changing its output signal based on a control signal. The controller 20 detects the change in the detection signal and confirms that the first multiplexer 11 and the second multiplexer 12 are functioning properly. For example, when the diagnostic channel A7-A is not selected, the second diagnostic subcircuit 50 outputs a second-level signal, which the controller 20 detects at the third pin (A). After channel A7-A is selected, the second diagnostic subcircuit 50 receives the control signal, causing its output signal to flip to the first-level signal, which the controller 20 detects at the third pin (A). Upon detecting the change in the detection signal from the second-level signal to the first-level signal at the third pin (A), the controller 20 confirms that the first multiplexer 11 and the second multiplexer 12 are functioning properly. Otherwise, the controller confirms that the first multiplexer 11 and / or the second multiplexer 12 are faulty.

[0075] In some embodiments, upon receiving a control signal, the first diagnostic sub-circuit 40 switches its output signal from a first-level signal to a second-level signal, and upon detecting that a detection signal on a third pin switches from a first-level signal to a second-level signal, the controller 20 confirms that the first multiplexer 11 and the second multiplexer 12 are normal. Upon receiving a control signal, the second diagnostic sub-circuit 50 switches its output signal from a second-level signal to a first-level signal, and upon detecting that a detection signal on a third pin switches from a second-level signal to a first-level signal, the controller 20 confirms that the first multiplexer 11 and the second multiplexer 12 are normal. The first-level signal and the second-level signal can be, for example, a high level and a low level, respectively, or a low level and a high level, respectively.

[0076] exist Figure 6a and Figure 6b In the illustrated embodiment, the diagnostic circuit 100 includes a first diagnostic subcircuit 40. Figure 6c In the embodiment shown, the diagnostic circuit 100 includes a second diagnostic sub-circuit 50. In other embodiments, the diagnostic circuit 100 includes a first diagnostic sub-circuit 40 and a second diagnostic sub-circuit 50. Figure 6d The input end of the first diagnostic sub-circuit 40 is electrically connected to the second pin (A6) of the first multiplexer 11, and the output end is electrically connected to the fourth pin (A6) of the second multiplexer 12. The input end of the second diagnostic sub-circuit 50 is electrically connected to the fifth pin (A7) of the first multiplexer 11, and the output end is electrically connected to the sixth pin (A7) of the second multiplexer 12.

[0077] In an embodiment including two diagnostic subcircuits, the diagnostic circuit 100 includes two diagnostic channels. The controller 20 determines that the first multiplexer 11 and the second multiplexer 12 are normal based on the following diagnostic results: a second-level signal is detected at the third pin when one diagnostic channel is turned on, and a first-level signal is detected at the third pin when the other diagnostic channel is turned on. Specifically, as shown in Table 3:

[0078] Table 3

[0079] Strobe signal Third pin status First strobe signal Second level Second selection signal First level

[0080] The first selection signal is used to turn on a diagnostic channel, for example Figure 6d Channel A6-A in the ,second selection signal is used to conduct another diagnostic channel,,for example Figure 6d Channel A7-A in.

[0081] That is, the controller 20 determines that the first and second multiplexers are normal based on "issuing a first selection signal and detecting a second-level signal at the third pin, and issuing a second selection signal and detecting a first-level signal opposite to the second-level signal at the third pin." For example, when the diagnostic results are as shown in Table 4, the first and second multiplexers are determined to be normal.

[0082] Table 4

[0083] S0 S1 S2 Third pin status 1 1 0 0 1 1 1 1

[0084] If the diagnostic results are other than the above, the controller 20 confirms that the first multiplexer and / or the second multiplexer are faulty. The diagnostic results other than the above include:

[0085] a. Sending a first strobe signal and detecting a first level signal at the third pin, sending a second strobe signal and detecting a first level signal at the third pin;

[0086] b. Sending a first strobe signal and detecting a second level signal at the third pin; sending a second strobe signal and detecting a second level signal at the third pin;

[0087] c. Sending a first selection signal and detecting a first level signal at the third pin; sending a second selection signal and detecting a second level signal at the third pin.

[0088] d. Sending a first selection signal and detecting a first level signal at the third pin; sending a second selection signal and not detecting a signal at the third pin.

[0089] e. Sending a first selection signal and detecting no signal at the third pin; sending a second selection signal and detecting a second level signal at the third pin.

[0090] f. Sending a first selection signal and detecting no signal at the third pin; sending a second selection signal and detecting a first level signal at the third pin.

[0091] i. A first selection signal is sent but no signal is detected at the third pin; a second selection signal is sent but no signal is detected at the third pin.

[0092] j. Sending a first selection signal and detecting a second level signal at the third pin; sending a second selection signal but not detecting a signal at the third pin.

[0093] Exemplarily, when the diagnosis result is as shown in any one of Table 5, it is determined that the first multiplexer and / or the second multiplexer is faulty.

[0094] Table 5

[0095] First selection signal (110) Second selection signal (111) Third pin status 1 0 Third pin status 1 1 Third pin status 1 none Third pin status 0 0 Third pin status none 0 Third pin status none 1 Third pin status none none Third pin status 0 none

[0096] Using the first and second diagnostic subcircuits to diagnose whether the first and / or second multiplexers have failed provides higher accuracy and more comprehensive diagnostics than using only a single diagnostic pin. For example, using both diagnostic subcircuits can detect a fault where, when a strobe signal switches, the strobe channel remains stuck in the previous strobe channel but remains stuck in the previous channel.

[0097] In some embodiments, the first multiplexer 11 is a demultiplexer in a narrow sense or a bidirectional multiplexer, and the second multiplexer 12 is a multiplexer in a narrow sense or a bidirectional multiplexer.

[0098] The embodiments of the present application do not limit the diagnostic pins to which each diagnostic subcircuit is connected. Where one diagnostic subcircuit is included, the diagnostic subcircuit is electrically connected between the second and fourth pins, or between the fifth and sixth pins. Where two diagnostic subcircuits are included, one diagnostic subcircuit (e.g., first diagnostic subcircuit 40) is electrically connected between the second and fourth pins, and the other diagnostic subcircuit (e.g., second diagnostic subcircuit 50) is electrically connected between the fifth and sixth pins.

[0099] Figure 6a-6d The number of pins of the first multiplexer 11 and the second multiplexer 12 is only schematically shown. In other embodiments, the number of pins is other values. This application does not limit the number of pins of the first multiplexer 11 and the second multiplexer 12.

[0100] In some embodiments, the first diagnostic subcircuit 40 includes a switch element. Before the switch element is turned on, the first diagnostic subcircuit 40 outputs a first-level signal. After the switch element is turned on based on the control signal, the first diagnostic subcircuit 40 outputs a second-level signal. The second diagnostic subcircuit 50 includes a switch element. Before the switch element is turned on, the second diagnostic subcircuit 50 outputs a second-level signal. After the switch element is turned on based on the control signal, the second diagnostic subcircuit 50 outputs a first-level signal.

[0101] Figure 7The structure of the first diagnostic subcircuit 40 is shown. The first diagnostic subcircuit 40 includes a first switch Q11, a first resistor R1, a second resistor R2, and a third resistor R3. The first end of the first resistor R1 is electrically connected to the diagnostic pin of the first multiplexer 11 (hereinafter, the second pin is used as an example for description) for receiving a control signal. The second end of the first resistor R1, the first end of the first switch Q11, and the first end of the second resistor R2 are electrically connected to a first node T1. The second end of the first switch Q11 is electrically connected to the second end of the second resistor R2 and then to the ground terminal GND. The third end of the first switch Q11 is electrically connected to a power supply through the third resistor R3. The third end of the first switch Q11, the third resistor R3, and the fourth pin are electrically connected to a second node T2. The second node T2 is used to electrically connect to the diagnostic pin of the second multiplexer 12 (hereinafter, the fourth pin is used as an example for description).

[0102] The first pin of the first multiplexer 11 is electrically connected to a power source, causing the electrical signal on the first pin to be at a high level. When the first switch Q11 is disconnected, the second node T2 is connected to the power source at a high level, and the detection signal is at a high level. After the channel corresponding to the second pin in the first multiplexer 11 is selected, the second pin is connected to the first pin, and the second pin receives a high level. This high level turns on the first switch Q11, pulling the second node T2 down to ground GND. The first diagnostic sub-circuit 40 outputs a low level, and the detection signal becomes low. The power source electrically connected to the first pin of the first multiplexer 11 and the power source electrically connected to the third resistor R3 can be the same power source or different power sources.

[0103] The embodiment of the present application utilizes a first diagnostic sub-circuit including simple components to implement diagnosis of two multiplexers, with a simple circuit structure and low cost.

[0104] Figure 8The structure of the second diagnostic subcircuit 50 is shown. The second diagnostic subcircuit 50 includes a second switch Q12, a third switch Q13, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7. The first end of the fourth resistor R4 is electrically connected to the diagnostic pin of the first multiplexer 11 (hereinafter, the fifth pin is used as an example for description) for receiving a control signal. The second end of the fourth resistor R4, the first end of the second switch Q12, and the first end of the fifth resistor R5 are electrically connected to a third node T3. The second end of the second switch Q12 is electrically connected to the second end of the fifth resistor R5 and then to the ground terminal GND. The third end of the second switch Q12 is electrically connected to the power supply via the sixth resistor R6. The third end of the second switch Q12, the first end of the third switch Q13, and the sixth resistor R6 are electrically connected to a fourth node T4. A second end of the third switch Q13 is electrically connected to the ground via the seventh resistor R7. The second end of the third switch Q13, the seventh resistor R7, and the sixth pin (a diagnostic pin of the second multiplexer 12) are electrically connected to a fifth node T5. A third end of the third switch Q13 is electrically connected to a power source.

[0105] When the second switch Q12 and the third switch Q13 are disconnected, the fifth node T5 is grounded via the seventh resistor R7, the output signal of the second diagnostic sub-circuit 50 is low, and the detection signal is low. After the channel corresponding to the fifth pin of the first multiplexer 11 is selected, the fifth pin is connected to the first pin, and the fifth pin receives a high level. This high level turns on the second switch Q12, pulling the fourth node T4 down to ground. The fourth node T4 becomes low, turning on the third switch Q13, and the fifth node T5 is pulled up to the power supply voltage. The fifth node T5 becomes high, and the detection signal becomes high. The power supply electrically connected to the first pin of the first multiplexer 11 and the power supply electrically connected to the third switch Q13 can be the same power supply or different power supplies.

[0106] The embodiment of the present application utilizes the second diagnostic sub-circuit to implement diagnosis of two multiplexers, with a simple circuit structure and low cost.

[0107] The first switch Q11 and the third switch Q13 are switches that are turned on by a high-level control signal and include one of an N-type metal oxide semiconductor field effect transistor and an NPN bipolar transistor. The second switch Q12 is a switch that is turned on by a low-level control signal and includes one of a P-type metal oxide semiconductor field effect transistor and a PNP bipolar transistor.

[0108] Exemplarily, when the first switch Q11 and the third switch Q13 are N-type metal oxide semiconductor field effect transistors and the second switch Q12 is a P-type metal oxide semiconductor field effect transistor, in the first switch Q11, the first end is the gate, the second end is the source, and the third end is the drain; in the second switch Q12, the first end is the gate, the second end is the source, and the third end is the drain; in the third switch Q13, the first end is the gate, the second end is the drain, and the third end is the source.

[0109] When the first switch Q11 and the third switch Q13 are NPN bipolar transistors and the second switch Q12 is a PNP bipolar transistor, the first end of the first switch Q11 is the base, the second end is the emitter, and the third end is the collector; the first end of the second switch Q12 is the base, the second end is the emitter, and the third end is the collector; and the first end of the third switch Q13 is the base, the second end is the collector, and the third end is the emitter.

[0110] In some embodiments, please refer to Figure 9a and Figure 9c The diagnostic circuit 100 further includes a first capacitor C1 and a second capacitor C2. The first capacitor C1 is electrically connected between the first pin of the first multiplexer U1 and the ground terminal, and the second capacitor C2 is electrically connected between the third pin of the second multiplexer U2 and the ground terminal. The first capacitor C1 is used for filtering to remove interference signals from the control signal, and the second capacitor C2 is used for filtering to remove interference signals from the detection signal, thereby improving diagnostic accuracy.

[0111] In other embodiments, please refer to Figure 9b and Figure 9c , the diagnostic circuit 100 includes a first capacitor C1 and a third capacitor C3 connected in parallel, and a second capacitor C2. The first capacitor C1 and the third capacitor C3 are connected in parallel, and are both electrically connected between the first pin of the first multiplexer U1 and the ground terminal, and the second capacitor C2 is electrically connected between the third pin of the second multiplexer U2 and the ground terminal. The first capacitor C1 and the third capacitor C3 are used for filtering to filter out interference signals in the control signal, and the second capacitor C2 is used for filtering to filter out interference signals in the detection signal to improve diagnostic accuracy. Filtering with two capacitors connected in parallel can increase the frequency band range of filtering compared to using one capacitor. Among them, the first capacitor C1 and the third capacitor C3 have different specifications, or the same specifications.

[0112] The following uses a more specific embodiment as an example to illustrate the diagnosis process of the first multiplexer 11 and the second multiplexer 12 in the embodiment of the present application. Figure 6d 、 Figure 7 and Figure 8 :

[0113] (1) The controller 20 sends a selection signal 110 to the first multiplexer 11 and the second multiplexer 12 to control the conduction of channel A6-A of the first multiplexer 11 and the second multiplexer 12. If the channel A6-A of the first multiplexer 11 and the second multiplexer 12 is normally conducted, the high level provided by VCC3 to the first pin (A) of the first multiplexer 11 is used as a control signal and is transmitted to the second pin (A6) via channel A6-A of the first multiplexer 11. The first diagnostic sub-circuit 40 inputs the above-mentioned high-level control signal, the first switch Q11 is turned on, the second node T2 is pulled down to ground, and the detection signal becomes low. The detection signal is transmitted to the third pin (A) via channel A6-A of the second multiplexer 12, and the controller 20 obtains the detection signal (hereinafter referred to as the first detection signal for ease of distinction) through the third pin.

[0114] (2) The controller 20 sends a selection signal 111 to the first multiplexer 11 and the second multiplexer 12 to control the conduction of channel A7-A of the first multiplexer 11 and the second multiplexer 12. If the channel A7-A of the first multiplexer 11 and the second multiplexer 12 is normally conducted, the high level provided by VCC3 to the first pin (A) of the first multiplexer 11 is used as a control signal and is transmitted to the fifth pin (A7) via channel A7-A of the first multiplexer 11. The second diagnostic sub-circuit 50 inputs a high level, the second switch Q12 is turned on, the fourth node T4 is pulled down to ground, triggering the third switch Q13 to turn on, the fifth node T5 is pulled up to 3.3V, the fifth node T5 is at a high level, and the detection signal becomes a high level. The detection signal is transmitted to the third pin (A) via channel A7-A of the second multiplexer 12, and the controller 20 obtains the detection signal (hereinafter referred to as the second detection signal for ease of distinction) through the third pin.

[0115] (3) The controller 20 determines whether the first multiplexer 11 and / or the second multiplexer 12 is faulty based on the first detection signal and the second detection signal. If the first detection signal and the second detection signal are low and high, respectively, the first multiplexer 11 and the second multiplexer 12 are determined to be normal. Otherwise, the first multiplexer 11 and / or the second multiplexer are determined to be faulty.

[0116] Figure 10 shows a structure of a battery management system, Figure 11The structure of an energy storage device is shown. The energy storage device 1000 includes a battery management system 1 and a battery module 2. The battery module 2 includes multiple batteries, which are electrically connected in series, parallel, or mixed (series and parallel). The battery module 2 serves as the electric energy storage module of the energy storage device 1000. The batteries include sodium ion batteries, lithium ion batteries, solid-state batteries, perovskite batteries, etc. The battery management system 1 is electrically connected to the battery module 2 and is used to manage the charging and discharging of the energy storage device 1000. The diagnostic circuit 100 provided in the above embodiments of the present application is provided in the battery management system 1. It can be understood that energy storage devices include portable energy storage devices, household energy storage devices, and industrial and commercial energy storage devices.

[0117] The above description is merely an embodiment of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

[0118] The above embodiments are only used to illustrate the technical solutions of the present application, and are not intended to limit them. Based on the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, and the steps may be implemented in any order. A person skilled in the art should understand that the technical solutions described in the above embodiments may be modified, or some of the technical features may be replaced by equivalents. However, such modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A diagnostic circuit, characterized in that: include: controller and power supply; Multiplexers, including: The first multiplexer includes: a plurality of first control pins, a first pin and a second pin, The first control pin is electrically connected to the controller, and the electrical signal on the first pin is set to a first level. The second multiplexer includes: a plurality of second control pins, a third pin and a fourth pin, The second control pin is electrically connected to the controller, and the third pin is electrically connected to the controller; a first diagnostic sub-circuit, an input end of which is electrically connected to the second pin, and an output end of which is electrically connected to the fourth pin; The power supply is electrically connected to the first multiplexer, the second multiplexer and the first diagnostic sub-circuit respectively; The diagnostic circuit is configured to: in response to the channel corresponding to the second pin in the first multiplexer being selected and the channel corresponding to the fourth pin in the second multiplexer being selected, the controller diagnoses whether the multiplexer fails based on the electrical signal on the third pin.

2. The diagnostic circuit according to claim 1, characterized in that The first diagnosis sub-circuit is configured to: in response to the channel corresponding to the second pin in the first multiplexer being selected, the electrical signal at the output end of the first diagnosis sub-circuit is inverted.

3. The diagnostic circuit according to claim 1 or 2, characterized in that: The power supply is electrically connected to the power pin and the first pin of the first multiplexer, and the first level is a high level; The first diagnostic subcircuit includes a first switch, a first resistor, a second resistor, and a third resistor. The second pin is electrically connected to the first end of the first resistor, the second end of the first resistor, the first end of the first switch, and the first end of the second resistor are electrically connected to a first node. The second end of the first switch is electrically connected to the second end of the second resistor and then electrically connected to the ground end. The third end of the first switch is electrically connected to the power supply through the third resistor. The third terminal of the first switch, the third resistor, and the fourth pin are electrically connected to a second node.

4. The diagnostic circuit according to any one of claims 1 to 3, characterized in that: The diagnostic circuit further includes: a first capacitor, electrically connected between the first pin and the ground terminal, a second capacitor electrically connected between the third pin and the ground terminal; or, a first capacitor and a third capacitor connected in parallel, wherein the first capacitor and the third capacitor are both electrically connected between the first pin and the ground terminal, A second capacitor is electrically connected between the third pin and the ground terminal. The first capacitor and the third capacitor have different specifications.

5. The diagnostic circuit according to any one of claims 1 to 4, characterized in that: The diagnostic circuit further includes: a second diagnostic subcircuit; The first multiplexer further includes a fifth pin, and the second multiplexer further includes a sixth pin; The input end of the second diagnosis sub-circuit is electrically connected to the fifth pin, and the output end of the second diagnosis sub-circuit is electrically connected to the sixth pin; The diagnostic circuit is further configured to: in response to the channel corresponding to the fifth pin in the first multiplexer being selected and the channel corresponding to the sixth pin in the second multiplexer being selected, the controller diagnoses whether the multiplexer fails based on the electrical signal on the third pin.

6. The diagnostic circuit according to claim 5, characterized in that The second diagnosis sub-circuit is configured to: in response to the channel corresponding to the fifth pin in the first multiplexer being selected, the electrical signal at the output end of the second diagnosis sub-circuit is inverted.

7. The diagnostic circuit according to claim 5 or 6, characterized in that: The power supply is electrically connected to the power pin and the first pin of the first multiplexer, and the first level is a high level; The second diagnostic subcircuit includes a second switch, a third switch, a fourth resistor, a fifth resistor, a sixth resistor, and a seventh resistor. The fifth pin is electrically connected to the first end of the fourth resistor, the second end of the fourth resistor, the first end of the second switch, and the first end of the fifth resistor are electrically connected to a third node. The second end of the second switch is electrically connected to the second end of the fifth resistor and then electrically connected to the ground end. The third end of the second switch is electrically connected to the power supply through the sixth resistor. The third end of the second switch, the first end of the third switch and the sixth resistor are electrically connected to a fourth node. The second end of the third switch is electrically connected to the ground end through the seventh resistor. The second end of the third switch, the seventh resistor, and the sixth pin are electrically connected to a fifth node. The third end of the third switch is electrically connected to the power supply.

8. The diagnostic circuit according to claim 3, characterized in that The first switch includes one of an N-type metal oxide semiconductor field effect transistor and an NPN bipolar transistor.

9. The diagnostic circuit according to claim 7, characterized in that: The second switch includes one of an N-type metal oxide semiconductor field effect transistor and an NPN bipolar transistor, The third switch includes one of a P-type metal oxide semiconductor field effect transistor and a PNP bipolar transistor.

10. A battery management system, characterized in that: The diagnostic circuit comprises the diagnostic circuit according to any one of claims 1 to 9.

11. An energy storage device comprising a battery module and the battery management system according to claim 10.

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