Switching regulator

Abstract

The invention relates to a switching regulator. A circuit includes an amplifier (306), a first transistor (308), a second transistor (310), and a third transistor (312). The amplifier (306) has a first amplifier input coupled to a voltage reference terminal, a second amplifier input, and an amplifier output. The first transistor (308) has a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output. The second transistor (310) has a first terminal coupled to the power terminal, a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output. The third transistor (312) has a first terminal coupled to the second amplifier input, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor.

Description

Technical Field

[0001] The present application relates to a switching regulator. Background Art

[0002] Digital-to-analog converters (DACs) are used in a variety of applications to convert digital values ​​into analog signals. For example, a DAC can be used with or integrated into a microcontroller or microprocessor to convert digital values ​​into analog signals. Some DACs include a resistor ladder having multiple resistors, such as SiCr thin film or polysilicon resistors, to generate an analog signal representing a digital value. Summary of the Invention

[0003] In one example, a circuit includes an amplifier, a first transistor, a second transistor, and a third transistor. The amplifier has a first amplifier input coupled to a voltage reference terminal, a second amplifier input, and an amplifier output. The first transistor has a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output. The second transistor has a first terminal coupled to the power terminal, a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output. The third transistor has a first terminal coupled to the second amplifier input, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor.

[0004] In another example, a circuit includes an amplifier, a resistor, and first, second, third, fourth, fifth, and sixth transistors. The amplifier has a first amplifier input, a second amplifier input, and an amplifier output coupled to a voltage reference terminal. The first transistor has a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output. The second transistor has a first terminal coupled to the power terminal, a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output. The third transistor has a first terminal coupled to the second amplifier input, a second terminal, and a control terminal coupled to the second terminal of the second transistor. The resistor has a first terminal coupled to the second terminal of the second transistor and a second terminal. The fourth transistor has a first terminal, a second terminal, and a control terminal coupled to the second terminal of the second transistor. The fifth transistor has a first terminal, a second terminal, and a control terminal coupled to the first terminal of the fourth transistor. The sixth transistor has a first terminal coupled to the second terminal of the fifth transistor, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the resistor.

[0005] In another example, a digital-to-analog converter includes a resistor ladder, a switching circuit, a first driver circuit, a second driver circuit, and a switching regulator circuit. The switching circuit is coupled to a rung of the resistor ladder. The switching circuit includes a first switch having a control input and a second switch having a control input. The first driver circuit has an output coupled to the control input of the first switch. The second driver circuit has an output coupled to the control input of the second switch and a voltage input. The switching regulator circuit has an output coupled to the voltage input of the second driver circuit. The switching regulator circuit includes an amplifier, a first transistor, a second transistor, and a third transistor. The amplifier has a first amplifier input coupled to a voltage reference terminal, a second amplifier input, and an amplifier output. The first transistor has a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output. The second transistor has a first terminal coupled to the power terminal, a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output. The third transistor has a first terminal coupled to the second amplifier input, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a schematic diagram of an example digital-to-analog converter (DAC).

[0007] Figure 2 Suitable for Figure 1 Schematic diagram of the switching circuit in the DAC.

[0008] Figure 3 To suit Figure 2 Schematic diagram of a switching regulator circuit used together with a switching circuit.

[0009] Figure 4 To include Figure 3 A block diagram of an example system of a switching regulator circuit. DETAILED DESCRIPTION

[0010] Figure 1 FIG1 is a schematic diagram of an example digital-to-analog converter (DAC) 100. DAC 100 includes a resistor ladder 101, a switch 105, and an amplifier 108. Resistor ladder 101 includes resistors 104A, 104B, 104C, 104D, and 104E forming the rungs of the ladder, and resistors 102A, 102B, and 102C forming the rails of the ladder. Resistors 102A, 102B, and 102C may each have a resistance R, and resistors 104A, 104B, 104C, 104D, and 104E may each have a resistance 2R.

[0011] Resistor ladder 101 is coupled to switch 105 and amplifier 108. Resistor ladder 101 binary-weights and sums the voltages provided by switch 105 to produce an output voltage provided to amplifier 108. Amplifier 108 is configured as a voltage follower having a non-inverting input coupled to resistor ladder 101 and an inverting input coupled to the output of amplifier 108. The output of amplifier 108 may be coupled to an output signal (V OUT ) any circuit system.

[0012] Switch 105 includes switches 106A, 106B, 106C, and 106D coupled to resistors 104B, 104C, 104D, and 104E, respectively. Switches 106A, 106B, 106C, and 106D are illustrated as single-pole, double-throw switches having a first terminal coupled to resistor 104 (e.g., one of resistors 104A, 104B, 104C, or 104D), a second terminal coupled to a voltage reference terminal (VREF), and a third terminal coupled to ground. Switch 106D represents the most significant bit of a digital value, and switch 106A represents the least significant bit of the digital value. Each switch 106 (e.g., switch 106A, 106B, 106C, or 106D) connects its first terminal to its second terminal if the bit of the digital value represented by the switch is a logic 1, and connects its first terminal to its third terminal if the bit is a logic 0.

[0013] Although DAC 100 is illustrated as a 4-bit DAC, examples of DAC 100 may include any number of resistors 102, resistors 104, and switches 106 to form a DAC with a different number of bits (eg, an 8-bit DAC, a 10-bit DAC, a 12-bit DAC, a 16-bit DAC, etc.).

[0014] Figure 2 FIG1 is a schematic diagram of a switch 106 suitable for use in DAC 100. As explained above, switch 106 is a unipolar, double-throw switch. Switch 106 includes transistors 202 and 204 to provide unipolar, double-throw operation. Transistor 202 and transistor 204 may be n-type field-effect transistors (NFETs). A first terminal (e.g., drain) of transistor 202 is coupled to resistor 104 of resistor ladder 101 and to a first terminal (e.g., drain) of transistor 204. A second terminal (e.g., source) of transistor 202 is coupled to ground (or other reference voltage terminal representing a logic 0 (VREFL)), and a second terminal of transistor 204 is coupled to a voltage reference terminal providing a voltage representing a logic 1 (VREFH). A control terminal (e.g., gate) of transistor 202 is coupled to driver circuit 206, which provides a control signal (VSWL) for turning transistor 202 on or off. For example, if switch 106 is to provide a logic 0 to resistor 104, then VSWL turns on transistor 202, and if a logic 1 is to be provided to resistor 104, then transistor 202 is turned off. A control terminal (e.g., a gate) of transistor 204 is coupled to driver circuit 208, which provides a control signal (VSWH) for turning transistor 204 on or off. For example, if switch 106 is to provide a logic 1 to resistor 104, then VSWH turns transistor 204 on, and if a logic 0 is to be provided to resistor 104, then transistor 204 is turned off.

[0015] In high-resolution and high-precision DACs (e.g., 16-bit resolution and above), the impedance of switch 106 should be very low, and the resistances of transistors 202 and 204 should be well matched. Therefore, transistors 202 and 204 can have relatively large W / L ratios and be relatively equal in size. When the source of transistor 202 is grounded, VSWL supplied to transistor 202 can swing to the supply voltage (AVDD). However, VSWH supplied to transistor 204 (when turned on) can swing to AVDD-VREF, and its source voltage will be at VREF. Therefore, in some examples of switch 105, VSWL can also swing to AVDD-VREF to match VSWH, and if transistors 202 and 204 have the same size and control voltage, the ideal impedance of transistors 202 and 204 will be the same, thereby preventing any process mismatch in the transistors.

[0016] However, if one of transistors 202 and 204 experiences a back-body voltage effect, the impedance of the transistor will not be the same with equal gate-source (VGS) control voltages. The back-body voltage effect, which may also be referred to as the body voltage effect or back-gate effect, is a phenomenon in which the voltage applied to the body terminal of a transistor affects the threshold voltage of the transistor. The back-body voltage effect can be reduced or eliminated simply by tying the well or body terminal of the transistor to its source. This is easily achieved for ground potential switches because all GND potential switches are in a common P-well (PWELL). Transistor 202 has a back-body terminal coupled to the source of transistor 202. However, for a VREF-referenced switch (e.g., transistor 204), tying the PWELL body terminal to its source requires isolating the VREF-connected switch (e.g., the body of the transistor is in its own isolated PWELL). Such isolation in some manufacturing processes requires a significant increase in the area of ​​the transistor and is therefore not feasible. In switch 106, the body terminal of transistor 204 is coupled to ground, similar to transistor 202. While this significantly reduces the layout area of ​​transistor 204, it does introduce errors related to VBS, or bulk voltage effects, in the impedance of transistor 204. The body-to-source voltage of transistor 204 can be as high as VREF (e.g., 2.5 volts), creating an impedance mismatch that reduces accuracy to less than 16-bit performance levels.

[0017] Figure 3FIG2 is a schematic diagram of a switching regulator circuit 300 suitable for use with switch 106. Switching regulator circuit 300 overcomes the bulk voltage effect of transistor 204 in its impedance matching with transistor 202. Switching regulator circuit 300 determines the actual bulk voltage effect and adds it as a correction to the control voltage provided to transistor 202. Although the impedance of transistor 204 will be higher due to the bulk voltage effect of transistor 204, the gate drive of transistor 202 is reduced from its nominal AVDD-VREF voltage to AVDD-VREF-ΔVBSeffect voltage to match the impedance of transistors 202 and 204.

[0018] The switching regulator circuit 300 includes a regulator core circuit 302 and an output circuit 304 coupled to the regulator core circuit 302. The regulator core circuit 302 generates an output that includes the back-bulk voltage effect of the transistor 204. The output circuit 304 generates a voltage output that is a supply voltage (AVDD) that is less than the voltage received from the regulator core circuit 302. The output voltage of the output circuit 304 can be used to control the transistor 202 so that the impedance of the transistor 202 increases to match the impedance of the transistor 204.

[0019] The voltage regulator core circuit 302 includes an amplifier 306, transistors 308, 310, 312, 316, 318, and 322, resistors 314 and 320, and a voltage source 336 (which provides a small voltage bias). A first amplifier input (e.g., the non-inverting input) of amplifier 306 is coupled to a voltage reference terminal for receiving VREF. An amplifier output of amplifier 306 is coupled to a control terminal (e.g., the gate) of transistor 308. A bulk terminal of transistor 308 is coupled to a reference voltage terminal (e.g., ground). A first current terminal (e.g., the drain) of transistor 308 is coupled to a power terminal providing AVDD via transistor 316. A second terminal (e.g., the source) of transistor 308 is coupled to a second amplifier input (e.g., the inverting input) of amplifier 306.

[0020] The output of amplifier 306 is also coupled to a control terminal (e.g., gate) of transistor 310. A first current terminal (e.g., drain) of transistor 310 is coupled to a power terminal providing AVDD via transistor 318. A second terminal (e.g., source) of transistor 310 is coupled to a body terminal of transistor 310.

[0021] Transistor 312 provides feedback from transistor 310 to amplifier 306. A control terminal (e.g., gate) of transistor 312 is coupled to the second terminal of transistor 310. A first terminal (e.g., drain) of transistor 312 is coupled to the second input of amplifier 306 and the second terminal of transistor 308. The second terminal of transistor 312 is coupled to a reference voltage terminal (e.g., AVSS, ground) via resistor 314. Resistor 314 has a first terminal coupled to the second terminal of transistor 312 and a second terminal coupled to the reference voltage terminal.

[0022] Resistor 320 and transistor 322 are coupled in series between the second terminal of transistor 310 and the reference voltage terminal. Transistor 322 is connected to a control terminal (e.g., gate) of transistor 322, which is coupled to a first terminal (e.g., drain) of transistor 322, through a diode. A second terminal (e.g., source) of transistor 322 is coupled to the reference voltage terminal. Resistor 320 has a first terminal coupled to the second terminal of transistor 310 and a second terminal coupled to the first terminal of transistor 322. The first and second terminals of resistor 320 may also be coupled to other circuits, such as Figure 4 Other examples of output circuit 304 are shown in FIG.

[0023] Transistor 316 is coupled between the power terminal and transistor 308. A first terminal (e.g., drain) of transistor 316 is coupled to the power terminal. A second terminal (e.g., source) of transistor 316 is coupled to the first terminal of transistor 308. A control terminal (e.g., gate) of transistor 316 is coupled to the output of amplifier 306 via voltage source 336. Voltage source 336 may include one or more diode-connected transistors or a resistor and current source coupled to the power terminal. Transistor 318 is coupled between the power terminal and transistor 310. A first terminal of transistor 318 is coupled to the power terminal. A second terminal of transistor 318 is coupled to the first terminal of transistor 310. A control terminal of transistor 318 is coupled to the control terminal of transistor 316.

[0024] Output circuit 304 includes transistors 326, 332, and 334, resistors 324 and 328, and capacitor 330. A control terminal (e.g., gate) of transistor 326 is coupled to the second terminal of transistor 310. A first terminal (e.g., drain) of transistor 326 is coupled to the power terminal via resistor 324. A second terminal (e.g., source) of transistor 326 is coupled to the reference voltage terminal via resistor 328. Resistor 324 has a first terminal coupled to the power terminal and a second terminal coupled to the first terminal of transistor 326. Resistor 328 has a first terminal coupled to the second terminal of transistor 326 and a second terminal coupled to the reference voltage terminal.

[0025] Transistor 332 includes a first terminal (e.g., drain) coupled to the power terminal, and a control terminal (e.g., gate) coupled to the first terminal of transistor 326. A second terminal (e.g., source) of transistor 332 is coupled to a first terminal (e.g., drain) of transistor 334. A reference voltage output (VREGA) of switching regulator circuit 300 is provided at the second terminal of transistor 332. The second terminal of transistor 332 can be coupled to a voltage input ( Figure 2 ) so that driver circuit 206 applies VREGA to control transistor 202. A second terminal (e.g., source) of transistor 334 is coupled to the reference voltage terminal, and a control terminal (e.g., gate) of transistor 334 is coupled to a first terminal of transistor 322. Capacitor 330 has a first terminal coupled to the control terminal of transistor 332 and a second terminal coupled to the reference voltage terminal.

[0026] In operation, amplifier 306 forces the second terminal of transistor 308 to the same voltage as the first terminal of amplifier 306 (e.g., VREF). Transistor 308 and transistor 310 have the same control voltage, i.e., the output voltage of amplifier 306. However, transistor 308, with its body terminal at GND, will experience an increased VGS relative to transistor 310, which does not have any bulk voltage effect when the body terminal of transistor 310 is connected back to its source. Since the gate voltages of transistors 308 and 310 are the same, the voltage experienced at the source of transistor 310 will be higher than the voltage experienced at the source of transistor 308 due to the difference in bulk voltage effects between transistors 308 and 310. This can be seen by analyzing the operation of switching regulator circuit 300 starting with the source voltage of transistor 308. The source voltage of transistor 308 will be maintained at VREF by amplifier 306. The output voltage of amplifier 306 and the gate voltage of transistor 308 will therefore be VREF + VGS. 308 (VGS of transistor 308). But since VGS 308 Basically equal to VGS 310 , but as the bulk voltage effect on transistor 308 increases, VGS 308 It can be written as:

[0027] VGS 308 =VGS+ΔVBSeffect (1)

[0028] Wherein VGS is the gate-to-source voltage of transistor 310 .

[0029] The voltage across resistor 320 is:

[0030] VREF+VGS 308 -VGS310 -VGS 322 (2)

[0031] The VGS of transistors 310 and 322 are the same, and the VGS of transistor 308 conforms to equation (1), allowing equation (2) to simplify to:

[0032] VREF+ΔVBSeffect-VGS (3)

[0033] The voltage across resistor 314 is the same as the voltage across resistor 320, and the current flowing through resistor 314 is the same as the current flowing through resistor 320. Therefore, the current flowing through transistor 308 is equal to the current flowing through transistor 310. The current flowing through resistor 320 is:

[0034]

[0035] Here, R2 is the resistance of the resistor 320 .

[0036] The current flowing through resistor 328 is the same as the current flowing through resistor 320 (Equation (4)), and the resistances of resistors 320, 324, and 328 may be the same. Therefore, the voltage at the first terminal of transistor 326 and the gate of transistor 332 may be expressed as:

[0037]

[0038] AVDD is the voltage provided at the power supply terminal, and R3 is the resistance of the resistor 324 .

[0039] It should be noted that the voltage in equation (5) contains the AVDD-VREF relationship, but also includes the ΔVBSeffect voltage. Finally, the output voltage of the switching regulator circuit 300 provided at the source of transistor 322 is:

[0040] AVDd-VREF-ΔVBSeffect (6)

[0041] The transistor 202 is provided with an appropriate regulator voltage to match the impedance of the transistor 204 .

[0042] Figure 4 is a block diagram of an example system 400 including a switching regulator circuit 300. The system 400 includes a regulator core circuit 302, multiple instances of an output circuit 304, multiple driver circuits 402, and multiple DACs 404. The output of the regulator core circuit 302 (e.g., Figure 3 The first and second terminals of the resistor 320 shown are obtained) are coupled to each output circuit 304 (e.g., coupled to Figure 34. The output circuit 304 is coupled to a voltage input of a driver circuit 402 instance, and the output of a driver circuit 402 instance is coupled to a DAC 404 instance. Driver circuit 402 may be an implementation of driver circuit 206. Driver circuit 402 provides a control signal, VSWL, that swings to VREG provided by output circuit 304 for controlling switch 106 in DAC 404. In system 400, a single voltage regulator core circuit 302 provides a voltage output for controlling any number of instances of DAC 404, which reduces the circuitry of system 400 and provides improved linearity in DAC 404.

[0043] In this description, the term "coupled" may encompass any connection, communication, or signal path that enables a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first example, device A is coupled to device B via a direct connection; or (b) in a second example, device A is coupled to device B via an intermediate component C, provided that the intermediate component C does not alter the functional relationship between devices A and B such that device B is controlled by device A via the control signal generated by device A.

[0044] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably. Unless specifically stated to the contrary, these terms are generally used to refer to an interconnection between or terminations of a device element, circuit element, integrated circuit, device, or other electronic device or semiconductor component.

[0045] A circuit or device described herein as including certain components may actually be adapted to be coupled to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may actually include only semiconductor elements within a single physical device (e.g., a semiconductor die and / or integrated circuit (IC) package), and may be adapted to be coupled to at least some of the passive elements and / or sources during or after manufacture, for example, by an end user and / or a third party, to form the described structure.

[0046] Although the use of specific transistors is described herein, other transistors (or equivalent devices) may be used instead with little or no change to the remaining circuitry. For example, field effect transistors ("FETs") (e.g., n-channel FETs (NFETs) (n-type transistors) or p-channel FETs (PFETs) (p-type transistors)), bipolar junction transistors (BJTs, e.g., NPN transistors or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) may be used in place of or in combination with the devices described herein. The transistors may be depletion-mode devices, drain-extended devices, enhancement-mode devices, native transistors, or other types of device structure transistors. Furthermore, the devices may be implemented in / on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0047] In the claims, reference may be made to the control input of a transistor and its current terminals. In the case of a FET, the control input (or transistor control terminal) is the gate, and the current terminals are the drain and source. In the context of a BJT, the control input is the base, and the current terminals are the collector and emitter.

[0048] Reference herein to a FET being "on" means that a conductive channel exists for the FET and drain current can flow through the FET. Reference herein to a FET being "off" means that a conductive channel does not exist, and therefore drain current does not flow through the FET. However, an "off" FET can have current flowing through the body diode of the transistor.

[0049] The circuits described herein can be reconfigured to include additional or different components to provide functionality that is at least partially similar to the functionality available before the components were replaced. Unless otherwise specified, components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the resistor shown. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may actually be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as a single resistor or capacitor.

[0050] While some elements of the described examples are included in the integrated circuit and other elements are external to the integrated circuit, in other example embodiments, additional or fewer features may be incorporated into the integrated circuit. Furthermore, some or all of the features described as external to the integrated circuit may be included in the integrated circuit, and / or some features described as internal to the integrated circuit may be incorporated externally. As used herein, the term "integrated circuit" refers to one or more circuits that: (i) are incorporated in / on a semiconductor substrate; (ii) are incorporated in a single semiconductor package; (iii) are incorporated in the same module; and / or (iv) are incorporated in / on the same printed circuit board.

[0051] The use of the phrase "ground" in the foregoing description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, universal ground, and / or any other form of ground connection that is applicable or suitable for the teachings of this specification. In this specification, unless otherwise indicated, the word "about," "substantially," or "substantially" preceding a parameter means within + / - 10% of the parameter, or if the parameter is zero, within a reasonable range of values ​​about zero.

[0052] Modifications are possible in the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. A circuit comprising: an amplifier having a first amplifier input coupled to a voltage reference terminal, a second amplifier input, and an amplifier output; a first transistor having a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output; a second transistor having a first terminal coupled to the power terminal, a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output; as well as A third transistor has a first terminal coupled to the second amplifier input, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor. 2 . The circuit of claim 1 , further comprising a first resistor having a first terminal coupled to the second terminal of the third transistor and a second terminal coupled to the reference terminal.

3. The circuit of claim 1 , further comprising: a fourth transistor having a first terminal, a second terminal coupled to the reference terminal, and a control terminal coupled to the first terminal of the fourth transistor; as well as A first resistor has a first terminal coupled to the second terminal of the second transistor and a second terminal coupled to the first terminal of the fourth transistor.

4. The circuit of claim 1 , further comprising: a fourth transistor having a first terminal, a second terminal, and a control terminal coupled to the second terminal of the second transistor; a first resistor having a first terminal coupled to the power terminal and a second terminal coupled to the first terminal of the fourth transistor; as well as A second resistor has a first terminal coupled to the second terminal of the fourth transistor and a second terminal coupled to the reference terminal.

5. The circuit of claim 4 , further comprising: a fifth transistor having a first terminal coupled to the power terminal, a second terminal, and a control terminal coupled to the first terminal of the fourth transistor; as well as a sixth transistor having a first terminal coupled to the second terminal of the fifth transistor, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor. 6 . The circuit of claim 4 , further comprising a capacitor having a first terminal coupled to the first terminal of the fourth transistor and a second terminal coupled to the reference terminal.

7. The circuit of claim 1 , further comprising: a fourth transistor having a first terminal coupled to the power terminal, a second terminal coupled to the first terminal of the first transistor, and a control terminal; a fifth transistor having a first terminal coupled to the power terminal, a second terminal coupled to the first terminal of the second transistor, and a control terminal coupled to the control terminal of the fourth transistor; as well as A voltage source has a first terminal coupled to the amplifier output and a second terminal coupled to the control terminal of the fifth transistor.

8. A circuit comprising: an amplifier having a first amplifier input coupled to a voltage reference terminal, a second amplifier input, and an amplifier output; a first transistor having a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output; a second transistor having a first terminal coupled to the power terminal, a second terminal, a body terminal coupled to the second terminal of the second transistor, and a control terminal coupled to the amplifier output; a third transistor having a first terminal coupled to the second amplifier input, a second terminal, and a control terminal coupled to the second terminal of the second transistor; a resistor having a first terminal coupled to the second terminal of the second transistor, and a second terminal; a fourth transistor having a first terminal, a second terminal, and a control terminal coupled to the second terminal of the second transistor; a fifth transistor having a first terminal, a second terminal, and a control terminal coupled to the first terminal of the fourth transistor; as well as a sixth transistor having a first terminal coupled to the second terminal of the fifth transistor, a second terminal, and a control terminal coupled to the second terminal of the resistor.

9. The circuit of claim 8, wherein: The resistor is a first resistor; and The circuit comprises: a seventh transistor having a first terminal coupled to the second terminal of the first resistor, a second terminal coupled to the second terminal of the sixth transistor, and a control terminal coupled to the first terminal of the seventh transistor; as well as a second resistor having a first terminal coupled to the second terminal of the third transistor and a second terminal coupled to the second terminal of the seventh transistor.

10. The circuit of claim 8, further comprising a seventh transistor having a first terminal coupled to a power terminal, a second terminal coupled to the first terminal of the second transistor, and a control terminal coupled to the amplifier output.

11. The circuit of claim 10, further comprising an eighth transistor having a first terminal coupled to the power terminal, a second terminal coupled to the first terminal of the first transistor, and a control terminal coupled to the control terminal of the seventh transistor.

12. The circuit of claim 10, further comprising a voltage source having a first terminal coupled to the amplifier output and a second terminal coupled to the control terminal of the seventh transistor.

13. The circuit of claim 8, wherein: The resistor is a first resistor; and The circuit comprises: a second resistor having a first terminal coupled to the first terminal of the fifth transistor and a second terminal coupled to the first terminal of the fourth transistor; as well as a third resistor having a first terminal coupled to the second terminal of the fourth transistor and a second terminal coupled to the second terminal of the sixth transistor.

14. The circuit of claim 8, further comprising a capacitor having a first terminal coupled to the control terminal of the fifth transistor and a second terminal coupled to the second terminal of the sixth transistor.

15. The circuit of claim 8, wherein: The resistor is a first resistor; and The circuit includes a second resistor having a first terminal coupled to the second terminal of the third transistor and a second terminal coupled to the second terminal of the sixth transistor.

16. A digital-to-analog converter, comprising: resistor ladder; a switching circuit coupled to a rung of the resistor ladder, the switching circuit comprising a first switch having a control input and a second switch having a control input; a first driver circuit having an output coupled to the control input of the first switch; a second driver circuit having an output coupled to the control input of the second switch, and a voltage input; a switching regulator circuit having an output coupled to the voltage input of the second driver circuit, the switching regulator circuit comprising: an amplifier having a first amplifier input coupled to a voltage reference terminal, a second amplifier input, and an amplifier output; a first transistor having a first terminal coupled to a power terminal, a second terminal coupled to the second amplifier input, a body terminal coupled to a reference terminal, and a control terminal coupled to the amplifier output; A second transistor having a first terminal coupled to the power terminal, a second terminal coupled to the a body terminal of said second terminal of a second transistor, and a control terminal coupled to said amplifier output; as well as A third transistor has a first terminal coupled to the second amplifier input, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor. 17 . The digital-to-analog converter of claim 16 , further comprising a first resistor having a first terminal coupled to the second terminal of the third transistor and a second terminal coupled to the reference terminal.

18. The digital-to-analog converter of claim 16, further comprising: a fourth transistor having a first terminal, a second terminal coupled to the reference terminal, and a control terminal coupled to the first terminal of the fourth transistor; as well as A first resistor has a first terminal coupled to the second terminal of the second transistor and a second terminal coupled to the first terminal of the fourth transistor.

19. The digital-to-analog converter of claim 16, further comprising: a fourth transistor having a first terminal, a second terminal, and a control terminal coupled to the second terminal of the second transistor; a second resistor having a first terminal coupled to the power terminal and a second terminal coupled to the first terminal of the fourth transistor; as well as A third resistor has a first terminal coupled to the second terminal of the fourth transistor and a second terminal coupled to the reference terminal.

20. The digital-to-analog converter of claim 19, further comprising: a fifth transistor having a first terminal coupled to the power terminal, a second terminal coupled to a voltage input of the second driver circuit, and a control terminal coupled to the first terminal of the fourth transistor; as well as a sixth transistor having a first terminal coupled to the second terminal of the fifth transistor, a second terminal coupled to the reference terminal, and a control terminal coupled to the second terminal of the second transistor.

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