Surface code computation using iswap door

Abstract

The invention relates to a surface code cycle using an iSWAP gate. The first surface code loop is performed by applying an entanglement operation between a measurement qubit and a data qubit, where the entanglement operation includes a respective iSWAP gate and at least one other operation in sequence, the result of applying the entanglement operation between the measurement qubit and the data qubit is equivalent to the result of applying the CZ gate between the measurement qubit and the data qubit.

Description

Background Art

[0001] This specification relates to quantum computing.

[0002] Quantum computing provides a means for solving certain problems that cannot be solved within a reasonable period of time using conventional classical computers. These problems include factoring very large numbers into their prime factors and searching large unstructured data sets. A variety of physical systems are being explored for use in quantum computing, including ions, spins in semiconductors, and superconducting circuits. However, none of these systems perform well enough to be used directly as computational qubits. For example, single- and two-state physical systems that can be used as physical qubits cannot reliably encode information and retain it long enough to be useful.

[0003] Therefore, scalable quantum computers require quantum error correction. Classical error correction utilizes redundancy. For example, in repetition codes, information is copied and stored multiple times. If the copies are later found to be inconsistent, an error can be determined, and a majority vote can be taken to recover the information. Due to the no-cloning theorem, copying quantum information is impossible. Therefore, quantum error correction codes spread the logical information of a single qubit across the entangled state of multiple physical qubits. These multiple physical qubits are collectively referred to as logical qubits.

[0004] Surface codes are a series of quantum error correction codes defined on a two-dimensional grid of qubits. In surface codes, a sequence of CNOT operations on physical qubits is used to entangle the physical qubits, where subsequent measurements of the entangled state provide a means for error correction and error detection. A set of physical qubits entangled in this way is used to define logical qubits, which have much better performance than the underlying physical qubits due to entanglement and measurement. One of the significant advantages of surface codes is their relative tolerance to local errors. Surface codes can handle an error rate of almost 3% per surface code clock cycle, which is far less stringent than the error tolerance of other quantum computing methods. This error tolerance, together with a simple two-dimensional qubit layout, makes the surface code architecture a practical and feasible method for building solid-state quantum computers. Summary of the Invention

[0005] This specification describes techniques for constructing surface codes using iSWAP gates.

[0006] One innovative aspect of the subject matter described in this specification can be implemented in a method comprising performing a first surface code cycle in a system comprising a plurality of physical qubits arranged on a grid, wherein performing the first surface code cycle comprises applying a first entanglement operation between a measurement qubit in a ground state and a first data qubit, wherein the first entanglement operation comprises applying a first iSWAP gate and at least one other operation in sequence such that a result of applying the first entanglement operation between the measurement qubit in the ground state and the first data qubit is equivalent to applying the first iSWAP gate between the measurement qubit in the ground state and the first data qubit. applying a second iSWAP gate between the measurement qubit and a second data qubit; applying a third iSWAP gate between the measurement qubit and a third data qubit; applying a second entanglement operation between the measurement qubit and a fourth data qubit, wherein the second entanglement operation comprises application of a fourth iSWAP gate and at least one other operation, performed in sequence such that a result of applying the second entanglement operation to the measurement qubit and the fourth data qubit is equivalent to a result of applying the CZ gate between the measurement qubit and the fourth data qubit; and measuring the measurement qubit to detect an error.

[0007] Other implementations of these aspects include corresponding computer systems, devices, and computer programs recorded on one or more computer storage devices, each of which is configured to perform the actions of the method. One or more systems of classical and quantum computers can be configured to perform specific operations or actions by installing software, firmware, hardware, or a combination thereof on the system, which software, firmware, hardware, or a combination thereof causes the system to perform the actions in operation. One or more computer programs can be configured to perform specific operations or actions by including instructions that, when executed by a data processing device, cause the device to perform the actions.

[0008] The foregoing and other implementations can each optionally include one or more of the following features, alone or in combination: In some implementations, applying the first entanglement operation further comprises applying one or more single-qubit gates to the measurement qubit and the first data qubit.

[0009] In some implementations, applying one or more single-qubit gates to the measurement qubit includes applying a Hadamard gate to the measurement qubit before applying the first iSWAP gate.

[0010] In some implementations, applying one or more single-qubit gates to the measurement qubit and the first data qubit includes, after applying the first iSWAP gate: applying an inverse S-gate to the measurement qubit and the first data qubit; and applying a Hadamard gate to the first data qubit.

[0011] In some implementations, applying the second entanglement operation includes applying a Hadamard gate to the fourth data qubit before applying the fourth iSWAP gate.

[0012] In some implementations, applying the second entanglement operation includes, after applying the fourth iSWAP gate: applying an inverse S-gate to the measurement qubit and the fourth data qubit; and applying a Hadamard gate to the measurement qubit.

[0013] In some implementations, the method further includes applying a reset operation to the measurement qubit to reset the measurement qubit to the ground state before applying the first entanglement operation.

[0014] In some implementations, executing the first surface code cycle moves information encoded by the measurement qubit and by the first, second, third, and fourth data qubits to other qubits in the grid.

[0015] In some implementations, information encoded by the measurement qubit is moved in a first direction to other qubits in the grid, and information encoded by one or more of the first data qubit, the second data qubit, the third data qubit, or the fourth data qubit is moved in a second direction to other qubits in the grid, where the second direction is opposite to the first direction.

[0016] In some implementations, information encoded by the measurement qubit and a data qubit coupled to the measurement qubit in a third direction perpendicular to the first direction moves together in the grid.

[0017] In some implementations, the method further includes executing a second surface code loop, wherein executing the second surface code loop includes executing the first surface code loop in reverse order.

[0018] The subject matter described in this specification can be implemented in a specific way to realize one or more of the following advantages.

[0019] Some quantum hardware can perform iSWAP gates more efficiently and reliably than other two-qubit gates (such as CNOT or CZ gates). For example, iSWAP gates typically introduce fewer calibration constraints than CZ gates. The circuit scheduling currently described is particularly suitable for such quantum hardware and provides a new surface code compilation that uses iSWAP gates instead of CNOT or CZ gates. In addition, the circuit scheduling currently described is designed to reduce the logical movement of qubits (i.e., the movement of information in the qubit array), thereby reducing the amount of qubit filling required for information to drift to a certain position (and thus optimizing the amount of computational resources required). In addition, the circuit scheduling alternates between two different surface code cycles so that the logical movement of the qubits oscillates around a center position and does not drift in one direction (this also optimizes the amount of computational resources required because less space is required).

[0020] The details of one or more implementations of the subject matter of this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a block diagram of an example system for implementing iSWAP surface codes.

[0022] Figure 2 is a flow chart of an example process for performing an iSWAP surface code loop.

[0023] Figure 3A and Figure 3B Example quantum circuits for implementing the first entanglement operation and the second entanglement operation are shown.

[0024] Figure 4 An example quantum circuit layer for performing an iSWAP surface code cycle is shown.

[0025] Figure 5 is a diagram showing how information encoded by quantum bits included in a surface code patch moves.

[0026] Figures 6A to 6G The interactions performed by the measurement qubit are shown and the movement of information accumulated through the measurement is tracked.

[0027] Figure 7 An example qubit grid population for movement of information encoded by measurement qubits is shown.

[0028] Figure 8 An example quantum computer is depicted.

[0029] Like reference numbers and designations in the various drawings indicate like elements. DETAILED DESCRIPTION

[0030] iSWAP gate is implemented Interacting two-qubit quantum logic gates, where the application of the iSWAP gate swaps the states of the two qubits and Status and The amplitude of is phase-operated. In matrix representation, the iSWAP gate is given as follows:

[0031]

[0032] Some quantum hardware can perform iSWAP gates more efficiently and reliably than other two-qubit gates (such as CNOT or CZ gates). For example, iSWAP gates typically introduce fewer calibration constraints than CZ gates. However, the effect of iSWAP gates is similar to that of CZ gates combined with SWAP gates. Therefore, applying iSWAP gates to a slice of a qubit moves the information encoded by the slice of the qubit to other qubits, thereby deforming the logical layout of the slice during its operation. This makes it difficult to monitor where information is encoded and how to operate or connect the slices of qubits.

[0033] This specification describes a technique for implementing surface codes using iSWAP gates (e.g., instead of CZ or CNOT gates). The technique includes quantum circuit scheduling of iSWAP gates that implement surface code cycles. The circuit scheduling is designed to reduce the logical movement of qubits (i.e., the movement of information in the qubit array), thereby reducing the amount of qubit filling required for information to drift to a certain position. In addition, the circuit scheduling alternates between two different surface code cycles so that the logical movement of the qubits oscillates around a central position and does not drift in one direction.

[0034] Figure 1 is a block diagram of an example system for implementing iSWAP surface codes. Example system 100 is an example of a system implemented as part of a quantum computing device in which the systems, components, and techniques described in this specification may be implemented.

[0035] System 100 includes a plurality of qubits 102 in communication with control electronics 104. Qubits 102 are physical qubits, e.g., physical devices that represent a quantum system having at least two states. Each qubit can be in a corresponding quantum state that occupies one or more energy levels. The energy levels can include: at least two computational energy levels, e.g., energy levels 0 and 1; and one or more non-computational energy levels, e.g., energy levels 2 and 3, each higher than the computational qubit energy level. The population of the higher non-computational qubit energy levels can introduce errors in algorithmic operations or quantum computations performed using the qubits. For example, the occupation of qubit energy levels outside the computational subspace can hinder or prevent the implementation of quantum error correction operations.

[0036] In some implementations, qubits 102 may be superconducting qubits or semiconductor qubits. For example, qubits 102 may include Xmon qubits, flux qubits, phase qubits, or qubits with frequency interactions. In general, qubits 102 are physical devices configured to meet the basic requirements of quantum computing. For example, qubits 102 include physical devices that can be initialized, can perform single-qubit rotations, can participate in two-qubit entanglement operations (e.g., iSWAP, CZ, CNOT, gates), can perform topological versions of Hadamard transforms (e.g., by exchanging their quantum states in a SWAP operation), and can be measured.

[0037] The qubits 102 may be arranged in an array. For example, Figure 1 As shown, in some implementations, qubits 102 may be arranged in a two-dimensional array, such as a square grid 110 . Figure 1 The example two-dimensional grid 110 depicted in FIG. 1 includes qubits, however in some implementations, system 100 may include a fewer or greater number of qubits.

[0038] The qubits 102 can interact with each other through a plurality of qubit couplers. The qubit couplers can define nearest neighbor interactions between the qubits, for example, such that each qubit interacts with at most four adjacent qubits in a square grid. In principle, the couplers can be any type of coupler, for example, a capacitive or inductive coupler. In some implementations, the strength of the coupler can be controllable, for example, frequency controllable. In other implementations, the coupler can be a coupler with a fixed coupling strength.

[0039] Control electronics 104 includes control means, such as an arbitrary waveform generator, that can operate multiple qubits 102. For example, control electronics 104 can include control means for tuning the operating frequency of qubits 102 by applying control signals (e.g., voltage pulses) to the qubits via corresponding control lines.

[0040] As another example, control electronics 104 can control the individual frequencies of qubits 102 so that the frequency of one or more of the qubits is adjusted to be close to or away from the frequency of an excitation pulse generated by an excitation pulse generator on an excitation drive line. The excitation pulse can include a pulse having a frequency that implements a quantum operation (e.g., a quantum logic gate). Qubits 102 can be coupled to one or more excitation drive lines via corresponding couplers. In some cases, the couplers can be capacitive couplers, such as those implemented by microwave lines running adjacent to qubit capacitors.

[0041] The control electronics 104 may also include a control device that tunes the frequency of the coupler that couples the plurality of qubits 102 .

[0042] The type of control electronics 104 utilized by the system 100 depends on the type of qubits used by the system. As an example, qubits implemented via atomic, molecular, or solid-state quantum systems typically have energy separation of the relevant qubit energy levels in the microwave or optical domain. External fields (such as microwave or optical fields) can be used to manipulate and control the state of such qubits. In such cases, as an example, mode-locked lasers can be used as control electronics due to their broadband spectrum with both radio frequency and microwave structures. In another example, the control electronics 104 can include a collection of individual qubit controllers implemented by a radio frequency generator, and a global excitation controller or a collection of global excitation controllers implemented by a radio frequency or microwave generator. In both cases, the control electronics 104 can be manually operated or connected to a computer (e.g., a classical computer) and controlled via appropriate software, allowing the desired qubit operations to be specified and automatically executed.

[0043] System 100 can program control electronics 104 to implement a surface code. To implement the surface code, each qubit in plurality of qubits 102 has one of two functional types: a data qubit, e.g., qubit 106, and a measurement qubit, e.g., qubit 108. A data qubit (e.g., qubit 106) is a qubit that participates in a quantum computation performed by system 100 and stores quantum information corresponding to the quantum computation. That is, the state of a data qubit encodes the logical information used for the quantum computation. A measurement qubit is a qubit used to determine the result of the computation performed by the data qubit. For example, during a computation, the unknown state of the data qubit can be entangled with the state of the measurement qubit using a suitable physical operation, after which the measurement qubit can be measured. The measurement qubits can include a measurement X qubit, e.g., the measurement qubit located at the center of a light gray square (e.g., square 128), and a measurement Z qubit, e.g., the measurement qubit located at the center of a dark gray square (e.g., square 130).

[0044] Each data qubit is directly coupled to multiple measurement qubits (and not directly coupled to any other data qubits), and each measurement qubit is directly coupled to multiple data qubits (and not directly coupled to any other measurement qubits). For example, each measurement qubit is coupled to four data qubits (if the measurement qubit is in the bulk, it is coupled to fewer data qubits if the measurement qubit is at the boundary). Each data qubit is coupled to two measurement Z qubits and two measurement X qubits (if the data qubit is in the bulk, it is coupled to fewer measurement qubits if the data qubit is at the boundary).

[0045] Measuring the Z qubit can be used to force its neighboring data qubits a, b, c, and d into the operator product The eigenstate of the quantum bit, where represents the Pauli Z operator acting on qubit a. Therefore, each measurement Z qubit is described as measuring Stabilizer. Figure 1 In the example array 102, Stabilizers are represented by darker grey squares (e.g., square 130), where data qubits exist. The Z qubit is located at the vertex of the stabilizer and is measured at each Measuring the X qubit can be used to force its neighboring data qubits a, b, c, and d into the operator product. The eigenstate of the quantum bit, where represents the Pauli X operator acting on qubit a. Therefore, each measurement X qubit is called a measurement Stabilizer. Figure 1 In the example array 102, Stabilizers are represented by lighter grey squares (e.g., square 128), where data qubits exist. The vertices of the stabilizer are located at the same time, and the measurement X qubit exists at each The center of the stabilizer.

[0046] In a conventional implementation of a surface code (different from the implementation described in this disclosure), control electronics 104 operates the measurement Z qubit and the measurement X qubit by repeatedly applying quantum circuits to the measurement Z qubit and the measurement X qubit and their neighboring data qubits. Each application of the quantum circuit executes a surface code cycle. Each quantum circuit includes a sequence of operations applied to one or more physical qubits. In various examples, the measurement qubit is first reset, for example, to its ground state. Then, four entanglement operations, such as CNOT gates or CZ gates, are performed. For the measurement Z qubit, each of the four entanglement operations targets the measurement qubit, and each nearest neighbor data qubit serves as a control bit for the corresponding entanglement operation. For the measurement X qubit, each of the four entanglement operations targets the corresponding nearest neighbor data qubit, and the measurement X qubit serves as a control bit for each of the four entanglement operations. In this case, the sequence of operations also includes Hadamard gates applied to the measurement qubit before and after the entanglement operation. After performing the entanglement operation, the measurement qubit is measured, for example, by projection measurement. After the measurement, a subsequent surface code cycle is performed.

[0047] Unlike conventional implementations of surface codes, the presently described implementation of surface codes uses iSWAP gates instead of CNOT or CZ gates. Therefore, the presently described surface code is referred to herein as an iSWAP surface code 112.

[0048] As described in more detail below, the iSWAP surface code loop also includes four layers of entanglement operations, where each of the four layers includes an iSWAP gate. After the measurement qubits in the surface code chip region have been reset, the first layer of entanglement operations is applied to the qubits included in the surface code chip region. Therefore, as described in more detail below, the first layer of entanglement operations can be designed so that it is completely equivalent to a CZ gate (and can be obtained by including an additional Hadamard gate and using the relationship to make it completely equivalent to the CNOT gate, where H represents the Hadamard gate, Pauli door, and Pauli Gate). Before measuring the measurement qubit included in the surface code chip region, the fourth layer of entanglement operations is applied to the qubits included in the surface code chip region. Therefore, as described in more detail below, the fourth layer of entanglement operations can also be designed so that it is completely equivalent to a CZ gate or a CNOT gate (with frame changes tracked by classical control hardware). Applying the four layers of entanglement operations shifts the information encoded by the qubits included in the surface code chip region, for example, as shown in the deformed surface code chip regions 114 and 116 (wherein the lighter gray shapes (e.g., shape 132) in the illustrated surface code chip region represent stabilizer, and the darker grey shapes (e.g., shape 134) represent Stabilizer). Thus, the sequential iSWAP surface code cycles alternate between forward-running cycles and reverse-running cycles so that the information does not keep moving in the same direction.

[0049] Figure 2 is a flow chart of an example process 200 for performing an iSWAP surface code cycle. For convenience, process 200 will be described as being performed by components of a quantum computing system. For example, classical control electronics (e.g., Figure 1 The control electronics 104 ) can perform the example process 200 if appropriately programmed.

[0050] For clarity, example process 200 is described with reference to performing an iSWAP surface code cycle on one (body) measurement qubit coupled to four data qubits. However, example process 200 can be performed (in parallel) for each of multiple data qubits and their adjacent measurement qubits included in a surface code patch.

[0051] The system applies a reset operation to the measurement qubit to reset the measurement qubit to a ground state (step 202).

[0052] The system applies a first entanglement operation between the measurement qubit in the ground state and the first data qubit (step 204). The first entanglement operation is a gate sequence including a first iSWAP gate and one or more single-qubit gates, wherein the one or more single-qubit gates are determined such that a result of applying the first entanglement operation is equivalent to a result of applying a CZ gate between the measurement qubit in the ground state and the first data qubit.

[0053] Figure 3A An example quantum circuit 300 implementing the first entanglement operation is shown. Figure 3AAs shown, when the iSWAP gate is applied to a qubit that has already been reset, it acts as a controlled Paul gate. For example, applying reset operation 302 to a first qubit, followed by applying a first CNOT gate 304 between the first and second qubits (where the second qubit acts as a control bit) is equivalent to applying reset operation 302, applying a second CNOT gate 306 to the first and second qubits (where the first qubit acts as a control bit), and then applying first CNOT gate 304 after second CNOT gate 306. This is because after reset operation 302, the first qubit is known to be in the 0 state, and therefore the CNOT gate has no effect on the second qubit (because the CNOT gate flips the target qubit state only when, and only when, the control qubit is in the 1 state). In other words, the result of applying operation 302 followed by operation 304 is the same as the result of applying operation 302 followed by operation 306 followed by operation 304.

[0054] According to Cartan's KAK decomposition, applying two CNOT gates in sequence to the same two qubits (where the control bits used for the CNOT gates are different) has the same interaction as an iSWAP gate. Therefore, a single-qubit gate can be added before and after the two CNOT gates to obtain a gate sequence equivalent to the iSWAP gate. Similarly, a single-qubit gate can be added before and after the iSWAP gate to obtain a gate sequence that is exactly equivalent to applying two CNOT gates (or two CZ gates) in sequence to the same two qubits (where the control bits used for the CNOT or CZ gates are different). For example, Figure 3A As shown, applying CNOT gates 306 and 304 in sequence is equivalent to applying a first Hadamard gate 308 to the first qubit, applying an iSWAP gate 310 between the first qubit and the second qubit, applying inverse S-gates 312 and 314 to the first qubit and the second qubit, respectively, and applying a second Hadamard gate 316 to the second qubit.

[0055] return Figure 2 , the system applies a second iSWAP gate between the measurement qubit and the second data qubit (step 206 ).

[0056] The system applies a third iSWAP gate between the measurement qubit and the third data qubit (step 208).

[0057] The system applies a second entanglement operation between the measurement qubit and the fourth data qubit (step 210). The second entanglement operation is a gate sequence that includes a fourth iSWAP gate and one or more single-qubit gates, where the one or more single-qubit gates are determined such that a result of applying the second entanglement operation is equivalent to a result of applying a CZ gate between the measurement qubit in the ground state and the fourth data qubit.

[0058] Figure 3B An example quantum circuit 320 implementing the second entanglement operation is shown. Figure 3B As shown, when the iSWAP gate is applied before a measurement operation, it acts as a controlled Pauli gate. For example, applying CNOT gate 322 to a first qubit and a second qubit (where the first qubit acts as a control bit) followed by measurement operation 324 to the second qubit is equivalent to applying CNOT gate 322, followed by two CNOT gates 326 and 328 (where the second qubit acts as a control bit), followed by measurement operation 324 to the second qubit. This is because the square of the Pauli matrix is ​​the identity matrix, so applying the same controlled Pauli gate sequentially to two qubits has no effect on the two qubits. In other words, the result of applying operation 322 followed by operation 324 is the same as the result of applying operation 322, followed by operation 326, followed by operation 328, followed by operation 324.

[0059] As mentioned above Figure 3A As described above, applying two CNOT gates in sequence to the same two qubits (where the control bits used for the CNOT gates are different) has the same interaction as an iSWAP gate. Therefore, a single-qubit gate can be added before and after the two CNOT gates to obtain a gate sequence equivalent to an iSWAP gate. Similarly, a single-qubit gate can be added before and after the iSWAP gate to obtain a gate sequence that is exactly equivalent to applying two CNOT gates (or two CZ gates) in sequence to the same two qubits (where the control bits used for the CNOT or CZ gates are different). For example, Figure 3B As shown, applying CNOT gates 322 and 326 in sequence is equivalent to applying a first Hadamard gate 330 to the first qubit, applying an iSWAP gate 332 between the first qubit and the second qubit, applying inverse S-gates 334 and 336 to the first qubit and the second qubit, respectively, and applying a second Hadamard gate 338 to the second qubit.

[0060] This leaves CNOT gate 340. However, since the second qubit only serves as a control bit in CNOT gate 430, CNOT gate 340 can be applied after measurement operation 324 is performed on the second qubit, for example, as a classically controlled NOT operation 342. In quantum error correction circuits, Pauli feedback does not need to be performed in real time and can be handled by post-processing the measurement results. That is, controlled NOT operation 342 does not need to be performed during the surface code cycle.

[0061] return Figure 2 The system measures the measurement qubit (step 212). The results of the measurement can be used to detect errors in the quantum computation performed by the data qubit.

[0062] Figure 4 An example quantum circuit layer for performing an iSWAP surface code cycle is shown. The diagram of layer 402 is similar to Figure 2 4 corresponds to step 202 in example process 200 of FIGURE 4 and shows that each measurement qubit in the surface code patch region is being reset, for example, by applying a reset operation, such as reset operation 420. In the illustration of each layer, the qubits located at the centers of the darker grey squares (e.g., square 430) and the lighter grey squares (e.g., square 432) represent data qubits, and the qubits located at the vertices of the darker grey squares (e.g., square 430) and the lighter grey squares (e.g., square 432) represent measurement qubits.

[0063] The layers 404a to 404c are shown in FIG. Figure 2 2 corresponds to step 204 in the example process 200 of FIGURE 2 and shows that a layer of the first entanglement operation is being applied to the corresponding measurement qubit and the data qubit coupled to the measurement qubit in a first direction (in this example, in a northwest direction). Figure 2 As described, the layer of the first entanglement operation includes a layer 404b of iSWAP gates, including, for example, iSWAP gate 422. The layer of the first entanglement operation also includes a first layer 404a of single-qubit gates applied to both the measurement qubit and the data qubit included in the surface code chip region, and a second layer 404c of single-qubit gates applied to both the measurement qubit and the data qubit included in the surface code chip region.

[0064] The diagrams of layers 406 and 408 are similar to Figure 2206 and 208 in example process 200, and shows two layers of iSWAP gates being applied to respective measurement qubits and data qubits coupled to the measurement qubits in second and third directions. The second and third directions are parallel to each other and perpendicular to the first direction (in this example, northeast and southwest, respectively).

[0065] The layers 410a to 410c are shown in FIG. Figure 2 2 corresponds to step 210 in the example process 200 of FIG. 2 and shows that a layer of the second entanglement operation is being applied to the corresponding measurement qubit and the data qubit coupled to the measurement qubit in a fourth direction. The fourth direction is parallel to the first direction (in this example, in the southeast direction). As described above with reference to Figure 2 As described above, the layer of the second entanglement operation includes a layer 410b of iSWAP gates. The layer of the second entanglement operation also includes a first layer 410a of single-qubit gates applied to both the measurement qubit and the data qubit included in the surface code chip region, and a second layer 410c of single-qubit gates applied to both the measurement qubit and the data qubit included in the surface code chip region. In layers 404a, 404c, 410a, and 410c, the single-qubit gates are labeled "H," "HXY," or "CXYZ."

[0066] The diagram of layer 412 is similar to Figure 2 4 corresponds to step 212 in the example process 200 of , and illustrates that each measurement qubit in the surface code chip region is being measured, for example, by applying a measurement operation such as measurement operation 420 .

[0067] As mentioned above Figure 1 As depicted, four layers 404, 406, 408, and 410 apply entanglement operations to move information encoded by qubits included in the surface code chip region to other qubits in the grid. Figure 5 is a diagram showing how information encoded by the qubits included in the surface code patch region moves. For illustrative purposes, Figure 5 (as well as Figures 6A to 6G ) describes the movement of information in terms of moving qubits. However, in a physical implementation, the physical qubits remain in the same position in the grid, and it is the information stored by the physical qubits that moves.

[0068] According to the construction, during the first surface code cycle, the measurement qubit included in the surface code patch moves in a first direction. The data qubit moves in a second direction, wherein the second direction is opposite to the first direction. This movement forms a "conveyor belt" for moving qubits, for example, conveyor belt 502, wherein the conveyor belts for moving qubits move together / together. When the conveyor belt of qubits moves (in this example, on the diagonal line extending from the lower left corner of the grid to the upper right corner of the grid), the qubits on the line (for example, line 504) having a third direction perpendicular to the direction in which the conveyor belt extends move together and remain consistent. That is, their positions relative to each other do not change. In other words, the measurement qubits remain next to their data qubits perpendicular to the conveyor and "pass through" their data qubits along the conveyor.

[0069] This means that if you repeat the reference Figure 2 and Figure 4 If the first surface code cycle described is not completed, the measurement qubit and the data qubit will continue to move in the same direction, causing the surface code area to move further and further apart until it is destroyed. Figure 2 and Figure 4 The first surface code cycle is alternated between running the first surface code cycle in reverse (i.e., in reverse order) and in reverse (i.e., in reverse order).

[0070] For example, two sequential cycles of the iSWAP surface code may be performed as follows: reset the measurement qubit; perform a CZ-type entanglement operation to interact with the first data qubit; step the teleporter forward one step, wherein the second data qubit and the measurement qubit interact when they intersect; step the teleporter forward one step, wherein the third data qubit and the measurement qubit interact when they intersect; perform a CZ-type entanglement operation to interact with the fourth data qubit; measure the measurement qubit; reset the measurement qubit; perform a CZ-type entanglement operation to interact with the first data qubit; step the teleporter backward one step, wherein the second data qubit and the measurement qubit interact when they intersect; step the teleporter backward one step, wherein the third data qubit and the measurement qubit interact when they intersect; perform a CZ-type entanglement operation to interact with the fourth data qubit; and measure the measurement qubit. Figures 6A to 6G The movement of a measurement qubit and its neighboring data qubits is shown and described.

[0071] Figure 6A 6H shows the interactions performed by the measurement qubit and tracks the movement of information accumulated through the measurement. Figure 6AA measurement qubit (square 602) is shown coupled to four data qubits a, b, c, and d (e.g., square 504, where the squares representing the data qubits become a lighter shade of grey after interacting with the measurement qubit, as shown in FIG. Figure 6C 606). Figure 6A This corresponds to the output of the previous iSWAP surface code cycle, which is why the data qubit "c" is not next to the measurement qubit. Figure 6B In the example above, the measurement qubit is reset. This diagram is similar to Figure 2 The example process 200 corresponds to step 202.

[0072] exist Figure 6C In the example above, the reset measurement qubit is used Figure 2 The first entanglement operation described in Figure 3 is used to interact with the data qubit "a". In this example, the data qubit "a" is to the upper left of the measurement qubit.

[0073] exist Figure 6D In Figure 1, the measurement qubit uses an iSWAP gate to interact with data qubit "b." In this example, data qubit "b" is perpendicular to data qubit "a" and to the lower left of the measurement qubit. The interaction between the measurement qubit and data qubit "b" causes measurement qubits "b" and "c" to move in a first direction (southwest), causing the measurement qubit to intersect data qubit "b." The measurement qubit, data qubit "a," and data qubit "d" then move in opposite directions (northeast) and remain aligned.

[0074] exist Figure 6E In the example above, the measurement qubit interacts with data qubit "c" using an iSWAP gate. This causes measurement qubits "b" and "c" to move in a first direction (southwest), causing the measurement qubit to cross over with data qubit "b." The measurement qubit, data qubit "a," and data qubit "d" then move in the opposite direction (northeast) and remain aligned.

[0075] exist Figure 6F In the measurement of quantum bits, the above reference Figure 2 The second entanglement operation described in Figure 3 is used to interact with the data qubit "d". In this example, the data qubit "d" is to the lower right of the measurement qubit. Figure 6G In the process, the quantum bit is measured.

[0076] In a subsequent iSWAP surface code cycle, the same operation is repeated in reverse. For example, the measurement qubit is reset. The reset measurement qubit uses the first entanglement operation to interact with data qubit "d". The measurement qubit uses the iSWAP gate to interact with qubit "c" and then uses the iSWAP gate to interact with qubit "b". The measurement qubit then uses the second entanglement operation to interact with qubit "a" before being measured. These alternating forward and reverse cycles can be repeated as needed.

[0077] Figure 7 Example qubit grid populations for movement of information encoded by measurement qubits are shown. In the first example qubit grid population 700, two extra rows and columns of qubits are added, one row and one column on each side of the square grid. This effectively reduces the placeable code distance by 1. In the second example qubit grid population 702, a (shorter) row and a (shorter) column are added. If a subset of the readout lines can be measured, no population is required. In Figure 7 , the qubits located at the centers of the darker gray square (e.g., square 704) and the lighter gray square (e.g., square 706) represent data qubits, and the qubits located at the vertices of the darker gray square (e.g., square 704) and the lighter gray square (e.g., square 706) represent measurement qubits.

[0078] Figure 8 An example quantum computer 800 is depicted for performing the quantum operations described in this specification. Example quantum computer 800 includes an example quantum computing device 802. Quantum computing device 802 is intended to represent various forms of quantum computing devices. The components shown here, their connections and relationships, and their functions are exemplary only and do not limit the implementation of the inventions described and / or claimed in this document.

[0079] The example quantum computing device 802 includes a qubit assembly 852 and a control and measurement system 804. The qubit assembly includes a plurality of physical qubits, such as qubit 806, for performing an algorithmic operation or quantum computation. Figure 8 The qubits are shown arranged in a rectangular array, but this is a schematic depiction and is not intended to be limiting. Qubit configuration 852 also includes adjustable coupling elements, such as couplers 808, that allow for interaction between coupled qubits. Figure 8In the schematic depiction of FIG, each qubit is adjustably coupled to each of its four neighboring qubits by means of a corresponding coupling element. However, this is an example arrangement of qubits and couplers, and other arrangements are possible, including non-rectangular arrangements, arrangements that allow coupling between non-adjacent qubits, and arrangements that include adjustable coupling between more than two qubits.

[0080] Each qubit can be a physical two-level quantum system or device having energy levels representing logical values ​​0 and 1. The specific physical implementation of multiple qubits and how they interact with each other depends on a variety of factors, including the type of quantum computing device 802 included in the example computer 800 or the type of quantum computing being performed by the quantum computing device. For example, in an atomic quantum computer, a qubit can be implemented via an atomic, molecular, or solid-state quantum system (e.g., a hyperfine atomic state). As another example, in a superconducting quantum computer, a qubit can be implemented via a superconducting qubit or a semiconductor qubit (e.g., a superconducting transmon state). As another example, in an NMR quantum computer, a qubit can be implemented via a nuclear spin state.

[0081] In some implementations, quantum computation can proceed by, for example, loading qubits from a quantum memory and applying a sequence of unitary operators to the qubits. Applying the unitary operators to the qubits can include applying a corresponding sequence of quantum logic gates to the qubits, for example, to implement the surface code circuits described herein. Example quantum logic gates include: single-qubit gates, such as Pauli X, Pauli Y, Pauli Z (also referred to as X, Y, Z), Hadamard gates, S-gates, rotations; two-qubit gates, such as controlled X, controlled Y, controlled Z (also referred to as CX, CY, CZ), controlled NOT gates (also referred to as CNOT), iSWAP gates; and gates involving three or more qubits, such as Toffoli gates. Quantum logic gates can be implemented by applying control signals 810 generated by the control and measurement system 804 to the qubits and couplers.

[0082] For example, in some implementations, the qubits in qubit configuration 852 can be frequency tunable. In these examples, each qubit can have an associated operating frequency that can be adjusted by applying a voltage pulse via one or more drive lines coupled to the qubit. Example operating frequencies include a qubit idle frequency, a qubit interaction frequency, and a qubit readout frequency. Different frequencies correspond to different operations that a qubit can perform. For example, setting the operating frequency to a corresponding idle frequency can place the qubit in a state where it does not strongly interact with other qubits and can be used to perform a single-qubit gate. As another example, where qubits interact via a coupler with a fixed coupling, the qubits can be configured to interact with each other by setting their respective operating frequencies to a gate-related frequency that is detuned from their common interaction frequency. In other cases, for example, where qubits interact via a tunable coupler, the qubits can be configured to interact with each other by setting the parameters of their respective couplers to enable interaction between the qubits and then setting the qubits' respective operating frequencies to a gate-related frequency that is detuned from their common interaction frequency. Such interactions can be performed to perform a multi-qubit gate.

[0083] The type of control signal 810 used depends on the physical implementation of the qubit. For example, the control signal may include RF or microwave pulses in NMR or superconducting quantum computer systems or light pulses in atomic quantum computer systems.

[0084] Quantum computations can be accomplished by measuring the state of a qubit (e.g., using a quantum observable such as X or Z) using corresponding control signals 810. The measurement causes a readout signal 812 representing the measurement result to be communicated back to the measurement and control system 804. Depending on the physical scheme used for the quantum computing device and / or qubit, the readout signal 812 may include an RF, microwave, or optical signal. For convenience, Figure 8 The control signals 810 and readout signals 812 shown are depicted as addressing only selected elements of the qubit fabric (ie, the top and bottom rows), but during operation, the control signals 810 and readout signals 812 can address every element in the qubit fabric 852 .

[0085] Control and measurement system 804 is an example of a classical computer system that can be used to perform various operations on qubit assembly 852, as described above, as well as to perform other classical subroutines or computations. Control and measurement system 804 includes one or more classical processors (e.g., classical processor 814), one or more memories (e.g., memory 816), and one or more I / O units (e.g., I / O unit 818) connected via one or more data buses. Control and measurement system 804 can be programmed to send a sequence of control signals 810 to the qubit assembly, for example, to perform a selected series of quantum gate operations, and to receive a sequence of readout signals 812 from the qubit assembly, for example, as part of performing a measurement operation.

[0086] The processor 814 is configured to process instructions for execution within the control and measurement system 804. In some implementations, the processor 814 is a single-threaded processor. In other implementations, the processor 814 is a multi-threaded processor. The processor 814 is capable of processing instructions stored in the memory 816.

[0087] The memory 816 stores information within the control and measurement system 804. In some implementations, the memory 816 includes computer-readable media, volatile memory units, and / or non-volatile memory units. In some cases, the memory 816 may include a storage device capable of providing mass storage for the system 804, such as a hard disk device, an optical disk device, a storage device shared by multiple computing devices over a network (e.g., a cloud storage device), and / or some other mass storage device.

[0088] The input / output device 818 provides input / output operations for the control and measurement system 804. The input / output device 818 may include a D / A converter, an A / D converter, and an RF / microwave / optical signal generator, transmitter, and receiver, thereby sending control signals 810 to the quantum bit configuration and receiving readout signals 812 from the quantum bit configuration, as is suitable for the physical scheme used for a quantum computer. In some implementations, the input / output device 818 may also include one or more network interface devices (e.g., an Ethernet card), a serial communication device (e.g., an RS-232 port), and / or a wireless interface device (e.g., an 802.8 card). In some implementations, the input / output device 818 may include a driver device configured to receive input data and send output data to other external devices (e.g., a keyboard, a printer, and a display device).

[0089] Although already Figure 8An example control and measurement system 804 is depicted in the specification, but the subject matter and implementation of the functional operations described in this specification may be implemented in other types of digital electronic circuit systems or in computer software, firmware, or hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of them.

[0090] Implementations of the subject matter and operations described in this specification may be implemented in digital electronic circuitry, analog electronic circuitry, suitable quantum circuitry, or more generally, quantum computing systems, in tangibly embodied software or firmware, in computer hardware (including the structures disclosed in this specification and their structural equivalents), or in a combination of one or more of these. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0091] Implementations of the subject matter described in this specification may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible, non-transitory storage medium for execution by a data processing device or for controlling the operation of a data processing device. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more quantum bits, or a combination of one or more of these. Alternatively or in addition, the program instructions may be encoded on an artificially generated propagated signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information, the artificially generated propagated signal being generated to encode the digital and / or quantum information for transmission to a suitable receiver device for execution by the data processing device.

[0092] The terms quantum information and quantum data refer to information or data carried, held, or stored by a quantum system, wherein the smallest non-trivial system is a qubit, i.e., a system defining a unit of quantum information. It will be understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems may include multi-level systems, e.g., having two or more energy levels. For example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational base state is considered equivalent to the ground state and the first excited state, however, it will be understood that other arrangements are possible in which the computational state is considered equivalent to a higher energy excited state.

[0093] The term "data processing device" refers to digital and / or quantum data processing hardware and encompasses all types of devices, apparatuses, and machines for processing digital and / or quantum data, including, for example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, multiple digital and quantum processors or computers, and combinations thereof. A device may also be or include specialized logic circuitry, such as an FPGA (field programmable gate array), an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing device designed to simulate or generate information about a specific quantum system. Specifically, a quantum simulator is a specialized quantum computer that does not have the ability to perform general-purpose quantum computations. In addition to the hardware, the device may optionally include code that creates an execution environment for digital and / or quantum computer programs, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of these.

[0094] A digital computer program, which may also be referred to or described as a program, software, software application, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and it may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, which may also be referred to or described as a program, software, software application, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and translated into a suitable quantum programming language, or may be written in a quantum programming language such as QCL or Quipper.

[0095] A computer program may, but need not, correspond to a file in a file system. A program may be stored in a portion of a file that stores other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordination files (e.g., files storing one or more modules, subroutines, or code portions). A computer program may be deployed to execute on one computer or on multiple computers located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that can use quantum systems (e.g., qubits) to send quantum data. Generally, a digital data communication network cannot send quantum data, however, a quantum data communication network can send both quantum data and digital data.

[0096] The processes and logic flows described in this specification can be performed by one or more programmable computers (operating using one or more processors, as appropriate) executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and devices can be implemented as, dedicated logic circuitry (e.g., an FPGA or ASIC or a quantum simulator) or by a combination of dedicated logic circuitry or a quantum simulator and one or more programmed digital and / or quantum computers.

[0097] For a system of one or more computers to be "configured to" perform a particular operation or action, it is meant that the system has installed thereon software, firmware, hardware, or a combination thereof that, when operated, causes the system to perform the operation or action. For one or more computer programs to be configured to perform a particular operation or action, it is meant that the one or more programs include instructions that, when executed by a data processing device, cause the device to perform the operation or action. For example, a quantum computer can receive instructions from a digital computer that, when executed by the quantum computing device, cause the device to perform the operation or action.

[0098] A computer suitable for executing a computer program may be based on a general or special purpose processor or any other kind of central processing unit. In general, the central processing unit will receive instructions and data from a read-only memory, a random access memory or a quantum system suitable for sending quantum data (e.g. photons), or a combination thereof.

[0099] Elements of a computer include a central processing unit for executing or performing instructions and one or more memory devices for storing instructions and digital, analog, and / or quantum data. The central processing unit and memory may be supplemented by or incorporated into dedicated logic circuitry or a quantum simulator. Typically, a computer will also include one or more mass storage devices for storing data, such as magnetic disks, magneto-optical disks, optical disks, or quantum systems suitable for storing quantum information, or be operatively coupled to receive data from or transmit data to, or both, the one or more mass storage devices. However, a computer need not have such devices.

[0100] Quantum circuit elements (also referred to as quantum computing circuit elements) include circuit elements for performing quantum processing operations. That is, quantum circuit elements are configured to utilize quantum mechanical phenomena such as superposition and entanglement to perform operations on data in a non-deterministic manner. Certain quantum circuit elements, such as quantum bits, can be configured to simultaneously represent information in more than one state and operate on the information. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, quantum bits (e.g., flux quantum bits, phase quantum bits, or charge quantum bits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DC-SQUIDs).

[0101] In contrast, classical circuit elements generally process data in a deterministic manner. Classical circuit elements can be configured to collectively execute the instructions of a computer program by performing basic arithmetic, logic, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to send data to and / or receive data from quantum circuit elements via electrical or electromagnetic connections. Examples of classical circuit elements include circuit elements based on CMOS circuitry, fast single-flux quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices, and ERSFQ devices, which are energy-efficient versions of RSFQ that do not use bias resistors.

[0102] In some cases, it is possible to use, for example, superconducting quantum and / or classical circuit elements to realize some or all of quantum and / or classical circuit elements. The manufacture of superconducting circuit elements may require the deposition of one or more materials, such as superconductors, dielectrics and / or metals. Depending on the selected material, these materials can be deposited using a deposition process such as chemical vapor deposition, physical vapor deposition (for example, evaporation or sputtering) or epitaxial technology and other deposition processes. The process for manufacturing circuit elements described herein may require removing one or more materials from the device during manufacture. Depending on the material to be removed, removal process may include, for example, wet etching technology, dry etching technology or stripping process. The material forming the circuit elements described herein can be patterned using known photolithography techniques (for example, photolithography or electron beam lithography).

[0103] During operation of a quantum computing system using superconducting quantum circuit elements and / or superconducting classical circuit elements (such as the circuit elements described herein), the superconducting circuit elements are cooled within a cryostat to a temperature that allows the superconducting material to exhibit superconducting properties. Superconducting (alternatively, superconducting) materials can be understood as materials that exhibit superconducting properties at or below the superconducting critical temperature. Examples of superconducting materials include aluminum (superconducting critical temperature of 1.2 Kelvin) and niobium (superconducting critical temperature of 9.3 Kelvin). Thus, superconducting structures such as superconducting traces and superconducting ground planes are formed of materials that exhibit superconducting properties at or below the superconducting critical temperature.

[0104] In some implementations, classical circuit elements electrically and / or electromagnetically coupled to quantum circuit elements (e.g., qubits and qubit couplers) can be used to provide control signals for these quantum circuit elements. The control signals can be provided in digital and / or analog form.

[0105] Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile digital and / or quantum memory, media, and memory devices, including, for example, semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; CD-ROM and DVD-ROM disks; and quantum systems, such as trapped atoms or electrons. It should be understood that quantum memory is a device capable of storing quantum data with high fidelity and efficiency for a long period of time, for example, a light-matter interface that uses light for transmission and uses matter for storage and preservation of quantum characteristics of quantum data (such as superposition or quantum coherence).

[0106] The control of the various systems or portions thereof described in this specification may be implemented using a computer program product comprising instructions stored on one or more non-transitory machine-readable storage media and executable on one or more processing devices. The systems or portions thereof described in this specification may each be implemented as an apparatus, method, or system, which may include one or more processing devices and a memory for storing executable instructions to perform the operations described in this specification.

[0107] Although this specification contains many specific implementation details, these details should not be interpreted as limiting the scope of what may be claimed, but rather as descriptions of features that may be specific to a particular implementation. Certain features described in this specification in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, individual features described in the context of a single implementation may also be implemented in multiple implementations, either individually or in any suitable subcombination. Furthermore, although features are described above as functioning in certain combinations and even initially claimed as such, one or more features from a claimed combination may in some cases be removed from the combination, and a claimed combination may be a variation on a subcombination or subcombination.

[0108] Similarly, although operations are depicted in a particular order in the accompanying drawings, this should not be construed as requiring that such operations be performed in the particular order shown or in a sequential order, or that all illustrated operations be performed, in order to achieve a desired result. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the implementations described above should not be construed as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged in multiple software products.

[0109] Specific implementations of the present subject matter have been described. Other implementations are within the scope of the appended claims. For example, the actions recited in the claims can be performed in a different order and still achieve the desired results. As an example, the processes depicted in the accompanying figures do not necessarily require the particular order shown or sequential order to achieve the desired results. In some cases, multitasking and parallel processing can be advantageous.

Claims

1. A method performed by a quantum computer, the method comprising: Performing a first surface code cycle in a system including a plurality of physical qubits arranged on a grid, wherein performing the first surface code cycle includes: applying a first entanglement operation between a measurement qubit in a ground state and a first data qubit, wherein the first entanglement operation comprises application of a first iSWAP gate and at least one other operation, performed in sequence, such that a result of applying the first entanglement operation between the measurement qubit in the ground state and the first data qubit is equivalent to a result of applying a CZ gate between the measurement qubit in the ground state and the first data qubit; applying a second iSWAP gate between the measurement qubit and a second data qubit; applying a third iSWAP gate between the measurement qubit and a third data qubit; applying a second entanglement operation between the measurement qubit and a fourth data qubit, wherein the second entanglement operation comprises application of a fourth iSWAP gate and at least one other operation, performed in sequence such that a result of applying the second entanglement operation to the measurement qubit and the fourth data qubit is equivalent to a result of applying a CZ gate between the measurement qubit and the fourth data qubit; and The measurement qubit is measured to detect errors.

2. The method of claim 1 , wherein applying the first entanglement operation further comprises applying one or more single-qubit gates to the measurement qubit and the first data qubit.

3. The method of claim 2, wherein applying one or more single-qubit gates to the measurement qubit comprises applying a Hadamard gate to the measurement qubit before applying the first iSWAP gate.

4. The method of claim 2 or claim 3, wherein applying one or more single-qubit gates to the measurement qubit and the first data qubit comprises, after applying the first iSWAP gate: applying an inverse S-gate to the measurement qubit and the first data qubit; and A Hadamard gate is applied to the first data qubit.

5. A method as claimed in any preceding claim, wherein applying the second entanglement operation comprises applying a Hadamard gate to the fourth data qubit before applying the fourth iSWAP gate.

6. The method of any one of the preceding claims, wherein applying the second entangling operation comprises, after applying the fourth iSWAP gate: applying an inverse S-gate to the measurement qubit and the fourth data qubit; and A Hadamard gate is applied to the measurement qubit.

7. The method of claim 6, wherein measuring the measurement qubit to detect an error comprises using a result of a classical controlled NOT operation.

8. The method of any preceding claim, further comprising applying a reset operation to the measurement qubit to reset the measurement qubit to the ground state before applying the first entanglement operation.

9. The method of any one of the preceding claims, wherein executing the first surface code cycle moves information encoded by the measurement qubit and by the first, second, third, and fourth data qubits to other qubits in the grid.

10. The method of claim 9, wherein information encoded by the measurement qubit is moved in a first direction to other qubits in the grid, and information encoded by one or more of the first data qubit, the second data qubit, the third data qubit, or the fourth data qubit is moved in a second direction to other qubits in the grid, wherein the second direction is opposite to the first direction.

11. The method of claim 10, wherein information encoded by the measurement qubit and a data qubit coupled to the measurement qubit in a third direction perpendicular to the first direction moves together in the grid.

12. The method of any one of the preceding claims, further comprising executing a second surface code cycle, wherein executing the second surface code cycle comprises executing the first surface code cycle in reverse order.

13. A quantum computing device comprising: a plurality of physical qubits arranged on a grid; a qubit coupler defining nearest neighbor interactions between the plurality of qubits; as well as Control electronics configured to operate the plurality of qubits and the qubit coupler, wherein the control electronics is configured to perform operations for implementing one or more surface code cycles, the operations comprising the method of any one of claims 1 to 12.

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