Electronic device and method thereof

Abstract

The invention relates to an electronic device and a method thereof. The device includes a target electrode array having a plurality of electrode sites circumferentially arranged along a surface of the device and / or axially arranged along the surface of the device. The device is formed by winding and / or attaching an array of planar electrodes around a carrier.

Description

Cross-references

[0001] This application claims priority to international patent application No. PCT / CN2023 / 071106 filed on January 6, 2023, and Chinese patent application No. 202310019748.5 filed on January 6, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates generally to the field of electronics, including implantable bioelectronics, and more particularly to electronic and bioelectronic devices and methods thereof. Background Art

[0003] Sensory, motor, and cognitive functions involve the coordinated work of numerous neurons across multiple brain regions, both superficial and deep. High-throughput and high-temporal-resolution techniques have facilitated the study of large-scale, dynamic neural networks, aiming to understand the neural circuit mechanisms underlying neurological diseases and regulate neural activity. Extracellular neural electrodes can detect the firing activity of single neurons with high temporal-spatial resolution. Silicon-based neural electrodes fabricated using complementary metal-oxide semiconductor (CMOS) technology offer high-throughput monitoring of neural activity, but their inherent rigidity creates a significant mechanical mismatch with neural tissue and susceptibility to fracture, making them challenging for probing deep brain regions in large animal models or humans. Polymer-based flexible neural electrodes fabricated using micro- and nanofabrication techniques offer biocompatibility and long-term stability. However, these flexible electrodes require auxiliary devices for implantation into neural tissue and are limited in longitudinal dimensions, presenting significant challenges for implantation deep within the subcortical brain. Furthermore, the complexity of micro- and nanofabrication techniques limits their fabrication and performance.

[0004] Therefore, it is desirable to provide an implantable device that has high density and high throughput, adjustable length, stable mechanical properties, is not prone to damage, and has strong operability, so as to facilitate its application in various organisms.

[0005] Furthermore, the connection between electronic components is crucial in fields such as integrated circuits, bioelectronics, and neural engineering. However, conventional soldering techniques for electrical components have relatively strict requirements for external conditions (such as temperature and pressure). This makes it difficult to separate connected components, and even difficult to reconnect them. Therefore, it is desirable to provide a simple, easy-to-use, and reversible method for connecting electronic components. Summary of the Invention

[0006] According to one aspect of the present disclosure, a device may be provided. The device may include a target electrode array having a plurality of electrode sites, the plurality of electrode sites being arranged circumferentially along a surface of the device and / or axially along a surface of the device. The device may be formed by wrapping and / or attaching a planar electrode array around a carrier.

[0007] In some embodiments, the planar electrode array may include an electrode site portion, a lead portion, and an interface portion. A plurality of electrode sites of the target electrode array are arranged in the electrode site portion. The lead portion is configured to connect the electrode site portion to the interface portion. The interface portion is configured to connect the device to a second device.

[0008] In some embodiments, after the planar electrode array is wrapped and / or attached around a carrier, the electrode site portion is exposed on the surface of the device, the lead portion is embedded inside the device or located on the surface of the device, and the interface portion is connected to the lead portion.

[0009] In some embodiments, the planar electrode array comprises connections for connection to a carrier.

[0010] In some embodiments, the connecting portion includes a pore structure or a mesh structure, and the carrier passes through the pore structure or the mesh structure to be fixed on the connecting portion.

[0011] In some embodiments, the carrier is bonded to the connection portions of the planar electrode array by an adhesive material.

[0012] In some embodiments, the carrier is placed into a groove on the planar electrode array so that the carrier is fixed on the connecting portion of the planar electrode array.

[0013] In some embodiments, the planar electrode array is attached to a carrier after being released from the substrate.

[0014] In some embodiments, the planar electrode array is attached to a carrier before being released from the substrate.

[0015] In some embodiments, the lead portion may be "U"-shaped, and the lead portion may be arranged at an end of the planar electrode array opposite to the electrode site portion and the connecting portion.

[0016] In some embodiments, the electrode site portion and the connecting portion are arranged on opposite sides of the planar electrode array.

[0017] In some embodiments, the carrier and the planar electrode array are configured as a unitary structure.

[0018] In some embodiments, one side of the planar electrode array has a beveled edge structure, wherein the beveled edge structure is formed by wrapping the planar electrode array around a carrier to form a tapered structure.

[0019] In some embodiments, the tapered structure is located at the tip of the device.

[0020] In some embodiments, at least one of the base layer or the encapsulation layer of the planar electrode array is made of a flexible material.

[0021] In some embodiments, the flexible material comprises polyimide, polychloroparaxylene, polydimethylsiloxane, polystyrene-block-poly(ethylene- ran At least one of poly(styrene-butadiene)-block-polystyrene, SU-8 photoresist, polyethylene terephthalate, polyurethane, Ecoflex, poly(styrene-butadiene-styrene), or polytetrafluoroethylene.

[0022] In some embodiments, the thickness of the planar electrode array is in the range of 50-100,000 nanometers.

[0023] In some embodiments, the conductive layer of the target electrode array is made of at least one of gold, platinum, copper, aluminum, silver, titanium, chromium, nickel, tantalum, palladium, molybdenum, carbon nanotube (CNT), graphene, carbon material, iridium oxide, titanium nitride, conductive polymer, indium tin oxide, tantalum oxide, or liquid metal.

[0024] In some embodiments, the length of the target electrode array along the longitudinal axis of the device ranges from a few millimeters to tens of centimeters.

[0025] In some embodiments, the number of the plurality of electrode sites of the target electrode array is in the range of 1-50,000.

[0026] In some embodiments, the carrier is configured to wrap around a planar electrode array, improve the mechanical strength of the device, perform optical or electrical stimulation on a subject, or deliver drugs and / or agents.

[0027] In some embodiments, the carrier comprises at least one of a metal wire, a metal tube, a quartz wire, a quartz tube, an optical fiber, a polymer wire, a polymer tube, a combination of a wire and a tube, a ceramic wire, a graphene fiber, a carbon fiber, a stereoelectroencephalography (SEEG) electrode, or an intracranial pressure measurement device.

[0028] In some embodiments, the length of the carrier is in the range of several millimeters to tens of centimeters, and / or the diameter of the carrier is in the range of 5-2000 microns.

[0029] In some embodiments, the length of the device along the longitudinal axis of the carrier is in the range of a few millimeters to tens of centimeters, and / or the diameter of the device is in the range of 10-3000 microns.

[0030] In some embodiments, the size of individual electrode sites of the target electrode array is in the range of 1-3000 μm.

[0031] According to another aspect of the present disclosure, a method for preparing a device may be provided. The method may include preparing a planar electrode array. The method may include winding and / or attaching the planar electrode array around a carrier to form a device having a columnar structure.

[0032] In some embodiments, the method may include preparing a nickel-deposited wafer by depositing nickel on a wafer. Nickel is used as a sacrificial layer for a planar electrode array. The method may include preparing a base layer for the planar electrode array by spin coating, heating, and curing at least one of polyamic acid, polydimethylsiloxane (PDMS), SU-8 photoresist, or polychloroparaxylene obtained by deposition on the nickel-deposited wafer. The method may include preparing a conductive layer for the planar electrode array by depositing and patterning at least one of metal, carbon nanotubes, graphene, carbon material, iridium oxide, titanium nitride, indium tin oxide, tantalum oxide, or a conductive polymer on the base layer of the planar electrode array. The method may include releasing the planar electrode array by etching the sacrificial layer from the wafer using a ferric chloride solution.

[0033] In some embodiments, after preparing the conductive layer of the planar electrode array, the method may include preparing an encapsulation layer for the planar electrode array by spin coating, heating, and curing at least one of polyamic acid, PDMS, and SU-8 photoresist on the conductive layer of the planar electrode array, or by depositing polychloroparaxylene. The method may include preparing a mask by depositing and patterning aluminum on the encapsulation layer of the planar electrode array to obtain a mask encapsulation layer. The method may include processing the mask encapsulation layer using reactive ion etching to obtain a patterned electrode array. The method may include releasing the planar electrode array by etching a sacrificial layer from a wafer using a ferric chloride solution.

[0034] In some embodiments, the method may include securing a carrier to a first side of the planar electrode array. The method may include wrapping and / or attaching the planar electrode array around the carrier. The method may include coating an edge of a second side of the planar electrode array with an adhesive material during a final turn of the wrapping and / or attaching to secure the second side of the planar electrode array to the device.

[0035] In some embodiments, the adhesive material may include polyethylene oxide (PEO) solution, polyethylene glycol (PEG) solution, silk fibroin solution, Kollicoat ® At least one of solution, biological glue, medical glue, sucrose solution, gelatin or photoresist.

[0036] In some embodiments, the method may further include coating at least a portion of the rear surface of the planar electrode array with an adhesive material during the winding and / or attaching process to secure the rear surface of the planar electrode array to the device.

[0037] In some embodiments, the method may include securing the carrier to the first side of the planar electrode array via a connection portion of the planar electrode array.

[0038] In some embodiments, the connecting portion includes a pore structure or a mesh structure, and the carrier passes through the pore structure or the mesh structure to be fixed on the connecting portion.

[0039] In some embodiments, the method may include bonding the carrier to the connection portions of the planar electrode array via an adhesive material.

[0040] In some embodiments, the method may include securing the carrier to the connection portion of the planar electrode array by placing the carrier into a groove of the planar electrode array.

[0041] In some embodiments, the carrier and the planar electrode array are configured as a unitary structure.

[0042] In some embodiments, the carrier can be completely or partially removed or left on the device.

[0043] In some embodiments, the method may further include connecting the device to a second device.

[0044] In some embodiments, the device may include a first connection point, the second device may include a second connection point, and connecting the device to the second device may include aligning the first connection point of the device with the second connection point of the second device in a solution environment; and drying the first connection point and the second connection point so that a physical conductive connection is formed between the aligned first connection point and the second connection point.

[0045] According to another aspect of the present disclosure, a method for connecting electronic components is provided. The method may include: aligning a first connection point of a first electronic component with a second connection point of a second electronic component in a solution environment; and drying the first connection point and the second connection point to form a physical conductive connection between the aligned first connection point and the second connection point.

[0046] In some embodiments, the first electronic component comprises a flexible electronic component; and the first connection point comprises a first conductive structure.

[0047] In some embodiments, the thickness of the first connection point is in the micrometer or submicrometer range.

[0048] In some embodiments, the second electronic component includes at least one of a printed circuit board, a flexible flat cable, a flexible circuit board, a micromachined chip, a complementary metal oxide semiconductor (CMOS) chip, an integrated circuit (e.g., an application specific integrated circuit), or a CMOS metal microelectrode array; and the second connection point may include a second conductive structure.

[0049] In some embodiments, the first connection point may have a mesh structure.

[0050] In some embodiments, the second connection point may have a mesh structure.

[0051] In some embodiments, a physical conductive connection formed between the first connection point and the second connection point electrically connects the first connection point and the second connection point to each other; and a contact resistance between the first connection point and the second connection point is less than or equal to 10 MΩ.

[0052] In some embodiments, a connection area between the first connection point and the second connection point is greater than or equal to 0.1 square micrometers.

[0053] In some embodiments, drying the first connection point and the second connection point includes drying the first connection point and the second connection point so that the first connection point bends to the second connection point under surface tension to form a physical conductive connection.

[0054] In some embodiments, the first electronic component may include a first substrate layer, the second electronic component may include a second substrate layer, and the method may further include: drying the first substrate layer and the second substrate layer to form physical adsorption between the first substrate layer and the second substrate layer.

[0055] In some embodiments, the method may further include: separating the physical conductive connection formed between the first connection point and the second connection point in a solution environment; and re-aligning and re-drying the separated first connection point and the second connection point to re-form a physical conductive connection between the first connection point and the second connection point.

[0056] In some embodiments, the first electronic component may include a device, and the device may include: a target electrode array having a plurality of electrode sites, the plurality of electrode sites being arranged circumferentially along the surface of the device and / or axially along the surface of the device, wherein the device is formed by wrapping and / or attaching the planar electrode array around a carrier.

[0057] In some embodiments, the second electronic component includes at least one of a printed circuit board (PCB), a flexible flat cable (FFC), a flexible expansion board, or a chip.

[0058] Additional features will be set forth in part in the description that follows, and in part will become apparent to those skilled in the art by examination of the following text and the accompanying drawings, or by practice or operation of the examples. The features of the present disclosure may be realized and obtained by practicing or using the various aspects of the methods, tools, and combinations set forth in the detailed examples discussed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] The present disclosure is further described with reference to exemplary embodiments. These exemplary embodiments are described in detail with reference to the accompanying drawings. The drawings are not drawn to scale. These embodiments are non-limiting exemplary embodiments, in which like reference numerals represent similar structures throughout the several views of the drawings, and in which: Figures 1A-1B is a schematic diagram of an exemplary planar electrode array according to some embodiments of the present disclosure; Figure 1C is a picture of an exemplary planar electrode array on a nickel-deposited wafer according to some embodiments of the present disclosure; Figure 2A is a schematic diagram of an exemplary connection between a planar electrode array and a carrier according to some embodiments of the present disclosure; Figure 2B is a schematic diagram of an exemplary process of winding a planar electrode array around a carrier according to some embodiments of the present disclosure; Figure 2C is a schematic diagram of an exemplary device according to some embodiments of the present disclosure; Figure 2D is a picture of an exemplary connection portion according to some embodiments of the present disclosure; Figure 3 is a micrograph showing an exemplary distribution of a plurality of electrode sites in a target electrode array according to some embodiments of the present disclosure; Figure 4A is a picture showing an exemplary connection between a planar electrode array and a carrier according to some embodiments of the present disclosure; Figure 4B are pictures of devices according to some embodiments of the present disclosure; Figure 5A and 5B is a schematic diagram of an exemplary connection between a device and a second device according to some embodiments of the present disclosure; Figure 5C and 5D is a picture of an exemplary connection between a device and a second device according to some embodiments of the present disclosure; Figure 6is a flow chart of an exemplary process for preparing a device according to some embodiments of the present disclosure; Figure 7 is a schematic diagram of an exemplary process for preparing a planar electrode array according to some embodiments of the present disclosure; Figure 8 is a flowchart of an exemplary process for implanting a device into a subject according to some embodiments of the present disclosure; Figure 9A is a picture showing an exemplary process of implanting a device into a rat brain according to some embodiments of the present disclosure; Figure 9B According to some embodiments of the present disclosure Figure 9A an enlarged view of the middle region 910; Figure 9C is a picture of neural signals recorded in rats according to some embodiments of the present disclosure; Figure 10A is a picture showing an exemplary process of implanting a device into a rhesus monkey brain according to some embodiments of the present disclosure; Figure 10B is a picture of neural signals recorded in rhesus monkeys according to some embodiments of the present disclosure; Figure 11 is a flowchart of an exemplary process for connecting electronic components according to some embodiments of the present disclosure; Figure 12 is a schematic diagram of an exemplary process for aligning electronic components to be connected according to some embodiments of the present disclosure; Figure 13 is a schematic diagram of an exemplary structure of a first connection point of a first electronic component according to some embodiments of the present disclosure; Figure 14A and 14B is a schematic diagram illustrating an exemplary connection effect between a first electronic component and a printed circuit board according to some embodiments of the present disclosure; Figure 15 is an exemplary waveform used by the connected electronic component in signal detection after the first electronic component is connected to the printed circuit board according to some embodiments of the present disclosure; Figure 16 is a schematic diagram illustrating an exemplary connection effect between a first electronic component and a flexible flat cable according to some embodiments of the present disclosure; and Figure 17A and 17B is a schematic diagram of an exemplary structure of a first electronic component connected to a flexible circuit board according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0060] The following description is intended to enable one skilled in the art to make and use the present disclosure and is provided in the context of a specific application and its requirements. Various modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure is not limited to the embodiments shown, but should be accorded the widest scope consistent with the claims.

[0061] The terms used herein are intended only to describe specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" used herein may also include the plural forms. It should also be understood that when the terms "comprise," "include," and / or "encompass" are used in this disclosure, the terms "include," "contain," and / or "cover" specify the presence of the features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0062] As used in this disclosure and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not specifically refer to the singular, but may include the plural, unless the context clearly indicates an exception. Generally, the terms "include" and "comprise" only indicate the inclusion of the steps and elements explicitly identified, and these steps and elements do not constitute an exclusive list, and the method or device may also include other steps or elements. The term "based on" means "based at least in part on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment".

[0063] It should be understood that the terms "system," "engine," "unit," "module," and / or "block" used herein are a method of distinguishing different components, elements, parts, portions, or assemblies at different levels in ascending order. However, these terms may be replaced by another expression if they achieve the same purpose.

[0064] It will be understood that when a unit, engine, module, or block is referred to as being "attached," "connected," or "coupled to" another unit or module, it can be directly attached, connected, or coupled to, or in communication with, the other unit, engine, module, or block, or intervening units, engines, or modules may be present, unless the context clearly indicates otherwise. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0065] In this disclosure, unless otherwise expressly specified or limited, the terms "connect," "link," "fixed," and the like should be understood in a broad sense. For example, they can refer to fixed, removable, or integral connections; they can be mechanical or electrical; and unless otherwise expressly limited, they can refer to direct connections or indirect connections through an intermediate medium, connections between two elements, or interactions between two elements. Those skilled in the art will appreciate the specific meanings of these terms in this disclosure based on the specific circumstances.

[0066] In the description of the present disclosure, it should be understood that the terms "upper", "lower", "surface", etc. represent the orientation or position relationship based on the drawings, and are only intended to facilitate the description of the present disclosure and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific direction, must be constructed and operated in a specific direction, and therefore should not be interpreted as a limitation on the present disclosure.

[0067] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly specifying the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the description of this disclosure, "plurality" refers to at least two, such as two, three, etc., unless otherwise explicitly and specifically limited.

[0068] These and other features and characteristics of the present disclosure, as well as the methods of operation and function of the related elements of the structure, as well as the assembly of parts and economy of manufacture, may become more apparent upon consideration of the following description with reference to the accompanying drawings, all of which form a part of this disclosure. However, it is to be expressly understood that the drawings are for illustration and description purposes only and are not intended to limit the scope of the present disclosure. It is understood that the drawings are not drawn to scale.

[0069] The flowcharts used in this disclosure illustrate steps for implementing a system according to some embodiments of the present disclosure. It should be clearly understood that the steps of the flowcharts may not be performed sequentially. Instead, the steps may be performed in reverse order or simultaneously. In addition, one or more additional steps may be added to the flowcharts. One or more steps may be deleted from the flowcharts.

[0070] One aspect of the present invention relates to an implantable device. The device (e.g., a bioelectronic probe) may include a target electrode array. The target electrode array may have a plurality of electrode sites arranged circumferentially and / or axially along the surface of the device. The device may be formed by wrapping and / or attaching a planar electrode array around a carrier. In some embodiments, after the planar electrode array is wrapped around and / or attached to the carrier to form the device, the carrier may be completely or partially removed from the device.

[0071] According to some embodiments of the present disclosure, devices (e.g., bioelectronic probes) with dense recording / stimulation sites and high channel counts can be provided. These devices can be used to record and / or stimulate physiological activity (e.g., bioelectrical activity such as neural activity). The device dimensions (e.g., length) can be adjusted over a wide range (e.g., from a few millimeters to tens of centimeters) based on practical needs, allowing the device to be applied to a wide range of organisms and organs, such as multiple brain regions, as well as the cerebral cortex and deep subcortical brain regions of primates and / or rodents. Furthermore, the arrangement of the device's electrode sites (e.g., the number of electrode sites, their location, and the distance between adjacent electrode sites) can be designed based on practical needs. The electrode sites can be modified or adjusted to enable electrophysiological and / or neurochemical recording and / or electrical stimulation in multiple brain regions. Furthermore, the device can be fabricated using micro-nanofabrication processes, which are simple, reliable, and highly operable. The device may also possess high mechanical stability and be resistant to breakage. Therefore, the device has a wide range of applications (e.g., from a single brain region in small animal models to multiple brain regions in primates) and can enable the probing of brain neural circuits.

[0072] Figures 1A-1B is a schematic diagram of an exemplary planar electrode array according to some embodiments of the present disclosure. Figure 1C is a picture of an exemplary planar electrode array on a nickel-deposited wafer according to some embodiments of the present disclosure.

[0073] The planar electrode array 100 can be used to prepare a device. For example, the planar electrode array 100 can be wound around and / or attached to a carrier to form a device. In some embodiments, after the planar electrode array 100 is wound around and / or attached to a carrier to form a device, the carrier can be completely or partially left on or removed from the device. In some embodiments, the planar electrode array 100 can be a thin, flexible planar electrode array. For example, the thickness of the planar electrode array 100 can be in the range of 50-100,000 nanometers. In some embodiments, the thickness of different areas of the planar electrode array 100 can be the same or different.

[0074] like Figure 1A and 1B As shown, the planar electrode array 100 may include an electrode site portion 110, a lead portion 120, and an interface portion 130. In some embodiments, as shown in FIG. Figure 1A and 1B As shown, the lead portion 120 can be located on or near a first side (e.g., side A) of the planar electrode array 100, the electrode site portion 110 can be located on a second side (e.g., side B) of the planar electrode array 100, and the interface portion 130 can be located on a third side (e.g., side C) of the planar electrode array 100.

[0075] The electrode site portion 110 may include a plurality of electrode sites (e.g., Figure 1A The plurality of electrode sites 111 shown). The plurality of electrode sites may form a target electrode array of a device as described elsewhere in this disclosure (e.g., as Figure 2C and Figure 3 The target electrode array 230 is shown). The electrode sites can electrically communicate with the object by coupling or implanting the object to detect the electrophysiological activity and / or parameters (e.g., physiological parameters) of the object. The object may include a patient, an animal, etc., or a specific part thereof (e.g., an organ, tissue). In some embodiments, the multiple electrode sites in the electrode site portion 110 may be of the same type or of different types. In some embodiments, one or more of the multiple electrode sites may be selectively used to detect the electrophysiological activity and / or parameters of the object according to actual requirements, and other electrode sites may be deactivated. In some embodiments, the surface of one or more of the multiple electrode sites may be chemically or biologically modified to expand the detection capabilities of the device. For example, the modified electrode sites may be used for electrochemical detection to detect the physiological parameters of the object, and / or to administer electrical pulses to regulate the activity of the object.

[0076] In some embodiments, the electrode site portion 110 may include any number (or number) of electrode sites. For example, the electrode site portion 110 may include tens, hundreds, thousands, or tens of thousands of electrode sites. In some embodiments, the plurality of electrode sites may be arranged at any location in the electrode site portion 110 in any suitable manner. For example, the plurality of electrode sites may be arranged in an array. The array may include multiple columns of electrode sites and multiple rows of electrode sites. Different columns or rows may include the same number (or number) or different numbers (or numbers) of electrode sites. Figure 1A As shown, multiple electrode sites can be arranged in a staggered arrangement. In some embodiments, the array can be a planar shape. In some embodiments, multiple electrode sites can be arranged into multiple arrays. Multiple arrays can be arranged in the same layer or different layers of the planar electrode array 100.

[0077] In some embodiments, the arrangement density of the electrode sites in the electrode site section 110 may be uniform or non-uniform. For example, the distances between adjacent electrode sites in the plurality of electrode sites in the electrode site section 110 may be the same or different.

[0078] The lead portion 120 can be configured to connect the electrode site portion 110 to the interface portion 130 so as to conduct electrical signals between the electrode site portion 100 and the interface portion 130. In some embodiments, the lead portion 120 may include a plurality of leads or traces. The plurality of leads or traces can transmit signals of multiple channels (e.g., bioelectric signals, control signals, excitation signals, and / or signals related to information (e.g., physiological parameters)) between the electrode site portion 110 and the interface portion 130. In some embodiments, the lead may include a metal wire or a metal line. In some embodiments, the interface portion 130 may include a plurality of pads. Each electrode site can be connected to one of the plurality of pads via a lead to transmit a channel signal.

[0079] In some embodiments, the layout of the multiple leads in lead section 120 (e.g., lead width, distance between adjacent leads) can be determined based on actual requirements (e.g., the type of object to be detected). For example, for relatively short devices used in rodents, the lead width may be in the range of 1-20 μm (e.g., 1.5 μm), and the distance between adjacent leads (e.g., the center-to-center spacing between adjacent leads) may be in the range of 2-60 μm (e.g., 4 μm). As another example, for relatively long devices used in non-human primates, the lead width may be in the range of 1-20 μm (e.g., 3 μm), and the distance between adjacent leads may be in the range of 2-60 μm (e.g., 8 μm).

[0080] The interface unit 130 can be configured to connect the device to a second device. The second device can be configured to collect, transmit, and / or process data and / or information obtained by the planar electrode array 100. In some embodiments, the second device can include a connection cable (or connection board) connected to the interface unit 130. In some embodiments, the second device can include a printed circuit board (PCB), a flexible flat cable (FFC), a flexible expansion board, an integrated circuit chip (e.g., a CMOS chip), or any combination thereof.

[0081] In some embodiments, the interface portion 130 can be connected to the second device by any suitable connection method. For example, the interface portion 130 can be connected to the second device by flip-chip bonding, bonding conductive material (e.g., silver epoxy), wire bonding, direct connection, etc. or any combination thereof. As another example, the interface portion 130 can be connected to the second device using Figure 11 The connection method shown is connected to the second device. More description of the connection between the interface portion 130 and the second device can be found elsewhere in this disclosure (e.g., Figures 5A-5D 、 Figure 11-17B and its description).

[0082] In some embodiments, the electrode site portion 110, the lead portion 120, and the interface portion 130 may be arranged on the same surface of the planar electrode array 100, or may be arranged on different surfaces of the planar electrode array 100. For example, the electrode site portion 110 may be arranged on the front surface of the planar electrode array 100. The lead portion 120 and the interface portion 130 may be arranged on the rear surface of the planar electrode array 100.

[0083] It should be noted that Figures 1A-1C The planar electrode array shown in FIG is for illustrative purposes only and is not intended to limit the scope of the present disclosure. The arrangement of the electrode site portion 110, lead portion 120, and interface portion 130 of the planar electrode array 100 can be designed based on actual requirements (e.g., the characteristics of the brain region of the subject to be examined). For example, the electrode site portion 110, lead portion 120, and interface portion 130 can be located anywhere within the planar electrode array 100.

[0084] Figures 2A-2C is a schematic diagram of an exemplary process for preparing a device according to some embodiments of the present disclosure. Figure 2A 2B is a schematic diagram of an exemplary connection between a planar electrode array and a carrier according to some embodiments of the present disclosure; 2B is a schematic diagram of an exemplary process of winding a planar electrode array around a carrier according to some embodiments of the present disclosure; Figure 2C is a schematic diagram of an exemplary device according to some embodiments of the present disclosure. Figure 2D are pictures of exemplary connecting portions according to some embodiments of the present disclosure.

[0085] like Figure 2A As shown, the planar electrode array 100 may include a connection portion 210. The connection portion 210 may be configured to connect the planar electrode array 100 to a carrier 220. The carrier 220 may be configured to wrap around the planar electrode array 100 to improve the mechanical strength of the device, perform optical stimulation or electrical stimulation on a subject, and / or perform drug delivery. For example, the carrier 220 may have a hollow structure to deliver drugs and / or agents to a subject. As another example, the carrier 220 may be a biomedical electrode to perform optical stimulation or electrical stimulation on a subject.

[0086] In some embodiments, carrier 220 may include metal wire, metal tube, quartz wire, quartz tube, optical fiber, polymer wire, polymer tube, ceramic wire, ceramic tube, rubber tube, silicone tube, graphene fiber, carbon fiber, carbon nanotube wire, a combination of wire and tube, stereoelectroencephalogram (SEEG) electrode, intracranial pressure measurement device, or any combination thereof. Metal wire may include tungsten wire, Ni-Ti alloy wire, Ni-Cr alloy wire, etc. In some embodiments, the type of carrier 220 may be selected based on actual requirements to achieve different functions. Therefore, by using a multifunctional integrated carrier 220, electrical measurement or stimulation can be synchronized with other measurements.

[0087] The carrier may have a single-layer or multi-layer structure. In some embodiments, the carrier may have a single-layer structure. In some embodiments, the single-layer carrier may have a hollow structure or a solid structure. In some embodiments, the single-layer carrier may include a metal wire, a metal tube, a quartz wire, a quartz tube, an optical fiber, a polymer wire, a polymer tube, a ceramic wire, a ceramic tube, a rubber tube, a silicone tube, a graphene fiber, a carbon fiber, a carbon nanotube wire, a stereoelectroencephalogram (SEEG) electrode, an intracranial pressure measurement device, or any combination thereof.

[0088] In some embodiments, the multilayer carrier can include an outer hollow catheter and an inner guidewire. In some embodiments, the outer hollow catheter can include a metal tube, a quartz tube, a polymer tube, a ceramic tube, a rubber tube, a silicone tube, a carbon tube, or any combination thereof. The inner guidewire can include a metal wire, a quartz wire, an optical fiber, a polymer wire, a ceramic wire, a graphene fiber, a carbon fiber, a carbon nanotube wire, a stereoelectroencephalogram (SEEG) electrode, an intracranial pressure measurement device, or any combination thereof. In some embodiments, the outer hollow catheter and the inner guidewire can be made of the same material. Alternatively, the outer hollow catheter and the inner guidewire can be made of different materials.

[0089] In some embodiments, the length of carrier 220 can range from a few millimeters to tens of centimeters. In some embodiments, the diameter of carrier 220 can range from 5 to 2000 μm. For example, when carrier 220 is a tungsten wire, the diameter of the tungsten wire can be 30 μm, 50 μm, 100 μm, etc. In some embodiments, the length and / or diameter of carrier 220 can be determined based on actual requirements (e.g., the type of object to be inspected).

[0090] The connecting portion 210 can be configured to secure the carrier 220 to the planar electrode array 100. In some embodiments, the electrode site portion 110 and the connecting portion 210 can be arranged on opposite sides of the planar electrode array 100. For example, the electrode site portion 110 can be located on the second side (e.g., side B) of the planar electrode array 100. In some embodiments, the lead portion can be "U"-shaped, and the lead portion can be arranged at an end of the planar electrode array opposite the electrode site portion and the connecting portion. In some embodiments, the lead portion can be arranged on both sides of the electrode site portion. The carrier 220 can be secured to the first side (e.g., side A) of the planar electrode array 100 via the connecting portion 210. In some embodiments, the electrode site portion 110 and the connecting portion 210 can be arranged on opposite surfaces of the planar electrode array 100. For example, the electrode site portion 110 can be arranged on the front surface of the planar electrode array 100, and the connecting portion 210 can be arranged on the back surface of the planar electrode array 100.

[0091] In some embodiments, the connecting portion 210 may include a hole structure or a mesh structure (e.g., Figure 2D The carrier 220 can be fixed on the connecting portion 210 through the hole structure or mesh structure. In some embodiments, the holes of the hole structure or mesh structure can be circular, triangular, rectangular, square, diamond or other regular and / or irregular polygonal shapes.

[0092] In some embodiments, the carrier 220 may be connected to the planar electrode array 100 (e.g., the connection portion 210 of the planar electrode array 200) by bonding. For example, the carrier 220 may be connected to the connection portion 210 by bonding material. The bonding material may include polyethylene oxide (PEO) solution, polyethylene glycol (PEG) solution, silk fibroin solution, Kollicoat ® Solution, biological glue, medical glue, sucrose solution, gelatin or photoresist, etc.

[0093] In some embodiments, the carrier 220 (e.g., a metal wire, a quartz tube, an optical fiber) can be connected to the planar electrode array 100 (e.g., the connection portion 210 of the planar electrode array 200) by embedding. As an example only, a groove (e.g., a polymer groove) can be arranged on one side of the planar electrode array 100 (e.g., as shown in FIG. Figure 2AThe first side (e.g., side A) shown in FIG. 1 is a planar electrode array 100, and the carrier 220 can be fixed to the planar electrode array 100 by placing the carrier 220 into the groove. In some embodiments, the groove (e.g., a polymer groove) can be formed on the planar electrode array 100 using a micro-nanofabrication process. In some embodiments, the size of the groove can match the size of the carrier 220. For example, the ratio of the size of the groove (e.g., the diameter of the groove) to the size of the carrier 220 (e.g., the diameter of the carrier 220) can be in the range of 2:1.

[0094] In some embodiments, the planar electrode array 100 can be connected to the carrier 220 after being released from the substrate. In some embodiments, the planar electrode array 100 can be connected to the carrier 220 before being released from the substrate. That is, after the planar electrode array 100 is connected to the carrier 220, the planar electrode array 100 can be released from the substrate.

[0095] In some embodiments, the carrier 220 and the planar electrode array 100 can be configured as an integrally formed structure. In some embodiments, the carrier 220 and the planar electrode array 100 can be prepared by micro-nano processing. For example, the carrier 220 can be made of photoresist (e.g., SU-8). Before the planar electrode array 100 is released from the substrate, the carrier 220 can be formed on one side of the planar electrode array 100 (e.g., Figure 2A Then, after removing the substrate from the planar electrode array 100 , an integrally formed structure including the planar electrode array 200 and the carrier 220 can be generated.

[0096] like Figure 2C As shown, the target electrode array 230 can be formed by winding the planar electrode array 100 around the carrier 220. In some embodiments, the planar electrode array 100 can be wound and / or attached around the carrier 220 using a manual winding mode. In some embodiments, the planar electrode array 100 can be wound and / or attached around the carrier 220 using an automatic winding mode. For example, the planar electrode array 100 can be wound and / or attached around the carrier 220 using a winding device.

[0097] In some embodiments, during the winding process, at least a portion of the rear surface of the planar electrode array 100 (i.e., the surface of the planar electrode array 100 opposite to the surface of the planar electrode array 100 where the electrode site portion 110 is located) can be coated with an adhesive material to fix the rear surface of the planar electrode array 100 to the device 200.

[0098] In some embodiments, the planar electrode array 100 may be wound and / or attached multiple times around the carrier 220. That is, the planar electrode array 100 may be wound and / or attached multiple times around the carrier 220 in a direction perpendicular to the axis of the carrier 220 (e.g., Figures 2A-2C In some embodiments, in the last turn of the winding process, the second side of the planar electrode array 100 (for example, Figure 2B The edge of the second side (eg, side B) shown in FIG. 1 may be coated with an adhesive material to fix the second side of the planar electrode array 100 to the device 200. For example, the planar electrode array 100 may include a second connection portion ( Figure 2A and 2B (not shown). The second connection portion and the connection portion 210 can be arranged on opposite sides of the planar electrode array 100. For example, the connection portion 210 can be located on the first side (e.g., side A) of the planar electrode array 100, and the second connection portion can be located on the second side (e.g., side B) of the planar electrode array 100. In some embodiments, the second connection portion can include a hole structure or a mesh structure. For example, the hole can be a diamond with a side length of 50 μm. During the last turn of the winding process, the second connection portion can be coated with an adhesive material to secure the second side of the planar electrode array 100 to the device 200.

[0099] In some embodiments, the fourth side of the planar electrode array 100 (e.g., Figure 2A and 2B For example, the first side (e.g., Figure 2A Side A shown) and side 4 (as Figure 2A and 2B The angle between the D side shown) can be in the range of 83-89 degrees. The bevel edge structure can be configured to form a tapered structure (e.g., as shown) by wrapping the planar electrode array 100 around the carrier 220. Figure 2B The tapered structure 240 is shown. The tapered structure can be located at the tip of the device 200. The tapered structure can facilitate implantation of the device 200 into a subject (eg, neural tissue of a human or animal).

[0100] In some embodiments, the fourth side of the planar electrode array 100 (e.g., Figure 2A and 2B The D side shown) may have a horizontal edge structure. The horizontal edge structure may be configured to form a columnar structure ( Figures 2A-2C not shown).

[0101] In some embodiments, after the planar electrode array 100 is wrapped and / or attached around the carrier 220, the electrode site portion 110 may be exposed on a surface (eg, an outer surface) of the device 200, and the lead portion 120 ( Figure 2C (not shown) may be embedded in the interior of the device 200 or located on the surface of the device 200, such as Figure 2CAs shown. In some embodiments, the device 200 formed by wrapping the planar electrode array 100 around the carrier 220 can resemble a "flag-shaped device." As used herein, an "external surface (or external component)" may refer to a surface (or component) that is exposed to air or contacts another component surface, and an "inner surface (or internal component)" may refer to a surface (or component) that is not exposed to air or is not visible from the outside.

[0102] In some embodiments, after forming the device 200, the carrier 220 may be completely or partially left in the device 200 or removed from the device 200. In some embodiments, by wrapping the planar electrode array 100 around the carrier 220 to form the device 200, the mechanical strength of the device 200 may be relatively high even after the carrier 220 is removed from the device 200.

[0103] In some embodiments, the conductive layer of target electrode array 230 can be made of gold, platinum, copper, aluminum, silver, titanium, chromium, nickel, tantalum, palladium, molybdenum, carbon nanotubes (CNTs), graphene, carbon materials, iridium oxide, titanium nitride, conductive polymers, indium tin oxide, tantalum oxide, liquid metal, or any combination thereof. In some embodiments, the length of the target electrode array along the longitudinal axis of device 200 can range from a few millimeters to tens of centimeters.

[0104] It should be noted that Figures 2A-2D The planar electrode array shown in FIG is for illustration purposes only and is not intended to limit the scope of the present disclosure. The arrangement of the carrier 220 and the connecting portion 210 can be designed based on actual requirements.

[0105] Figure 3 is a micrograph showing an exemplary distribution of multiple electrode sites in a target electrode array according to some embodiments of the present disclosure.

[0106] like Figure 3 As shown, after the planar electrode array 100 is wrapped and / or attached around the carrier 220, the plurality of electrode sites 111 can be arranged circumferentially around the surface of the device and / or axially along the surface of the device to form a target electrode array 230. In some embodiments, the plurality of electrode sites 111 can be distributed over the entire surface of the device or a portion of the surface of the device.

[0107] In some embodiments, the plurality of electrode sites 111 may be arranged in an array. The array may include several columns of electrode sites 111 and several rows of electrode sites 111. Different columns or rows may include the same number (or number) or different numbers (or number) of electrode sites 111. Figure 3 As shown, the plurality of electrode sites 111 may be arranged in a staggered manner.

[0108] In some embodiments, the number of electrode sites 111 of the target electrode array 230 can be in the range of 1-50,000. In some embodiments, the size of the electrode sites 111 of the target electrode array 230 can be in the range of 1-3,000 μm. In some embodiments, the number of electrode sites 111 and / or the size of the electrode sites 111 can be determined based on actual requirements.

[0109] Figure 4A is a picture showing an exemplary connection between a planar electrode array and a carrier according to some embodiments of the present disclosure. Figure 4B are pictures of devices shown according to some embodiments of the present disclosure.

[0110] like Figure 4A As shown, the planar electrode array 100 may include an electrode site portion 110, a lead portion 120, and an interface portion 130. Before the planar electrode array 100 is wrapped and / or attached around the carrier 220, the carrier 220 may be fixed to one side of the planar electrode array 100.

[0111] like Figure 4B As shown, the planar electrode array 100 can be wrapped and / or attached around a carrier 220 to form a device 200. After the planar electrode array 100 is wrapped and / or attached around the carrier 220, the electrode site portion 110 can be exposed on the outer surface of the device 200, and the lead portion 120 can be embedded in the interior of the device 200 or located on the surface of the device 100. The interface portion 130 can connect the device 200 to a second device, as described elsewhere in this disclosure. For example, the interface portion 130 can be connected to a connecting cable (or connecting board) of the second device.

[0112] In some embodiments, the length of the device 200 along the longitudinal axis of the carrier 220 can be in the range of several millimeters to tens of centimeters. For example, the length of a portion of the device 200 implanted in rodent tissue can be 1 cm. That is, for the device 200 implanted in rodent tissue, the length of the target electrode array along the longitudinal axis of the carrier of the device 200 can be 1 cm. As another example, the length of a portion of the device 200 implanted in non-human primate tissue may be equal to or greater than 5 cm. That is, for the device 200 implanted in non-human primate tissue, the length of the target electrode array along the longitudinal axis of the carrier of the device 200 can be equal to or greater than 5 cm. In some embodiments, the diameter of the device 200 can be in the range of 10-3000 μm.

[0113] Figure 5A and 5B is a schematic diagram of exemplary connections between a device and a second device according to some embodiments of the present disclosure. Figure 5C and 5DFIG is a diagram showing exemplary connections between a device and a second device according to some embodiments of the present disclosure. Figure 5A and 5B As shown, the device 200 can be connected to the second device 300 via the interface portion 130. The second device 300 can be configured to collect, transmit and / or process data and / or information obtained by the device 200, and / or transmit stimulation pulses to the device 200. In some embodiments, the second device 300 may include a PCB (e.g., Figure 5C PCB 510 shown), FFC, flexible expansion board (e.g., Figure 5D In some embodiments, the interface portion 130 can be connected to the second device 300 by any suitable connection method. For example, the interface portion 130 can be connected by flip-chip bonding, bonding conductive materials (e.g., silver epoxy), wire bonding, direct connection (e.g., as shown in FIG. Figure 5C and 5D As another example, a device (eg, the interface portion 130 of the device) may be connected to the second device 300 using a plurality of connectors (e.g., a plurality of connectors) as shown in FIG. Figure 11 The connection method shown in can be connected to the second device 300. In some embodiments, the device can include a first connection point (e.g., interface portion 130) and the second device can include a second connection point. In a solution environment, the first connection point of the device can be aligned with the second connection point of the second device. The first connection point and the second connection point can be dried so that a physical conductive connection is formed between the aligned first connection point and the second connection point. Further description of exemplary connection methods can be found elsewhere in this disclosure (e.g., Figure 11 、 12 , 13, 14A, 14B, 16, 17A, 17B and related descriptions).

[0114] Figure 6 is a flow chart of an exemplary process for preparing a device according to some embodiments of the present disclosure. The steps of the process shown below are intended to illustrate the problem. In some embodiments, process 600 can be implemented by one or more additional steps not described and / or one or more steps not discussed. In addition, Figure 6 The order in which the steps of process 600 are shown and described below is not intended to be limiting.

[0115] Step 610, prepare a planar electrode array (e.g., Figures 1A-1C , 2A, 2B and 4A).

[0116] In some embodiments, the planar electrode array can be manufactured using micro-nanofabrication techniques (e.g., micro-electromechanical systems (MEMS) technology, CMOS technology). In some embodiments, the planar electrode array can be manufactured based on thin film deposition technology, physical vapor deposition (PVD) technology, photolithography technology, etching technology (e.g., reactive ion etching technology), or any combination thereof.

[0117] In some embodiments, the planar electrode array may include a base layer, a conductive layer, and an encapsulation layer. In some embodiments, the base layer and / or the encapsulation layer of the planar electrode array may be made of a flexible material. For example, the base layer and / or the encapsulation layer of the planar electrode array may be made of polyimide (PI), polychloroparaxylene, polydimethylsiloxane (PDMS), polystyrene-block-poly(ethylene- ran -butylene)-block-polystyrene (Polystyrene-block-poly(ethylene- ran -butylene)-block-polystyrene, SEBS), SU-8 photoresist, polyethylene terephthalate (PET), polyurethane (PU), Ecoflex, poly(styrene-butadiene-styrene) (Styrene-butadiene-styrene, SBS), polytetrafluoroethylene, etc. or any combination thereof.

[0118] In some embodiments, the nickel deposition wafer can be prepared by depositing nickel on a wafer. Nickel can be used as a sacrificial layer for a planar electrode array. For example, nickel can be deposited on a wafer by magnetron sputtering technology. In some embodiments, the thickness of the sacrificial layer can be in the range of 50-200nm. The base layer of the planar electrode array can be prepared by spin coating, heating and curing polyamic acid, PDMS or SU-8 photoresist, or by depositing polychloroparaxylene on a nickel deposition wafer. In some embodiments, the thickness of the base layer can be in the range of 50-50000nm. For example, the thickness of the base layer can be 500nm.

[0119] The conductive layer in the planar electrode array can be prepared by depositing and patterning at least one of a metal (e.g., chromium (Cr) / gold (Au), platinum), carbon nanotubes, graphene, a carbon material, iridium oxide, titanium nitride, indium tin oxide, tantalum oxide, or a conductive polymer) on the base layer of the planar electrode array. The conductive layer can be configured to record physiological signals and / or enable electrical connection to external devices. For example, the patterned metal layer can be prepared by depositing Cr / Au on the base layer using photolithography and magnetron sputtering techniques.

[0120] The encapsulation layer in the planar electrode array can be prepared by spin coating, heating, and curing at least one of polyamic acid, PDMS, SEBS, and SU-8 photoresist on the conductive layer of the planar electrode array, or by depositing polychloroparaxylene. For example, the encapsulation layer can be prepared on a patterned metal layer. In some embodiments, the thickness of the encapsulation layer can be in the range of 50-50,000 nm. For example, the thickness of the encapsulation layer of the planar electrode array can be 500 nm.

[0121] The mask can be prepared by depositing and patterning aluminum (Al) on the encapsulation layer of the planar electrode array to obtain a mask encapsulation layer. For example, the mask can be prepared by depositing and patterning Al on the encapsulation layer using photolithography and magnetron sputtering techniques.

[0122] The patterned electrode array can be prepared by treating the mask encapsulation layer using reactive ion etching. In some embodiments, the electrode sites and interface portions can be exposed on the patterned electrode array by treating the mask encapsulation layer. The planar electrode array can be obtained by etching the mask and sacrificial layer from the wafer using a ferric chloride solution. For example, the planar electrode array can be released by etching the mask and sacrificial layer from the wafer using a ferric chloride solution. The planar electrode array can be repeatedly cleaned with deionized water. More descriptions of preparing the planar electrode array can be found elsewhere in this disclosure (e.g., Figure 7 and its description).

[0123] In some embodiments, the steps of preparing the encapsulation layer of the planar electrode array, preparing the mask encapsulation layer, and processing the mask encapsulation layer can be omitted. For example, after preparing the conductive layer of the planar electrode array, the planar electrode array can be released by etching the sacrificial layer from the wafer using a ferric chloride solution.

[0124] Step 620: Wind and / or attach the planar electrode array to a carrier (e.g., Figures 2A-2C , 4A and 4B) around the carrier 220 to form a device (eg, Figure 2C 、 4B , 5A and 5B). The device has a columnar structure.

[0125] In some embodiments, after releasing the planar electrode array, the carrier can be fixed to the first side of the planar electrode array (e.g., Figure 1A 、 1B and side A shown in 2A). The planar electrode array can be wound and / or attached around the carrier. In the last turn of the winding, the second side of the planar electrode array (e.g., Figure 1A 、 1BThe edge of the planar electrode array (side B shown in 2A and 2B) can be coated with an adhesive material to fix the second side of the planar electrode array to the device. More description of wrapping the planar electrode array around the carrier to form a device can be found elsewhere in this disclosure (e.g., Figures 2A-2C and its description).

[0126] It should be noted that the above description is for illustrative purposes only and is not intended to limit the scope of the present disclosure. For those of ordinary skill in the art, various changes and modifications can be made under the teachings of the present disclosure. However, these changes and modifications do not depart from the scope of the present disclosure.

[0127] Figure 7 is a schematic diagram of an exemplary process for preparing a planar electrode array according to some embodiments of the present disclosure. The steps of the process shown below are intended to illustrate the problem. In some embodiments, process 700 can be implemented by one or more additional steps not described and / or one or more steps not discussed. In addition, Figure 7 The order in which the steps of process 700 are shown and described below is not intended to be limiting.

[0128] In step 701, nickel can be deposited on a wafer by magnetron sputtering to prepare a nickel-deposited wafer. In step 702, a base layer can be prepared by spin coating, heating, and curing polyamic acid on the nickel-deposited wafer. In step 703, LOR 3A stripping resist and S1813 photoresist can be spin coated on the base layer. In step 704, the coated photoresist can be patterned using photolithography to obtain a patterned photoresist. In step 705, Cr / Au can be deposited on the base layer and the patterned photoresist by magnetron sputtering. In step 706, the patterned photoresist can be removed by metal stripping to obtain a conductive layer.

[0129] In step 707, the encapsulation layer can be prepared by spin coating, heating and curing the polyamide acid on the conductive layer. In step 708, LOR 3A stripping resist and S1813 photoresist can be spin coated on the encapsulation layer. In step 709, the coated photoresist can be patterned using photolithography technology to obtain a patterned photoresist. In step 710, an Al mask can be prepared by depositing and patterning Al on the encapsulation layer to obtain a mask encapsulation layer. In step 711, the patterned photoresist can be removed by metal dissolution stripping technology. In step 712, a patterned electrode array can be obtained by treating the mask encapsulation layer using reactive ion etching. In step 713, the planar electrode array can be released by etching the Al mask and sacrificial layer from the wafer using ferric chloride solution. The planar electrode array can be a three-layer structure including a base layer, a conductive layer and an encapsulation layer.

[0130] In some embodiments, steps 707-712 may be omitted. In this case, step 713 may be performed to release the planar electrode array by etching the sacrificial layer from the wafer using a ferric chloride solution.

[0131] Figure 8 800 is a flow chart illustrating an exemplary process for implanting a device into a subject according to some embodiments of the present disclosure. The steps of the process shown below are intended to illustrate the problem. In some embodiments, process 800 may be implemented with one or more additional steps not described and / or one or more steps not discussed. In addition, Figure 8 The order in which the steps of process 800 are shown and described below is not intended to be limiting.

[0132] Step 810, a device (e.g., Figure 2C 、 4B , 5A, 5B, 5C and 5D shown in the device 200) interface portion (eg, Figure 1A 、 1B , 2A-2C, 4A, 4B, 5B, 5A, 5C and 5D shown in the interface portion 130) is connected to the second device (eg, Figure 5A and 5B 300 shown).

[0133] Further description of connecting the interface portion to the second device can be found elsewhere in this disclosure (e.g., Figure 1A 、 1B , 5A, 5B and their descriptions).

[0134] Step 820: Fix the object on a fixing device.

[0135] The subject may be a patient, an animal (e.g., a rodent, a non-human primate), etc. The fixation device may be configured to fix the position and / or posture of the subject to maintain the subject in a stationary state, thereby facilitating implantation of the device into the subject. For example, the fixation device may include a stereotactic device.

[0136] Step 830: Determine the implantation trajectory.

[0137] The implantation trajectory can be configured to guide implantation of the device into the subject or portion thereof (e.g., brain tissue). In some embodiments, the implantation trajectory can be determined based on practical requirements (e.g., the type of subject, the type of parameters detected by the subject). In some embodiments, the implantation trajectory can be determined based on a surgical navigation system.

[0138] Step 840 , implanting the device into a subject.

[0139] In some embodiments, the device can be implanted into the subject after a craniotomy is performed on the subject and the dura mater of the subject is removed. For example, the device can be fixed to a fixation device (e.g., an electrode holder), and the device can be implanted into the subject by controlling the movement of the fixation device.

[0140] Step 850: Collect the signal through the second device.

[0141] For example, the device can detect neural signals in a deep region of the subject's brain.A second device can obtain the neural signals from the device for further processing and storage.

[0142] It should be noted that the above description is for illustrative purposes only and is not intended to limit the scope of the present disclosure. For those of ordinary skill in the art, various changes and modifications can be made under the teachings of the present disclosure. However, these changes and modifications do not depart from the scope of the present disclosure.

[0143] Figure 9A is a picture showing an exemplary process of implanting a device into a rat brain according to some embodiments of the present disclosure. Figure 9B According to some embodiments of the present disclosure Figure 9A A magnified view of the middle area 910. Figure 9C is a picture of neural signals recorded in rats according to some embodiments of the present disclosure.

[0144] In some embodiments, a device (e.g., Figure 2C 、 4B , 5A, 5B and 5C) is implanted in a rodent. A craniotomy can be performed by drilling a hole in the skull using a surgical cranial drill. The dura mater of the rat can be removed. The device (e.g., Figure 2C 、 4B , 5A, 5B and 5D) can be implanted in the brain tissue of a rat. After the device is implanted in the rat brain tissue, the bone window can be sealed. The device can be fixed with dental cement or the like. The device can be configured to perform long-term monitoring of neural activity, including action potentials and field potentials in rats (e.g., Figure 9C For example, Figure 9C As shown, the device can record neuronal action potentials and field potential signals with high signal-to-noise ratio (SNR) within 230 days after the device was implanted in the rat brain.

[0145] Figure 10A is a picture showing an exemplary process of implanting a device into a rhesus monkey's brain according to some embodiments of the present disclosure. Figure 10B is a picture of neural signals recorded in rhesus monkeys according to some embodiments of the present disclosure.

[0146] In some embodiments, the device (e.g., Figure 2C 、 4B , 5A, 5B and 5D) can be implanted in a non-human primate. For example, a rhesus monkey can be fixed on a fixation device (e.g., a stereotactic device), and the skull of the rhesus monkey can be exposed. The craniotomy point and the implantation trajectory can be determined based on a surgical navigation system. The dura mater of the rhesus monkey can be removed. The device (e.g., an electronic probe with 1024 channels) can be implanted in the brain tissue of the rhesus monkey, and the device can reach the deep region of the brain of the rhesus monkey. Figure 10A As shown, after the device is implanted into the brain tissue of a rhesus monkey, the bone window can be sealed. The device can be fixed with dental cement or the like. The monkey's scalp can be sutured. The device can be configured for intraoperative recording and / or long-term recording of neural activity in rhesus monkeys, including action potentials and field potentials (e.g., Figure 10B neural signals shown).

[0147] In some embodiments, the carrier of the device may have a multilayer structure. The multilayer carrier may include a combination of a hollow catheter and a guide wire. The carrier may be completely or partially removed from the device before, during, or after the implantation surgery. In some embodiments, during or after the implantation surgery, the subject may be optically stimulated, electrically stimulated, and / or delivered with drugs and / or reagents via a guide wire or hollow catheter. Additionally or alternatively, during or after the implantation surgery, one or more other functional devices (e.g., optical fibers, SEEG electrodes, drug delivery cannulas, intracranial pressure measurement devices, etc.) may be inserted into the hollow catheter to achieve corresponding functions. The configuration of the multilayer structure may improve the functionality of the device.

[0148] In some embodiments, multiple devices can be implanted into a rhesus monkey via multiple implantation trajectories. For example, a first device can be implanted into a rhesus monkey via a first implantation trajectory. The first implantation trajectory can pass through the primary visual cortex and hippocampus of the rhesus monkey. A second device can be implanted into a rhesus monkey via a second implantation trajectory. The second implantation trajectory can pass through the cortex and caudate nucleus of the rhesus monkey. A third device can be implanted into a rhesus monkey via a third implantation trajectory. The third implantation trajectory can pass through the cortex, caudate nucleus, and hippocampus of the rhesus monkey.

[0149] According to some embodiments of the present disclosure, the device can be applied to a subject's brain, spinal cord, peripheral nerves, organs, etc., for intraoperative recording and / or long-term chronic monitoring of the subject's neural activity and other biosignals. Furthermore, the device can be used for electrophysiological signal recording and stimulation, neurochemical recording, biochemistry, and pressure sensing.

[0150] Currently, methods for connecting electronic components may include flip-chip soldering, silver epoxy soldering, and wire bonding. Flip-chip soldering is an integrated circuit packaging technology that includes thermocompression flip-chip soldering and reflow soldering. In flip-chip soldering, solder fillers (e.g., tin or other low-melting-point metals or alloys) are deposited directly on each target site and then flipped over another chip. After the target sites and chip are aligned, the fillers are connected using heat and / or pressure (or by melting the solder at high temperatures and then solidifying it). However, the relatively high temperatures can damage some electronic components (e.g., flexible electronic components). The silver epoxy used in silver epoxy soldering is obtained by mixing silver particles with a resin. The connection method of silver epoxy and flip-chip soldering is essentially the same. The silver epoxy can be applied to the surface of an external electronic component (e.g., a printed circuit board) to form one or more connection points, and the chip to be connected can then be flipped over. The silver epoxy cures under heat (e.g., to approximately 85°C) and pressure (e.g., 5-10N), forming a connection. Wire bonding is another integrated circuit packaging technology that uses metal wires to connect two metal pads. Wire bonding can involve a three-step process: in the first step, ultrasonic waves can be used to melt the wire into a ball, which is then pressed down onto the substrate to form a solder joint. In the second step, once the wire is connected to the first solder joint, it is stretched and extended to the second solder joint. In the third step, the wire is pressed directly down onto the substrate and then broken to form the connection. Due to the thin metal wires, wire bonding may not be suitable for connecting non-fixed devices.

[0151] As can be seen from the above, traditional soldering techniques for connecting electronic components have relatively strict requirements on external conditions such as temperature and pressure, as well as device types. The operation is relatively complex, increasing the difficulty of separating and reconnecting after connection. Some embodiments of the present disclosure provide a reversible method for connecting electronic components that can be implemented under traditional conditions. The following describes in detail the method for connecting electronic components provided by embodiments of the present invention in conjunction with the accompanying drawings.

[0152] Figure 11 is a flow chart illustrating an exemplary process for connecting electronic components according to some embodiments of the present disclosure. Figure 11 As shown in process 100 , the process for connecting electronic components provided in some embodiments of the present disclosure may include one or more of the following steps.

[0153] Step 1110: align one or more first connection points of a first electronic component with second connection points of a second electronic component in a solution environment. For example, in the solution environment, the first connection points can be aligned with the second connection points.

[0154] The first electronic component may be or include a device (e.g., device 200). In some embodiments, the first electronic component may include a first connection point. The first connection point refers to a connection structure of the first electronic component for connecting to another electronic component (e.g., a second electronic component), such as an electrode, a connection terminal, an input / output pad, or a connection channel. For example, the first connection point may be or include Figure 1A 、 2A and the input / output pads of the electrode sites 111 shown in FIG3 . The second electronic component may be or include another device (e.g., a second device). The second device (or second electronic component) may include a printed circuit board (PCB), a flexible flat cable (FFC), a flexible expansion board, or a chip, etc. More description of the second device can be found elsewhere in this disclosure. It should be noted that the device and the second device are for illustration purposes only. Figure 11 The connection method shown in can be applied to any suitable electronic component, and is not limited to the device and the second device. The second electronic component may include one or more second connection points. Similarly, the second connection point refers to a connection structure for connecting to another electronic component (e.g., the first electronic component), such as an input / output pad, a connection terminal, or a connection channel of an electrode of the second electronic component. In some embodiments, the first electronic component may include two or more first connection points. In some embodiments, similarly, the second electronic component may include two or more second connection points.

[0155] In some embodiments, the first electronic component may include or be a flexible electronic component (e.g., a flexible display, a chemical and biological sensor chip (e.g., an electrophysiological electrode array), a flexible wearable electronic component, etc.). The flexible electronic component can be stretched and bent without damaging its own electronic properties. In some embodiments, the flexible electronic component may include an implantable electrode for implantation into a target object (e.g., a human body, an animal, etc.). The implantable electrode can be used to be implanted into a specified part of the target object (e.g., the cerebral cortex or a deep area of ​​the target object's brain) to stimulate the target object or monitor physiological parameters of the target object.

[0156] In some embodiments, the first connection point of the first electronic component may include a first electrically conductive structure (also referred to as a first conductive structure), which enables the first electronic component to conduct electricity with another electronic component when connected to the electronic component. In some embodiments, the first conductive structure may be made of a metallic conductive material and / or a non-metallic conductive material. Example metallic conductive materials may include chromium, gold, copper, silver, platinum, aluminum, alloys (e.g., copper alloys, aluminum alloys, platinum / iridium, etc.), etc. Example non-metallic conductive materials may include carbon-based materials, graphene, etc.

[0157] In some embodiments, the second electronic component may include any one of a printed circuit board (PCB), a flexible flat cable (FFC), a flexible circuit board, a micro-machined chip, a complementary metal oxide semiconductor (CMOS) chip, an integrated circuit chip, and a CMOS metal microelectrode array. Similar to the first electronic component, the second connection point of the second electronic component may include a second conductive structure, which may be made of the same, similar, or different conductive material as the first conductive structure and may be used to connect to the first conductive structure of the first electronic component and enable electrical conduction between the first and second electronic components.

[0158] In some embodiments, the first connection point of the first electronic component may include an ultrathin flexible connection unit (e.g., the thickness of the first connection point may be in the micrometer or submicrometer range). By using the ultrathin flexible connection unit, the first connection point of the first electronic component can be connected to the second electronic component without applying heat or pressure. For more information on the connection principle between the first and second electronic components, please refer to other descriptions in this disclosure and will not be repeated here.

[0159] In some embodiments of the present disclosure, the thickness of the first connection point may be between 50 nm and 5 μm. For example, in some embodiments, the thickness of the first connection point may be between 80 nm and 1.5 μm; in some embodiments, the thickness of the first connection point may be between 100 nm and 1 μm.

[0160] In some embodiments, the first connection point and / or the second connection point may have a mesh structure.

[0161] In some embodiments, in a solution environment, the first connection point of the first electronic component can be aligned with the second connection point of the second electronic component. The solution environment refers to an environment created by dripping a solution into the connection area between the first connection point and the second connection point. In some embodiments, the solution may include water (e.g., deionized water), ethanol, isopropyl alcohol, etc. It will be understood that the above solution is for illustration only, and in the embodiments of the present disclosure, the solution may include but is not limited to the above types. In some embodiments, in order to facilitate drying of the solution in subsequent processes, a volatile solution (e.g., anhydrous ethanol, 75% ethanol, etc.) may be used in step 1110.

[0162] Figure 12 is a schematic diagram of an exemplary process for aligning electronic components to be connected according to some embodiments of the present disclosure.

[0163] refer to Figure 12In some embodiments, the first electronic component 1210 can be flattened using tweezers (e.g., pointed tweezers) in a solution environment, and then one or more first connection points 1211 thereon can be aligned with one or more second connection points 1221 on the second electronic component 1220. In some embodiments, the alignment operation can be performed under a stereomicroscope.

[0164] It should be noted that one or more first connection points 1211 on first electronic component 1210 and one or more second connection points 1221 on second electronic component 1220 can have the same or similar arrangement or spacing. If first electronic component 1210 and / or second electronic component 1220 have multiple connection points, alignment between them can be achieved by aligning only a portion of the multiple connection points. Each aligned first connection point 1211 can overlap or partially overlap with its corresponding second connection point 1221.

[0165] Continue to refer Figure 11 As shown in process 1100 , the process for connecting electronic components provided in some embodiments of the present disclosure may also include one or more of the following steps.

[0166] Step 1120 : Drying the first connection point and the second connection point to form a physical conductive connection between the aligned first connection point and the second connection point.

[0167] In some embodiments, after aligning the first connection point of the first electronic component and the second connection point of the second electronic component in step 1110, the first connection point and the second connection point may be dried, thereby forming a physical conductive connection between the aligned first connection point and the second connection point after removing the solution. In this disclosure, the term "physical conductive connection" refers to a connection relationship formed by utilizing the physical characteristics (e.g., shape, structure, etc.) of the first connection point and the second connection point, which allows a certain connection force between the first connection point and the second connection point and enables electrical conduction between the two.

[0168] It can be understood that in the embodiments of the present disclosure, since the thickness of the first connection point of the first electronic component is relatively thin and the first connection point has a flexible structure, when the solution is dried, the first connection point can be bent to the second connection point under the action of the surface tension of the solution and / or the adsorption force between the solution and the first connection point, thereby forming a physical conductive connection between the first connection point and the second connection point.

[0169] In some embodiments, the physical conductive connection formed between the first connection point and the second connection point can achieve electrical conduction between the first connection point and the second connection point. In some embodiments, the contact resistance between the first connection point and the second connection point is less than 10MΩ. The contact resistance may refer to the additional resistance existing between the first connection point and the second connection point. The contact resistance may be related to the size, structure and material of its electronic components. In some embodiments, the contact resistance can be used to characterize the tightness of the connection between the first connection point and the second connection point. Specifically, in some embodiments, according to experimental results, the contact resistance between the first connection point and the second connection point is generally between 100Ω and 100kΩ.

[0170] It should be noted that, in the present disclosure, the first connection point and the second connection point can be dried using any method that does not affect the connection relationship between the first connection point and the second connection point. For example, in some embodiments, the method for drying the first connection point and the second connection point may include squeezing, blowing, drying, air drying, or removing the solution using absorbent paper. It should be noted that, in the present disclosure, the method for drying the first connection point and the second connection point can be any method that does not affect the connection relationship between the first connection point and the second connection point.

[0171] It should be noted that the above description of process 1100 is only for example and illustration and does not limit the scope of application of the present disclosure. For those skilled in the art, various modifications and changes can be made to process 1100 under the guidance of the present disclosure, and these modifications and changes are still within the scope of the present disclosure.

[0172] Figure 13 is a schematic diagram of an exemplary structure of a first connection point of a first electronic component according to some embodiments of the present disclosure.

[0173] refer to Figure 13 In some embodiments, the first connection point 1211 of the first electronic component 1210 may have a mesh-like conductive structure, and the mesh-like conductive structure may include a hollow portion 12111. By using the mesh-like conductive structure, a micro-chamber may be formed in the hollow portion 12111, and the micro-chamber may accommodate a certain amount of solution in a solution environment. After the solution in the micro-chamber is removed through a drying process, a negative pressure environment may be formed between the first connection point 1211 of the first electronic component and the second connection point of the second electronic component. As a result, under the action of liquid surface tension, negative pressure adsorption force, and physical adsorption force (also known as van der Waals adsorption, caused by intermolecular forces), the first connection point 1211 of the first electronic component and the second connection point of the second electronic component are adsorbed to each other, thereby strengthening the connection force between the first connection point 1211 and the second connection point to a certain extent.

[0174] It should be noted that Figure 13 The structure shown is merely an example. In some embodiments, the shape of the hollow portion 12111 of the mesh conductive structure can be, but is not limited to, a diamond shape. In some embodiments, the shape of the hollow portion 12111 of the mesh conductive structure can be a regular shape, such as a rectangle, triangle, trapezoid, or other irregular shape.

[0175] In some embodiments, the area of ​​the first connection point in the first electronic component may be larger than the area of ​​the second connection point in the second electronic component. When the first connection point and the second connection point are aligned, the second connection point can be covered by the first connection point, thereby maximizing the fitting area between the first connection point and the second connection point, and maximizing the connection quality between the first and the second (for example, connection stability). It should be noted that the above relationship between the area of ​​the first connection point and the area of ​​the second connection point is only for exemplary purposes. In some embodiments, the area of ​​the first connection point may be less than or equal to the area of ​​the second connection point. In some embodiments, in order to ensure the connection force after the first connection point is connected to the second connection point, the connection area of ​​the first connection point and the second connection point (that is, the area of ​​the overlapping area between the two) can be greater than or equal to 0.1μm 2 For example, in some embodiments, the connection area between the first connection point and the second connection point may be less than 1 μm. 2 Up to 10000μm 2 In some embodiments, the connection area between the first connection point and the second connection point can be within the range of 100 μm 2 Up to 10000μm 2 In some embodiments, the connection area between the first connection point and the second connection point can be within the range of 10 μm. 2 to 100μm 2 within the range.

[0176] In some embodiments, the first electronic assembly 1210 can be fabricated using micro-nanofabrication processes, and the total thickness of the first electronic assembly 1201 can be in the micron or submicron range. In some embodiments, the first electronic assembly 1210 can include multiple mesh-like conductive structures (e.g., ranging from two to thousands of mesh-like conductive structures), each of which can serve as a connection terminal or connection channel for the first electronic assembly 1210. In some embodiments, the multiple mesh-like conductive structures can be distributed in an array. In some embodiments, the multiple mesh-like conductive structures can be arranged in a linear array.

[0177] like Figure 13 As shown, in some embodiments, the first electronic component 1210 may further include a channel lead 1213 , and each of the multiple mesh conductive structures may be connected to a corresponding circuit unit (e.g., an electrophysiological electrode, a signal acquisition circuit, etc.) through a corresponding channel lead 1213 .

[0178] Continue to refer Figure 13 In some embodiments, the first electronic component may further include a first substrate 1212, and the plurality of mesh-shaped conductive structures may be disposed on a surface of the first substrate 1212. In some embodiments, the material of the first substrate 1212 may be or include a flexible insulating film material, such as poly(chloroparaxylene) (Parylene-C), polyimide (PI), polydimethylsiloxane (PDMS), and the like.

[0179] Similarly, in some embodiments, the second electronic component may include a second substrate. The thickness of the first substrate 1212 may be in the micrometer or submicrometer range. Based on the aforementioned similar principles, when the first substrate 1212 and the second substrate are dried, physical adsorption may be formed between the first substrate 1212 and the second substrate, thereby further strengthening the connection force between the first electronic component and the second electronic component.

[0180] For example, in some embodiments, the first electronic component 1210 can be fabricated using thin film deposition technology, micro-nanofabrication technology, and / or CMOS integrated circuit technology, or one or more other manufacturing technologies. For example, in some embodiments, the first electronic component 1210 can be fabricated using a combination of thin film deposition technology, photolithography technology, and plasma etching technology. Specifically, in some embodiments, a polyamic acid solution can be spin-coated onto a wafer surface coated with a nickel sacrificial layer, followed by high vacuum annealing to form an ultrathin (e.g., approximately 500 nm) polyimide (PI) substrate (i.e., the first substrate). A Cr / Au metal layer is then deposited on the PI substrate using positive resist photolithography and magnetron sputtering, and an upper PI layer is formed using the same process as the PI substrate. On the upper PI layer, an Al metal mask layer is deposited using photolithography and magnetron sputtering. Reactive ion etching is then used to form a grid pattern (i.e., a mesh-like conductive structure). The aluminum and nickel sacrificial layers are then etched using ferric chloride. Afterwards, the first electronic component can be obtained by rinsing with deionized water.

[0181] It will be understood that in the embodiments provided herein, the size, shape, density and arrangement of the mesh conductive structure in the first electronic component can vary according to actual circumstances (for example, it can vary according to the size, shape, density and arrangement of the second connection point in the second electronic component), which provides relatively high flexibility.

[0182] Using the above-mentioned connection method provided by the embodiment of the present disclosure, a physical conductive connection can be formed between the first connection point and the second connection point. By creating a solution environment again at the first connection point and the second connection point, the first electronic component and the second electronic component can be separated after the physical conductive connection is formed. Specifically, the first electronic component and the second electronic component can be separated by dripping a solution in the connection area between the first electronic component and the second electronic component, thereby achieving the reuse of the electronic components. It should be noted that the solution used to separate the first electronic component and the second electronic component can be the same as or different from the solution used to connect the first electronic component and the second electronic component.

[0183] In some embodiments, after separating the first connection point of the first electronic component and the second connection point of the second electronic component, the separated first connection point and the second connection point can be realigned and dried again to form a physical conductive connection between the first connection point and the second connection point.

[0184] In some embodiments, the first electronic component and / or the second electronic component may be subjected to a reinforcement treatment after forming a physical conductive connection between the first connection point and the second connection point to further strengthen the connection force between the first electronic component and the second electronic component. For example, in some embodiments, a reinforcement connection may be performed at at least one connection point between the first electronic component and the second electronic component. Exemplary reinforcement connection methods may include dispensing glue, welding, etc.

[0185] Figure 14A and 14B is a schematic diagram illustrating an exemplary connection effect between a first electronic component and a printed circuit board according to some embodiments of the present disclosure.

[0186] refer to Figures 14A-14B In some embodiments, the second electronic component may be a printed circuit board, and the first connection point 1211 of the first electronic component and the second connection point 1221 of the second electronic component may be connected using the aforementioned connection method. In some embodiments, according to experimental results, the connectivity rate of the first electronic component connected to the printed circuit board can reach over 90%.

[0187] Figure 15 1 is an exemplary waveform of an application of a connected electronic component in signal detection after a first electronic component is connected to a printed circuit board according to some embodiments of the present disclosure.

[0188] refer to Figure 15, waveform 1310 is a signal waveform diagram including neuronal action potentials obtained by applying the first electronic component to acute neural signal recording of a rat brain after the first electronic component is connected to a printed circuit board, and waveform 1320 is a signal waveform diagram including neuronal action potentials of a rat brain obtained at week 25 (counted from the start of signal recording) using the first electronic component after the first electronic component is connected to a printed circuit board. Figure 15 It can be seen from the test results shown that after the first electronic component and the printed circuit board are connected using the connection method provided in the embodiment of the present disclosure, stable circuit conduction can be achieved in a relatively long time.

[0189] Figure 16 is a schematic diagram illustrating an exemplary connection effect between a first electronic component and a flexible flat cable according to some embodiments of the present disclosure.

[0190] refer to Figure 16 In some embodiments, the second electronic component 1220 may be a flexible flat cable, the first electronic component 1210 may be disposed on a surface of the second electronic component 1220, and the first connection point 1211 ( Figure 16 and a second connection point 1221 ( Figure 16 The area (or a portion thereof) in the dashed box indicated by serial number 1221 can be connected using the connection method described in this disclosure. According to experimental results, when the second electronic component is a flexible flat cable, the connectivity rate between the first electronic component and the second electronic component can reach 100%. It should be noted that Figure 16 The connection effect shown is only an example. In some embodiments, all or a portion of the first connection point 1211 of the first electronic component may overlap with a portion of the second connection point 1221 of the flexible flat cable. In some embodiments, all or a portion of the first connection point 1211 of the first electronic component may cover the second connection point 1221 of the flexible flat cable.

[0191] Figure 17A and 17B is a schematic diagram of an exemplary structure of a first electronic component connected to a flexible circuit board according to some embodiments of the present disclosure.

[0192] See also Figures 17A-17BIn some embodiments, the second electronic component may be a flexible circuit board, and the first connection point 1211 of the first electronic component and the second connection point 1221 of the second electronic component may be connected using the connection method described in this disclosure. The second connection point 1221 of the second electronic component may be a connection point protruding from the flexible circuit board, obtained by additional electrochemical deposition of metal on the flexible circuit board. According to experimental results, when the second electronic component is a flexible circuit board, the connectivity rate between the first and second electronic components can reach over 95%.

[0193] refer to Figures 17A-17B In some embodiments, the first electronic component may include multiple first connection points 1211, and the second electronic component may include multiple second connection points 1221. The multiple first connection points 1211 and second connection points 1221 may form multiple connection channels between the first electronic component and the second electronic component. According to experimental results, in some embodiments, after connecting the first electronic component and the second electronic component (for example, a high-density flexible circuit board) using the connection method provided by the embodiments of the present disclosure, the connection density between them may reach 1542 channels / cm. 2 In some embodiments, after connecting a first electronic component and a second electronic component (e.g., a high-density CMOS metal microelectrode array) using the connection method provided in the embodiments of the present disclosure, the connection density between them can reach 3265 channels / mm 2 It can be seen that the connection method provided by the embodiment of the present disclosure can achieve a high connectivity rate and a very high electrical connection density, which is beneficial to the application scenarios of miniaturization and integration of electronic components.

[0194] The beneficial effects that can be brought about by the embodiments of the present disclosure include: (1) Through the connection method provided by the present disclosure, high-throughput connection between electronic components can be achieved without heating and / or pressurizing. The connection method is simple and easy to operate, and multiple channels can be connected in parallel through a single simple and fast operation. The operation is simple and fast, and the requirements for connection environment conditions are relatively low, which makes the connection method suitable for various connection scenarios; (2) Through the connection method provided by the present disclosure, after the first electronic component is connected to the second electronic component, the physical conductive connection formed between the first connection point and the second connection point can be separated by re-creating a solution environment at the first connection point and the second connection point, thereby realizing the reuse of the electronic component; (3) Through the connection method provided by the present disclosure, it can be applied to a variety of electronic components (for example, printed circuit boards, flexible circuit boards, flexible flat cables, microprocessor chips, CMOS chips, integrated circuit chips, etc.) in a wide range of application scenarios and has wide adaptability; (4) Through the connection method provided by the present disclosure, it is conducive to achieving a high connectivity rate and a relatively high electrical connection density (the connection density can reach 3265 channels / mm 2), which is conducive to the application scenarios of miniaturization and integration of electronic components.

[0195] It should be noted that different embodiments may produce different beneficial effects, and in different implementations, the possible beneficial effects may be any one or combination of the above, or any other beneficial effects that may be obtained.

[0196] Having thus described the basic concepts, it will be apparent to those skilled in the art upon reading this detailed disclosure that the foregoing detailed disclosure is provided by way of example only and not limitation. Various changes, improvements, and modifications are possible and are intended to be within the skill of the art even if not expressly stated herein. Such changes, improvements, and modifications are intended to be suggested by this disclosure and are within the spirit and scope of the exemplary embodiments of the present disclosure.

[0197] In addition, certain terms have been used to describe embodiments of the present disclosure. For example, the terms "one embodiment," "an embodiment," and / or "some embodiments" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one implementation of the present disclosure. Therefore, it should be emphasized and understood that two or more references to "one embodiment," "an implementation," or "an alternative embodiment" in various parts of this specification do not necessarily refer to the same embodiment. In addition, in one or more embodiments of the present disclosure, particular features, structures, or characteristics may be appropriately combined.

[0198] Furthermore, those skilled in the art will appreciate that aspects of the present disclosure may be illustrated and described in any of the various patentable classes or contexts herein, including any new and useful method, machine, manufacture, or composition of matter, or any new and useful improvement thereof. Thus, aspects of the present disclosure may be implemented entirely in hardware, entirely in software (including firmware, resident software, microcode, etc.), or in a combination of software and hardware, which are generally referred to herein as "units," "modules," or "systems." Furthermore, aspects of the present disclosure may take the form of a computer program product embodied in one or more computer-readable media having computer-readable program code embodied thereon.

[0199] A computer-readable signal medium may include a propagated data signal embodying computer-readable program code, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including electromagnetic, optical, etc., or any suitable combination thereof. A computer-readable signal medium may be any computer-readable medium that is not a computer-readable storage medium and may communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer-readable signal medium may be transmitted using any appropriate medium, including wireless, wired, fiber optic cable, RF, etc., or any suitable combination thereof.

[0200] For various aspects of the present disclosure, the computer program code for performing the operations may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, Scala, Smalltalk, Eiffel, JADE, Emerald, C++, C#, VB.NET, Python, and the like, traditional procedural programming languages ​​such as the "C" programming language, Visual Basic, Fortran 2103, Perl, COBOL 2102, PHP, ABAP, dynamic programming languages ​​such as Python, Ruby, and Groovy, or other programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer as a stand-alone software package, partially on the user's computer, partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider) or in a cloud computing environment, or provided as a service such as Software as a Service (SaaS).

[0201] Furthermore, the order in which the processing elements or sequences are listed, or the use of numbers, letters, or other designations therefor, is not meant to limit the claimed processes and methods to any order unless otherwise specified in the claims. While the foregoing disclosure discusses what are presently believed to be various useful embodiments of the present disclosure through various examples, it should be understood that such details are provided for that purpose only, and that the appended claims are not limited to the disclosed embodiments, but, on the contrary, are intended to cover modifications and equivalent arrangements within the spirit and scope of the disclosed embodiments. For example, while the implementation of the various components described above can be implemented in a hardware device, it can also be implemented as a software-only solution, for example, as an installation on an existing server or mobile device.

[0202] Similarly, it should be understood that in the foregoing descriptions of the embodiments of the present disclosure, various features are sometimes grouped together in a single embodiment, figure, or description thereof to simplify the disclosure and aid understanding of one or more embodiments of the present invention. However, this method of disclosure should not be interpreted as reflecting an intention that the claimed subject matter requires more features than expressly recited in each claim. Conversely, inventive embodiments do not lie in all features of a single embodiment as described above.

[0203] In some embodiments, the numbers representing quantities or properties used to describe and claim certain embodiments of the present application should be understood to be modified in some cases by the terms "about", "approximately" or "substantially". For example, unless otherwise indicated, "about", "approximately" or "substantially" may represent a change of ±1%, ±5%, ±10% or ±20% of the value described. Therefore, in some embodiments, the numerical parameters set forth in the written description and the appended claims are approximate values ​​and can vary depending on the desired characteristics sought to be obtained in a particular embodiment. In some embodiments, numerical parameters should be interpreted according to the number of reported significant figures and by applying ordinary rounding techniques. Although the numerical ranges and parameters setting forth the broad scope of some embodiments of the present application are approximate values, the numerical reports set forth in the specific examples are as accurate as practicable.

[0204] Each patent, patent application, patent application publication, and other materials, such as articles, books, specifications, publications, documents, things, and / or the like, cited herein is hereby incorporated by reference in its entirety for all purposes, except any prosecution history therewith, any prosecution history that is inconsistent or conflicting with this document, or any prosecution history that may have the effect of limiting the broadest scope of the claims now or hereafter associated with this document. For example, if there is any inconsistency or conflict between the description, definition, and / or use of a term in any incorporated material and the terminology associated with this document, the description, definition, and / or use of the term in this document shall control.

[0205] Finally, it should be understood that the embodiments of the present application disclosed herein illustrate the principles of the embodiments of the present application. Other modifications that may be adopted may be within the scope of the present application. Therefore, by way of example and not limitation, alternative configurations of the embodiments of the present application may be utilized according to the teachings herein. Therefore, the embodiments of the present application are not limited to the embodiments precisely shown and described.

Claims

1. A device comprising: A target electrode array having a plurality of electrode sites arranged circumferentially along the surface of the device and / or arranged axially along the surface of the device, wherein the device is formed by wrapping and / or attaching a planar electrode array around a carrier.

2. The device according to claim 1, characterized in that The planar electrode array comprises: an electrode site portion in which the plurality of electrode sites of the target electrode array are arranged; a lead portion for connecting the electrode site portion to the interface portion; and The interface portion is used to connect the device to a second device.

3. The device according to claim 2, characterized in that After the planar electrode array is wrapped around or attached around the carrier, the electrode site portion is exposed on the surface of the device, the lead portion is embedded in the device and / or located on the surface of the device, and the interface portion is connected to the lead portion.

4. The device according to claim 2, characterized in that The planar electrode array comprises connections for connection to the carrier.

5. The device according to claim 4, characterized in that The connecting portion includes a hole structure or a mesh structure, and the carrier passes through the hole structure or the mesh structure to be fixed on the connecting portion.

6. The device according to claim 4, characterized in that The carrier is bonded to the connecting portion of the planar electrode array by an adhesive material.

7. The device according to claim 4, characterized in that The carrier is placed into the groove on the planar electrode array, so that the carrier is fixed on the connecting portion of the planar electrode array.

8. The device according to claim 4, characterized in that The planar electrode array is connected to the carrier after being released from the substrate.

9. The device according to claim 4, characterized in that The planar electrode array is connected to the carrier before being released from the substrate.

10. The device according to claim 4, characterized in that The electrode site portion and the connecting portion are arranged on opposite sides of the planar electrode array.

11. The device according to claim 1, wherein The carrier and the planar electrode array are configured as an integrally formed structure.

12. The device according to claim 1, wherein One side of the planar electrode array has a bevel structure, and the bevel structure is formed into a cone structure by winding the planar electrode array around the carrier.

13. The device according to claim 12, characterized in that The tapered structure is located at the tip of the device.

14. The device according to claim 1, wherein At least one of the base layer or the packaging layer of the planar electrode array is made of a flexible material.

15. The device according to claim 14, characterized in that The flexible material includes at least one of polyimide, polychloroparaxylene, polydimethylsiloxane, polystyrene-block-poly(ethylene-ran-butylene)-block-polystyrene, SU-8 photoresist, polyethylene terephthalate, polyurethane, Ecoflex, poly(styrene-butadiene-styrene) or polytetrafluoroethylene.

16. The device according to claim 1, wherein The thickness of the planar electrode array is in the range of 50-100,000 nanometers.

17. The device according to claim 1, wherein The conductive layer of the target electrode array is made of at least one of gold, platinum, copper, aluminum, silver, titanium, chromium, nickel, tantalum, palladium, molybdenum, carbon nanotubes (CNTs), graphene, carbon materials, iridium oxide, titanium nitride, conductive polymers, indium tin oxide, tantalum oxide or liquid metal.

18. The device according to claim 1, wherein The length of the target electrode array along the longitudinal axis of the device is in the range of several millimeters to several tens of centimeters.

19. The device according to claim 1, wherein The number of the plurality of electrode sites of the target electrode array is in the range of 1-50,000.

20. The device according to claim 1, wherein The carrier is used to wrap the planar electrode array, improve the mechanical strength of the device, perform optical stimulation or electrical stimulation on a subject, or deliver drugs and / or reagents.

21. The device according to claim 1, wherein The carrier comprises at least one of a metal wire, a metal tube, a quartz wire, a quartz tube, an optical fiber, a polymer wire, a polymer tube, a combination of wire and tube, a ceramic wire, a graphene fiber, a carbon fiber, a stereoelectroencephalogram (SEEG) electrode, or an intracranial pressure measurement device.

22. The device according to claim 1, wherein The length of the carrier is in the range of several millimeters to several tens of centimeters, and / or the diameter of the carrier is in the range of 5-2000 microns.

23. The device according to claim 1, wherein The length of the device along the longitudinal axis of the carrier is in the range of several millimeters to several tens of centimeters, and / or the diameter of the device is in the range of 10-3000 microns.

24. The device according to claim 1, wherein The size of a single electrode site of the target electrode array is in the range of 1-3000 μm.

25. A method for preparing a device, comprising: preparing a planar electrode array; as well as A planar electrode array is wrapped or attached around a carrier to form the device, which has a columnar structure.

26. The method according to claim 25, characterized in that The preparation of the planar electrode array comprises: Depositing nickel on a wafer to prepare a nickel-deposited wafer, wherein the nickel is determined as a sacrificial layer of the planar electrode array; Prepare the base layer of the planar electrode array by spin coating, heating and curing at least one of polyamic acid, polydimethylsiloxane (PDMS), SU-8 photoresist on the nickel deposition wafer, or by depositing polychloroparaxylene; preparing a conductive layer of the planar electrode array by depositing and patterning at least one of metal, carbon nanotubes, graphene, carbon material, iridium oxide, titanium nitride, indium tin oxide, tantalum oxide, or a conductive polymer on the base layer of the planar electrode array; and The planar electrode array is released by etching the sacrificial layer from the wafer using a ferric chloride solution.

27. The method according to claim 26, characterized in that After preparing the conductive layer of the planar electrode array, The method further includes: preparing an encapsulation layer of the planar electrode array by spin coating, heating and curing at least one of polyamic acid, PDMS, and SU-8 photoresist on the conductive layer of the planar electrode array, or obtaining polychloroparaxylene by deposition; preparing a mask by depositing and patterning aluminum on the encapsulation layer of the planar electrode array to obtain a mask encapsulation layer; and obtaining a patterned electrode array by treating the mask encapsulation layer using reactive ion etching; and Releasing the planar electrode array by etching the sacrificial layer from the wafer using a ferric chloride solution includes: releasing the planar electrode array by etching the mask and the sacrificial layer from the wafer using the ferric chloride solution.

28. The method according to claim 25, characterized in that The step of winding the planar electrode array on a carrier to form the device comprises: securing the carrier to a first side of the planar electrode array; winding the planar electrode array around the carrier; and In the last winding, the edge of the other side of the planar electrode array is coated with adhesive material to fix the second side of the planar electrode array on the device.

29. The method according to claim 28, characterized in that The step of fixing the carrier on one side of the planar electrode array comprises: The carrier is fixed to the first side of the planar electrode array through the connection portion of the planar electrode array.

30. The method according to claim 29, wherein The connecting portion includes a hole structure or a mesh structure, and the carrier passes through the hole structure or the mesh structure to be fixed on the connecting portion.

31. The method according to claim 29, wherein The method of fixing the carrier to the first side of the planar electrode array through the connecting portion of the planar electrode array comprises: The carrier is bonded to the connection portions of the planar electrode array by an adhesive material.

32. The method according to claim 29, wherein Fixing the carrier to the first side of the planar electrode array through the connecting portion of the planar electrode array comprises: The carrier is fixed on the connecting portion of the planar electrode array by placing the carrier into the groove of the planar electrode array.

33. The method of claim 28, further comprising: During the winding process, at least a portion of the rear surface of the planar electrode array is coated with the adhesive material to fix the rear surface of the planar electrode array on the device.

34. The method according to claim 28 or 33, characterized in that The adhesive material includes polyethylene oxide (PEO) solution, polyethylene glycol (PEG) solution, silk fibroin solution, At least one of solution, biological glue, medical glue, sucrose solution, gelatin or photoresist.

35. The method according to claim 25, wherein The carrier and the planar electrode array are configured as an integrally formed structure.

36. The method according to claim 25, wherein The carrier can be completely or partially removed from the device or remain.

37. The method according to claim 25, wherein Also includes: The device is connected to a second device.

38. The method according to claim 37, wherein The device includes a first connection point, the second device includes a second connection point, and connecting the device to the second device includes: aligning the first connection point of the device with the second connection point of the second device in a solution environment; and The first connection point and the second connection point are aligned so that a physical conductive connection is formed between the first connection point and the second connection point.

39. A method for connecting electronic components, comprising: aligning a first connection point of a first electronic component with a second connection point of a second electronic component in a solution environment; as well as The first connection point and the second connection point are dried so that a physical conductive connection is formed between the aligned first connection point and the second connection point.

40. The method according to claim 39, wherein The first electronic component comprises a flexible electronic component; and The first connection point includes a first conductive structure.

41. The method according to claim 39, wherein The thickness of the first connection point is in the micron or submicron level.

42. The method according to claim 39, wherein The first connection points have a mesh structure.

43. The method according to claim 39, wherein the second electronic component comprising at least one of a printed circuit board, a flexible flat cable, a flexible circuit board, a micro-machined chip, a complementary metal oxide semiconductor (CMOS) chip, an integrated circuit chip, or a CMOS metal microelectrode array; and The second connection point includes a second conductive structure.

44. The method according to claim 39, wherein The physical conductive connection formed between the first connection point and the second connection point causes the first connection point and the second connection point to be in conductive communication with each other; and The contact resistance between the first connection point and the second connection point is less than or equal to 10 MΩ.

45. The method according to claim 39, wherein A connection area between the first connection point and the second connection point is greater than or equal to 0.1 square micrometers.

46. ​​The method according to claim 39, wherein The drying process of the first connection point and the second connection point includes: The first connection point and the second connection point are dried so that the first connection point bends to the second connection point under the action of surface tension to form the physical conductive connection.

47. The method according to claim 39, wherein The first electronic component includes a first substrate layer, the second electronic component includes a second substrate layer, and the method further includes: The first base layer and the second base layer are dried so that physical adsorption is formed between the first base layer and the second base layer.

48. The method of claim 39, further comprising: In the solution environment, separating the physical conductive connection formed between the first connection point and the second connection point; as well as The separated first connection point and second connection point are realigned and dried again to form the physical conductive connection between the first connection point and the second connection point again.

49. The method according to claim 39, wherein The first electronic assembly includes a device, wherein the device includes: A target electrode array has a plurality of electrode sites arranged circumferentially along the surface of the device and / or arranged axially along the surface of the device, wherein the device is formed by wrapping or attaching a planar electrode array around a carrier.

50. The method according to claim 39, wherein The second electronic component includes at least one of a printed circuit board (PCB), a flexible flat cable (FFC), a flexible expansion board, or a chip.

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