Solar cells and their manufacturing methods, tandem cells and photovoltaic modules

Abstract

This application relates to a solar cell and its manufacturing method, a tandem solar cell, and a photovoltaic module. The solar cell includes: a substrate having a first surface and a second surface disposed opposite to each other; a first tunneling layer located on one side of the second surface; a first doped conductive layer located on the side of the first tunneling layer away from the substrate; at least one groove located on the surface of the first doped conductive layer away from the substrate; a transparent conductive layer including at least one transparent conductive portion, the transparent conductive portion being at least located on the bottom wall of the corresponding groove, the bottom wall of the groove being the surface of the groove near the substrate; a first passivation layer located on the side of the transparent conductive layer and the first doped conductive layer away from the substrate; and a first electrode located on the side of the first passivation layer away from the substrate, the first electrode being in ohmic contact with the first doped conductive layer; wherein the projection of the first electrode on the second surface is spaced apart from the projection of the groove on the second surface. This application can improve the performance of the solar cell.

Description

Technical Field

[0001] This application relates to the field of solar cell manufacturing technology, and in particular to a solar cell and its manufacturing method, tandem cells and photovoltaic modules. Background Technology

[0002] Currently, one of the main ways to utilize solar energy is through solar cell modules that convert received light energy into electrical energy. These modules can be large-area solar panels formed by connecting several solar cells (or photovoltaic cells, or photovoltaic modules) in series, encapsulating them, and arranging them in an array. When a solar cell absorbs light energy, opposite charges accumulate at its terminals, generating a "photovoltaic voltage," also known as the "photovoltaic effect." Under the influence of the photovoltaic effect, an electromotive force is generated at the terminals of the solar cell, thus converting light energy into electrical energy.

[0003] However, the performance of solar cells in related technologies still needs to be improved. Summary of the Invention

[0004] Therefore, it is necessary to address the issue of how to improve the performance of solar cells in related technologies by providing a solar cell, its manufacturing method, a tandem cell, and a photovoltaic module.

[0005] In a first aspect, this application provides a solar cell, comprising:

[0006] The substrate has a first surface and a second surface disposed opposite to each other;

[0007] The first tunneling layer is located on one side of the second surface;

[0008] The first doped conductive layer is located on the side of the first tunneling layer away from the substrate;

[0009] At least one groove is located on the surface of the first doped conductive layer away from the substrate;

[0010] A transparent conductive layer includes at least one transparent conductive portion, the transparent conductive portion being located at least on the bottom wall of the corresponding groove, the bottom wall of the groove being the surface of the groove near the substrate;

[0011] A first passivation layer is located on the side of the transparent conductive layer and the first doped conductive layer away from the substrate; and

[0012] The first electrode is located on the side of the first passivation layer away from the substrate, and the first electrode is in ohmic contact with the first doped conductive layer.

[0013] The projection of the first electrode onto the second surface is spaced apart from the projection of the groove onto the second surface.

[0014] In some embodiments, the depth of the groove in the direction perpendicular to the plane containing the second surface is a first depth;

[0015] In a direction perpendicular to the plane containing the second surface, and at a location outside the groove, the thickness of the first doped conductive layer is a first thickness;

[0016] The first depth is less than the first thickness.

[0017] In some embodiments, the transparent conductive portion includes a first sub-portion and a second sub-portion connected to the first sub-portion, the first sub-portion covering the bottom wall of the corresponding groove, and the second sub-portion covering the side wall of the first doped conductive layer at the groove, the side wall being connected to the corresponding bottom wall.

[0018] In some embodiments, the transparent conductive portion further includes a third sub-portion connected to the second sub-portion, wherein the surface of the first doped conductive layer away from the substrate has a first edge surface adjacent to the groove, and the third sub-portion covers the first edge surface.

[0019] In some embodiments, the first passivation layer is a full-surface structure on the side of the transparent conductive layer and the first doped conductive layer away from the substrate, in the groove and other areas outside the groove.

[0020] In some embodiments, the depth of the groove is 200 nanometers to 300 nanometers in a direction perpendicular to the plane containing the second surface; and / or,

[0021] In the direction perpendicular to the extension of the groove, the width of the groove is 30 micrometers to 50 micrometers; and / or,

[0022] In a direction perpendicular to the plane containing the second surface, and at a location outside the groove, the thickness of the first doped conductive layer is 500 nanometers to 700 nanometers.

[0023] In some embodiments, the thickness of the transparent conductive layer is 80 nanometers to 120 nanometers in a direction perpendicular to the plane of the second surface and at the bottom wall of the groove; and / or,

[0024] In a direction perpendicular to the plane containing the second surface, and at a location outside the groove, the thickness of the first passivation layer is 100 nanometers to 130 nanometers.

[0025] In some embodiments, the material of the transparent conductive layer includes at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide, and fluorine-doped tin oxide; and / or,

[0026] The material of the first passivation layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0027] Secondly, this application provides a method for manufacturing a solar cell, used to manufacture the solar cell described in any one of the above-mentioned methods, the method comprising:

[0028] A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other;

[0029] A first tunneling layer is formed on the second surface;

[0030] A first doped conductive layer is formed on the side of the first tunneling layer away from the substrate;

[0031] At least one groove is formed on the surface of the first doped conductive layer away from the substrate. The method of forming the groove includes first irradiating the grooved area with a laser, and then etching the grooved area to form the groove.

[0032] In some embodiments, in the step of irradiating the grooved area with a laser, the wavelength of the laser is 300nm-400nm, the pulse frequency of the laser is 180kHz-220kHz, the scanning speed of the laser is 12m / s-18m / s, the spot overlap rate of the laser is 15%-25%, the pulse width of the laser is 25ns-35ns, and the energy density of the laser is 0.5J / cm². 2 -0.8J / cm 2 .

[0033] In some embodiments, in the step of etching the grooved area to form the groove, tetramethylammonium hydroxide and a surfactant are used to etch the grooved area to form the groove, the surfactant including polyethylene glycol.

[0034] In some implementations, the etching temperature is 38°C-42°C and the etching time is 90s-120s.

[0035] In some embodiments, during the step of etching the grooved region to form the groove, the ratio of the etching rate of amorphous silicon to the etching rate of polycrystalline silicon is greater than or equal to 48:1, and the roughness of the bottom wall of the groove near the substrate is less than 50 nm.

[0036] Thirdly, this application provides a stacked battery, comprising a top battery, an adhesive layer, and a bottom battery stacked sequentially, wherein the bottom battery is a solar cell as described in any of the above-mentioned applications.

[0037] Fourthly, this application provides a photovoltaic module, comprising:

[0038] A battery string is formed by connecting multiple solar cells as described in any one of the above descriptions, or by connecting multiple solar cells manufactured by the manufacturing method of any one of the above descriptions, or by connecting the tandem cells described above.

[0039] A connecting component for electrically connecting two adjacent solar cells;

[0040] An encapsulating film is used to cover the surface of the battery string;

[0041] A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

[0042] In this embodiment, the transparent conductive portion is located at least on the bottom wall of the corresponding groove, and the bottom wall of the groove is the surface of the groove near the substrate; the first passivation layer is located on the side of the transparent conductive layer and the first doped conductive layer away from the substrate; the first electrode is located on the side of the first passivation layer away from the substrate, and the first electrode is in ohmic contact with the first doped conductive layer; wherein, the projection of the first electrode on the second surface is spaced apart from the projection of the groove on the second surface. In a first aspect, providing a groove in the first doped conductive layer can reduce or block large lateral current or lateral charge flow in the first doped conductive layer, thereby reducing carrier recombination in the first doped conductive layer, avoiding a decrease in current efficiency, and improving photoelectric conversion efficiency. Secondly, a transparent conductive part is set at the groove. The transparent conductive layer is made by magnetron sputtering. The high-energy particles generated during the magnetron sputtering process can bombard the first doped conductive layer damaged by the laser. The transparent conductive layer can repair the first doped conductive layer damaged by the laser. For example, the high temperature during the magnetron sputtering process can activate the migration of atoms such as polycrystalline silicon and can reconstruct grain boundaries (taking the first doped conductive layer as a doped polycrystalline silicon layer as an example), so that defects are healed. For example, oxygen atoms in the transparent conductive layer can diffuse into the grain boundaries of polycrystalline silicon, and oxygen atoms form stable Si-O bonds with dangling bonds. Oxygen vacancies are confined to one side of the transparent conductive layer and become donors to improve electrical conductivity. Thirdly, a transparent conductive portion is provided at the groove location. Based on the groove, the transparent conductive portion does not contain a large number of holes or free electrons. When a large lateral current or lateral charge flow occurs in the transparent conductive portion, the probability and proportion of carrier recombination are also reduced. The transparent conductive portion replaces the first doped conductive layer for lateral charge / current transport, which not only reduces carrier recombination but also increases the effective lateral current, improving the current uniformity among different first electrodes. The transparent conductive portion acts as a series electrode in the groove. Fourthly, on the second surface, the transparent conductive portion is in direct contact with at least the bottom wall of the corresponding groove. A uniform first passivation layer is provided on the surface of the transparent conductive portion away from the substrate and on the surface of the first doped conductive layer away from the substrate. The uniform first passivation layer can provide uniform chemical passivation (H atoms passivate dangling bonds) and achieve optical anti-reflection, improving solar energy utilization. The solar cell of this application embodiment has at least one of the above-mentioned beneficial effects. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments or exemplary embodiments of this application, the drawings used in the description of the embodiments or exemplary embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1This is a schematic diagram of a first cross-sectional structure of a solar cell provided in an embodiment of this application.

[0045] Figure 2 This is a schematic diagram of a second cross-sectional structure of a solar cell provided in an embodiment of this application.

[0046] Figure 3 for Figure 1 A magnified schematic diagram of the film layer on the second surface of a solar cell.

[0047] Figure 4 This is a schematic diagram of a third cross-sectional structure of a solar cell provided in an embodiment of this application.

[0048] Figure 5 This is a schematic diagram of the process steps for manufacturing a solar cell according to an embodiment of this application.

[0049] Figure 6 This is a schematic diagram of the first intermediate process of a method for manufacturing a solar cell provided in this application embodiment.

[0050] Figure 7 This is a schematic diagram of the second intermediate process of a method for manufacturing a solar cell provided in an embodiment of this application.

[0051] Figure 8 This is a comparison between a method for manufacturing a solar cell according to an embodiment of this application and a method for manufacturing a solar cell in related technologies.

[0052] Figure 9 This is a performance comparison of a solar cell according to an embodiment of this application and a solar cell of related technologies.

[0053] Figure 10 This is a schematic diagram of the structure of a photovoltaic module provided in an embodiment of this application.

[0054] Reference numerals: Photovoltaic module 200; Solar cell 100; Substrate 11; First tunneling layer 21; First doped conductive layer 22; Groove 22a; Transparent conductive layer 23; First passivation layer 24; First electrode 25; First surface 111; Second surface 112; Transparent conductive part 231; Bottom wall 22a1; Side wall 22a2; First sub-part 231a; Second sub-part 231b; Third sub-part 231c; First edge surface 221bi; First direction Y; Second direction X; First depth h1; First thickness d1; Second thickness d2; Third thickness d3; Emitter layer 12; Second passivation layer 13; Second electrode 14; Textured structure R1; Second tunneling layer 31; Second doped conductive layer 32; Grooved area 22aq; Battery string 203; Connecting component 204; Encapsulating film 202; Cover plate 201. Detailed Implementation

[0055] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0056] In the description of this application, it should be understood that if terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" appear, these terms indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0057] Furthermore, where the terms "first" and "second" appear, these terms are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, where the term "multiple" appears, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0058] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0059] In this application, unless otherwise expressly specified and limited, the use of descriptions such as "above" or "below" the second feature indicates that the first and second features are in direct contact or indirect contact via an intermediate medium. Furthermore, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. Similarly, "below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0060] It should be noted that if an element is referred to as being "fixed to" or "set on" another element, it can be directly on the other element or there may be an intervening element. If an element is considered to be "connected to" another element, it can be directly connected to the other element or there may be an intervening element. If so, the terms "vertical," "horizontal," "upper," "lower," "left," "right," and similar expressions used in this application are for illustrative purposes only and do not represent the only possible implementation.

[0061] See Figures 1 to 7 . Figure 1 This is a schematic diagram of a first cross-sectional structure of a solar cell provided in an embodiment of this application. Figure 2 This is a schematic diagram of a second cross-sectional structure of a solar cell provided in an embodiment of this application. Figure 3 for Figure 1 A magnified schematic diagram of the film layer on the second surface of a solar cell. Figure 4 This is a schematic diagram of a third cross-sectional structure of a solar cell provided in an embodiment of this application.

[0062] Figure 5 This is a schematic diagram of the process steps for manufacturing a solar cell according to an embodiment of this application. Figure 6 This is a schematic diagram of the first intermediate process of a method for manufacturing a solar cell provided in this application embodiment. Figure 7 This is a schematic diagram of the second intermediate process of a method for manufacturing a solar cell provided in an embodiment of this application.

[0063] In a first aspect, this application provides a solar cell 100, which includes a substrate 11, a first tunneling layer 21, a first doped conductive layer 22, at least one groove 22a, a transparent conductive layer 23, a first passivation layer 24, and a first electrode 25. The substrate 11 has a first surface 111 and a second surface 112 disposed opposite to each other; a first tunneling layer 21 is located on one side of the second surface 112; a first doped conductive layer 22 is located on the side of the first tunneling layer 21 away from the substrate 11; at least one groove 22a is located on the surface of the first doped conductive layer 22 away from the substrate 11; a transparent conductive layer 23 includes at least one transparent conductive portion 231, the transparent conductive portion 231 being located at least on the bottom wall 22a1 of the corresponding groove 22a, the bottom wall 22a1 of the groove 22a being the surface of the groove 22a near the substrate 11; a first passivation layer 24 is located on the side of the transparent conductive layer 23 and the first doped conductive layer 22 away from the substrate 11; a first electrode 25 is located on the side of the first passivation layer 24 away from the substrate 11, the first electrode 25 being in ohmic contact with the first doped conductive layer 22; wherein, the projection of the first electrode 25 on the second surface 112 is spaced apart from the projection of the groove 22a on the second surface 112.

[0064] For example, the substrate 11 may contain doped elements, which can be N-type or P-type. N-type elements can be Group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As), while P-type elements can be Group III elements such as boron (B), aluminum (Al), gallium (Ga), or indium (In). For instance, when the substrate 11 is a P-type substrate, its internal doped element type is P-type. Similarly, when the substrate 11 is an N-type substrate, its internal doped element type is N-type.

[0065] For example, the substrate 11 has a first surface 111 and a second surface 112 disposed opposite to each other. The first surface 111 and the second surface 112 are disposed opposite to each other along the thickness direction of the substrate 11. Both the first surface 111 and the second surface 112 can be used to receive incident light.

[0066] For example, in some embodiments, such as Figure 1 As shown, the first surface 111 of the substrate 11 (e.g., the first surface 111 is the front) is the main light-receiving surface, and the second surface 112 of the substrate 11 is the secondary light-receiving surface (e.g., the second surface 112 is the back).

[0067] For example, in some other embodiments, the second surface 112 of the substrate 11 (e.g., the second surface 112 is the front side) is the primary light-receiving surface, and the first surface 111 of the substrate 11 is the secondary light-receiving surface (e.g., the first surface 111 is the back side).

[0068] It is understandable that the terms "light-receiving surface" and "back-lighting surface" are relative. The light-receiving surface is specifically the surface on the substrate 11 of a solar cell or photovoltaic module that is primarily exposed to sunlight. With the development of solar cell technology, the back-lighting surface also receives energy from sunlight, mainly from reflected or scattered light from the surrounding environment.

[0069] For example, such as Figure 1 As shown, the first direction Y is perpendicular to the plane where the second surface 112 is located, and the first direction Y is also the thickness direction of the base 11.

[0070] For example, such as Figure 1 As shown, the second direction X is parallel to the plane containing the second surface 112, and the second direction X is also perpendicular to the thickness of the substrate 11.

[0071] For example, at least one groove 22a is located on the surface of the first doped conductive layer 22 away from the substrate 11, that is, the first doped conductive layer 22 has at least one groove 22a, and the opening direction of the groove 22a is away from the substrate 11.

[0072] For example, in some embodiments, the first doped conductive layer 22 has a plurality of grooves 22a. In some embodiments, grooves 22a and non-grooved regions are alternately arranged, but this is not a limitation.

[0073] For example, in some embodiments, the first doped conductive layer 22 has a plurality of grooves 22a, and the bottom walls 22a1 of the plurality of grooves 22a are all covered by corresponding transparent conductive portions 231.

[0074] For example, the first doped conductive layer 22 is doped with N-type or P-type doping elements, the first doped conductive layer 22 has a large number of holes or free electrons, and the first doped conductive layer 22 has a large lateral (e.g., Figure 1 When current or lateral charge flows in the second direction (X) of the first doped conductive layer 22, carrier recombination easily occurs, leading to a decrease in current efficiency and consequently a decrease in photoelectric conversion efficiency. Therefore, in this embodiment, in a first aspect, a groove 22a is provided in the first doped conductive layer 22 to reduce or block large lateral current or lateral charge flow in the first doped conductive layer 22, thereby reducing carrier recombination in the first doped conductive layer 22, avoiding a decrease in current efficiency, and improving photoelectric conversion efficiency.

[0075] However, when forming a groove 22a in the first doped conductive layer 22 using the laser grooving process in related technologies, for example when the first doped conductive layer 22 is a doped polycrystalline silicon layer, using a high-energy laser for grooving results in significant penetration capability, for example, greater than 250 nanometers. The high-energy laser will damage the remaining portion of the first doped conductive layer 22 and the first tunneling layer 21 below. The high-energy laser will also cause microcracks at the interface between the first doped conductive layer 22 and the first tunneling layer 21, for example, the number of microcracks will be greater than 10 / μm². Due to the influence of the high-energy laser, the recombination current in the grooved area will also increase, for example, the recombination current in the grooved area will increase by 300% compared to other areas. High-energy laser grooving will also cause significant process fluctuations in the length or width of the groove.

[0076] For example, in the second aspect, a transparent conductive part 231 is provided at the groove 22a. The transparent conductive layer 23 is fabricated by magnetron sputtering. High-energy particles generated during magnetron sputtering can bombard the first doped conductive layer 22 damaged by laser. The transparent conductive layer 23 can repair the first doped conductive layer 22 damaged by laser. For example, the high temperature during magnetron sputtering can activate the migration of atoms such as polycrystalline silicon and reconstruct grain boundaries (taking the first doped conductive layer 22 as a doped polycrystalline silicon layer as an example), so that defects are healed. For example, oxygen atoms in the transparent conductive layer 23 can diffuse into the grain boundaries of polycrystalline silicon, and oxygen atoms form stable Si-O bonds with dangling bonds. Oxygen vacancies are confined to one side of the transparent conductive layer 23 and become donors to improve electrical conductivity.

[0077] For example, in a third aspect, a transparent conductive portion 231 is provided at the groove 22a. Based on the groove 22a, the transparent conductive portion 231 does not contain a large number of holes or free electrons, and a large lateral movement occurs in the transparent conductive portion 231 (e.g., Figure 1 When current or lateral charge flows in the second direction (X), the probability and proportion of carrier recombination are also less. The transparent conductive part 231 replaces the first doped conductive layer 22 for lateral charge / current transport, which not only reduces carrier recombination, but also increases the effective lateral current and improves the current uniformity in different first electrodes 25. The transparent conductive part 231 acts as a series electrode in the groove.

[0078] For example, the projection of the first electrode 25 on the second surface 112 is spaced apart from the projection of the groove 22a on the second surface 112. That is, in the projection on the second surface 112, the first electrode 25 and the groove 22a are staggered and do not contact or connect with each other.

[0079] For example, the transparent conductive portion 231 is located at least on the bottom wall 22a1 of the corresponding groove 22a, and the bottom wall 22a1 of the groove 22a is the surface of the groove 22a near the substrate 11. That is, for the first electrode 25 (or the battery area near the first electrode 25) on both sides of the transparent conductive portion 231 (or the groove 22a), it is equivalent to connecting the first electrode 25 (or the battery area near the first electrode 25) on both sides of the transparent conductive portion 231 in series. The transparent conductive portion 231 is made of a material with better conductivity. The transparent conductive portion 231 has a higher lateral conductivity to collect charge carriers, reduces series resistance, and the ohmic contact reduces interfacial recombination. It can increase the current magnitude and current density between the two regions connected in series, thereby improving the current uniformity between the multiple first electrodes 25 (or the battery areas near the multiple first electrodes 25) on one side of the second surface 112, thereby improving the conversion efficiency of the solar cell 100. Meanwhile, the groove 22a is located on the surface of the first doped conductive layer 22 away from the substrate 11, and the transparent conductive portion 231 is located at least on the bottom wall 22a1 of the corresponding groove 22a. The current and charge between the two connected regions can be transferred directly or mainly through the transparent conductive portion 231, reducing or avoiding the presence of large lateral (e.g., lateral) structures in the first doped conductive layer 22. Figure 1 The second direction (X) of the current or transverse charge flow.

[0080] For example, in some implementations, such as Figures 1 to 4 As shown, on the second surface 112, the transparent conductive part 231 is in direct contact with at least the bottom wall 22a1 of the corresponding groove 22a. The transparent conductive part 231 away from the substrate 11 and the first doped conductive layer 22 away from the substrate 11 are provided with a uniform first passivation layer 24. The uniform first passivation layer 24 can provide chemical passivation (H atoms passivate dangling bonds) uniformly and achieve the effect of optical anti-reflection, thereby improving the utilization rate of sunlight.

[0081] For example, the transparent conductive layer 23 has good conductivity and light transmission properties, which can have good performance in lateral charge and current transfer, and will not block light from entering the interior of the solar cell 100, thus avoiding a reduction in the amount of sunlight received by the solar cell 100.

[0082] For example, the first tunneling layer 21 can be silicon oxide, and the first doped conductive layer 22 can be a doped polycrystalline silicon layer. With the development of solar cell technology, the materials of the first tunneling layer 21 and the first doped conductive layer 22 are not limited to these.

[0083] In this embodiment, the transparent conductive portion 231 is located at least on the bottom wall 22a1 of the corresponding groove 22a, and the bottom wall 22a1 of the groove 22a is the surface of the groove 22a near the substrate 11; the first passivation layer 24 is located on the side of the transparent conductive layer 23 and the first doped conductive layer 22 away from the substrate 11; the first electrode 25 is located on the side of the first passivation layer 24 away from the substrate 11, and the first electrode 25 is in ohmic contact with the first doped conductive layer 22; wherein, the projection of the first electrode 25 on the second surface 112 is spaced apart from the projection of the groove 22a on the second surface 112. In a first aspect, providing the groove 22a in the first doped conductive layer 22 can reduce or block large lateral current or lateral charge flow in the first doped conductive layer 22, thereby reducing carrier recombination in the first doped conductive layer 22, avoiding a decrease in current efficiency, and improving photoelectric conversion efficiency. Secondly, a transparent conductive portion 231 is provided at the groove 22a. The transparent conductive layer 23 is fabricated using magnetron sputtering. High-energy particles generated during magnetron sputtering can bombard the first doped conductive layer 22 damaged by the laser. The transparent conductive layer 23 can repair the first doped conductive layer 22 damaged by the laser. For example, the high temperature during magnetron sputtering can activate the migration of atoms in polycrystalline silicon and reconstruct grain boundaries (taking the first doped conductive layer 22 as a doped polycrystalline silicon layer as an example), thus healing defects. For example, oxygen atoms in the transparent conductive layer 23 can diffuse into the grain boundaries of polycrystalline silicon, and oxygen atoms can form stable Si-O bonds with dangling bonds. Oxygen vacancies are confined to one side of the transparent conductive layer 23 and become donors, thereby improving conductivity. Thirdly, the transparent conductive portion 231 is provided at the groove 22a. Based on the groove 22a, the transparent conductive portion 231 does not have many holes or free electrons. Larger lateral movement occurs in the transparent conductive portion 231 (e.g., Figure 1 When current or lateral charge flows in the second direction (X), the probability and proportion of carrier recombination are also lower. The transparent conductive part 231 replaces the first doped conductive layer 22 for lateral charge / current transport, which not only reduces carrier recombination but also increases the effective lateral current, improving the current uniformity in different first electrodes 25. The transparent conductive part 231 acts as a series electrode in the groove. Fourthly, on the second surface 112, the transparent conductive part 231 is in direct contact with at least the bottom wall 22a1 of the corresponding groove 22a. A uniform first passivation layer 24 is provided on the surface of the transparent conductive part 231 away from the substrate 11 and on the surface of the first doped conductive layer 22 away from the substrate 11. The uniform first passivation layer 24 can provide chemical passivation (H atoms passivate dangling bonds) and achieve optical anti-reflection, improving the utilization rate of sunlight. The solar cell of the present application embodiment has at least one of the above-mentioned beneficial effects.

[0084] In some implementations, combined Figure 3 and Figure 7In the direction perpendicular to the plane of the second surface 112, the depth of the groove 22a is the first depth h1; in the direction perpendicular to the plane of the second surface 112, and at the location other than the groove 22a, the thickness of the first doped conductive layer 22 is the first thickness d1; the first depth h1 is less than the first thickness d1.

[0085] For example, in the direction perpendicular to the plane of the second surface 112, i.e., in the first direction Y, the depth of the groove 22a is a first depth h1. In the direction perpendicular to the plane of the second surface 112, i.e., in the first direction Y, and at the location other than the groove 22a (non-groove location), the thickness of the first doped conductive layer 22 is a first thickness d1; the first depth h1 is less than or equal to the first thickness d1, so that the groove 22a does not completely penetrate the first doped conductive layer 22, avoiding excessive damage to the first tunneling layer 21 during the formation of the groove 22a, while retaining the function of retaining the first doped conductive layer 22 at the groove 22a.

[0086] In some implementations, such as Figure 1 As shown, the transparent conductive portion 231 includes a first sub-portion 231a and a second sub-portion 231b connected to the first sub-portion 231a. The first sub-portion 231a covers the bottom wall 22a1 of the corresponding groove 22a, and the second sub-portion 231b covers the side wall 22a2 of the first doped conductive layer 22 at the groove 22a. The side wall 22a2 is connected to the corresponding bottom wall 22a1.

[0087] For example, such as Figure 1 As shown, the transparent conductive portion 231 includes a second sub-portion 231b, a first sub-portion 231a, and a second sub-portion 231b connected in sequence.

[0088] For example, such as Figure 1 As shown, when the transparent conductive part 231 transversely transmits charge and current between the two series regions, the second sub-part 231b covers the sidewall 22a2 of the first doped conductive layer 22 at the groove 22a. In the second direction X, it can be ensured that the transparent conductive part 231 and the sidewall 22a2 on both sides of the groove 22a have sufficient contact area to form an encapsulated ohmic contact, thereby improving the efficiency of the transparent conductive part 231 in transversely transmitting charge and current.

[0089] In some implementations, such as Figure 2 As shown, and in combination Figure 7 As shown, the transparent conductive portion 231 also includes a third sub-portion 231c that connects to the second sub-portion 231b. The surface of the first doped conductive layer 22 away from the substrate 11 has a first edge surface 221bi adjacent to the groove 22a. The third sub-portion 231c covers the first edge surface 221bi.

[0090] For example, such as Figure 2As shown, and in combination Figure 7 As shown, the transparent conductive portion 231 includes a third sub-portion 231c, a second sub-portion 231b, a first sub-portion 231a, a second sub-portion 231b, and a third sub-portion 231c connected in sequence.

[0091] For example, such as Figure 2 As shown, and in combination Figure 7 As shown, a third sub-part 231c is provided on the first edge surface 221bi, which can further increase the contact area between the transparent conductive part 231 and the first doped conductive layer 22 on both sides of the groove 22a, forming a larger area of ​​fully enclosed ohmic contact, thereby further improving the efficiency of lateral charge and current transmission of the transparent conductive part 231. At the same time, when process fluctuations occur in the patterning of the transparent conductive layer 23 to form the transparent conductive part 231, the second sub-part 231b can be preserved, ensuring that the transparent conductive part 231 has sufficient contact area with the sidewalls 22a2 on both sides of the groove 22a when process fluctuations occur, forming a fully enclosed ohmic contact, thereby improving the efficiency of lateral charge and current transmission of the transparent conductive part 231.

[0092] It should be noted that in some embodiments, the length of the third sub-part 231c in the second direction X is greater than or equal to 20 micrometers. When process fluctuations occur during the patterning of the transparent conductive layer 23 to form the transparent conductive part 231, such as precision fluctuations or alignment errors, the third sub-part 231c can be preserved, thereby improving the tolerance to process fluctuations. The length of the third sub-part 231c in the second direction X can be any value among 20 micrometers, 22 micrometers, 25 micrometers, 28 micrometers, and 30 micrometers.

[0093] It should be noted that in some implementation methods, such as Figures 1 to 3 As shown, the projection of the first electrode 25 on the second surface 112 is spaced apart from the projections of the groove 22a and the transparent conductive part 231 on the second surface 112.

[0094] It should be noted that in some other implementations, Figures 1 to 3 Not shown, the projection of the first electrode 25 on the second surface 112 and the projection of the groove 22a on the second surface 112 are spaced apart. In the second direction X, the transparent conductive part 231 can contact the first electrodes 25 on both sides, further improving the current uniformity in the different first electrodes 25.

[0095] In some implementations, such as Figures 1 to 3 As shown, in the groove 22a and the area outside the groove 22a, the first passivation layer 24 has a full-surface structure on the side of the transparent conductive layer 23 and the first doped conductive layer 22 away from the substrate 11.

[0096] For example, such as Figures 1 to 3 As shown, in the groove 22a and the area outside the groove 22a, the first passivation layer 24 has a full-surface structure on the side of the transparent conductive layer 23 and the first doped conductive layer 22 away from the substrate 11. The full-surface first passivation layer 24 can provide chemical passivation (H atoms passivate dangling bonds) and achieve optical anti-reflection, thereby improving the utilization rate of sunlight.

[0097] In some embodiments, the depth of the groove 22a is 200 nanometers to 300 nanometers in a direction perpendicular to the plane of the second surface 112.

[0098] For example, in the direction perpendicular to the plane of the second surface 112, i.e., in the first direction Y, the depth of the groove 22a (the first depth h1) can be any value among 200 nm, 210 nm, 220 nm, 230 nm, 240 nm, 250 nm, 260 nm, 270 nm, 280 nm, 290 nm, and 300 nm. On the one hand, a larger first depth h1 ensures that the transparent conductive part 231 penetrates deep into the first doped conductive layer 22 and has sufficient contact area with the sidewalls 22a2 on both sides of the groove 22a; on the other hand, it avoids excessive damage to the first tunneling layer 21 during the grooving process due to an excessively large first depth h1.

[0099] In some embodiments, the width of the groove 22a is 30 micrometers to 50 micrometers in the direction perpendicular to the extension of the groove 22a.

[0100] For example, in the extension direction perpendicular to the groove 22a, for example Figure 1 The extension direction of the groove 22a is perpendicular to the tabletop or paper surface, and the direction perpendicular to the extension direction of the groove 22a is the second direction X. The width of the groove 22a is 30 micrometers to 50 micrometers. In the extension direction perpendicular to the groove 22a, the width of the groove 22a can be any value among 30 micrometers, 32 micrometers, 35 micrometers, 38 micrometers, 40 micrometers, 42 micrometers, 45 micrometers, 48 ​​micrometers, and 50 micrometers. On the one hand, the larger width of the groove 22a avoids the failure of the connection between the transparent conductive part 231 and the side walls 22a2 on both sides of the groove 22a due to alignment errors, etc.; on the other hand, it avoids the groove 22a being too wide, thus avoiding reducing the installation area of ​​the first electrode 25 and avoiding the partial light-blocking effect caused by an excessively large area of ​​transparent conductive part 231.

[0101] In some embodiments, the thickness of the first doped conductive layer 22 is 500 nanometers to 700 nanometers in a direction perpendicular to the plane of the second surface 112 and in a location other than the groove 22a.

[0102] For example, in the direction perpendicular to the plane of the second surface 112, i.e., in the first direction Y, and at the location other than the groove 22a, the thickness (first thickness d1) of the first doped conductive layer 22 is 500 nm to 700 nm. The thickness of the first doped conductive layer 22 can be any value among 500 nm, 520 nm, 550 nm, 580 nm, 600 nm, 620 nm, 650 nm, 680 nm, and 700 nm. The appropriate thickness of the first doped conductive layer 22 allows it to have good original film layer function while also having sufficient thickness to form the groove 22a.

[0103] In some embodiments, the thickness of the transparent conductive layer 23 is 80 nanometers to 120 nanometers in a direction perpendicular to the plane of the second surface 112 and at the bottom wall 22a1 of the groove 22a.

[0104] For example, such as Figure 3 As shown, in the direction perpendicular to the plane of the second surface 112, i.e., in the first direction Y, and at the bottom wall 22a1 of the groove 22a, the thickness of the transparent conductive layer 23 is a second thickness d2, which is between 80 nm and 120 nm. In the direction perpendicular to the plane of the second surface 112, the thickness of the transparent conductive layer 23 can be any value among 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, 115 nm, and 120 nm. The moderate thickness of the transparent conductive layer 23 allows the transparent conductive portion 231 to have good lateral charge collection capability while also forming a good ohmic contact with the first doped conductive layer 22, thus reducing interfacial recombination.

[0105] In some embodiments, the thickness of the first passivation layer 24 is 100 nanometers to 130 nanometers in a direction perpendicular to the plane of the second surface 112 and at a location other than the groove 22a.

[0106] For example, such as Figure 3 As shown, in the direction perpendicular to the plane of the second surface 112, i.e., in the first direction Y, and at the location other than the groove 22a, the thickness of the first passivation layer 24 is a third thickness d3, which is 100 nm to 130 nm. In the direction perpendicular to the plane of the second surface 112, and at the location other than the groove 22a, the thickness of the first passivation layer 24 can be any value among 100 nm, 105 nm, 110 nm, 115 nm, 120 nm, 125 nm, and 130 nm.

[0107] In some embodiments, the material of the transparent conductive layer 23 includes at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide, and fluorine-doped tin oxide.

[0108] For example, indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide, and fluorine-doped tin oxide all have good electrical conductivity and light transmittance.

[0109] In some embodiments, the material of the first passivation layer 24 includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0110] For example, silicon oxide, silicon nitride, and silicon oxynitride have good passivation and antireflection properties.

[0111] It should be noted that, as Figures 1 to 3 As shown, the solar cell 100 of this application is illustrated using a tunnel oxide passivated contact (TOPCon) cell as an example. With the development of solar cell technology, the first tunneling layer 21, the first doped conductive layer 22, at least one groove 22a, the transparent conductive layer 23, the first passivation layer 24 and the first electrode 25 can also be applied to other types of solar cells.

[0112] It should be noted that, as Figure 1 and Figure 2 As shown, the solar cell 100 also includes an emitter layer 12, a second passivation layer 13, and a second electrode 14. The emitter layer 12 is located on one side of the first surface 111, the second passivation layer 13 is located on the side of the emitter layer 12 away from the substrate 11, and the second electrode 14 is located on the side of the second passivation layer 13 away from the substrate 11. The second electrode 14 is in ohmic contact with the emitter layer 12.

[0113] It should be noted that in some implementation methods, such as Figure 1 and Figure 2 As shown, in the TOPCon battery, the first surface 111 of the substrate 11 is the front side, and the first surface 111 may also have multiple textured structures R1. The textured structure R1 can be a pyramid structure or an inverted pyramid structure, which is not limited here.

[0114] It should be noted that, as Figure 4 As shown, the solar cell 100 further includes a second tunneling layer 31, a second doped conductive layer 32, a second passivation layer 13, and a second electrode 14. The second tunneling layer 31 is located on one side of the first surface 111, the second doped conductive layer 32 is located on the side of the second tunneling layer 31 away from the substrate 11, the second passivation layer 13 is located on the side of the second doped conductive layer 32 away from the substrate 11, and the second electrode 14 is located on the side of the second passivation layer 13 away from the substrate 11. The second electrode 14 is in ohmic contact with the second doped conductive layer 32. Figure 4 This illustrates a double-sided oxide-passivated contact battery (double-sided TOPCon).

[0115] Secondly, based on the same application concept, such as Figures 5 to 7 As shown, this application also provides a method for manufacturing a solar cell, and the solar cell 100 of any of the above claims can be manufactured using this method. Figure 5 As shown, the method for manufacturing a solar cell includes steps S100, S200, S300, and S400.

[0116] Step S100: A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other.

[0117] For example, such as Figure 6 As shown, a substrate 11 is provided, the substrate 11 having a first surface 111 and a second surface 112 disposed opposite to each other.

[0118] Step S200: A first tunneling layer is formed on the second surface.

[0119] For example, such as Figure 6 As shown, a first tunneling layer 21 is formed on the second surface 112.

[0120] Step S300: A first doped conductive layer is formed on the side of the first tunneling layer away from the substrate.

[0121] For example, such as Figure 6 As shown, a first doped conductive layer 22 is formed on the side of the first tunneling layer 21 away from the substrate 11.

[0122] Step S400: At least one groove is formed on the surface of the first doped conductive layer away from the substrate. The method of forming the groove includes first irradiating the grooved area with a laser, and then etching the grooved area to form the groove.

[0123] For example, such as Figure 6 and Figure 7 As shown, at least one groove 22a is formed on the surface of the first doped conductive layer 22 away from the substrate 11. The method of forming the groove 22a includes first irradiating the grooved area 22aq with a laser (step S401), and then etching the grooved area 22aq to form the groove 22a (step S402).

[0124] For example, when forming a groove 22a in the first doped conductive layer 22 using the laser grooving process in related technologies, for example, when the first doped conductive layer 22 is a doped polycrystalline silicon layer, a high-energy laser is used for grooving. The high-energy laser has a large penetration capability, for example, the penetration capability of the high-energy laser is greater than 250 nanometers. The high-energy laser will destroy the remaining part of the first doped conductive layer 22 and the first tunneling layer 21 below. The high-energy laser will also cause microcracks to appear at the interface between the first doped conductive layer 22 and the first tunneling layer 21, for example, the number of microcracks is greater than 10 / μm². Due to the influence of the high-energy laser, the recombination current in the grooved area will also increase, for example, the recombination current in the grooved area will increase by 300% compared with other areas. High-energy laser grooving will also cause large process fluctuations in the length or width of the groove.

[0125] In the solar cell manufacturing method of this application embodiment, the trenching region is first irradiated with a laser (step S401), and then the trenching region is etched to form the groove (step S402). Taking the first doped conductive layer 22 as a doped polycrystalline silicon layer as an example, the trenching region is first irradiated with a low-energy laser to convert the polycrystalline silicon in the trenching region 22aq into amorphous silicon, and then the trenching region 22aq is etched to form the groove 22a. By selecting an appropriate etching solution, the amorphous silicon can be selectively etched, while the polycrystalline silicon outside the trenching region 22aq is not etched or is etched as little as possible. In a first aspect, compared with the high-energy laser trenching process, the damage to the first doped conductive layer 22 by the low-energy laser is reduced, for example, the damage depth is reduced. In a second aspect, the two-step trenching process (steps S401 and S402) improves the process accuracy of the groove 22a, for example, the width accuracy in the second direction X is improved from a process fluctuation of 3.5 micrometers to a process fluctuation of only 1.2 micrometers. Thirdly, the solar cell manufacturing method of the present application reduces the damage to the first doped conductive layer 22 caused by low-energy laser, improves the precision of the grooving process, and uses a transparent conductive part 231 to repair the damage to the first doped conductive layer 22. This also reduces the contact resistance between the first electrode 25 and the first doped conductive layer 22, reduces the recombination current in the solar cell, and improves the photoelectric conversion efficiency of the solar cell.

[0126] Furthermore, compared to the manufacturing methods of solar cells in related technologies, the manufacturing method of solar cells in this application also includes beneficial effects: through the two-step grooving process of steps S401 and S402, the total process time of steps S401 and S402 is shortened from 8 min / piece in related technologies to 5 min / piece; the retention rate of layer hydrogen elements in the first doped conductive layer 22 (taking the doped polycrystalline silicon layer as an example) is increased from less than 50% in related technologies to greater than 90%.

[0127] In some embodiments, in the step of irradiating the grooved area with a laser, the laser wavelength is 300nm-400nm, the laser pulse frequency is 180kHz-220kHz, the laser scanning speed is 12m / s-18m / s, the laser spot overlap rate is 15%-25%, the laser pulse width is 25ns-35ns, and the laser energy density is 0.5J / cm². 2 -0.8J / cm 2 .

[0128] For example, the wavelength of the laser can be any value among 300nm, 335nm, 355nm, 380nm, and 400nm.

[0129] For example, the laser pulse frequency is 180-220kHz, and the laser pulse frequency can be any value among 180kHz, 190kHz, 200kHz, 210kHz, and 220kHz. On the one hand, this avoids the laser pulse frequency being too low, which would lead to an expansion of the low heat-affected zone (HAZ); on the other hand, it avoids the laser pulse frequency being too high, which would lead to insufficient single-pulse energy and uneven cutting depth.

[0130] For example, the laser scanning speed is 12m / s-18m / s, and the laser scanning speed can be any value among 12m / s, 13m / s, 14m / s, 15m / s, 16m / s, 17m / s, and 18m / s. On the one hand, this avoids the laser scanning speed being too slow, which would lead to increased thermal damage; on the other hand, it avoids the laser scanning speed being too fast, which would lead to insufficient depth of the groove 22a in the first direction Y.

[0131] For example, the laser spot overlap rate is 15%-25%, and the laser spot overlap rate can be any value among 15%, 16%, 17%, 18%, 19%, 20%, 21%, 22%, 23%, 24%, and 25%. On the one hand, this avoids the bottom wall 22a1 of the groove 22a being too flat due to an excessively small laser spot overlap rate; on the other hand, it avoids the low heat-affected zone (HAZ) increasing due to an excessively large laser spot overlap rate.

[0132] For example, the pulse width of the laser is 25-35ns, and the pulse width of the laser can be any value among 25ns, 26ns, 27ns, 28ns, 29ns, 30ns, 31ns, 32ns, 33ns, 34ns, and 35ns.

[0133] For example, the energy density of the laser is 0.5 J / cm². 2 -0.8J / cm 2 The energy density of the laser can be 0.5 J / cm². 2 0.6J / cm 2 0.7J / cm2 0.8J / cm 2 Any value among them. Choosing an appropriate laser energy density not only provides sufficient cutting or grooving depth but also avoids excessive damage to the first doped conductive layer 22.

[0134] In some embodiments, in the step of etching the grooved area to form the groove 22a (step S402), tetramethylammonium hydroxide and a surfactant are used to etch the grooved area to form the groove 22a, the surfactant including polyethylene glycol.

[0135] In some implementations, the etching temperature is 38°C-42°C and the etching time is 90s-120s.

[0136] In some embodiments, in the step of etching the trench area to form the groove 22a (step S402), the ratio of the etching rate of amorphous silicon to the etching rate of polycrystalline silicon is greater than or equal to 48:1, and the roughness of the bottom wall 22a1 of the groove 22a near the substrate 11 is less than 50 nm.

[0137] For example, the ratio of the etching rate of amorphous silicon to the etching rate of polycrystalline silicon is greater than or equal to 48:1. The ratio of the etching rate of amorphous silicon to the etching rate of polycrystalline silicon can be any value among 48:1, 49:1, 50:1, 51:1, and 52:1, so that amorphous silicon can be selectively etched while polycrystalline silicon is not etched or is etched as little as possible outside the trench area 22aq.

[0138] Please see Figure 8 , Figure 8 This document presents a comparison between a method for manufacturing a solar cell according to an embodiment of this application and a method for manufacturing a solar cell in related technologies. Comparative Example 1 of the related technology uses high-energy laser grooving, while Embodiment 1 of this application employs a two-step grooving process (steps S401 and S402). The first doped conductive layer in both Comparative Example 1 and Embodiment 1 is a doped polycrystalline silicon layer. Figure 8 As can be seen, the damage depth (depth in the first direction Y) of the doped polysilicon layer caused by laser irradiation in Embodiment 1 of this application decreased from 250 nm in Comparative Example 1 to 80 nm. The width uniformity (process variation) of the groove 22a in Embodiment 1 of this application improved from ±3.5 μm in related technologies to ±1.2 μm. The interface state density in Embodiment 1 of this application increased from 5 × 10⁻⁶ in Comparative Example 1. 11 cm -2 eV -1 Decreased to 8×10 10 cm -2 eV -1 Therefore, the method for manufacturing a solar cell according to this application has the advantage of addressing the first...

[0139] Please see Figure 9, Figure 9 This document presents a performance comparison between a solar cell according to an embodiment of this application and a solar cell of related technologies. Comparative Example 2 of the related technology involves high-energy laser grooving (by...). Figure 8 The sample was manufactured using the manufacturing method of Comparative Example 1), and no transparent conductive layer 23 was provided. Embodiment 1 of this application employs a two-step grooving process (steps S401 and S402, by...). Figure 8 The solar cell of Example 2 is manufactured using the manufacturing method of Example 1 and has a transparent conductive layer 23 provided. Figure 2 As shown, the first doped conductive layer in both Comparative Example 2 and Example 2 is a doped polysilicon layer. From Figure 9 As can be seen from the above, the contact resistance of Embodiment 2 of this application decreased from 1.7 mΩ·cm² in Comparative Example 2 to 1.1 mΩ·cm², the composite current of Embodiment 2 of this application decreased from 8 fA / cm² in Comparative Example 2 to 2.5 fA / cm², and the conversion efficiency of Embodiment 2 of this application increased from 24.8% in Comparative Example 2 to 25.3%.

[0140] Thirdly, based on the same concept, this application also provides a stacked battery, which includes a top battery, an adhesive layer and a bottom battery stacked sequentially, wherein the bottom battery is a solar cell 100 of any of the above.

[0141] For example, in some embodiments, the top cell can be a perovskite solar cell, which includes: a first transport layer, a perovskite substrate, a second transport layer, a transparent conductive layer, and an antireflection layer stacked together. The first transport layer is directly opposite the bottom cell. The first transport layer can be either an electron transport layer or a hole transport layer, and the second transport layer can be either an electron transport layer or a hole transport layer.

[0142] It should be noted that the tandem cell of this application is based on the same concept as the solar cell 100 of any of the above claims, and the tandem cell has the same or similar effects as the solar cell 100 of any of the above claims, which will not be repeated here.

[0143] Please see Figure 10 , Figure 10 This is a schematic diagram of the structure of a photovoltaic module provided in an embodiment of this application.

[0144] Fourthly, based on the same application concept, this application also provides a photovoltaic module 200, which includes: a battery string 203, which is formed by connecting a plurality of solar cells 100 as described above, or by connecting solar cells 100 manufactured by a method for manufacturing a plurality of solar cells as described above, or by connecting tandem cells as described above; a connecting member 204 for electrically connecting two adjacent solar cells 100; an encapsulating film 202 for covering the surface of the battery string 203; and a cover plate 201 for covering the surface of the encapsulating film 202 facing away from the surface of the battery string 203.

[0145] For example, in some embodiments, the connecting component 204 may include a conductive strip, through which multiple battery strings 203 can be electrically connected. An encapsulating film 202 covers both the front and back sides of the solar cell or tandem solar cell.

[0146] For example, in some embodiments, the encapsulating film 202 may be an organic encapsulating film such as ethylene-vinyl acetate copolymer (EVA) film, polyethylene octene coelastomer (POE) film, or polyethylene terephthalate (PET) film.

[0147] For example, in some embodiments, the cover plate 201 can be a glass cover plate, a plastic cover plate, or other cover plate with light-transmitting function.

[0148] For example, in some embodiments, the surface of the cover plate 201 facing the encapsulation layer can be an uneven surface, thereby increasing the utilization of incident light.

[0149] It should be noted that the photovoltaic module 200 of this application and the solar cell 100 of any of the above claims are based on the same application concept, and the photovoltaic module 200 and the solar cell 100 of any of the above claims have the same or similar effects, which will not be repeated here.

[0150] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0151] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A solar cell, characterized in that, include: The substrate has a first surface and a second surface disposed opposite to each other; The first tunneling layer is located on one side of the second surface; The first doped conductive layer is located on the side of the first tunneling layer away from the substrate; At least one groove is located on the surface of the first doped conductive layer away from the substrate; A transparent conductive layer includes at least one transparent conductive portion, the transparent conductive portion being located at least on the bottom wall of the corresponding groove, the bottom wall of the groove being the surface of the groove near the substrate; The first passivation layer is located on the side of the transparent conductive layer and the first doped conductive layer away from the substrate; and The first electrode is located on the side of the first passivation layer away from the substrate, and the first electrode is in ohmic contact with the first doped conductive layer. The projection of the first electrode onto the second surface is spaced apart from the projection of the groove onto the second surface.

2. The solar cell according to claim 1, characterized in that, In a direction perpendicular to the plane containing the second surface, the depth of the groove is a first depth; In a direction perpendicular to the plane containing the second surface, and at a location outside the groove, the thickness of the first doped conductive layer is a first thickness; The first depth is less than the first thickness.

3. The solar cell according to claim 1, characterized in that, The transparent conductive portion includes a first sub-portion and a second sub-portion connected to the first sub-portion. The first sub-portion covers the bottom wall of the corresponding groove, and the second sub-portion covers the side wall of the first doped conductive layer at the groove. The side wall is connected to the corresponding bottom wall.

4. The solar cell according to claim 3, characterized in that, The transparent conductive portion further includes a third sub-portion connected to the second sub-portion, and the surface of the first doped conductive layer away from the substrate has a first edge surface adjacent to the groove, and the third sub-portion covers the first edge surface.

5. The solar cell according to claim 1, characterized in that, In the groove and other areas, the first passivation layer has a full-surface structure on the side of the transparent conductive layer and the first doped conductive layer away from the substrate.

6. The solar cell according to claim 1, characterized in that, In a direction perpendicular to the plane containing the second surface, the depth of the groove is 200 nanometers to 300 nanometers; and / or, In the direction perpendicular to the extension of the groove, the width of the groove is 30 micrometers to 50 micrometers; and / or, In a direction perpendicular to the plane containing the second surface, and at a location outside the groove, the thickness of the first doped conductive layer is 500 nanometers to 700 nanometers.

7. The solar cell according to claim 1, characterized in that, In a direction perpendicular to the plane containing the second surface, and at the bottom wall of the groove, the thickness of the transparent conductive layer is 80 nanometers to 120 nanometers; and / or, In a direction perpendicular to the plane of the second surface, and at a location outside the groove, the thickness of the first passivation layer is 100 nanometers to 130 nanometers.

8. The solar cell according to claim 1, characterized in that, The material of the transparent conductive layer includes at least one of indium tin oxide, indium tungsten oxide, zinc aluminum oxide, titanium-doped indium oxide, and fluorine-doped tin oxide; and / or, The material of the first passivation layer includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.

9. A method for manufacturing a solar cell, characterized in that, A method for manufacturing a solar cell as described in any one of claims 1 to 8, comprising: A substrate is provided, the substrate having a first surface and a second surface disposed opposite to each other; A first tunneling layer is formed on the second surface; A first doped conductive layer is formed on the side of the first tunneling layer away from the substrate; At least one groove is formed on the surface of the first doped conductive layer away from the substrate. The method of forming the groove includes first irradiating the grooved area with a laser, and then etching the grooved area to form the groove.

10. The method for manufacturing a solar cell according to claim 9, characterized in that, In the step of irradiating the grooved area with laser, the wavelength of the laser is 300nm-400nm, the pulse frequency of the laser is 180kHz-220kHz, the scanning speed of the laser is 12m / s-18m / s, the spot overlap rate of the laser is 15%-25%, the pulse width of the laser is 25ns-35ns, and the energy density of the laser is 0.5J / cm². 2 -0.8J / cm 2 .

11. The method for manufacturing a solar cell according to claim 9, characterized in that, In the step of etching the grooved area to form the groove, tetramethylammonium hydroxide and a surfactant are used to etch the grooved area to form the groove, the surfactant including polyethylene glycol.

12. The method for manufacturing a solar cell according to claim 11, characterized in that, The etching temperature is 38℃-42℃, and the etching time is 90s-120s.

13. The method for manufacturing a solar cell according to claim 9, characterized in that, In the step of etching the grooved area to form the groove, the ratio of the etching rate of amorphous silicon to the etching rate of polycrystalline silicon is greater than or equal to 48:1, and the roughness of the bottom wall of the groove near the substrate is less than 50 nm.

14. A stacked battery, characterized in that, It includes a top cell, an adhesive layer, and a bottom cell stacked in sequence, wherein the bottom cell is a solar cell as described in any one of claims 1 to 8.

15. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple solar cells as described in any one of claims 1 to 8, or by connecting multiple solar cells manufactured by the method of manufacturing solar cells as described in any one of claims 9 to 13, or by connecting tandem cells as described in claim 14; A connecting component for electrically connecting two adjacent solar cells; An encapsulating film is used to cover the surface of the battery string; and A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

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