Systems, methods, and computer program products for generating true random numbers

Abstract

A system, method, and computer program product are provided for generating true random numbers. Systems, methods, and devices are provided for automatically generating random numbers. According to an embodiment, a system may include: a storage store storing computer executable instructions; and at least one processor communicatively connected to the storage, the at least one processor may be configured to execute instructions to perform: performing a start-up process of the vehicle; determining a plurality of timestamps when the electrical signal flows from the power supply to a plurality of segments of each of the plurality of cores of the system during the startup process; and generating a random number based on the determined plurality of timestamps.

Description

Technical Field

[0001] Systems, methods, and computer programs consistent with exemplary embodiments of the present disclosure relate to true random number generation, and more particularly, to the generation of true random numbers for vehicle functions. Background Art

[0002] Modern vehicles are capable of performing a wide range of complex functions, such as the generation of telemetry data, the transmission and reception of data via the Internet, and the like. In order for a vehicle to perform the above functions, the vehicle is essentially connected to an upstream server.

[0003] Data encryption, authentication, and digital signatures are important aspects of modern vehicle security. Generally speaking, these functions involve the generation of random numbers for cryptographic operations. For example, these random numbers can be used by the vehicle to generate dynamic (temporary) keys during startup, for password exchange when the vehicle is connected to an external endpoint, and for similar operations.

[0004] Here, it can be understood that the random number refers to a true random number, which is not a random number generated by a computer algorithm, but a random number generated by an algorithm using entropy (i.e., external unpredictable physical variables such as radioactive decay of isotopes, atmospheric electricity, and similar physical variables).

[0005] For example, one or more truly random values ​​(e.g., radioactive decay of isotopes, atmospheric physics, and similar physical variables) can be collected, and a portion of these values ​​can be used to generate a truly random number. In one example, 01192935, 83783200, and 28473041 can be obtained as three truly random values, and the last three digits of these values ​​can be used to generate 935200041 as the truly random number.

[0006] In related art, entropy used to generate random numbers for vehicle functions can be derived from user interactions, such as steering wheel pressure, vehicle speed at a specific location, how the user turns the vehicle on a specific road, and similar interactions. However, generating random numbers based on user interactions may require observing and recording these interactions, which can pose challenges with global privacy laws regarding data collection. To circumvent this issue, a solution has been proposed: refraining from collecting user-related data during vehicle startup and for the first 15 minutes of vehicle operation.

[0007] Despite this, the aforementioned solutions in the related art may also have at least the following disadvantages. Because data is not collected during vehicle startup, true random variables are sometimes not collected and used as entropy for random number generation. Consequently, it is difficult to ensure that sufficient entropy is collected to generate appropriate random numbers for safety functions.

[0008] Therefore, there is a need for a system that can collect enough entropy to generate appropriate random numbers for safety functions, and can generate random numbers for vehicle functions in a manner that does not put the user's privacy at risk. Summary of the Invention

[0009] The exemplary embodiment of the present disclosure automatically determines a random number based on multiple timestamps of electrical signals flowing from a power source to multiple segments of each of multiple cores of the system during the startup process. Therefore, the exemplary embodiment of the present disclosure can collect enough entropy to generate appropriate random numbers for safety functions and can generate random numbers for vehicle functions in a manner that does not put the user's privacy at risk.

[0010] According to an embodiment, a system is provided. The system may include: a storage device storing computer-executable instructions; and at least one processor communicatively connected to the storage device, wherein the at least one processor may be configured to execute the instructions to perform the following processing: perform a vehicle startup process; determine multiple timestamps when electrical signals flow from a power supply to multiple segments of each of multiple cores of the system during the startup process; and generate a random number based on the determined multiple timestamps.

[0011] Depending on the implementation, the multiple timestamps may be in nanoseconds or picoseconds.

[0012] According to an embodiment, at least one processor may be configured to execute instructions to generate a random number by: determining one or more parts associated with each of a plurality of determined timestamps; and combining one or more parts associated with each of a plurality of determined timestamps to form a random number.

[0013] According to an embodiment, the one or more portions associated with each of the determined plurality of time stamps may include one or more digits associated with each of the determined plurality of time stamps.

[0014] According to an embodiment, at least one processor may be configured to execute instructions to combine one or more parts associated with each of the multiple timestamps determined by: arranging one or more parts associated with each of the multiple timestamps determined to form a random number; or performing one or more mathematical operations on one or more parts associated with each of the multiple timestamps determined to form a random number.

[0015] According to an embodiment, the system may include a system on a chip (SoC).

[0016] According to an embodiment, the multiple timestamps may be determined using an internal debug meter.

[0017] According to an embodiment, it may be possible that the timestamps are different in all startup processes.

[0018] According to an embodiment, a method performed by a system is provided, which may include: performing a vehicle startup process; determining multiple timestamps when electrical signals flow from a power supply to multiple segments of each of multiple cores of the system during the startup process; and generating a random number based on the determined multiple timestamps.

[0019] Depending on the implementation, the multiple timestamps may be in nanoseconds or picoseconds.

[0020] According to an embodiment, the generating of the random number may include: determining one or more parts associated with each of the determined plurality of time stamps; and combining the one or more parts associated with each of the determined plurality of time stamps to form the random number.

[0021] According to an embodiment, the one or more portions associated with each of the determined plurality of time stamps may include one or more digits associated with each of the determined plurality of time stamps.

[0022] According to an embodiment, the combination of one or more parts associated with each of the multiple timestamps determined may include: arranging one or more parts associated with each of the multiple timestamps determined to form a random number; or performing one or more mathematical operations on one or more parts associated with each of the multiple timestamps determined to form a random number.

[0023] According to an embodiment, the system may include a system on a chip (SoC).

[0024] According to an embodiment, it may be that the plurality of timestamps are determined using an internal debugger.

[0025] According to an embodiment, it may be possible that the timestamps are different in all startup processes.

[0026] According to an embodiment, a non-transitory computer-readable recording medium is provided. Regarding the non-transitory computer-readable recording medium, instructions may be recorded on the non-transitory computer-readable recording medium, the instructions being executable by at least one processor of a system, for causing the at least one processor to perform a method. Furthermore, according to an embodiment, a computer program is provided for causing at least one processor to perform a method. The method includes: performing a vehicle startup process; determining multiple timestamps when electrical signals flow from a power supply to multiple segments of each of multiple cores of the system during the startup process; and generating a random number based on the multiple timestamps determined.

[0027] Depending on the implementation, the multiple timestamps may be in nanoseconds or picoseconds.

[0028] According to an embodiment, the generating of the random number may include: determining one or more parts associated with each of the determined plurality of time stamps; and combining the one or more parts associated with each of the determined plurality of time stamps to form the random number.

[0029] According to an embodiment, it may be that the plurality of timestamps are determined using an internal debugger.

[0030] Additional aspects will be partially described in the following description and partially apparent from the description, or may be achieved through practice of the embodiments presented in this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The features, advantages, and significance of the preferred embodiments of the present disclosure will be described below with reference to the accompanying drawings, in which like reference numerals represent like elements.

[0032] Figure 1 A block diagram illustrating exemplary components of a random number generation (RNG) system according to one or more embodiments.

[0033] Figure 2A An exemplary architecture of a random number generation (RNG) system according to one or more embodiments is shown.

[0034] Figure 2B An exemplary architecture representing the core of a random number generation (RNG) system of one or more embodiments is shown.

[0035] Figure 3 A flowchart illustrating an exemplary method for generating random numbers according to one or more embodiments is provided. DETAILED DESCRIPTION

[0036] The following detailed description of exemplary embodiments will refer to the accompanying drawings, in which the same reference numerals in different drawings may identify the same or similar elements.

[0037] The above disclosure provides examples and illustrations, but is not intended to be exhaustive or to limit the implementation scheme to the precise form disclosed. Modifications and variations may be made in view of the above disclosure or based on the implementation scheme. Moreover, one or more features or components of one embodiment may be combined or combined with another embodiment (or one or more features of another embodiment). Moreover, it will be understood that in the flowcharts and descriptions of the actions provided below, one or more actions may be omitted, one or more actions may be added, one or more actions may be performed simultaneously (at least partially), and the order of one or more actions may be switched.

[0038] It is obvious that the systems and / or methods described in this specification can be implemented in various forms of hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software used to implement the system and / or method is not a limitation of the implementation scheme. Therefore, the actions and behaviors of the system and / or method are described in this specification without reference to specific software code. It is understood that software and hardware can be designed to implement the system and / or method based on the description of this specification.

[0039] Even if a particular combination of features is recited in the claims and / or disclosed in this specification, that combination is not intended to limit the disclosure of possible implementations. Indeed, many of the features may be combined in ways not specifically recited in the claims and / or disclosed in this specification. Each dependent claim listed below may be directly dependent on only one claim, but the disclosure of possible implementations includes each dependent claim in combination with all other claims in the set.

[0040] As long as there is no particularly clear record, the elements, behaviors or instructions used in this specification should not be interpreted as being important or necessary. In addition, when used in this specification, the articles "a" and "an" are meant to include more than one project and can be used in a way that can be interchanged with "more than one". In the case of only referring to one project, terms such as "one" or similar terms are used. In addition, when used in this specification, the terms "has", "have", "having", "include", "including" or similar terms are meant to be open-ended terms. Moreover, as long as there is no particularly clear description, the phrase "based on..." is intended to mean "at least in part based on..." Moreover, it should be understood that expressions such as "at least one of [A] and [B]", "[A] and / or [B]" or "at least one of [A] or [B]" include only A, only B or both A and B.

[0041] It can be assumed that the features, advantages and significance of the exemplary embodiments described above in this specification are only part of the present disclosure and are not intended to be exhaustive or to limit the scope of the present disclosure.

[0042] Below, further descriptions of the features, components, configurations, actions, and implementations of the random number generation system of the present disclosure are provided in one or more embodiments.

[0043] Exemplary system architecture

[0044] Figure 1 A block diagram illustrating exemplary components of a random number generation (RNG) system 100 according to one or more embodiments.

[0045] The RNG system may include a system, platform, module, or similar component that can be configured to perform one or more actions or behaviors to generate random numbers. According to an embodiment, the RNG system 100 may include a chip provided in a vehicle. For example, the RNG system 100 may include a system-on-chip (SoC) provided in the vehicle and communicatively connected to one or more components of the vehicle, such as an electronic control unit (ECU) and similar components.

[0046] like Figure 1 As shown, the RNG system 100 may include at least one communication interface 110, at least one processor 120, at least one input / output unit 130, and at least one storage 140. However, it is understood that the RNG system 100 may include more than one communication interface 110 without departing from the scope of the present disclosure. Figure 1 The components shown may be more or less than the components shown, and / or the components may be arranged in accordance with Figure 1 Different ways to configure.

[0047] The communication interface 110 may include at least one component such as a transceiver (e.g., a transceiver, a separate receiver and transmitter, a bus, etc.) that enables components of the RNG system 100 to communicate with each other and / or with one or more components located outside the RNG system 100 via a wired connection, a wireless connection, or a combination of a wired connection and a wireless connection.

[0048] For example, the communication interface 110 can connect the processor 120 to the storage 140 so that they can communicate with each other when performing one or more actions. As another example, the communication interface 110 can connect the RNG system 100 (or one or more components included therein) so that they can communicate with each other to perform actions.

[0049] According to one or more embodiments, the communication interface 110 may include one or more application programming interfaces that enable the RNG system 100 (or one or more components included in the RNG system 100 ) to communicate with one or more software applications.

[0050] The input / output unit 130 may include at least one component that enables the RNG system 100 to receive information and / or provide output information. It will be appreciated that, in some embodiments, the input / output unit 130 may include at least one input component (e.g., a touch screen display, buttons, switches, microphones, sensors, etc.) and at least one output component (e.g., a display, a speaker, one or more light-emitting diodes (LEDs), etc.), and these components may be separate from each other.

[0051] The storage 140 may include one or more storage media suitable for storing data, information and / or computer executable instructions internally. According to an embodiment, the storage 140 may include at least one storage storage such as a random access memory (RAM), a read-only memory (ROM) and / or other types of dynamic storage devices or static storage devices (e.g., flash memory, magnetic memory and / or optical memory) that stores information and / or instructions for use by the processor 120. Further or alternatively, the storage 140 may include a corresponding drive and include a hard disk (e.g., a magnetic disk, an optical disk, a magneto-optical disk and / or a solid-state drive), a compact disc (CD), a digital versatile disc (DVD), a floppy disk, a cassette tape, a magnetic tape and / or other types of non-transitory computer-readable media.

[0052] Depending on the embodiment, storage 140 may be configured to store information such as raw data, metadata, or similar information. Additionally or alternatively, storage 140 may also be configured to store one or more pieces of information associated with one or more actions performed by processor 120. For example, storage 140 may store information specifying historical actions performed by processor 120 to generate random numbers, one or more results of actions performed by processor 120, or similar content. Furthermore, storage 140 may store data or information required for generating random numbers.

[0053] In some implementations, storage 140 may include multiple storage media. To provide redundancy and to back up information or associated data, storage 140 may be configured to store copies or replicas of at least a portion of the information on multiple storage media. Furthermore, storage 140 may also store computer-readable instructions or computer-executable instructions that, when executed by one or more processors (e.g., processor 120), cause the one or more processors to perform one or more actions described in this specification.

[0054] The processor 120 may include at least one processor that can be programmed or configured to perform the functions or actions described in this specification. For example, the processor 120 may be configured to execute computer-executable instructions stored in at least one storage medium or storage device (e.g., storage 140), thereby performing one or more behaviors or actions described in this specification.

[0055] According to an embodiment, the processor 120 may be configured to receive one or more signals and / or one or more user inputs that specify one or more instructions for performing one or more actions (e.g., via the communication interface 110, via the input / output unit 130, etc.). Moreover, the processor 120 may be implemented by hardware, firmware, or a combination of hardware and software. For example, the processor 120 may include at least one of a central processing unit (CPU), a graphics processing unit (GPU), an accelerated processing unit (APU), a microprocessor, a microcontroller, a digital signal processor (DSP), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), and / or other types of processing components or computing components.

[0056] According to an embodiment, the processor 120 may be configured to collect, extract and / or receive one or more pieces of information (in the form of signals or data, etc.), process the received one or more pieces of information, and thereby generate a random number.

[0057] Several exemplary actions that may be performed by the processor 120 of the RNG system 100 for generating random numbers will be described with reference to Figure 3 Instructions are provided below.

[0058] Figure 2A The RNG system 200 may be configured to: Figure 1 Therefore, unless otherwise specified, the features associated with the RNG system 200 and the RNG system 100 can be applied similarly to each other.

[0059] like Figure 2A As shown, the RNG system 200 may include multiple cores, namely core 210, core 220, core 230, and core 240. Each of the multiple cores 210, 220, 230, and 240 may have a processor core, which may include one or more of a microcontroller, a microprocessor, a digital signal processor (DSP), an application-specific instruction set processor (ASIP), and similar processors.

[0060] Figure 2B 1 and 2 illustrate an exemplary architecture of the core 210 in the RNG system 200 according to one or more embodiments. It is understood that the cores 220, 230, and 240 may have the same architecture unless otherwise specified.

[0061] like Figure 2B As shown, the core 210 may include multiple segments, namely segment 212-a, segment 212-b, segment 212-c and segment 212-d, and a monitoring module 214. Multiple segments refer to multiple physical sectors (sections) / parts that form the core. According to an embodiment, the multiple segments may each include more than one component of the core. For example, the multiple segments may include one or more of a control unit, an arithmetic logic operation device, a memory, and similar components of a processor core. According to an embodiment, the monitoring module 214 may be configured to monitor and track the startup (power-on) process of the RNG system 200. For example, the monitoring module 214 may have an internal debugger of the SoC configured to monitor and track the startup process of the SoC during vehicle startup.

[0062] Depending on the implementation, the RNG system 200 may include additional components that enable the monitoring module 214 to monitor and track the system's boot process, or may be communicatively connected to such additional components. For example, the RNG system 200 may include an advanced camera and / or electroencephalogram as part of the SoC's internal diagnostics.

[0063] It is understandable that Figure 2A and Figure 2BThe configuration shown is simplified for illustrative purposes and is in no way intended to limit the scope of the present disclosure. Specifically, in practice, the number of multiple cores and the number of multiple segments can be any number. Moreover, it is understood that the RNG system 200 may include more than 100 cores without departing from the scope of the present disclosure. Figure 2A and Figure 2B The components shown may be more or less than the components shown, and / or the components may be arranged in accordance with Figure 2A and Figure 2B The methods shown are different ways to configure.

[0064] Exemplary actions for generating random numbers in the present disclosure

[0065] Below, refer to Figure 3 , several exemplary actions that can be performed by the RNG system of the present disclosure are recorded.

[0066] Figure 3 A flow chart illustrating an exemplary method 300 for generating random numbers according to one or more embodiments. One or more actions in the method 300 may be performed by at least one processor (eg, processor 120) of the RNG system.

[0067] like Figure 3 As shown, in action S310, at least one processor may be configured to perform a vehicle startup process. The startup process may include powering on various components of the vehicle, including multiple segments associated with each of the multiple cores of the system. The method then proceeds to action S320.

[0068] In action S320, at least one processor may be configured to determine a plurality of timestamps when an electrical signal flows from a power source to a plurality of segments of each of a plurality of cores of the system during a boot process. Depending on the embodiment, the plurality of timestamps may include a time between the start of the boot process and the time when the electrical signal arrives at the plurality of segments of each of the plurality of cores. Furthermore, the plurality of timestamps may be in nanoseconds or picoseconds.

[0069] For example, return to Figure 2B The time between the start of the boot process and the time when the electrical signal reaches segments 212-a, 212-b, 212-c, and 212-d of the core 210 can be 1265 picoseconds, 1326 picoseconds, 2854 picoseconds, and 1124 picoseconds, respectively. Therefore, multiple timestamps can have timestamps of 1265 picoseconds, 1326 picoseconds, 2854 picoseconds, and 1124 picoseconds.

[0070] According to an embodiment, it may be possible that the timestamps are different in all startup processes.

[0071] It will be appreciated that when the vehicle is powered on during startup, electricity can flow from the power supply to various components of the vehicle, including multiple segments associated with each of the system's multiple cores. Each of the multiple segments can be powered on individually. Even if the components are physically wired and the order in which they are powered on remains the same, the time it takes for the electrical signal to flow from the power supply to each of the multiple segments will vary each time the vehicle is powered on. For example, in the example above, the time between the start of the startup process and the arrival of the electrical signal at segment 212-a is 1265 picoseconds, but this time may vary during the next startup process. Therefore, multiple timestamps can be used as entropy for generating random numbers.

[0072] According to an embodiment, the multiple timestamps may be determined using a monitoring module of the RNG system. The monitoring module may, for example, include an internal debugger included in the SoC. Furthermore, according to an embodiment, the multiple timestamps may be stored in a memory. The method then proceeds to action S330.

[0073] In act S330 , the at least one processor may be configured to generate a random number based on the determined plurality of time stamps.

[0074] According to an embodiment, the at least one processor may be configured to determine one or more portions associated with each of the plurality of determined timestamps, thereby generating a random number based on the plurality of determined timestamps. For example, the one or more portions associated with each of the plurality of determined timestamps may include one or more digits associated with each of the plurality of determined timestamps.

[0075] For example, the at least one processor may be configured to determine the last three bits associated with each of the plurality of determined timestamps, where for segments 212-a, 212-b, 212-c, and 212-d of the core 210, the last three bits associated with each of the plurality of determined timestamps may be 265, 326, 854, and 124, respectively. In another example, the at least one processor may be configured to determine the first and last bits associated with each of the plurality of determined timestamps, where for segments 212-a, 212-b, 212-c, and 212-d of the core 210, the first and last bits associated with each of the plurality of determined timestamps may be 15, 16, 24, and 14, respectively.

[0076] According to an embodiment, the at least one processor may be further configured to: combine one or more parts associated with each of the plurality of determined time stamps to form a random number, thereby generating a random number based on the plurality of determined time stamps.

[0077] According to an embodiment, the at least one processor may be configured to: permutate one or more parts associated with each of the multiple timestamps determined to form a random number, thereby combining one or more parts associated with each of the multiple timestamps determined to form a random number. For example, the at least one processor may be configured to: permutate the last three digits associated with each of the multiple timestamps determined to form 265326854124 as the random number.

[0078] According to an embodiment, the at least one processor may be configured to perform one or more mathematical operations on one or more parts associated with each of the plurality of determined time stamps to form a random number, thereby combining the one or more parts associated with each of the plurality of determined time stamps to form the random number. For example, the at least one processor may be configured to multiply the last three digits associated with each of the plurality of determined time stamps to form 9148355440 as the random number.

[0079] It will be appreciated that the above examples provided in association with the timestamps of segments 212 - a , 212 - b , 212 - c , and 212 - d of core 210 are simplified for illustrative purposes and are in no way intended to limit the scope of the present disclosure. In particular, timestamps of segments of other cores of the RNG system may also be used.

[0080] In this regard, random numbers are generated not based on user interaction but rather on the timestamp of the electrical signal flowing from the power supply to the multiple segments of each of the system's multiple cores. This allows for random number generation immediately after boot-up without compromising user privacy. Furthermore, the timestamp of the electrical signal flowing from the power supply to the multiple segments of each of the multiple cores is unique throughout the boot process and is measured in nanoseconds or picoseconds, allowing for the generation of sufficient entropy for appropriate random number generation for security functions.

[0081] Therefore, the above process also enables the vehicle to connect wirelessly shortly after startup, as the key can be generated from a random number and used immediately after startup.

[0082] When action S330 is performed, method 300 may end or terminate. Alternatively, method 300 may return to action S310, as a result of which at least one processor may be configured to repeatedly perform the following actions for at least a specified amount of time: (in action S310) perform a boot process; (in action S320) determine a plurality of time stamps; and (in action S330) generate a random number.

[0083] For example, a user may start their vehicle at a first time, and the at least one processor may be configured to perform the following actions: (in action S310) perform a startup process; (in action S320) determine multiple timestamps; and (in action S330) generate a random number. Subsequently, the user may start their vehicle at a second time, and the at least one processor may be configured to repeatedly perform the following actions: (in action S310) perform a startup process; (in action S320) determine multiple timestamps; and (in action S330) generate a random number. It is understood that the random number generated when the user starts their vehicle at the first time may be different from the random number generated when the user starts their vehicle at the second time.

[0084] Various options for implementation

[0085] The above disclosure provides examples and illustrations, but is not intended to be exhaustive or to limit the implementation scheme to the precise form disclosed. Modifications and variations may be obtained in light of the above disclosure or from practice of the implementation scheme.

[0086] Some embodiments may involve systems, methods, and / or computer-readable media at any possible level of technical detail of the integration. Moreover, one or more of the above components may be installed in the form of instructions that can be stored in a computer-readable medium and executed by at least one processor (and / or may include at least one processor). The computer-readable medium may include a computer-readable non-transitory storage medium (or medium(s)) having computer-readable program instructions for causing the processor to perform actions.

[0087] A computer-readable storage medium may be a tangible device that can store and store instructions for use by an instruction execution device. A computer-readable storage medium may be, for example, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any appropriate combination of the above devices, but is not limited thereto. A non-exhaustive list of more specific examples of computer-readable storage media includes the following devices, i.e., a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disc (DVD), a memory stick, a floppy disk, a punched card, or a device with a raised structure in a groove that has been mechanically encoded and recorded with instructions, and any appropriate combination of the above devices. The computer-readable storage medium used in this specification should not be interpreted as a temporary signal itself, such as an electric wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated through a waveguide or other transmission medium (e.g., a light pulse passing through an optical cable), or an electrical signal transmitted through a wire.

[0088] The computer-readable program instructions described in this specification can be downloaded from a computer-readable storage medium to each computing / processing device, or can be downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface within each computing / processing device receives the computer-readable program instructions from the network and transmits the computer-readable program instructions to be stored on a computer-readable storage medium within the computing / processing device.

[0089] The computer readable program code / instruction for performing an action can be any one of an assembly instruction, an instruction set architecture (ISA) instruction, a machine instruction, a machine dependent instruction (machine dependent instructions), a microcode, a firmware instruction, a state setting data, a constituent data for an integrated circuit, or a source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, or similar languages, and procedural programming languages ​​such as "C" programming language or similar programming languages. The computer readable program instruction can be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or completely on a remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer by any type of network including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, in order to perform a scheme or action, for example, an electronic circuit including a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) can use state information of computer-readable program instructions to personalize the electronic circuit, thereby executing the computer-readable program instructions.

[0090] The computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine, as a result of which the instructions executed by the processor of the computer or other programmable data processing device generate a method for implementing the functions / behaviors specified in the functional blocks or functional blocks (multiple) of the flowchart and / or block diagram. The computer-readable program instructions can also be stored in a computer-readable storage medium that can instruct a computer, a programmable data processing device, and / or other device to function in a specific method, as a result of which the computer-readable storage medium having the instructions stored therein has a manufactured product, wherein the manufactured product includes instructions for implementing the scheme for the functions / behaviors specified in the functional blocks or functional blocks (multiple) of the flowchart and / or block diagram.

[0091] Computer-readable program instructions can also be loaded onto a computer, other programmable data processing apparatus or other device, and a series of action steps are performed on the computer, other programmable apparatus or other device to generate a computer-implemented process, as a result of which the instructions executed on the computer, other programmable apparatus or other device implement the functions / behaviors specified in the functional box or functional box(es) of the flowchart and / or block diagram.

[0092] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and actions of possible implementations of the systems, methods, and computer-readable media of various embodiments. In this regard, each functional block in the flowchart or block diagram may represent a microservice module, segment, or portion of an instruction having one or more executable instructions for implementing a specified logical function. The method, computer system, and computer-readable medium may include additional functional blocks, fewer functional blocks, different functional blocks, or functional blocks in a different configuration than those depicted in the figures. In some alternative implementations, the functions described in the functional blocks may occur independently of the order described in the figures. For example, two functional blocks shown in succession may actually be executed simultaneously or substantially simultaneously, or the functional blocks may be executed in reverse order depending on the associated functions. It is also noted that each functional block in the block diagram and / or flowchart, as well as combinations of functional blocks in the block diagram and / or flowchart, may be implemented by a dedicated hardware-based system that performs the specified functions or behaviors, or executes a combination of dedicated hardware and computer instructions.

[0093] It is apparent that the systems and / or methods described in this specification can be implemented in various forms of hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software code used to implement the system and / or method is not limiting of the implementation. Therefore, it is understood that the actions and behaviors of the system and / or method are described in this specification without reference to specific software code, and software and hardware can be designed to implement the system and / or method based on the description of this specification.

[0094] It will be appreciated that many modifications and variations of the present disclosure are possible in light of the above teachings. It will be apparent that the present disclosure can be implemented within the scope of the appended parts in ways other than those specifically described in this specification.

[0095] A computer program product including the computer program of the above-described embodiments may be stored in a storage medium or distributed via a communication line.

Claims

1. A system for generating true random numbers, comprising: Storage memory, which stores instructions that can be executed by the computer; as well as at least one processor communicatively connected to the storage device; The at least one processor is configured to execute the instructions to perform the following processing: Carry out the vehicle starting process; determining a plurality of time stamps when electrical signals flow from a power supply to a plurality of segments in respective ones of a plurality of cores of the system during the startup process; as well as A random number is generated based on the determined multiple time stamps.

2. The system according to claim 1, wherein: The multiple time stamps are in nanoseconds or picoseconds.

3. The system according to claim 1 or 2, wherein: The at least one processor is configured to execute the instructions to generate the random number by: determining one or more portions associated with each of the determined plurality of time stamps; and The one or more parts associated with each of the determined multiple time stamps are combined to form the random number.

4. The system according to claim 3, wherein: The one or more portions associated with each of the identified multiple time stamps include one or more digits associated with each of the identified multiple time stamps.

5. The system according to claim 3 or 4, wherein: The at least one processor is configured to execute the instructions to combine the one or more parts associated with each of the determined plurality of time stamps by: Arranging the one or more parts associated with each of the determined multiple time stamps to form the random number; or One or more mathematical operations are performed on the one or more parts associated with each of the determined multiple time stamps to form the random number.

6. The system according to any one of claims 1 to 5, wherein: The system includes a system-on-chip (SoC).

7. The system according to any one of claims 1 to 6, wherein: The plurality of timestamps are determined using an internal debugger.

8. The system according to any one of claims 1 to 7, wherein: The multiple timestamps are different in all startup processes.

9. A method for generating true random numbers, performed by a system, wherein: The method comprises: Carry out the vehicle starting process; determining a plurality of time stamps when electrical signals flow from a power supply to a plurality of segments in respective ones of a plurality of cores of the system during the startup process; and A random number is generated based on the determined multiple time stamps.

10. The method according to claim 9, wherein: The multiple time stamps are in nanoseconds or picoseconds.

11. The method according to claim 9 or 10, wherein: The generating of the random number comprises: determining one or more portions associated with each of the determined plurality of time stamps; and The one or more parts associated with each of the determined multiple time stamps are combined to form the random number.

12. The method according to claim 11, wherein The one or more portions associated with each of the identified multiple time stamps include one or more digits associated with each of the identified multiple time stamps.

13. The method according to claim 11 or 12, wherein: The combination of the one or more parts associated with each of the determined multiple timestamps includes: Arranging the one or more parts associated with each of the determined multiple time stamps to form the random number; or One or more mathematical operations are performed on the one or more parts associated with each of the determined multiple time stamps to form the random number.

14. The method according to any one of claims 9 to 13, wherein The system includes a system-on-chip (SoC).

15. The method according to any one of claims 9 to 14, wherein The multiple timestamps are determined using an internal debugger.

16. The method according to any one of claims 9 to 15, wherein The multiple timestamps are different in all startup processes.

17. A computer program product comprising a computer program for causing at least one processor to perform a method, wherein The method comprises: Carry out the vehicle starting process; determining a plurality of time stamps when electrical signals flow from a power supply to a plurality of segments in respective ones of a plurality of cores of a system during the startup process; and A random number is generated based on the determined multiple time stamps.

18. The computer program product of claim 17, wherein: The multiple time stamps are in nanoseconds or picoseconds.

19. The computer program product according to claim 17 or 18, wherein: The generating of the random number comprises: determining one or more portions associated with each of the determined plurality of time stamps; and The one or more parts associated with each of the determined multiple time stamps are combined to form the random number.

20. The computer program product according to any one of claims 17 to 19, wherein: The multiple timestamps are determined using an internal debugger.

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