Positive line high-voltage impact current suppression circuit for driving circuit to be quickly powered off

Abstract

The invention, which belongs to the technical field of the circuit, discloses a positive line high-voltage impact current suppression circuit for rapid power-off of a driving circuit, comprising a driving circuit rapid power-off unit, an impact current suppression unit and an auxiliary power supply unit which are electrically connected in sequence. Impulse current suppression under high voltage is realized through the MOS tube and the current-limiting resistor. The impact current suppression circuit is located on a power supply positive line and avoids interference on negative line level. Through means of diodes, optocoupler feedback and the like, rapid power-off of the drive circuit is realized, and the circuit can maintain an impact current suppression function in a repeated power-on process; when the circuit works in a steady state, the low-power-consumption operation of the circuit is realized by utilizing the inner resistor of the MOS tube.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a positive line high-voltage impulse current suppression circuit for rapidly powering off a driving circuit. Background Art

[0002] Current inrush current suppression solutions include: one that connects an NMOS transistor in series with the negative power line, a current-limiting resistor in parallel with the MOS transistor, and a capacitor and a voltage-divider resistor to form a delayed startup circuit, extending the MOS transistor's turn-on time. The current-limiting resistor suppresses the inrush current at the moment the circuit is powered on. Afterward, the MOS transistor is turned on, allowing most of the current to flow through it, reducing overall circuit power consumption. This circuit offers advantages such as low switching losses, a simple drive scheme, and low on-resistance. However, its disadvantages include: the negative line voltage can easily be elevated, affecting back-end signal references. Furthermore, in some applications, where the negative power line is connected to the device chassis, the inrush current suppression function may be ineffective.

[0003] Another approach is to connect a PMOS transistor in series with the positive power line and a resistor in parallel with the MOS transistor. This solution is similar to the above, but because the MOS transistor is located on the positive line, it does not affect the basic level of the negative line and does not interfere with the potential reference of the subsequent stage. However, its disadvantages are: PMOS transistors generally have high internal resistance and high cost, and can only be used for low-current devices.

[0004] Therefore, in order to overcome the shortcomings of the above-mentioned existing technologies, there is an urgent need for a positive line high-voltage impact current suppression circuit that can suppress the impact current on the high voltage and positive power line, realize rapid power-off of the drive circuit, maintain the impact current suppression function during repeated power-on, and realize low-power operation of the circuit. Summary of the Invention

[0005] The purpose of the present invention is to overcome the deficiency in the prior art that the surge current cannot be suppressed under high voltage, and to provide a positive line high voltage surge current suppression circuit that can quickly power off a drive circuit.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] A positive line high voltage surge current suppression circuit for rapidly powering off a driving circuit, comprising: a driving circuit rapidly powering off unit, a surge current suppression unit, and an auxiliary power supply unit electrically connected in sequence;

[0008] The driving circuit fast power-off unit does not affect the normal operation of the inrush current suppression unit when the circuit is powered on; when the power supply is disconnected, it provides a discharge channel for the inrush current suppression unit;

[0009] The inrush current suppression unit suppresses the inrush current through the current limiting resistor when the circuit is powered on;

[0010] The auxiliary power supply unit provides the inrush current suppression unit with a driving voltage that enables normal operation.

[0011] As a preferred solution of the present invention, the driving circuit fast power-off unit includes: a power supply unit, a voltage dividing resistor R9, a voltage stabilizing diode V1, an anti-reverse diode V2, an optical coupler E1 and a MOS tube Q2;

[0012] The output terminal of the power supply unit, the output terminal, the cathode of the voltage-stabilizing diode V1 and the end of the voltage-dividing resistor R9 are all electrically connected to the input terminal of the optical coupler E1;

[0013] The anode of the voltage stabilizing diode V1 and the end of the voltage dividing resistor R9 are both electrically connected to the input end of the optical coupler E1;

[0014] The input end and the input end of the power supply unit are both electrically connected to the anode of the anti-reverse diode V2;

[0015] The output end of the optical coupler E1 is electrically connected to the gate of the MOS transistor Q2;

[0016] The output end of the optical coupler E1 is electrically connected to the source of the MOS transistor Q2.

[0017] As a preferred solution of the present invention, the power supply unit includes two power supply branches, and each of the power supply branches includes a plurality of voltage-dividing resistors connected in series.

[0018] As a preferred solution of the present invention, the inrush current suppression unit includes: a current limiting resistor R10, a MOS tube Q1, a bleeder resistor R11, a bleeder resistor R12, a third bleeder resistor R13, a driving capacitor C1, a voltage regulator diode V3 and an anti-reverse diode V4;

[0019] The end of the current limiting resistor R10 and the drain of the MOS transistor Q1 are both electrically connected to the cathode of the anti-reverse diode V2;

[0020] The end of the current limiting resistor R10, the end of the driving capacitor C1, the anode of the voltage stabilizing diode V3 and the output end of the optocoupler E1 are all electrically connected to the source of the MOS transistor Q1, and the source of the MOS transistor Q1 is electrically connected to the auxiliary power supply negative line output terminal Vout-;

[0021] The end of the bleeder resistor R11 is electrically connected to the drain of the MOS transistor Q2;

[0022] The end of the discharge resistor R12 is electrically connected to the gate of the MOS transistor Q2;

[0023] The end of the bleeder resistor R11, the end of the driving capacitor C1, the cathode of the voltage stabilizing diode V3, the anode of the anti-reverse diode V4 and the end of the third bleeder resistor R13 are all electrically connected to the gate of the MOS transistor Q1;

[0024] The cathode of the anti-reverse diode V4, the end of the third discharge resistor R13 and the end of the discharge resistor R12 are all connected to the auxiliary power supply positive line output terminal Vout+.

[0025] As a preferred embodiment of the present invention, it further includes an inter-line capacitance unit electrically connected to the inrush current suppression unit, wherein the inter-line capacitance unit includes an inter-line capacitance C2 and an inter-line capacitance C3;

[0026] The ends of the inter-line capacitor C2 and the inter-line capacitor C3 are both electrically connected to the source of the MOS transistor Q1 and the auxiliary power supply positive line input terminal Vin+;

[0027] The end of the inter-line capacitor C2 and the end of the inter-line capacitor C3 are both electrically connected to the input end of the optical coupler E1 and the auxiliary power supply negative line input end Vin-.

[0028] As a preferred solution of the present invention, the auxiliary power supply unit includes an auxiliary power supply U1, a matching resistor unit and a matching capacitor C4 which are electrically connected in sequence.

[0029] As a preferred solution of the present invention, the end of the matching capacitor C4 and the end of the matching resistor unit are both electrically connected to the auxiliary power supply negative line output terminal Vout-;

[0030] An end of the matching capacitor C4 and an end of the matching resistor unit are both electrically connected to the auxiliary power supply positive line output terminal Vout+.

[0031] As a preferred solution of the present invention, the matching resistor unit includes two matching branches connected in parallel, and each matching branch is connected in series with a plurality of matching resistors.

[0032] Compared with the prior art, the advantages of the present invention are:

[0033] The positive line high-voltage inrush current suppression circuit disclosed in the present invention achieves inrush current suppression under high voltage through MOS tubes and current-limiting resistors. The inrush current suppression circuit is located on the positive power line to avoid interference with the negative line level. By means of diodes, optocoupler feedback and other means, the drive circuit is quickly powered off, and the circuit can maintain the inrush current suppression function during repeated power-on processes. When the circuit is working in a steady state, the internal resistance of the MOS tube is utilized to achieve low-power operation of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present invention. Throughout the drawings, the same reference numerals are used to denote the same components. In the drawings:

[0035] Figure 1 This is a structural block diagram of a positive line high-voltage inrush current suppression circuit for rapidly powering off a drive circuit according to Embodiment 1 of the present invention;

[0036] Figure 2 This is a schematic diagram of a positive line high-voltage inrush current suppression circuit for rapidly powering off a drive circuit according to Example 1 of the present invention;

[0037] Figure 3 This is a diagram showing the voltage test results on the driving capacitor C1 when the input end of the positive line high-voltage inrush current suppression circuit for fast power-off of a driving circuit according to Embodiment 1 of the present invention is powered off.

[0038] Figure 4 This is a graph showing the results of an inrush current suppression test of a positive line high-voltage inrush current suppression circuit with a fast power-off of a drive circuit according to Example 1 of the present invention;

[0039] Figure 5 This is a schematic diagram of a positive line high-voltage inrush current suppression circuit for rapidly powering off a drive circuit according to embodiment 2 of the present invention;

[0040] Description of the accompanying drawings: 1-Drive circuit fast power-off unit, 2-Inrush current suppression unit, 3-Auxiliary power supply unit. DETAILED DESCRIPTION

[0041] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present invention.

[0042] It should be noted that similar numbers and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined or explained in subsequent figures. At the same time, in the description of the present invention, the terms "first" and "second" are used only to distinguish the description and should not be understood as indicating or implying relative importance, or implying any actual relationship or order between these entities or operations. In addition, the terms "connected" and "connected" can refer to direct connection between components or indirect connection through other components.

[0043] Example 1

[0044] A positive line high voltage surge current suppression circuit for quickly powering off a drive circuit, such as Figure 1 As shown, it includes: a driving circuit fast power-off unit 1, an inrush current suppression unit 2 and an auxiliary power supply unit 3 electrically connected in sequence;

[0045] Specifically, such as Figure 2 As shown, the driving circuit fast power-off unit 1 includes: a power supply unit, a voltage dividing resistor R9, a voltage stabilizing diode V1, an anti-reverse diode V2, an optical coupler E1 and a MOS tube Q2;

[0046] The output terminal of the power supply unit, the output terminal, the cathode of the voltage-stabilizing diode V1 and the end of the voltage-dividing resistor R9 are all electrically connected to the input terminal of the optical coupler E1;

[0047] The anode of the voltage stabilizing diode V1 and the end of the voltage dividing resistor R9 are both electrically connected to the end of the optical coupler Q1;

[0048] The input end and the input end of the power supply unit are both electrically connected to the anode of the anti-reverse diode V2;

[0049] The output end of the optical coupler E1 is electrically connected to the gate of the MOS transistor Q2;

[0050] The output end of the optical coupler E1 is electrically connected to the source of the MOS transistor Q2.

[0051] The power supply unit includes two power supply branches, and each power supply branch includes a plurality of voltage dividing resistors R9 connected in series.

[0052] The inrush current suppression unit 2 includes: a current limiting resistor R10, a MOS tube Q1, a bleeder resistor R11, a bleeder resistor R12, a third bleeder resistor R13, a driving capacitor C1, a voltage stabilizing diode V3 and an anti-reverse diode V4;

[0053] The end of the current limiting resistor R10 and the drain of the MOS transistor Q1 are both electrically connected to the cathode of the anti-reverse diode V2;

[0054] The end of the current limiting resistor R10, the end of the driving capacitor C1, the anode of the voltage stabilizing diode V3 and the output end of the optocoupler E1 are all electrically connected to the source of the MOS transistor Q1, and the source of the MOS transistor Q1 is electrically connected to the auxiliary power supply negative line output terminal Vout-;

[0055] The end of the bleeder resistor R11 is electrically connected to the drain of the MOS transistor Q2;

[0056] The end of the discharge resistor R12 is electrically connected to the gate of the MOS transistor Q2;

[0057] The end of the bleeder resistor R11, the end of the driving capacitor C1, the cathode of the voltage stabilizing diode V3, the anode of the anti-reverse diode V4 and the end of the third bleeder resistor R13 are all electrically connected to the gate of the MOS transistor Q1;

[0058] The cathode of the anti-reverse diode V4, the end of the third discharge resistor R13 and the end of the discharge resistor R12 are all electrically connected to the auxiliary power supply positive line output terminal Vout+.

[0059] The positive line high voltage inrush current suppression circuit further includes an inter-line capacitance unit electrically connected to the inrush current suppression unit, wherein the inter-line capacitance unit includes an inter-line capacitance C2 and an inter-line capacitance C3;

[0060] The ends of the inter-line capacitor C2 and the inter-line capacitor C3 are both electrically connected to the source of the MOS transistor Q1 and the auxiliary power supply positive line input terminal Vin+;

[0061] The end of the inter-line capacitor C2 and the end of the inter-line capacitor C3 are both electrically connected to the input end of the optical coupler E1 and the auxiliary power supply negative line input end Vin-.

[0062] The auxiliary power supply unit 3 includes an auxiliary power supply U1 , a matching resistor unit, and a matching capacitor C4 that are electrically connected in sequence.

[0063] The end of the matching capacitor C4 and the end of the matching resistor unit are both electrically connected to the auxiliary power supply negative line output terminal Vout-;

[0064] An end of the matching capacitor C4 and an end of the matching resistor unit are both electrically connected to the auxiliary power supply positive line output terminal Vout+.

[0065] The matching resistor unit includes two matching branches connected in parallel, and each matching branch is connected in series with a plurality of matching resistors.

[0066] The driving circuit fast power-off unit 1 does not affect the normal operation of the inrush current suppression unit 2 when the circuit is powered on. When the power supply is disconnected, it provides a fast discharge channel for the driving circuit part of the inrush current suppression unit 2, thereby realizing the fast power-off of the driving circuit. Figure 3 shown.

[0067] The inrush current suppression unit 2 realizes inrush current suppression through the current limiting resistor when the circuit is powered on. Figure 4 As shown, Figure 4 The figure shows the results of the inrush current suppression test, where C1 is the voltage at the circuit input terminal and C2 is the current on the circuit main line. When the circuit is working in a steady state, the MOS tube is used to achieve low power consumption operation.

[0068] The auxiliary power supply unit 3 provides a driving voltage for the inrush current suppression unit 2 so that the inrush current suppression circuit can work normally.

[0069] Example 2

[0070] This embodiment is a specific implementation of the positive line high voltage inrush current suppression circuit for rapidly powering off a driving circuit as described in Example 1;

[0071] like Figure 5 As shown, each power supply branch is connected in series with four voltage-dividing resistors R9 (R1-R8), and each matching branch is connected in series with two matching resistors (R14-R17).

[0072] The positive line high voltage surge current suppression circuit includes four working states: initial power-on, steady-state operation, power-off, and repeated power-on.

[0073] (1) Initial power-on: The circuit is initially powered on using a high-voltage power supply through an air switch. After the switch is closed, the high-voltage power supply supplies power to the optocoupler E1 through the voltage divider resistors R9R1~R8. The output end of the optocoupler E1 is turned on, resulting in almost no voltage difference at the GS end of the MOS tube Q2, and the MOS tube Q2 is in the off state. At this time, since the auxiliary power supply has no output voltage, there is no voltage difference at the GS end of the MOS tube Q1, and the MOS tube Q1 is in the off state. The high-voltage power supply can only charge the back-end line capacitors C2 and C3 through the current limiting resistor R10, and the inrush current is suppressed. When the line voltage reaches the starting voltage of the power supply unit, the auxiliary power supply U1 starts to output and charges the driving capacitor C1 through the third bleeder resistor R13. When the voltage on the driving capacitor C1 reaches the threshold voltage for turning on the MOS transistor Q1, the MOS transistor Q1 starts to turn on. Thereafter, the resistance across the DS of the MOS transistor Q1 drops sharply. At this time, the internal resistance of the MOS transistor Q1 is much smaller than the current limiting resistor R10. Almost all the current in the positive line high-voltage inrush current suppression circuit passes through the MOS transistor Q1, and the current limiting resistor R10 is bypassed. The positive line high-voltage inrush current suppression circuit enters a steady-state working state.

[0074] (2) Steady-state operation: After the positive line high-voltage surge current suppression circuit enters the steady-state operation state, the current in the circuit almost all passes through the MOS tube Q1. Since the internal resistance of the MOS tube Q1 is small, the overall power consumption of the circuit is small, and the low-power operation of the circuit is achieved.

[0075] (3) Power off: When the air switch is disconnected, due to the presence of the anti-reverse diode V2, the voltage on the back-end capacitor cannot be reversed to the input end, and the front-end quickly loses power, causing the input end of the optocoupler E1 to lose power and the output end of the optocoupler E1 to be turned off. The matching capacitor C4 at the back end of the auxiliary power supply U1 supplies power to the MOS tube Q2. The voltage across the GS of the MOS tube Q2 is greater than its turn-on threshold, and the MOS tube Q2 is turned on. The voltage on the driving capacitor C1 is quickly discharged through the bleeder resistor R11. The voltage on the driving capacitor C1 quickly drops to zero, and there is no voltage difference across the GS of the MOS tube Q1, causing the MOS tube Q1 to be turned off.

[0076] (4) Repeated power on and off: Use the air switch to repeatedly power on and off the positive line high-voltage inrush current suppression circuit. Since the voltage discharge time on the driving capacitor C1 is extremely short when the power is cut off, the driving capacitor C1 needs to be recharged when the power is turned on again, and the inrush current suppression function is still effective.

[0077] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any appropriate manner without contradiction. In order to avoid unnecessary repetition, the present disclosure will not further describe various possible combinations.

[0078] In addition, the various embodiments of the present disclosure may be arbitrarily combined, and as long as they do not violate the concept of the present disclosure, they should also be regarded as the contents disclosed by the present disclosure.

Claims

1. A positive line high voltage surge current suppression circuit for rapidly powering off a drive circuit, characterized in that: include: A drive circuit fast power-off unit, an inrush current suppression unit, and an auxiliary power supply unit electrically connected in sequence; The driving circuit fast power-off unit does not affect the normal operation of the inrush current suppression unit when the circuit is powered on; when the power supply is disconnected, it provides a discharge channel for the inrush current suppression unit; The inrush current suppression unit suppresses the inrush current through the current limiting resistor when the circuit is powered on; The auxiliary power supply unit provides the inrush current suppression unit with a driving voltage that enables normal operation.

2. A positive line high voltage surge current suppression circuit for rapidly powering off a drive circuit according to claim 1, characterized in that: The driving circuit fast power-off unit includes: a power supply unit, a voltage dividing resistor R9, a voltage stabilizing diode V1, an anti-reverse diode V2, an optical coupler E1 and a MOS tube Q2; The output terminal of the power supply unit, the output terminal, the cathode of the voltage-stabilizing diode V1 and the end of the voltage-dividing resistor R9 are all electrically connected to the input terminal of the optical coupler E1; The anode of the voltage stabilizing diode V1 and the end of the voltage dividing resistor R9 are both electrically connected to the input end of the optical coupler E1; The input end and the input end of the power supply unit are both electrically connected to the anode of the anti-reverse diode V2; The output end of the optical coupler E1 is electrically connected to the gate of the MOS transistor Q2; The output end of the optical coupler E1 is electrically connected to the source of the MOS transistor Q2.

3. The positive line high voltage surge current suppression circuit for rapidly powering off a driving circuit according to claim 2, characterized in that: The power supply unit includes two power supply branches, and each power supply branch includes a plurality of voltage dividing resistors connected in series.

4. A positive line high voltage surge current suppression circuit for rapidly powering off a drive circuit according to claim 2, characterized in that: The inrush current suppression unit includes: a current limiting resistor R10, a MOS tube Q1, a bleeder resistor R11, a bleeder resistor R12, a third bleeder resistor R13, a driving capacitor C1, a voltage stabilizing diode V3 and an anti-reverse diode V4; The end of the current limiting resistor R10 and the drain of the MOS transistor Q1 are both electrically connected to the cathode of the anti-reverse diode V2; The end of the current limiting resistor R10, the end of the driving capacitor C1, the anode of the voltage stabilizing diode V3 and the output end of the optocoupler E1 are all electrically connected to the source of the MOS transistor Q1, and the source of the MOS transistor Q1 is electrically connected to the auxiliary power supply negative line output terminal Vout-; The end of the bleeder resistor R11 is electrically connected to the drain of the MOS transistor Q2; The end of the discharge resistor R12 is electrically connected to the gate of the MOS transistor Q2; The end of the bleeder resistor R11, the end of the driving capacitor C1, the cathode of the voltage stabilizing diode V3, the anode of the anti-reverse diode V4 and the end of the third bleeder resistor R13 are all electrically connected to the gate of the MOS transistor Q1; The cathode of the anti-reverse diode V4, the end of the third discharge resistor R13 and the end of the discharge resistor R12 are all connected to the auxiliary power supply positive line output terminal Vout+.

5. The positive line high voltage surge current suppression circuit for rapidly powering off a driving circuit according to claim 4, characterized in that: Also included is an inter-line capacitance unit electrically connected to the inrush current suppression unit, the inter-line capacitance unit including an inter-line capacitance C2 and an inter-line capacitance C3; The ends of the inter-line capacitor C2 and the inter-line capacitor C3 are both electrically connected to the source of the MOS transistor Q1 and the auxiliary power supply positive line input terminal Vin+; The end of the inter-line capacitor C2 and the end of the inter-line capacitor C3 are both electrically connected to the input end of the optical coupler E1 and the auxiliary power supply negative line input end Vin-.

6. A positive line high voltage surge current suppression circuit for rapidly powering off a drive circuit according to claim 5, characterized in that: The auxiliary power supply unit includes an auxiliary power supply U1, a matching resistor unit and a matching capacitor C4 which are electrically connected in sequence.

7. A positive line high voltage surge current suppression circuit for rapidly powering off a drive circuit according to claim 6, characterized in that: The end of the matching capacitor C4 and the end of the matching resistor unit are both electrically connected to the auxiliary power supply negative line output terminal Vout-; An end of the matching capacitor C4 and an end of the matching resistor unit are both electrically connected to the auxiliary power supply positive line output terminal Vout+.

8. The positive line high voltage surge current suppression circuit for rapidly powering off a driving circuit according to claim 7, characterized in that: The matching resistor unit includes two matching branches connected in parallel, and each matching branch is connected in series with a plurality of matching resistors.

Images