Low-ultraviolet-attenuation crystalline silicon heterojunction solar cell and preparation method thereof

Abstract

The invention provides a low-ultraviolet attenuation crystalline silicon heterojunction solar cell and a preparation method thereof. The solar cell comprises a light receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer and a silicon substrate which are arranged in sequence, wherein the wide bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction; the band gap width of the wide bandgap semiconductor film layer is larger than 3 eV, the thickness of the wide bandgap semiconductor film layer ranges from 5 nm to 20 nm, the wide bandgap semiconductor film layer has the light absorption capacity of the ultraviolet band and can generate photon-generated carriers in the ultraviolet band, and the photon-generated carriers can be conveyed to the silicon substrate through the heterojunction and participate in photoelectric conversion. According to the scheme, the ultraviolet stability and the conversion efficiency of the crystalline silicon heterojunction solar cell are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a low-ultraviolet attenuation crystalline silicon heterojunction solar cell and a preparation method thereof. Background Art

[0002] Crystalline silicon heterojunction solar cells (HJTs) are a type of high-efficiency solar cell structure that combines the excellent electrical properties of crystalline silicon with the good passivation performance of amorphous silicon. In recent years, they have gained widespread adoption in the high-end photovoltaic market. These cells typically utilize an amorphous silicon layer and a crystalline silicon substrate to form a heterojunction structure. The passivation effect of amorphous silicon reduces interfacial recombination, thereby achieving high open-circuit voltage and conversion efficiency.

[0003] However, in practical applications, HJT cells face a long-standing, unresolved issue: UV-induced degradation (UVID). This is because amorphous silicon itself has a weak absorption capacity for short-wavelength ultraviolet light, and the heterojunction structure between it and the crystalline silicon substrate is susceptible to interface defects when irradiated by high-energy photons. This increases the carrier recombination rate, leading to a decrease in photoelectric conversion efficiency.

[0004] To address the UV-induced ID (UVID) problem in HJT solar modules exposed to UV light, existing technologies have proposed the use of light-converting films within the encapsulation layer. For example, conventional ethylene-vinyl acetate (EVA) encapsulation films are doped with organic down-conversion materials to create a light-conversion film structure with UV-visible light conversion capabilities. This approach aims to convert UV photons into visible light usable by silicon cells, thereby improving the device's spectral response. However, due to their inherently poor photostability, organic down-conversion materials are susceptible to structural damage and even decomposition after prolonged UV exposure, leading to a decrease in their down-conversion performance or even failure. Furthermore, their degradation products can cause yellowing and uncontrolled cross-linking of the EVA film, resulting in reduced module transmittance and power generation. Some research has also explored the use of inorganic down-conversion materials, such as rare-earth ion-doped phosphors and quantum dots, in composites with encapsulation glass or EVA films to improve the system's UV stability. However, inorganic down-conversion materials generally have problems such as low quantum yield, strong parasitic absorption, and poor dispersion compatibility with the matrix material. The efficiency and reliability bottlenecks in component-level applications have not yet been resolved, and thus large-scale industrial applications have not been achieved. Summary of the Invention

[0005] In order to solve the above problems, according to a first aspect of the present invention, a low UV attenuation crystalline silicon heterojunction solar cell is provided, comprising a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer and a silicon substrate arranged in sequence, wherein the wide bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction; The band gap width of the wide bandgap semiconductor film layer is greater than 3eV and the thickness is 5nm-20nm. The wide bandgap semiconductor film layer has the ability to absorb light in the ultraviolet band and can generate photogenerated carriers in the ultraviolet band. The photogenerated carriers can be transported to the silicon substrate through the heterojunction and participate in photoelectric conversion.

[0006] Optionally, the amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer.

[0007] Optionally, the amorphous silicon layer includes: a buffer transition sublayer, contacting the wide bandgap semiconductor film layer, which is an intrinsic amorphous silicon layer or a slightly doped amorphous silicon layer, and is used to achieve a gradual connection of energy bands; The doped amorphous silicon sublayer is in contact with the silicon substrate and is used to achieve selective carrier transport.

[0008] Optionally, the band edge variation slope between the buffer transition sublayer and the adjacent film layer is less than 0.1 eV / nm; The thickness of the buffer transition sublayer is 2nm-5nm; The thickness of the doped amorphous silicon sublayer is 3nm-30nm.

[0009] Optionally, the doped amorphous silicon sublayer is a P-type amorphous silicon layer, the dopant is boron, and the boron doping concentration is 1×10 19 cm -3 -1×10 20 cm -3 ; Optionally, the doped amorphous silicon sublayer is an N-type amorphous silicon layer, the dopant is phosphorus, and the phosphorus doping concentration is 1×10 19 cm -3 -5×10 20 cm -3 .

[0010] Optionally, oxygen vacancies are introduced into the wide bandgap semiconductor film layer or rare earth metal ions are doped to form a controllable trap state structure; The amorphous silicon layer has a microstructure for forming a directional carrier migration path, and the microstructure is composed of an asymmetric doping distribution, a nanocrystalline-amorphous hybrid phase region or a bandgap gradient region.

[0011] According to a second aspect of the present invention, there is provided a method for preparing the aforementioned low UV attenuation crystalline silicon heterojunction solar cell, comprising the following steps: providing a silicon substrate; forming an amorphous silicon layer on the surface of the silicon substrate; Depositing a wide bandgap semiconductor film layer with a bandgap width greater than 3 eV and a thickness of 5 nm to 20 nm on the surface of the amorphous silicon layer to form a heterojunction with the amorphous silicon layer; A light-receiving surface layer is formed on the surface of the wide-bandgap semiconductor film layer to obtain a low-ultraviolet attenuation crystalline silicon heterojunction solar cell.

[0012] Optionally, forming an amorphous silicon layer on the surface of the silicon substrate comprises the following steps: forming a doped amorphous silicon sublayer on the surface of the silicon substrate; A buffer transition sublayer is formed on the surface of the doped amorphous silicon sublayer. The buffer transition sublayer is an intrinsic amorphous silicon layer or a slightly doped amorphous silicon layer.

[0013] Optionally, the amorphous silicon layer is formed by plasma enhanced chemical vapor deposition, and a H2 dilution ratio during the deposition process is greater than 80%; The wide bandgap semiconductor film layer is deposited by a reactive magnetron sputtering process, and the volume ratio of oxygen to argon is 1:50-1:10.

[0014] The low UV attenuation crystalline silicon heterojunction solar cell of the embodiment of the present invention forms a heterojunction structure between the wide bandgap semiconductor film layer and the amorphous silicon layer by sequentially arranging a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer and a silicon substrate, thereby achieving the coordinated optimization of efficient ultraviolet light absorption and directional carrier transport, and completely solving the problem of ultraviolet attenuation. Specifically, first, the bandgap width of the wide bandgap semiconductor film layer is greater than 3eV, which can effectively absorb ultraviolet photons with a wavelength of less than 400nm and generate photogenerated carriers in the ultraviolet band, thereby enhancing the utilization efficiency of ultraviolet light. Secondly, the conduction band step, valence band step and Fermi level difference of the heterojunction are strictly controlled within a specific range, thereby achieving selective transport of carriers, reducing interface recombination, and improving the collection efficiency of photogenerated carriers and the overall photoelectric conversion efficiency of the battery. Thirdly, the interface defect state density is effectively reduced, reducing the formation of carrier recombination centers, ensuring the high quality of the heterojunction interface, and enhancing the stability and durability of the device. Therefore, the present invention significantly improves the ultraviolet stability and conversion efficiency of crystalline silicon heterojunction solar cells through multi-dimensional collaborative design such as efficient ultraviolet absorption of wide-bandgap semiconductor film layers, precise matching of heterojunction interface energy bands, and low-defect interface quality, effectively solves the problem of ultraviolet attenuation (UVID), and significantly improves the photoelectric conversion performance of the device.

[0015] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 shows a schematic partial structural diagram of a low UV attenuation crystalline silicon heterojunction solar cell according to one embodiment of the present invention; Figure 2 A schematic flow chart showing a method for preparing a low UV attenuation crystalline silicon heterojunction solar cell according to one embodiment of the present invention is shown; Figure 3 1 shows a schematic structural diagram of a low UV attenuation crystalline silicon heterojunction solar cell according to the first embodiment of the present invention; Figure 4 Schematic diagram of energy band and carrier transport of TiO2 / i-aSi:H heterojunction according to the first embodiment of the present invention; Figure 5 shows an XRD pattern of the TiO2 layer according to Example 1 of the present invention; Figure 6 shows a scanning electron microscope image of a TiO2 layer according to Example 1 of the present invention; Figure 7 shows an EDX image of the TiO2 layer according to Example 1 of the present invention; Figure 8 shows a schematic structural diagram of a crystalline silicon heterojunction solar cell in Comparative Example 1; Figure 9 Shows the UV-VIS transmission spectrum transmittance graphs of the TiO2 layer in Examples 1 to 3 of the present invention; Figure 10 Shows the UV-VIS transmission spectrum absorptivity graphs of the TiO2 layer in Examples 1 to 3 of the present invention; Figure 11 The UV-VIS transmission spectrum reflectance graphs of the TiO2 layer in Examples 1 to 3 of the present invention are shown. DETAILED DESCRIPTION

[0017] The technical solution of the present invention is further described below in conjunction with specific embodiments.

[0018] Figure 1 FIG1 shows a schematic partial structural diagram of a low UV attenuation crystalline silicon heterojunction solar cell according to an embodiment of the present invention. Figure 1As shown, the low-UV attenuation crystalline silicon heterojunction solar cell comprises a light-receiving surface layer, a wide-bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate, arranged in sequence. The wide-bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction. The wide-bandgap semiconductor film layer has a bandgap width greater than 3eV and a thickness of 5nm-20nm. The wide-bandgap semiconductor film layer has the ability to absorb light in the ultraviolet band and can generate photogenerated carriers in the ultraviolet band. The photogenerated carriers can be transported to the silicon substrate through the heterojunction and participate in photoelectric conversion.

[0019] The thickness of the wide bandgap semiconductor film layer is 5nm, 10nm, 20nm, or any other value between 5nm and 20nm. When the film thickness is less than 5nm, the absorption capacity of ultraviolet light is obviously insufficient, resulting in a limited number of photogenerated carriers generated, making it difficult to achieve effective utilization of ultraviolet light energy. When the film thickness is greater than 20nm, although the ultraviolet absorption is enhanced, the excessively thick film layer will aggravate the recombination loss of photogenerated carriers, and due to the increase in the carrier migration distance, additional series resistance will be introduced, affecting the fill factor and output efficiency of the overall battery. Therefore, controlling the thickness of the wide bandgap semiconductor film layer within the above range helps to ensure efficient absorption of ultraviolet light and achieve low-loss carrier transport, thereby improving the photoelectric conversion performance of the device and suppressing the ultraviolet attenuation effect.

[0020] The bandgap width of the wide bandgap semiconductor film layer can be, for example, 3eV, 3.5eV, 4eV, 4.5eV, or 5eV, or any other value between 3eV and 5eV. Controlling the bandgap width within the above range helps achieve effective absorption of the ultraviolet band (wavelength less than 400nm), thereby stimulating a sufficient number of photogenerated carriers. Compared with conventional bandgap semiconductor materials, materials with a bandgap width greater than 3eV have lower parasitic absorption in the visible light band, which helps to improve the overall visible light transmittance of the device, thereby increasing the number of photons reaching the silicon substrate and improving the short-circuit current density (J). SC ). In addition, the band gap width in the above range can provide a deeper conduction band potential well compared to a smaller band gap width, making it easier for high-energy electrons formed under ultraviolet light excitation to cross the heterojunction and be injected into the silicon substrate driven by the energy band slope, thereby enhancing the directional migration and effective separation efficiency of carriers. Furthermore, a reasonable design of the band gap width can also effectively inhibit the carrier recombination caused by energy level mismatch or defect states at the heterojunction interface, reduce the interface recombination rate, and help improve the open circuit voltage (V OC ) and device stability.

[0021] The wide bandgap semiconductor film layer has the ability to effectively absorb photons in the ultraviolet band (λ<400 nm), and its absorption coefficient α is greater than 10 in the ultraviolet band. 4 cm -1, thereby ensuring that sufficient ultraviolet light can be absorbed and incident, and can stimulate electron transition to form photogenerated carriers. In some embodiments, the wide bandgap semiconductor film layer generates photogenerated carriers with a wavelength greater than 10 -7 s, allowing carriers sufficient time to migrate to the heterojunction interface and inject into the silicon substrate before recombination, participating in the photoelectric conversion process. As a result, the wide-bandgap semiconductor film layer not only has UV absorption capabilities but also photoelectric response capabilities, which helps to inhibit UV-induced interface performance degradation and improve the overall photoelectric conversion efficiency and long-term stability of the solar cell.

[0022] The formation of the aforementioned heterojunction between the wide-bandgap semiconductor film layer and the amorphous silicon layer is the key foundation for achieving the technical effects of the embodiments of the present invention. The absence of a heterojunction will lead to a significant decrease in carrier transport efficiency, severe interface recombination, and an inability to effectively resolve the UV attenuation problem, thereby failing to achieve the desired effect of the high-efficiency, low-UV attenuation crystalline silicon heterojunction solar cell claimed in this application. It should be noted that, unlike existing wide-bandgap heterojunctions that are only used for passivation or blocking, the heterojunction structure proposed in the embodiments of the present invention is not only used for passivation and selective transport, but also has the ability to generate and respond to carriers in the ultraviolet band, allowing ultraviolet photogenerated carriers to participate in main channel transport rather than simply recombine locally or convert into heat.

[0023] In summary, the low UV attenuation crystalline silicon heterojunction solar cell of the embodiment of the present invention forms a heterojunction structure between the wide bandgap semiconductor film layer and the amorphous silicon layer by sequentially arranging a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer, and a silicon substrate, thereby achieving the coordinated optimization of efficient ultraviolet light absorption and directional carrier transport, and completely solving the problem of ultraviolet attenuation. Specifically, the wide bandgap semiconductor film layer has a bandgap width greater than 3eV, can effectively absorb ultraviolet photons with a wavelength less than 400nm, and generate photogenerated carriers in the ultraviolet band, thereby enhancing the utilization efficiency of ultraviolet light. Therefore, the solution of the present invention significantly improves the ultraviolet stability and conversion efficiency of the crystalline silicon heterojunction solar cell, effectively solves the problem of ultraviolet attenuation (UVID), and significantly improves the photoelectric conversion performance of the device.

[0024] In some preferred embodiments, the conduction band step of the heterojunction can be, for example, 0.2eV, 0.3eV or 0.4eV, or any other value between 0.2eV and 0.4eV. If the conduction band step is too large, the efficiency of electron injection from the wide bandgap semiconductor film layer to the amorphous silicon layer or the silicon substrate will be reduced, thereby suppressing the photogenerated current and increasing the probability of interface recombination. If the conduction band step is too small, it will cause electrons to flow in the opposite direction, reducing the collection efficiency of photogenerated carriers. By controlling the conduction band step within the above range, it is beneficial to achieve the synergistic optimization of electron selective transport and interface recombination suppression, thereby improving the photoelectric conversion efficiency.

[0025] The valence band step of the heterojunction can be, for example, 0.1eV, 0.2eV, 0.3eV, 0.4eV or 0.5eV, or any other value in 0.1eV-0.5eV. If the valence band step is too large, a barrier will be formed to the transmission of holes, resulting in a reduction in hole injection efficiency, thereby increasing the carrier recombination rate at the interface and reducing the photoelectric conversion efficiency of the entire device. On the contrary, if the valence band step is too small, it will cause the band selectivity to weaken, making it difficult to effectively suppress reverse carrier injection, thereby causing the asymmetry of the carrier injection direction, reducing the hole selective extraction ability, and also being unfavorable for device efficiency improvement. Therefore, by controlling the valence band step within the above range, it is possible to effectively improve the hole transport ability and reduce interface recombination.

[0026] The Fermi level difference of the heterojunction can be, for example, 0.05eV, 0.1eV, 0.2eV, 0.3eV, 0.4eV or 0.5eV, or any other value between 0.05eV and 0.5eV. If the Fermi level difference is too large, the interface barrier will be increased, hindering the effective injection and transport of carriers and increasing the interface recombination rate. On the contrary, if the Fermi level difference is too small, the carrier selective transport capacity may be insufficient due to the lack of driving force for band arrangement. Therefore, by controlling the Fermi level difference within the above range, it is helpful to optimize the band alignment state at the heterojunction interface, reduce the interface recombination probability, and improve the collection efficiency of photogenerated carriers and the overall performance of the device.

[0027] The interface defect state density of the heterojunction can be, for example, 1×10 10 cm -2 eV -1 , 1×10 11 cm -2 eV -1 or 1×10 12 cm -2 eV -1 , or 1×10 10 cm -2 eV -1 -1×10 12 cm -2 eV -1 Any other value in . If the interface defect state density is too large, a large number of recombination centers will easily form at the heterojunction interface, thereby increasing carrier recombination losses and reducing battery performance. If the interface defect state density is too small, although the interface quality can be further optimized, it is difficult to achieve under the existing material system and deposition process conditions, and the benefits tend to saturate. Therefore, by controlling the interface defect state density within the above range, a good balance can be achieved between technical feasibility and performance improvement.

[0028] In the embodiments of the present invention, the conduction band step, valence band step, and Fermi level difference of the heterojunction are strictly controlled within specific ranges, achieving selective carrier transport, reducing interfacial recombination, and improving the collection efficiency of photogenerated carriers and the overall photoelectric conversion efficiency of the cell. The interface defect state density is effectively reduced, minimizing the formation of carrier recombination centers, ensuring the high quality of the heterojunction interface, and enhancing the stability and durability of the device.

[0029] In one embodiment, the amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer.

[0030] In another embodiment, the amorphous silicon layer includes a buffer transition sublayer and a doped amorphous silicon sublayer. The buffer transition sublayer is arranged between the wide bandgap semiconductor film layer and the doped amorphous silicon sublayer, and is in direct contact with the wide bandgap semiconductor film layer. The buffer transition sublayer is an intrinsic amorphous silicon layer or a slightly doped amorphous silicon layer, which has a low carrier concentration and energy band gradient, and can form a gradual connection of energy bands between the two materials, thereby effectively alleviating the energy band mutation between the interfaces and suppressing the interface recombination caused by energy level mismatch. The doped amorphous silicon sublayer is in direct contact with the silicon substrate and has n-type or p-type doping characteristics, which can realize the selective transport of photogenerated carriers of corresponding polarity, improve the carrier injection efficiency and reduce the reverse diffusion loss. Through this structural design, a multi-level functional layer synergy mechanism can be established between the wide bandgap semiconductor film layer and the silicon substrate, effectively reducing the scattering and recombination probability of carriers at the interface, constructing a stable cross-layer transport channel, and realizing the relay injection and efficient transport of photogenerated carriers under ultraviolet excitation conditions, thereby improving the photoelectric conversion efficiency of crystalline silicon heterojunction solar cells and enhancing their stability under ultraviolet irradiation.

[0031] In one embodiment, the band edge change slope between the buffer transition sublayer and the adjacent film layer is less than 0.1eV / nm, preferably 0.01eV / nm-0.1eV / nm. Here, the "band edge change slope" refers to the rate of change of the energy band energy of the guide band edge or valence band edge in the direction perpendicular to the film layer, reflecting the smoothness of the energy band alignment at the heterojunction interface. A too small band edge change slope will lead to insufficient energy band drive, affecting the effective injection of carriers. An excessively large band edge change slope will cause strong energy level bending and energy barrier mutation, induce interface trap state aggregation, and increase the probability of carrier recombination. Therefore, by setting a reasonable band edge change slope range, it is helpful to achieve a gradual energy band transition between adjacent layers, thereby effectively suppressing the formation of interface states and non-radiative recombination caused by cliff-like energy level changes. A good balance can be achieved between band edge smoothness and transport driving force, thereby optimizing the band structure of the heterojunction interface, reducing interface recombination losses, and improving the photoelectric conversion efficiency and operational stability of the device.

[0032] In some embodiments, the thickness of the buffer transition sublayer is 2nm-5nm, for example, 2nm, 3nm, 4nm or 5nm, or any other value between 2nm and 5nm. When the thickness of the buffer transition sublayer is less than 2nm, the band adjustment area is insufficient, making it difficult to fully achieve band gradient regulation, resulting in the continued existence of interface band mutations, which in turn leads to a higher carrier recombination rate. When the thickness is greater than 5nm, although the band edge transition is smoother, it will lead to an increase in the overall thickness of the device, and carriers need to cross a longer distance to be injected into the main absorption region, thereby increasing the recombination probability and series resistance, and reducing device efficiency. Therefore, by limiting the thickness of the buffer transition sublayer to the above range, it helps to achieve a gradual connection of band edge energy levels between material interfaces, thereby effectively reducing the risk of barrier mutations and trap state formation caused by energy level mismatch at the interface, and can also achieve effective synergy between suppressing interface state density, optimizing band structure and balancing carrier transport paths, thereby improving the injection efficiency of photogenerated carriers and the photoelectric conversion performance of the overall device, and enhancing its long-term stability.

[0033] In some embodiments, the thickness of the doped amorphous silicon sublayer is 3nm-30nm, for example, 3nm, 10nm, 20nm or 30nm, or any other value between 3nm and 30nm. When the thickness of the doped amorphous silicon sublayer is less than 3nm, the doped region is too thin, which will lead to insufficient barrier formation, limit the electric field control capability, and be unfavorable for effective carrier injection and collection, and easily cause leakage or insufficient interface passivation. When the thickness of the doped amorphous silicon sublayer is greater than 30nm, although it can provide a stronger carrier blocking ability, the carrier migration path is lengthened, the series resistance is increased, and the accumulation of doping defects is also increased, which may in turn aggravate the recombination loss and reduce the device performance. Therefore, by limiting the thickness of the doped amorphous silicon sublayer to the above range, the carrier injection efficiency and interface stability can be optimized under the premise of ensuring the selective transport capability of holes or electrons, thereby improving the open circuit voltage, short circuit current density and overall photoelectric conversion efficiency of the device. This thickness range is also conducive to collaboratively constructing a low-compound, highly selective heterojunction interface structure with the buffer transition sublayer, which helps to improve the long-term operating stability and anti-ultraviolet attenuation capability of the device.

[0034] In some embodiments, the doped amorphous silicon sublayer is a P-type amorphous silicon layer, the dopant is boron, and the boron doping concentration is 1×10 19 cm -3 -1×10 20 cm -3 , for example, it can be 1×10 19 cm -3 , 5×10 19 cm -3 or 1×10 20 cm -3Moderate boron doping can form an effective built-in electric field, enhancing the selective collection of holes, thereby suppressing electron backdiffusion and improving carrier separation efficiency. Furthermore, this doping concentration range ensures good conductivity in the P-type amorphous silicon layer while maintaining the stability of the band edge position, ensuring a well-matched band-pairing structure with adjacent layers, helping to reduce interface barriers and improve charge injection efficiency. Excessive boron doping concentrations can easily form band gap states or defect aggregation, which in turn increases the interface recombination rate, affecting device lifespan and performance stability. Conversely, too low a doping concentration results in less pronounced P-type characteristics and reduced hole collection capacity. Furthermore, within this doping range, the boron doping concentration can synergize with the buffer transition sublayer to effectively suppress interface recombination while maintaining sufficient conductivity, thereby improving the device's open-circuit voltage and fill factor (FF). Therefore, controlling the boron doping concentration of the P-type amorphous silicon layer within the above range helps achieve an optimal balance between conductivity, carrier selectivity, interface compatibility, and stability.

[0035] In some other embodiments, the doped amorphous silicon sublayer is an N-type amorphous silicon layer, the dopant is phosphorus, and the phosphorus doping concentration is 1×10 19 cm -3 -5×10 20 cm -3 , for example, it can be 1×10 19 cm -3 , 1×10 20 cm -3 or 5×10 20 cm -3 . Moderate phosphorus doping helps to form a reasonable built-in electric field between the amorphous silicon layer and the silicon substrate, strengthen the spatial separation of electrons and holes, thereby reducing the interface recombination rate and increasing the open circuit voltage. In addition, the appropriate doping concentration can also ensure that the amorphous silicon layer has good conductivity to reduce the series resistance and increase the fill factor of the device. If the phosphorus doping concentration is too high, it will introduce excessive defect states in the amorphous silicon network or induce band gap contraction, thereby increasing the density of interface recombination centers, which is not conducive to long-term stable operation. On the contrary, if the doping concentration is insufficient, the N-type characteristics are not obvious, resulting in a decrease in electron extraction ability, affecting the output performance of the device. Therefore, limiting the phosphorus doping concentration within the above range can effectively regulate the electron carrier concentration of amorphous silicon and enhance its selective collection ability of electrons, thereby achieving efficient electron injection and transport in the heterojunction structure, and improving the photogenerated current density and overall conversion efficiency of the device.

[0036] In some embodiments, oxygen vacancies or rare earth metal ions are introduced into the wide bandgap semiconductor film layer to form a controllable trap state structure. The amorphous silicon layer has a microstructure that forms a directional carrier migration path. The microstructure is composed of an asymmetric doping distribution, a nanocrystalline-amorphous hybrid phase region, or a bandgap gradient region. Through this structural design, the energy band control capability and carrier transport efficiency at the heterojunction interface can be further improved, thereby enhancing the overall device performance. Specifically, the wide bandgap semiconductor film layer introduces oxygen vacancies (V o ) or doping with rare earth metal ions such as cerium, neodymium, and lanthanum can help introduce shallow energy levels or neutral trap states within the energy band. These trap states can temporarily capture high-energy photogenerated carriers under UV illumination, reducing their non-radiative recombination rate. Driven by a band-matching mechanism, they can then be released in a controlled manner, acting as a buffer and guide, effectively improving the utilization of photogenerated carriers and the efficiency of interfacial migration. Furthermore, the unique coordination structure of rare earth ions in the crystal lattice helps suppress interfacial stress concentration and the accumulation of structural defects, enhancing the thermal stability and radiation resistance of the film. Furthermore, the microstructure constructed in the amorphous silicon layer can guide carrier migration along specific paths. For example, an asymmetric doping profile can create a built-in electric field, enabling selective acceleration and separation of electrons or holes. The nanocrystalline-amorphous hybrid phase regulates carrier transport pathways through heterophase interface barriers, extending carrier lifetimes and reducing interfacial recombination probability. The band gap gradient region provides a continuous band slope, facilitating barrier-free injection and efficient trans-film migration of photogenerated carriers under gradient-driven conditions. Therefore, by introducing controllable trap state structures and micro-guide structures into the wide bandgap film layer and the amorphous silicon layer respectively, not only can the band alignment and interface quality be synergistically optimized, but also the carrier generation rate, migration efficiency and recombination suppression ability under ultraviolet excitation conditions can be improved, thereby significantly enhancing the photoelectric conversion efficiency and anti-ultraviolet attenuation performance of crystalline silicon heterojunction solar cells.

[0037] In some embodiments, low-UV attenuation crystalline silicon heterojunction solar cells have a symmetrical or asymmetrical structure, preferably an asymmetrical structure. "Asymmetric" refers to differences in the type, band structure, doping type, or thickness of the functional films used on the light-receiving and backside surfaces of the device. Specifically, compared to a symmetrical structure where the film stack is consistent on both the front and back surfaces, an asymmetric structure allows for differentiated optimization based on the lighting conditions, carrier types, and migration directions in different regions of the device. For example, on the light-receiving side facing sunlight, a combination of the aforementioned wide-bandgap semiconductor film layer and an amorphous silicon layer is preferably employed to effectively absorb UV light, mitigate the UV-Iodization effect, and enhance front-surface charge selective collection and interface passivation. On the backside, a p-type microcrystalline silicon layer (p-μc-Si:H) with low series resistance, high hole selectivity, and excellent conductivity, or other carrier extraction-optimized layers, can be used to improve backside charge extraction efficiency and overall device fill factor. Furthermore, an asymmetric structure allows for better manufacturing compatibility in terms of material consumption, deposition time, and thermal budget. For example, for the ultraviolet protection function, it is sufficient to set a wide bandgap semiconductor film layer and an amorphous silicon layer only on the light-receiving side, without having to repeat them on the back side, thus reducing material costs and process complexity.

[0038] Figure 2 The schematic flow chart of the method for preparing a low UV attenuation crystalline silicon heterojunction solar cell according to one embodiment of the present invention is shown. The low UV attenuation crystalline silicon heterojunction solar cell is the aforementioned solar cell. Figure 2 As shown, the preparation method comprises: Step S100, providing a silicon substrate; Step S200, forming an amorphous silicon layer on the surface of the silicon substrate; Step S300, depositing a wide bandgap semiconductor film layer with a bandgap width greater than 3 eV and a thickness of 5 nm to 20 nm on the surface of the amorphous silicon layer to form a heterojunction with the amorphous silicon layer; Step S400 , forming a light-receiving surface layer on the surface of the wide bandgap semiconductor film layer to obtain a low UV attenuation crystalline silicon heterojunction solar cell.

[0039] In step S100, the silicon substrate may be, for example, a single crystal silicon substrate, a polycrystalline silicon substrate, or a non-single crystal silicon substrate, and is preferably a single crystal silicon wafer with a (100) crystal orientation, so as to facilitate the subsequent formation of a high-quality heterojunction interface. In addition, the doping type of the silicon substrate may be N-type or P-type, and the doping concentration is generally 1×10 15 cm -3 to 1×10 18 cm -3The silicon substrate can also undergo pre-treatment processes such as surface cleaning, etching, and oxidation removal to ensure a clean and contaminant-free substrate surface, promote uniform deposition of the amorphous silicon layer, and form a high-quality heterojunction interface.

[0040] In step S200, the amorphous silicon layer can be, for example, an intrinsic amorphous silicon layer or a doped amorphous silicon layer, or it can be composed of a buffer transition sublayer and a doped amorphous silicon sublayer. The amorphous silicon layer is formed, for example, using plasma-enhanced chemical vapor deposition (PECVD) with the deposition temperature controlled within a range of 150°C to 300°C to ensure the quality of the amorphous silicon layer and interface passivation. The deposition process parameters for the buffer transition sublayer can be adjusted by adjusting the silane (SiH4) to hydrogen (H2) gas flow rate ratio and the radio frequency power to achieve thin film deposition with a smooth energy band transition. The doped amorphous silicon sublayer is doped by introducing borane (B2H6) or phosphine (PH3) into the gas flow. The doping concentration can be precisely controlled by adjusting the doping gas flow rate and deposition time to ensure that its electrical properties meet the requirements for selective carrier transport. Furthermore, maintaining a high vacuum environment and stable plasma parameters during deposition helps reduce film defect density and improve interface quality, thereby effectively minimizing interfacial recombination and enhancing the device's photoelectric conversion efficiency and stability.

[0041] In a specific embodiment, the amorphous silicon layer is composed of a buffer transition sublayer and a doped amorphous silicon sublayer. The method for preparing the amorphous silicon layer may include the following steps: introducing borane or phosphine dopant gas into a reaction atmosphere of silane and hydrogen through a PECVD process to form a doped amorphous silicon sublayer on the surface of the silicon substrate, wherein the PECVD process is controlled under the following conditions: temperature of 150°C-250°C, pressure of 20Pa-100Pa, hydrogen dilution ratio greater than 80%, and radio frequency power of 20W-80W; while maintaining the above PECVD parameters unchanged or appropriately fine-tuning them, removing the dopant gas and retaining only silane and hydrogen as reaction gases to deposit the buffer transition sublayer on the surface of the doped amorphous silicon sublayer. The hydrogen dilution ratio refers to the ratio of the hydrogen flow rate to the total flow rate of silane and hydrogen.

[0042] This step S300 specifically includes a deposition pre-processing step, a target material selection and process chamber preparation step, a reactive magnetron sputtering process parameter setting step, an energy band step and interface barrier control step, and a post-processing step.

[0043] In the pre-deposition treatment step, the formed amorphous silicon layer is subjected to plasma surface cleaning or low-temperature pre-treatment with an inert gas such as argon to remove surface impurities and adsorbates, improve the cleanliness of the film interface, and help reduce the interface defect state density in the subsequent deposition process.

[0044] During target selection and chamber preparation, wide-bandgap semiconductor targets made from oxides, nitrides, or fluorides with a bandgap greater than 3eV, such as TiO2, ZnO, SiC, or GaN, are used. Depending on the desired band structure, either a single target or a composite target can be used, along with the appropriate target power, bias voltage, and atmosphere ratio.

[0045] In the reactive magnetron sputtering process parameter setting step, the initial vacuum degree in the vacuum chamber is better than 5×10 -3 Pa, followed by argon and oxygen (or nitrogen, fluorine, etc.) as working gases, with the volume ratio of oxygen to argon controlled at 1:50 to 1:10 to ensure the stoichiometric ratio and film density of the sputtered product. In the magnetron sputtering process, the sputtering power is set at 50W-200W (adjusted according to the target type), the operating pressure is 0.1Pa-1Pa, the target-substrate distance is 5cm-10cm, and the substrate temperature is room temperature to 150°C. The deposition time needs to be adjusted according to the target thickness.

[0046] During the band step and interface barrier control step, the film's band structure and defect state density are controlled by adjusting the sputtering atmosphere, target power, and substrate bias voltage. Deposition at a moderate power density and low temperature is preferred to slow particle growth and reduce interface roughness, thereby ensuring a heterojunction structure with a conduction band step of 0.2eV-0.4eV, a valence band step of 0.1eV-0.3eV, and a Fermi level difference of less than 0.3eV.

[0047] In the post-processing step, low-temperature rapid annealing or remote plasma surface passivation treatment is performed at 150°C-200°C to further reduce the interface defect state density, making the interface defect state density of the heterojunction structure less than 1×10 11 cm -2 eV -1 .

[0048] In step S400, forming a light-receiving surface layer on the surface of the wide bandgap semiconductor film layer specifically includes a pretreatment step, an anti-reflection film layer deposition step and a light-receiving surface layer deposition step, wherein the pretreatment step and the anti-reflection film layer deposition step are optional steps.

[0049] In the surface pretreatment step, in order to ensure the adhesion and interface quality between the light-receiving surface layer and the wide bandgap semiconductor film layer below, it is preferred to perform plasma cleaning or low-energy ion beam treatment on the surface of the wide bandgap semiconductor film layer to remove surface impurities and adsorbed water, improve the interface bonding state, and reduce interface reflection and defect state density.

[0050] If the target structure requires further improvement of the incident light coupling efficiency, it is preferred to deposit a single layer or multilayer anti-reflection film on the surface of the wide bandgap semiconductor film layer. The materials used are, for example, silicon oxide (SiO2), titanium oxide (TiO2), silicon nitride (SiN x ) etc. Physical vapor deposition, chemical vapor deposition, or sol-gel methods are used for deposition. The thickness of the anti-reflection film is controlled between 60nm and 120nm to meet the minimum reflection interference condition in the target wavelength range.

[0051] During the light-receiving layer deposition step, the light-receiving layer, a transparent conductive film (TCO), is deposited using magnetron sputtering or physical vapor deposition (PVD). Materials such as indium tin oxide (ITO), aluminum zinc oxide (AZO), and indium zinc oxide (IZO) are used. During these processes, the substrate temperature on which the light-receiving layer is deposited is controlled between room temperature and 200°C.

[0052] The technical effects of the present application are described in detail below with reference to specific embodiments and comparative examples.

[0053] Example 1: An embodiment of the present invention provides a method for preparing a low UV attenuation crystalline silicon heterojunction solar cell, comprising the following steps: 1) Using alkaline cleaning and texturing process, pyramid texture is prepared on both sides of n-type silicon substrate; 2) Alkaline polishing is used on the back of the silicon substrate to prepare a polished surface or a micro-suede surface; 3) Using PECVD to deposit a 5nm thick amorphous silicon layer on the front and back of the solar cell, the amorphous silicon layer is a hydrogenated intrinsic amorphous silicon (i-aSi:H) layer; 4) On the back side of the solar cell, a 20 nm thick p-type hydrogenated microcrystalline silicon (p-μSi:H) layer is grown on the surface of the i-aSi:H layer using PECVD. 5) Depositing a wide bandgap semiconductor film layer with a thickness of 10 nm on the surface of the i-aSi:H layer using a reactive magnetron sputtering process on the front side of the solar cell. The wide bandgap semiconductor film layer is a TiO2 layer. 6) A light-receiving layer with a thickness of 100 nm is deposited on the surface of the p-μSi:H layer and the TiO2 layer using a PVD process. The light-receiving layer is an ITO layer. 7) A low-temperature conductive paste is screen-printed on the double-sided ITO layer and cured at 200°C to form the gate electrode. This significantly enhances its long-term stability under UV irradiation.

[0054] Figure 3 A schematic structural diagram of a low UV attenuation crystalline silicon heterojunction solar cell according to a first embodiment of the present invention is shown. The low UV attenuation crystalline silicon heterojunction solar cell is prepared by the above-mentioned preparation method. Figure 4 FIG1 shows a schematic diagram of the energy band and carrier transport of the TiO2 / i-aSi:H heterojunction according to the first embodiment of the present invention. Figure 4 As shown, the TiO2 / i-aSi:H heterojunction forms a built-in electric field E from TiO2 to i-aSi:H. bi Therefore, under the action of this built-in electric field, the electrons of the ultraviolet-generated carriers in the TiO2 film are collected by the front ITO layer and transported to the negative electrode, and the holes are collected by the back ITO layer through the HJT battery body and transported to the positive electrode, thereby improving the photoelectric conversion efficiency of the battery.

[0055] Figure 5 FIG. 1 shows an XRD pattern of the TiO2 layer according to the first embodiment of the present invention. Figure 5 It can be seen that the characteristic peak 2θ of TiO2 (101) surface is located at 25.3°. Figure 6 FIG1 shows a scanning electron microscope image of a TiO2 layer according to Example 1 of the present invention. Figure 6 It can be seen that the TiO2 layer is dense and smooth. Figure 7 FIG. 1 shows an EDX image of the TiO2 layer according to the first embodiment of the present invention. Figure 7 The atomic ratio of Ti:O is 32.84:67.16. The above results show that the reactive magnetron sputtering process can grow high-quality TiO2 layers.

[0056] Example 2: The only difference between the second embodiment and the first embodiment is the thickness of the TiO2 layer. The thickness of the TiO2 layer in the second embodiment is 5 nm.

[0057] Example 3: The only difference between the third embodiment and the first embodiment is the thickness of the TiO2 layer. The thickness of the TiO2 layer in the second embodiment is 20 nm.

[0058] Example 4: The difference between this fourth embodiment and the first embodiment lies in step 3). In this fourth embodiment, step 3) is to use PECVD to deposit a doped amorphous silicon sublayer with a thickness of 3 nm on the front and back of the solar cell, and the doped amorphous silicon sublayer is a boron-doped amorphous silicon sublayer; then, a buffer transition sublayer with a thickness of 2 nm is deposited on the surface of the boron-doped amorphous silicon sublayer, and the buffer transition sublayer is an intrinsic amorphous silicon layer.

[0059] Comparative Example 1: The only difference between this comparative example and Example 1 is that the i-aSi:H layer and the TiO2 layer on the front surface of Example 1 are replaced with a non-hydrogenated intrinsic amorphous silicon (i-aSi) layer and an n-type hydrogenated microcrystalline silicon (n-μSi:H) layer, respectively. The preparation method is similar. Figure 8A schematic structural diagram of a crystalline silicon heterojunction solar cell in Comparative Example 1 is shown.

[0060] Comparative Example 2: The only difference between Comparative Example 2 and Example 1 is the thickness of the TiO 2 layer. The thickness of the TiO 2 layer in Example 2 is 2 nm.

[0061] Figure 9 The UV-VIS transmission spectrum transmittance graphs of the TiO2 layer in Examples 1 to 3 of the present invention are shown. Figure 10 The UV-VIS transmission spectrum absorptivity graphs of the TiO2 layer in Examples 1 to 3 of the present invention are shown. Figure 11 The UV-VIS transmission spectrum reflectance graph of the TiO2 layer in Examples 1 to 3 of the present invention is shown. Figures 9 to 11 As can be seen, in the 200nm-300nm wavelength range, the UV transmittance of the TiO2 film gradually decreases with increasing film thickness, while the absorptivity also increases accordingly, indicating that this thickness effectively absorbs UV light, thereby preventing the impact of high-energy UV photons on the battery body. All three film thicknesses have high transmittance in the visible light region (400nm-800nm), but the transmittance of the 20nm film is relatively low. This shows that while increasing the thickness can improve UV shielding performance, excessive thickness may affect the transmission efficiency of visible light.

[0062] Table 1 lists the comparison results of the main electrical parameters of the crystalline silicon heterojunction solar cells in the embodiments of the present invention and the comparative examples. Table 1 is as follows:

[0063] As can be seen from Table 1 above, the thickness of the TiO2 layer has an impact on the initial photoelectric performance and UV stability of crystalline silicon heterojunction solar cells. In Example 1, a 10nm thick TiO2 layer was used, which showed a high initial PCE and good resistance to UV attenuation, indicating that this thickness did not significantly adversely affect light transmittance and carrier transport while ensuring excellent interface passivation and UV shielding effects. While Examples 2 and 3 represent the extreme cases of thin and thick TiO2, respectively, although they also have good performance, there is a certain compromise in initial efficiency or long-term stability, indicating that there is an optimal thickness window.

[0064] In addition, compared with Example 1, Comparative Example 1 only replaced the amorphous silicon / titanium oxide combination in the heterojunction structure, and the initial PCE was significantly reduced to 17.55%, and decayed rapidly to 11.80% under UV irradiation, indicating that the device performance was limited by the band mismatch and severe interface recombination. The thickness of the TiO2 layer in Comparative Example 2 was only 2nm, and it also showed a strong decay trend, verifying that an overly thin film layer could not provide effective interface passivation and UV protection. Comprehensive analysis shows that the embodiment of the present invention can effectively improve the V OC 、J SC , FF and PCE, and significantly enhanced its long-term stability under UV irradiation.

[0065] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0066] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that a person skilled in the art would be able to make numerous modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of this application shall be determined by the appended claims.

Claims

1. A low UV attenuation crystalline silicon heterojunction solar cell, characterized in that: It comprises a light-receiving surface layer, a wide bandgap semiconductor film layer, an amorphous silicon layer and a silicon substrate arranged in sequence, wherein the wide bandgap semiconductor film layer and the amorphous silicon layer form a heterojunction; The band gap width of the wide bandgap semiconductor film layer is greater than 3eV and the thickness is 5nm-20nm. The wide bandgap semiconductor film layer has the ability to absorb light in the ultraviolet band and can generate photogenerated carriers in the ultraviolet band. The photogenerated carriers can be transported to the silicon substrate through the heterojunction and participate in photoelectric conversion.

2. The low UV attenuation crystalline silicon heterojunction solar cell according to claim 1, characterized in that: The amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer.

3. The low UV attenuation crystalline silicon heterojunction solar cell according to claim 1, characterized in that: The amorphous silicon layer includes: a buffer transition sublayer, contacting the wide bandgap semiconductor film layer, which is an intrinsic amorphous silicon layer or a slightly doped amorphous silicon layer, and is used to achieve a gradual connection of energy bands; The doped amorphous silicon sublayer is in contact with the silicon substrate and is used to achieve selective carrier transport.

4. The low UV attenuation crystalline silicon heterojunction solar cell according to claim 3, characterized in that: The band edge variation slope between the buffer transition sublayer and the adjacent film layer is less than 0.1 eV / nm; The thickness of the buffer transition sublayer is 2nm-5nm; The thickness of the doped amorphous silicon sublayer is 3nm-30nm.

5. The low UV attenuation crystalline silicon heterojunction solar cell according to claim 4, characterized in that: The doped amorphous silicon sublayer is a P-type amorphous silicon layer, and the dopant is boron with a boron doping concentration of 1×10 19 cm -3 -1×10 20 cm -3。 6. The low UV attenuation crystalline silicon heterojunction solar cell according to claim 4, characterized in that: The doped amorphous silicon sublayer is an N-type amorphous silicon layer, and the dopant is phosphorus, with a phosphorus doping concentration of 1×10 19 cm -3 -5×10 20 cm -3 .

7. The low UV attenuation crystalline silicon heterojunction solar cell according to any one of claims 1 to 6, characterized in that: Introducing oxygen vacancies or doping rare earth metal ions into the wide bandgap semiconductor film layer to form a controllable trap state structure; The amorphous silicon layer has a microstructure for forming a directional carrier migration path, and the microstructure is composed of an asymmetric doping distribution, a nanocrystalline-amorphous hybrid phase region or a bandgap gradient region.

8. A method for preparing a low UV attenuation crystalline silicon heterojunction solar cell according to any one of claims 1 to 7, characterized in that: The steps include: providing a silicon substrate; forming an amorphous silicon layer on the surface of the silicon substrate; Depositing a wide bandgap semiconductor film layer with a bandgap width greater than 3 eV and a thickness of 5 nm to 20 nm on the surface of the amorphous silicon layer to form a heterojunction with the amorphous silicon layer; A light-receiving surface layer is formed on the surface of the wide-bandgap semiconductor film layer to obtain a low-ultraviolet attenuation crystalline silicon heterojunction solar cell.

9. The preparation method according to claim 8, characterized in that The step of forming an amorphous silicon layer on the surface of the silicon substrate comprises the following steps: forming a doped amorphous silicon sublayer on the surface of the silicon substrate; A buffer transition sublayer is formed on the surface of the doped amorphous silicon sublayer. The buffer transition sublayer is an intrinsic amorphous silicon layer or a slightly doped amorphous silicon layer.

10. The preparation method according to claim 9, characterized in that The amorphous silicon layer is formed by plasma enhanced chemical vapor deposition, and the H2 dilution ratio during the deposition process is greater than 80%; The wide bandgap semiconductor film layer is deposited by a reactive magnetron sputtering process, and the volume ratio of oxygen to argon is 1:50-1:10.

Images