Light emitting diode and light emitting device

By setting a mesa structure in the second semiconductor layer and limiting the current away from the edge, the edge effect problem of Micro-LED is solved, the light extraction efficiency and luminous uniformity are improved, and the reliability of the device is enhanced.

CN120603407APending Publication Date: 2025-09-05XIAMEN SANAN OPTOELECTRONICS CO LTD
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Patent Information

Application Number
CN202510656697.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-21
Publication Date
2025-09-05

AI Technical Summary

Technical Problem

The edge effect problems of Micro-LED lead to uneven current distribution, uneven light emission, thermal accumulation and light extraction efficiency, especially among small-sized micro-light emitting diodes with gallium arsenide materials.

Method used

By providing the first and second surfaces on the second semiconductor layer, an indented structure of the cover layer and the window layer is formed, and the current is limited away from the edge, edge effect is suppressed, and light extraction efficiency and light emission uniformity are improved.

Benefits of technology

It effectively suppresses the edge effect of the light emitting diode, improves the light extraction efficiency and light emission uniformity, and enhances the reliability of the device.

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Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a light-emitting diode and a light-emitting device.The light-emitting diode comprises a semiconductor laminated layer, the semiconductor laminated layer comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are sequentially laminated, and the second semiconductor layer comprises a spacer layer, a covering layer and a window layer which are sequentially laminated on the light-emitting layer; the covering layer covers part of the spacing layer, the second semiconductor layer is provided with a first table top and a second table top, the first table top is the surface of the window layer, and the second table top is the surface, not covered by the covering layer, of the spacing layer. By means of the arrangement, current can be limited from being away from the edge of the second semiconductor layer, the influence of the edge effect of the light-emitting diode is further restrained, and the light extraction efficiency, the light emitting uniformity and the device reliability of the light-emitting diode are improved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a light emitting diode and a light emitting device. Background Art

[0002] Due to its excellent characteristics such as high brightness, low power consumption, long life, and high response speed, Micro-LED has become a hot spot in the new display field. For example, chips <50μm are generally used in direct display TV applications, chips <30μm are generally used in wearable device applications, and chips <10μm are used in VR / AR applications.

[0003] As the size of light-emitting diodes (LEDs) decreases, their edge effects become increasingly pronounced. This is particularly true for GaAs Micro-LEDs, leading to issues such as uneven current distribution, uneven light emission, heat accumulation, reduced light extraction efficiency, and even increased reliability risks. Therefore, edge effect suppression technology will become the key to breaking through performance bottlenecks.

[0004] It should be noted that the information disclosed in this background technology section is only intended to increase understanding of the overall background of the present invention and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art. Summary of the Invention The present invention provides a light-emitting diode comprising a semiconductor stack. The semiconductor stack comprises a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence. The second semiconductor layer comprises a spacer layer, a cover layer, and a window layer stacked in sequence on the light-emitting layer, with the cover layer covering a portion of the spacer layer. The second semiconductor layer has a first mesa and a second mesa, the first mesa being the surface of the window layer, and the second mesa being the surface of the spacer layer not covered by the cover layer.

[0005] The present invention also provides a light-emitting device, which uses any of the above-mentioned light-emitting diodes.

[0006] The present invention provides a light-emitting diode and a light-emitting device. By arranging a first mesa and a second mesa on a second semiconductor layer, a retracted structure of a window layer and a cover layer is formed, thereby limiting the current away from the edge of the second semiconductor layer, thereby suppressing the influence of the edge effect of the light-emitting diode, and improving the light extraction efficiency, light uniformity, and device reliability of the light-emitting diode.

[0007] Other features and beneficial effects of the present invention will be described in the following description, and some of the technical features and beneficial effects can be obviously derived from the description or understood by practicing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, some of the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0009] Figure 1 It is a schematic diagram of the structure of a traditional semiconductor stack; Figure 2 is a schematic top view of the structure of a light emitting diode provided by the first embodiment of the present invention; Figure 3 yes Figure 2 A schematic cross-sectional view of the structure taken along the interception line FF; Figure 4 is a schematic structural diagram of a light emitting diode provided by a second embodiment of the present invention; Figure 5 It is a structural schematic diagram of a light emitting diode provided by the third embodiment of the present invention.

[0010] Reference numerals: 10-substrate; 11-first semiconductor layer; 12-light-emitting layer; 13-second semiconductor layer; 131-spacer layer; 132-covering layer; 133-window layer; 21-first mesa; 22-second mesa; 23-third mesa; 24-sidewall; 31-first contact electrode; 32-second contact electrode; 33-support electrode; 34-first pad electrode; 35-second pad electrode; 36-insulating layer; 361-first opening; 362-second opening; 40-bonding layer; 41-substrate ; H1-the first height difference between the first mesa and the second mesa; H2-the second height difference between the second mesa and the light-emitting layer; H3-the third height difference between the first mesa and the third mesa; H4-the fourth height difference between the upper surface of the supporting electrode and the first mesa; H6-the difference between the thickness of the first contact electrode and the first height difference; W1-the width of the covering layer; W2-the width of the spacer layer; S1-the size from the second contact electrode to the end point of the first mesa; S2-the distance from the first pad electrode to the second pad electrode; α-the inclination angle of the side wall. DETAILED DESCRIPTION

[0011] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments; the technical features designed in different implementation modes of the present invention described below can be combined with each other as long as they do not conflict with each other; based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0012] In the description of the present invention, it should be understood that the terms "center", "lateral", "up", "down", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more. In addition, the term "including" and any variations thereof all mean "at least including".

[0013] See also Figure 2 and Figure 3 , Figure 2 is a schematic top view of the light emitting diode provided by the first embodiment of the present invention, Figure 3 yes Figure 2 Schematic diagram of a cross-sectional structure taken along the cutting line FF. To achieve at least one of the above advantages or other advantages, a first embodiment of the present invention provides a light emitting diode. As shown in the figure, the light emitting diode includes a semiconductor stack.

[0014] The semiconductor stack is disposed on a substrate 10, which may be made of a material such as GaAs. The semiconductor stack includes a first semiconductor layer 11, a light-emitting layer 12, and a second semiconductor layer 13 stacked sequentially on the substrate 10, i.e., the light-emitting layer 12 is located between the first semiconductor layer 11 and the second semiconductor layer 13.

[0015] The first semiconductor layer 11 may be an N-type semiconductor layer that can provide electrons to the light-emitting layer 12 under the action of a power source. In some embodiments, the first semiconductor layer 11 includes an N-type doped arsenide layer or nitride layer. The N-type doped arsenide layer or nitride layer may include N-type impurities. The N-type impurities may include one or a combination of Si, Ge, and Sn.

[0016] The light-emitting layer 12 may be a quantum well structure (Quantum Well, abbreviated as QW). In some embodiments, the light-emitting layer 12 may also be a multiple quantum well structure (Multiple Quantum Well, abbreviated as MQW), wherein the multiple quantum well structure includes multiple quantum well layers (Well) and multiple quantum barrier layers (Barrier) alternately arranged in a repeated manner, for example, it may be a multiple quantum well structure of GaN / AlGaN, InAlGaN / InAlGaN, InGaN / AlGaN, AlGaInP / AlGaInP, etc. In addition, the composition and thickness of the well layer in the light-emitting layer 12 determine the wavelength of the generated light. In order to improve the luminous efficiency of the light-emitting layer 12, it can be achieved by changing the depth of the quantum well, the number of layers, thickness and / or other characteristics of the paired quantum wells and quantum barriers in the light-emitting layer 12.

[0017] The second semiconductor layer 13 can be a P-type semiconductor layer that can provide holes to the light-emitting layer 12 under the action of a power source. In some embodiments, the second semiconductor layer 13 includes a P-type doped arsenide layer or nitride layer. The P-type doped arsenide layer or nitride layer may include one or more P-type impurities. The P-type impurities may include one or a combination of Mg, Zn, and Be. The second semiconductor layer 13 can have a single-layer structure or a multi-layer structure having different compositions.

[0018] The first semiconductor layer 11, the light-emitting layer 12, and the second semiconductor layer 13 can be made of materials such as aluminum gallium indium nitride, gallium nitride, aluminum gallium nitride, aluminum indium phosphide, aluminum gallium indium phosphide, gallium arsenide, or aluminum gallium arsenide. The first semiconductor layer 11 or the second semiconductor layer 13 includes a covering layer that provides electrons or holes and may include other layer materials, and can be set to different multilayers according to different doping concentrations or component contents. The light-emitting layer 12 is an area that provides light radiation for the recombination of electrons and holes, and different materials can be selected according to different emission wavelengths. The light-emitting layer 12 can be a periodic structure of a single quantum well or a multiple quantum well. By adjusting the composition ratio of the semiconductor materials in the light-emitting layer 12, it is expected that light of different wavelengths will be radiated. In some embodiments, the light-emitting diode is a Micro-LED, and its side length is less than 50μm.

[0019] The second semiconductor layer 13 includes a spacer layer 131, a capping layer 132, and a window layer 133 stacked sequentially on the light-emitting layer 12. Specifically, the capping layer 132 is located between the spacer layer 131 and the window layer 133, and the spacer layer 131 is connected to the light-emitting layer 12. The spacer layer 131 can be made of aluminum indium phosphide (AlInP) to prevent dopant atoms from diffusing into the light-emitting layer 12 and causing defects. The capping layer 132 can be made of aluminum indium gallium phosphide (AlInGaP) to provide holes. The window layer 133 can be made of gallium phosphide (GaP) to spread current, guide light from the light-emitting layer 12, and serve as an ohmic contact.

[0020] The cover layer 132 covers a portion of the spacer layer 131. The second semiconductor layer 13 has a first mesa 21 and a second mesa 22. The first mesa 21 is the surface of the window layer 133, and the second mesa 22 is the surface of the spacer layer 131 not covered by the cover layer 132. In other words, the cover layer 132 and the window layer 133 are removed from a portion of the second semiconductor layer 13 to expose the spacer layer 131, thereby forming the first mesa 21 and the second mesa 22. The first mesa 21 is located in the middle area of ​​the second semiconductor layer 13. The surface of the window layer 133 and the surface of the spacer layer 131 not covered by the cover layer 132 are both horizontal surfaces.

[0021] Traditional Figure 1 When the semiconductor stacked structure shown in the figure is applied to small-sized LEDs, the window layer and cover layer on the P side extend to the edge of the diode, causing most of the current to spread to the edge, resulting in uneven current distribution, uneven light emission, heat accumulation, and reduced light extraction efficiency, resulting in edge effects. To solve this problem, Figure 2 and Figure 3 As shown, the present invention forms a first mesa 21 and a second mesa 22 by etching the cover layer 132 and the window layer 133, so as to shrink the cover layer 132 and the window layer 13 inward, thereby preventing the current from extending to the edge of the diode, thereby limiting the current away from the edge of the second semiconductor layer 13, and further suppressing the influence of the edge effect of the light-emitting diode, thereby improving the light extraction efficiency, light uniformity and device reliability of the light-emitting diode.

[0022] In some embodiments, the first height difference H1 between the first mesa 21 and the second mesa 22 is 0.5-0.8 μm, which helps to partially etch the cover layer 132 , thereby limiting the current diffusion to the edge of the second mesa 22 and suppressing the influence of the edge effect.

[0023] In some embodiments, the ratio of the width W1 of the covering layer 132 to the width W2 of the spacer layer 131 is 1:2~1:4, so as to prevent the covering layer 132 from extending the current to the edge of the diode, suppress the influence of the edge effect of the light-emitting diode, and improve the light extraction efficiency, light uniformity and device reliability of the light-emitting diode.

[0024] In some embodiments, the width of the first mesa 21 is greater than the width of the second contact electrode 32 , and the dimension S1 from the second contact electrode 32 to the endpoint of the first mesa 21 ranges from 0 μm to 1 μm. This allows the first mesa 21 to fully utilize the window layer area at the top of the first mesa 21 to establish ohmic contact with the second contact electrode 32 , effectively reducing the voltage characteristics of the light-emitting diode.

[0025] In some embodiments, the second height difference H2 from the second mesa 22 to the light-emitting layer 12 is less than 0.1 μm, so that the surface of the second mesa 22 can be closer to the quantum well structure in the light-emitting layer 12 without damaging the light-emitting layer 12, which will help improve the luminous efficiency of the light-emitting diode.

[0026] In some embodiments, when viewed from above, the area of ​​the first mesa 21 is larger than the area of ​​the second contact electrode 32, and the ratio of the area of ​​the first mesa 21 to the area of ​​the second contact electrode 32 ranges from 3:1 to 1:1. This allows the first mesa 21 to fully utilize the window layer area at the top of the first mesa 21 to establish ohmic contact with the second contact electrode 32, effectively reducing the voltage characteristics of the light-emitting diode.

[0027] In some embodiments, the second semiconductor layer 13 includes a side wall 24, the two ends of which are respectively connected to the first table 21 and the second table 22, and the inclination angle α of the side wall 24 is 50~70°, so that the side wall 24 portion has a higher resistance and energy barrier, thereby preventing the side wall 24 from leaking current.

[0028] In some embodiments, the second contact electrode 32 and the first mesa 21 have the same or similar shapes when viewed from above. For example, both are circular, oval, square, etc.

[0029] In some embodiments, the light-emitting diode further includes a third mesa 23, which is the surface of the first semiconductor layer 11 that is not covered by the light-emitting layer 12. That is, the second semiconductor layer 13 and the light-emitting layer 12 are removed from part of the semiconductor stack to expose the first semiconductor layer 11 to form the third mesa 23. As shown in the figure, the third mesa 23 is used to set the first contact electrode 31. The distribution of the mesas is not limited to that shown in the figure, and can be designed according to the actual chip size and shape. The mesas can be connected together or separated from each other. The third height difference H3 from the first mesa 21 to the third mesa 23 ranges from 1.5 to 3 μm, so that the height difference is controlled according to the position of various epitaxial structures.

[0030] In some embodiments, the light emitting diode further includes a first contact electrode 31 , a second contact electrode 32 , a support electrode 33 , a first pad electrode 34 , a second pad electrode 35 and an insulating layer 36 .

[0031] The first contact electrode 31 is electrically connected to the first semiconductor layer 11. The first contact electrode 31 can have a single-layer, double-layer, or multi-layer structure, such as a stacked structure of Ti / Al, Ti / Al / Ti / Au, Ti / Al / Ni / Au, V / Al / Pt / Au, AuGer, or AuGeNi. In some embodiments, the first contact electrode 31 forms a good ohmic contact with the first semiconductor layer 11.

[0032] The second contact electrode 32 is electrically connected to the second semiconductor layer 13. The second contact electrode 32 can be made of a transparent conductive material or a metal material, and can be adaptively selected according to the doping conditions of the surface layer of the second semiconductor layer 13 (such as the p-type GaP surface layer). In some embodiments, the second contact electrode 32 is made of a transparent conductive material, which may include indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium doped zinc oxide (GZO), tungsten doped indium oxide (IWO), or zinc oxide (ZnO), but the embodiments of the present disclosure are not limited thereto.

[0033] The insulating layer 36 covers the semiconductor stack and the first contact electrode 31 and has a first opening 361 and a second opening 362. The insulating layer 36 is made of a non-conductive material. The non-conductive material is preferably an inorganic material or a dielectric material. The inorganic material may include silica gel. The dielectric material includes an electrically insulating material such as aluminum oxide, silicon nitride, silicon oxide, titanium oxide, or magnesium fluoride. For example, the insulating layer 36 may be silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, or a combination thereof. The combination may, for example, be a Bragg reflector (DBR) formed by repeatedly stacking two materials with different refractive indices. The insulating layer 36 completely covers the sidewalls 24 of the second mesa 22 and the first mesa 21. The insulating layer 36 protects the edges of the LED and reduces non-radiative recombination caused by surface defects.

[0034] The support electrode 33 is disposed on the insulating layer 36. The support electrode 33 may be formed by stacking metal materials such as evaporated Cr, Ti, Ni, Pt, Au, etc., and may have metal reflective mirror properties.

[0035] The first pad electrode 34 is disposed on the insulating layer 36 and is electrically connected to the first contact electrode 31 through the first opening 361. The second pad electrode 35 is disposed on the insulating layer 36 and the support electrode 33 and is electrically connected to the second contact electrode 32 through the second opening 362. The first pad electrode 34 and the second pad electrode 35 may be metal pads and may be formed together using the same material in the same process, thus having the same layer structure. The first pad electrode 34 and the second pad electrode 35 may be formed by stacking a metal material such as evaporated Cr, Ti, Ni, Pt, or Au, and may also have metal reflective mirror properties.

[0036] In some embodiments, the difference H6 between the thickness of the first contact electrode 31 and the first height difference H1 is less than 0.3 μm. For example, the difference between H3 and H1 in the figure is H6. The effect is to avoid the massive transfer skew abnormality caused by the height difference between the first pad electrode 34 and the second pad electrode 35, resulting in yield loss.

[0037] In some embodiments, a fourth height difference H4 between the upper surface of the support electrode 33 and the first mesa 21 is less than 0.3 μm to prevent an uneven surface of the second pad electrode 35 from causing yield loss due to subsequent mass transfer deviation.

[0038] In some embodiments, the fifth height difference between the upper surface of the first pad electrode 34 and the upper surface of the second pad electrode 35 (in the figure, the upper surface of the first pad electrode 34 and the upper surface of the second pad electrode 35 are flush, and the height difference is 0) is less than 0.3 μm, and the spacing S2 from the first pad electrode 34 to the second pad electrode 35 is less than 20 μm, so as to improve the surface flatness and improve the performance of the light-emitting diode.

[0039] See also Figure 4 , Figure 4 FIG is a schematic diagram of the structure of the light emitting diode provided by the second embodiment of the present invention. Figure 3 Compared to the LED of the first embodiment shown, this embodiment differs primarily in that the LED further includes a bonding layer 40 and a substrate 41. The bonding layer 40 covers the insulating layer 36, the first pad electrode 34, and the second pad electrode 35. The substrate 41 is connected to the bonding layer 40. Through wafer bonding combined with a laser lift-off (LLO) process, the substrate 10 is replaced with a sapphire substrate 41. A surface roughening process is then introduced to further enhance the light extraction efficiency of the LED.

[0040] See also Figure 5 , Figure 5 FIG. 1 is a schematic diagram of the structure of a light emitting diode provided by the third embodiment of the present invention. Figure 3Compared to the LED of the first embodiment shown, this embodiment differs primarily in that the LED further includes a bonding layer 40 and a substrate 41. The bonding layer 40 is disposed beneath the first semiconductor layer 11, and the substrate 41 is disposed beneath the bonding layer 40. Through wafer bonding combined with a laser lift-off (LLO) process, the substrate 10 is replaced with a sapphire substrate 41. A surface roughening process is then introduced to further enhance the light extraction efficiency of the LED.

[0041] One embodiment of the present invention further provides a light-emitting device, which can use the light-emitting diode of any of the aforementioned embodiments. Micro-LEDs can be used in applications such as AR / VR and high-density displays.

[0042] In summary, the present invention provides a light-emitting diode and a light-emitting device, which, by setting a first mesa 21 and a second mesa 22 on the second semiconductor layer 13, have an inward-retracted structure of the covering layer 132 and the window layer 133, thereby limiting the current away from the edge of the second semiconductor layer 13, thereby suppressing the influence of the edge effect of the light-emitting diode, thereby improving the light extraction efficiency, light uniformity, and device reliability of the light-emitting diode.

[0043] In addition, those skilled in the art should understand that, although there are many problems in the prior art, each embodiment or technical solution of the present invention may be improved in only one or several aspects, without having to simultaneously solve all the technical problems listed in the prior art or background art. Those skilled in the art should understand that any content not mentioned in a claim should not be construed as limiting the claim.

[0044] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A light emitting diode, characterized in that: The light emitting diode comprises: A semiconductor stack, wherein the semiconductor stack comprises a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence; The second semiconductor layer includes a spacer layer, a covering layer and a window layer stacked in sequence on the light-emitting layer, and the covering layer covers part of the spacer layer; the second semiconductor layer has a first mesa and a second mesa, the first mesa is the surface of the window layer, and the second mesa is the surface of the spacer layer not covered by the covering layer.

2. The light emitting diode according to claim 1, wherein: A first height difference between the first mesa and the second mesa is 0.5-0.8 μm.

3. The light emitting diode according to claim 1, wherein: The ratio of the width of the covering layer to the width of the spacer layer is in the range of 1:2 to 1:

4.

4. The light emitting diode according to claim 1, wherein: The width of the first mesa is greater than the width of the second contact electrode, and the size range from the second contact electrode to the end point of the first mesa is 0-1 μm.

5. The light emitting diode according to claim 1, wherein: A second height difference between the second mesa and the light-emitting layer is less than 0.1 μm.

6. The light emitting diode according to claim 1, wherein: In a top view, the area of ​​the first mesa is larger than the area of ​​the second contact electrode, and the ratio of the area of ​​the first mesa to the area of ​​the second contact electrode is in a range of 3:1 to 1:

1.

7. The light emitting diode according to claim 1, wherein: The second semiconductor layer includes a sidewall, two ends of the sidewall are respectively connected to the first mesa and the second mesa, and the inclination angle of the sidewall is 50-70°.

8. The light emitting diode according to claim 1, wherein: The light emitting diode further includes a third mesa, which is a surface of the first semiconductor layer not covered by the light emitting layer. A third height difference between the first mesa and the third mesa ranges from 1.5 to 3 μm.

9. The light emitting diode according to claim 1, wherein: The light emitting diode further includes a first contact electrode, a second contact electrode, a support electrode, a first pad electrode, a second pad electrode and an insulating layer; The first contact electrode is electrically connected to the first semiconductor layer, and the second contact electrode is electrically connected to the second semiconductor layer; The insulating layer covers the semiconductor stack and the first contact electrode, and the insulating layer has a first opening and a second opening; The supporting electrode is arranged on the insulating layer; The first pad electrode is disposed on the insulating layer and is electrically connected to the first contact electrode through the first opening; The second pad electrode is disposed on the insulating layer and the support electrode, and is electrically connected to the second contact electrode through the second opening.

10. The light emitting diode according to claim 9, characterized in that: There is a first height difference between the first mesa and the second mesa, and a difference between a thickness of the first contact electrode and the first height difference is less than 0.3 μm.

11. The light emitting diode according to claim 9, wherein: A fourth height difference between the upper surface of the supporting electrode and the first mesa is less than 0.3 μm.

12. The light emitting diode according to claim 9, wherein: A fifth height difference between the upper surface of the first pad electrode and the upper surface of the second pad electrode is less than 0.3 μm, and a distance between the first pad electrode and the second pad electrode is less than 20 μm.

13. A light emitting device, characterized in that: The light emitting device adopts the light emitting diode according to any one of claims 1 to 12.

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