Battery pack insulation detection method, electric equipment, electronic equipment, medium and product

By using a target switch in the battery pack insulation detection circuit to obtain a stable voltage sequence and dynamically adjust the detection cycle, the problem of uncontrollable detection accuracy caused by unstable voltage is solved, the accuracy and efficiency of insulation resistance detection are improved, and the safety of the battery pack is ensured.

CN120610180APending Publication Date: 2025-09-09ZHEJIANG ZEEKR INTELLIGENT TECH CO LTD +2
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Patent Information

Application Number
CN202510801641.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-16
Publication Date
2025-09-09

AI Technical Summary

Technical Problem

In the prior art, improper cycle setting of battery pack insulation testing results in uncontrollable testing accuracy, which may affect safety due to voltage instability.

Method used

By using the first and second target switches in the insulation detection circuit, the stable insulation voltage and total voltage sequence are obtained, the detection cycle is dynamically adjusted, the insulation resistance value is determined based on the stable voltage, and the difference and time period matching are used to ensure voltage stability and improve detection accuracy.

Benefits of technology

It realizes dynamic adjustment of the detection cycle based on voltage stability, improves the accuracy and efficiency of insulation resistance detection, and ensures the safety of the battery pack.

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Abstract

The invention relates to the technical field of battery packs, and discloses a battery pack insulation detection method, electric equipment, electronic equipment, a medium and a product, and the method comprises the steps: obtaining a first insulation voltage sequence and a first total voltage sequence after a first target switch is switched on and a second target switch is switched off; determining a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence; after the second target switch is closed, obtaining a second insulation voltage sequence and a second total voltage sequence; determining a second stable insulation voltage and a second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence; according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage, the resistance values of the upper bridge arm insulation resistor and the lower bridge arm insulation resistor are determined. The resistance value of the insulation resistor is determined by using the insulation voltage in the stable state and the total voltage, and the detection precision can be improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of battery packs, and in particular to a battery pack insulation detection method, electrical equipment, electronic equipment, medium and products. Background Art

[0002] New energy vehicle power batteries (battery packs) generally use high voltage. If the insulation between the high-voltage system and the vehicle body is damaged or destroyed, the insulation performance will be degraded, seriously endangering the safety of the occupants. Therefore, it is necessary to perform insulation testing on the battery pack.

[0003] In the related art, a bridge method is usually used to perform insulation testing on a battery pack, wherein the insulation testing period is a fixed period. If the fixed period is set too short or too long, the testing accuracy may be uncontrollable due to voltage instability. Summary of the Invention

[0004] In view of this, the present invention provides a battery pack insulation detection method, electrical equipment, electronic equipment, medium and product to improve the problem of uncontrollable detection accuracy due to voltage instability.

[0005] In the first aspect, the present invention provides a battery pack insulation detection method, wherein the total positive terminal of the battery pack is connected to the upper bridge arm circuit in the insulation detection circuit, and the total negative terminal of the battery pack is connected to the lower bridge arm circuit in the insulation detection circuit. The insulation detection circuit also includes a first target switch and a second target switch, the first target switch is used to access the lower bridge arm circuit, and the second target switch is used to access the upper bridge arm circuit. The method includes: after the first target switch is closed and the second target switch is disconnected, obtaining a first insulation voltage sequence and a first total voltage sequence; the first insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the first target switch is closed, and the first total voltage sequence is the total voltage of multiple battery packs collected after the first target switch is closed, and the insulation voltage sampling point is the lower bridge arm. The position point connected to the grounding resistor in the circuit; determining the first stable insulation voltage and the first stable total voltage based on the first insulation voltage sequence and the first total voltage sequence; obtaining the second insulation voltage sequence and the second total voltage sequence after the second target switch is also closed; the second insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the second target switch is also closed, and the second total voltage sequence is the total voltage of multiple battery packs collected after the second target switch is also closed; determining the second stable insulation voltage and the second stable total voltage based on the second insulation voltage sequence and the second total voltage sequence; determining the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance based on the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage.

[0006] The battery pack insulation detection method provided in this embodiment first determines the first stable insulation voltage and the first stable total voltage based on the first insulation voltage sequence and the first total voltage sequence obtained after the first target switch is closed and the second target switch is opened, then closes the second target switch, and determines the second stable insulation voltage and the second stable total voltage based on the second insulation voltage sequence and the second total voltage sequence obtained after the second target switch is also closed, and finally determines the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance based on the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage. In this embodiment, whether the voltage is stable is first determined based on the insulation voltage sequence and the total voltage sequence. After the voltage is stable, the insulation resistance value is determined based on the insulation voltage and the total voltage. The insulation detection cycle is dynamically changed based on whether the voltage is stable, which can improve the detection accuracy of the insulation resistance.

[0007] In an optional embodiment, a first stable insulation voltage and a first stable total voltage are determined based on a first insulation voltage sequence and a first total voltage sequence, including: determining a first difference and a second difference, wherein the first difference is the difference between the maximum value and the minimum value in the first insulation voltage sequence, and the second difference is the difference between the maximum value and the minimum value in the first total voltage sequence; determining whether the first insulation voltage sequence and the first total voltage sequence are in the same time period; determining the target insulation voltage as the first stable insulation voltage and the target total voltage as the first stable total voltage when the first difference is less than a first threshold, the second difference is less than a second threshold, and the first insulation voltage sequence and the first total voltage sequence are in the same time period; the target insulation voltage is the average value of the first insulation voltage sequence or the last sampling value in the first insulation voltage sequence, and the target total voltage is the average value of the first total voltage sequence or the last sampling value in the first total voltage sequence.

[0008] In this embodiment, after obtaining the first insulation voltage sequence and the first total voltage sequence, determining whether the voltage is stable is based on the difference. This facilitates calculation and allows for faster determination of the first stable insulation voltage and the first stable total voltage, thereby improving detection efficiency. Furthermore, the first stable insulation voltage and the first stable total voltage are only determined when the voltage is stable and the first insulation voltage sequence and the first total voltage sequence are within the same time period. This ensures a correlation between the first stable insulation voltage and the first stable total voltage, thereby improving detection accuracy.

[0009] In an optional embodiment, determining whether the first insulation voltage sequence and the first total voltage sequence are in the same time period includes: when the first start moment and the second start moment are the same and the first end moment and the second end moment are the same, the first insulation voltage sequence and the first total voltage sequence are in the same time period; the first start moment is the start moment of the first insulation voltage sequence, the second start moment is the start moment of the first total voltage sequence, the first end moment is the end moment of the first insulation voltage sequence, and the second end moment is the end moment of the first total voltage sequence; or, when the first time period contains the second time period or the second time period contains the first time period, the first insulation voltage sequence and the first total voltage sequence are in the same time period; the first time period is the time period between the first start moment and the first end moment, and the second time period is the time period between the second start moment and the second end moment; or, when the difference between the first start moment and the second start moment is less than a preset sampling period, and / or when the difference between the first end moment and the second end moment is less than a preset sampling period, the first insulation voltage sequence and the first total voltage sequence are in the same time period; the preset sampling period is the sampling period of the first total voltage sequence or the sampling period of the first insulation voltage sequence.

[0010] In an optional embodiment, the method further includes: when the first difference is greater than or equal to a first threshold and / or when the second difference is greater than or equal to a second threshold, reacquiring the first insulation voltage sequence and the first total voltage sequence until the first stable insulation voltage and the first stable total voltage are determined.

[0011] In an optional embodiment, before obtaining the first insulation voltage sequence and the first total voltage sequence, the method further includes: obtaining an expected sampling time; obtaining the first insulation voltage sequence and the first total voltage sequence, including: obtaining the first insulation voltage sequence and the first total voltage sequence according to the expected sampling time; obtaining the second insulation voltage sequence and the second total voltage sequence, including: obtaining the second insulation voltage sequence and the second total voltage sequence according to the expected sampling time.

[0012] In this embodiment, the first insulation voltage sequence, the first total voltage sequence, the second insulation voltage sequence, and the second total voltage sequence are obtained based on the dynamically changing expected sampling time, so that the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage can be determined in advance, and the sampling frequency can be increased while ensuring the detection accuracy.

[0013] In an optional embodiment, after determining the second stable insulation voltage and the second stable total voltage, the method further includes: updating the expected sampling time according to the determination time of the first stable insulation voltage and the determination time of the second stable insulation voltage.

[0014] In an optional embodiment, before obtaining the first insulation voltage sequence and the first total voltage sequence, the method further includes: determining the deviation correction time based on the resistance values ​​of the first insulation resistance and the second insulation resistance determined last time; obtaining the first insulation voltage sequence and the first total voltage sequence according to the expected sampling time, including: obtaining the first insulation voltage sequence and the first total voltage sequence according to the expected sampling time and the deviation correction time; obtaining the second insulation voltage sequence and the second total voltage sequence according to the expected sampling time, including: obtaining the second insulation voltage sequence and the second total voltage sequence according to the expected sampling time.

[0015] In an optional embodiment, the method further includes: determining the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance based on the last determined second stable insulation voltage, the last determined second stable total voltage, the currently determined first stable insulation voltage and the currently determined first stable total voltage.

[0016] In this embodiment, two adjacent sets of equations are combined to determine the insulation resistance value, which can double the insulation resistance acquisition frequency while keeping the sampling frequency unchanged, thereby increasing the insulation resistance detection frequency and breaking the cycle limitation.

[0017] In a second aspect, the present invention provides an electrical device, which includes a battery pack, an insulation detection circuit and a control chip; the insulation detection circuit includes an upper bridge arm circuit, a lower bridge arm circuit, a first target switch and a second target switch, the total positive end of the battery pack is connected to the upper bridge arm circuit, the total negative end of the battery pack is connected to the lower bridge arm circuit, the first target switch is used to access the lower bridge arm circuit, and the second target switch is used to access the upper bridge arm circuit; the control chip is used to control the closure of the first target switch, and is used to obtain a first insulation voltage sequence and a first total voltage sequence after the first target switch is closed and the second target switch is disconnected; the first insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the first target switch is closed, and the first total voltage sequence is the total voltage of multiple battery packs collected after the first target switch is closed, and the insulation voltage sampling point is the voltage connected to the grounding resistor in the lower bridge arm circuit. connected position point; the control chip is also used to determine the first stable insulation voltage and the first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence; the control chip is also used to control the second target switch to be closed, and to obtain the second insulation voltage sequence and the second total voltage sequence after the second target switch is also closed; the second insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the second target switch is also closed, and the second total voltage sequence is the total voltage of multiple battery packs collected after the second target switch is also closed; the control chip is also used to determine the second stable insulation voltage and the second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence; the control chip is also used to determine the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage.

[0018] In an optional embodiment, the first target switch includes a first switch and a second switch, the second target switch is a third switch, the upper bridge arm circuit includes an upper bridge arm insulation resistor, a first capacitor, a first resistor and a second resistor, and the lower bridge arm circuit includes a lower bridge arm insulation resistor, a second capacitor, a third resistor and a fourth resistor; one end of the upper bridge arm insulation resistor is connected to the total positive end, and the other end is connected to the chassis, one end of the lower bridge arm insulation resistor and one end of the first switch, and the other end of the lower bridge arm insulation resistor is connected to the total negative end; one end of the first capacitor is connected to the total positive end, and the other end is connected to the other end of the upper bridge arm insulation resistor, one end of the first switch and one end of the second capacitor, and the other end of the second capacitor is connected to the total negative end; one end of the first resistor is connected to the total positive end, and the other end is connected to one end of the second resistor and one end of the third switch, and the other end of the third switch is connected to the total negative end, the other end of the second resistor is connected to the other end of the first switch and one end of the third resistor, the other end of the third resistor is connected to one end of the second switch, the other end of the second switch is connected to one end of the fourth resistor, and the other end of the fourth resistor is grounded.

[0019] In a third aspect, the present invention provides an electronic device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the battery pack insulation detection method of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0020] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable an electronic device to execute the battery pack insulation detection method of the first aspect or any corresponding embodiment thereof.

[0021] In a fifth aspect, the present invention provides a computer program product comprising computer instructions, which are used to enable an electronic device to execute the battery pack insulation detection method of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in related technologies, the following briefly introduces the drawings required for use in the specific embodiments or related technical descriptions. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0023] Figure 1 is a schematic diagram of an insulation detection circuit according to an embodiment of the present invention;

[0024] Figure 2 is a schematic diagram of another insulation detection circuit according to an embodiment of the present invention;

[0025] Figure 3 is a flow chart of a battery pack insulation detection method according to an embodiment of the present invention;

[0026] Figure 4 is a flow chart of another battery pack insulation detection method according to an embodiment of the present invention;

[0027] Figure 5 is a schematic diagram of a first timing relationship between a first insulation voltage sequence and a first total voltage sequence according to an embodiment of the present invention;

[0028] Figure 6 is a schematic diagram of a second timing relationship between the first insulation voltage sequence and the first total voltage sequence according to an embodiment of the present invention;

[0029] Figure 7 is a schematic diagram of a third timing relationship between the first insulation voltage sequence and the first total voltage sequence according to an embodiment of the present invention;

[0030] Figure 8 is a schematic diagram of a fourth timing relationship between the first insulation voltage sequence and the first total voltage sequence according to an embodiment of the present invention;

[0031] Figure 9 is a schematic diagram of a fifth timing relationship between the first insulation voltage sequence and the first total voltage sequence according to an embodiment of the present invention;

[0032] Figure 10 is a schematic diagram of a sixth timing relationship between the first insulation voltage sequence and the first total voltage sequence according to an embodiment of the present invention;

[0033] Figure 11 is a flow chart of another battery pack insulation detection method according to an embodiment of the present invention;

[0034] Figure 12 is a schematic diagram of the timing relationship of expected sampling periods during the insulation detection process according to an embodiment of the present invention;

[0035] Figure 13 is a schematic diagram of the timing relationship between the expected sampling period and the deviation correction time during the insulation detection process according to an embodiment of the present invention;

[0036] Figure 14 is a schematic diagram of sampling frequency according to an embodiment of the present invention;

[0037] Figure 15 FIG. 4 is a schematic diagram of the hardware structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0038] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. According to the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of the present invention.

[0039] The present invention provides a battery pack insulation detection method, electrical equipment, electronic equipment, medium and product. When performing insulation detection on a battery pack, the insulation detection cycle can be dynamically adjusted based on whether the voltage is stable, so that the insulation voltage and total voltage in a stable state can be used to determine the insulation resistance value, thereby improving the detection accuracy.

[0040] The present invention can be applied to electric vehicles, and the battery pack insulation detection method relies on an insulation detection circuit. The insulation detection circuit can be a bridge method insulation detection circuit, which is a circuit that detects insulation resistance based on the bridge balance principle or the unbalanced principle.

[0041] Exemplarily, the insulation detection circuit may include an upper bridge arm circuit, a lower bridge arm circuit, a first target switch and a second target switch, one end of the upper bridge arm circuit and one end of the lower bridge arm circuit are connected to the chassis 110 (Chassis), the other end of the upper bridge arm circuit is connected to the total positive terminal PACK+ of the battery pack BAT, and the other end of the lower bridge arm circuit is connected to the total negative terminal PACK- of the battery pack BAT, the first target switch is used to connect to the lower bridge arm circuit, and the second target switch is used to connect to the upper bridge arm circuit.

[0042] For ease of understanding, the specific structure of the insulation detection circuit is described below with reference to the accompanying drawings.

[0043] In some embodiments, as Figure 1 As shown, the insulation detection circuit may include an upper bridge arm insulation resistor Rx, a lower bridge arm insulation resistor Ry, a first capacitor Cx, a second capacitor Cy, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a first switch S1, a second switch S2, a third switch S3 and an analog-to-digital converter 120 (ADC). The ADC is used to convert the collected analog voltage signal into a digital signal for subsequent processing and calculation. The ADC includes a total voltage sampling pin U batAD and insulation voltage sampling pin U isoAD .

[0044] In this embodiment, the upper arm circuit includes an upper arm insulation resistor Rx, a first capacitor Cx, a first resistor R1, and a second resistor R2. The lower arm circuit includes a lower arm insulation resistor Ry, a second capacitor Cy, a third resistor R3, and a fourth resistor R4. The first target switch may be a first switch S1 and a second switch S2, and the second target switch may be a third switch S3.

[0045] Exemplarily, the first switch S1 , the second switch S2 and the third switch S3 may all be high-voltage isolation switches, such as optocoupler relays, MOS relays or electromagnetic relays.

[0046] Specifically, the upper bridge arm insulation resistance Rx can be the insulation resistance of the total positive terminal PACK of the battery pack BAT+ to the vehicle body, and the lower bridge arm insulation resistance Ry can be the insulation resistance of the total negative terminal PACK of the battery pack BAT- to the vehicle body. The upper bridge arm insulation resistance Rx and the lower bridge arm insulation resistance Ry are generally unknown values, and the first resistor R1 to the sixth resistor R6 are generally known values.

[0047] One end of the upper bridge arm insulation resistor Rx is connected to the total positive terminal PACK+ of the battery pack BAT. The other end of the upper bridge arm insulation resistor Rx is connected to the chassis 110, one end of the lower bridge arm insulation resistor Ry, and one end of the first switch S1. The other end of the lower arm insulation resistor Ry is connected to the total negative terminal PACK- of the battery pack BAT. One end of the first capacitor Cx is connected to the total positive terminal PACK+ of the battery pack BAT. The other end of the first capacitor Cx is connected to the other end of the upper bridge arm insulation resistor Rx, one end of the first switch S1, and one end of the second capacitor Cy. The other end of the second capacitor Cy is connected to the total negative terminal PACK- of the battery pack BAT.

[0048] One end of the first resistor R1 is connected to the total positive terminal PACK+ of the battery pack BAT, the other end of the first resistor R1 is connected to one end of the second resistor R2 and one end of the third switch S3, the other end of the third switch S3 is connected to the total negative terminal PACK- of the battery pack BAT, the other end of the second resistor R2 is connected to the other end of the first switch S1 and one end of the third resistor R3, the other end of the third resistor R3 is connected to one end of the second switch S2, and the other end of the second switch S2 is connected to one end of the fourth resistor R4 and the insulation voltage sampling pin U isoAD The other end of the fourth resistor R4 is grounded GND.

[0049] One end of the fifth resistor R5 is connected to the total positive terminal PACK+ of the battery pack BAT, and the other end of the fifth resistor R5 is connected to one end of the sixth resistor R6 and the total voltage sampling pin U batAD The other end of the sixth resistor R6 is connected to the total negative terminal PACK- of the battery pack BAT.

[0050] Further, if Figure 1 As shown, the insulation detection circuit also includes a current sensor 130, and the ADC also includes a main circuit current sampling pin i. One end of the current sensor 130 is connected to the total negative terminal PACK- of the battery pack BAT, and the other end of the current sensor 130 is connected to the main circuit current sampling pin i. The current sensor 130 is used to detect the current in the main circuit, allowing the battery management system (BMS) to monitor the output current of the battery pack BAT and prevent overcharging or over-discharging of the battery.

[0051] In other embodiments, Figure 2 As shown, the insulation detection circuit may include an upper bridge arm insulation resistor Rx, a lower bridge arm insulation resistor Ry, a first capacitor Cx, a second capacitor Cy, a first resistor R1, a second resistor R2, a third resistor R3, a fifth resistor R5, a sixth resistor R6, a first switch S1, a second switch S2, a third switch S3, a filter 140 (Filter) and an ADC.

[0052] In this embodiment, the upper arm circuit includes an upper arm insulation resistor Rx, a first capacitor Cx, a first resistor R1, and a second resistor R2. The lower arm circuit includes a lower arm insulation resistor Ry, a second capacitor Cy, and a third resistor R3. The first target switch may be a first switch S1 and a second switch S2, and the second target switch may be a third switch S3.

[0053] The connection relationship between the upper bridge arm insulation resistor Rx, the lower bridge arm insulation resistor Ry, the first capacitor Cx, the second capacitor Cy, the fifth resistor R5, the sixth resistor R6 and the third switch S3 is as follows: Figure 1 The embodiments shown are consistent and will not be described again here.

[0054] Specifically, one end of the first resistor R1 is connected to the total positive terminal PACK+ of the battery pack BAT, the other end of the first resistor R1 is connected to one end of the second resistor R2 and one end of the third switch S3, the other end of the second resistor R2 is connected to the other end of the first switch S1, one end of the second switch S2 and the first end of the filter 140, the other end of the second switch S2 is connected to one end of the third resistor R3, the other end of the third resistor R3 is grounded GND, the second end of the filter 140 is connected to the total negative terminal PACK- of the battery pack BAT, and the third end of the filter 140 is connected to the insulation voltage sampling pin U isoAD .

[0055] Furthermore, the insulation detection circuit of this embodiment may also include a current sensor 130 .

[0056] In other embodiments, the insulation detection circuit may also be a bridge method insulation detection circuit commonly used in the art for detecting insulation resistance, which is not specifically limited in the present invention.

[0057] According to an embodiment of the present invention, a method for detecting insulation in a battery pack is provided. It should be noted that the steps shown in the flowcharts of the accompanying drawings may be executed in a control chip, such as a set of computer-executable instructions. Furthermore, although the flowcharts illustrate a logical sequence, in some cases, the steps shown or described may be executed in a different order than that illustrated or described. The control chip may be a CPU, MCU, or other chip.

[0058] The battery pack insulation detection method provided by the present invention is described in detail below with reference to the accompanying drawings.

[0059] Figure 3 FIG. 1 is a flow chart of a battery pack insulation detection method according to an embodiment of the present invention. Figure 3 As shown, the method includes the following steps:

[0060] Step S301 : After the first target switch is closed and the second target switch is opened, a first insulation voltage sequence and a first total voltage sequence are acquired.

[0061] The first insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the first target switch is closed, and the first total voltage sequence is the total voltage of multiple battery packs collected after the first target switch is closed.

[0062] If the voltage of the insulation voltage sampling point after the first target switch is closed is recorded as the first insulation voltage, then the first insulation voltage sequence includes n iso First insulation voltage U iso1 , n iso is an integer greater than 1. If the total voltage of the battery pack after the first target switch is closed is recorded as the first total voltage, the first total voltage sequence includes n bat The first total voltage U bat1 , n bat is an integer greater than 1. n iso and n bat The value of can be determined by the designer, n iso and n bat The values ​​of can be the same or different, for example, n iso It can be 6, 7 or 8, etc. bat It can be 4, 5 or 6, etc.

[0063] The insulation voltage sampling point is the point in the lower arm circuit that is connected to the ground resistor. The location of the insulation voltage sampling point will change accordingly depending on the structure of the insulation detection circuit. For example, if the structure of the insulation detection circuit is Figure 1 As shown, the insulation voltage sampling point can be the connection point between the other end of the second switch S2 and one end of the fourth resistor R4 connected to the ground; if the structure of the insulation detection circuit is as shown Figure 2 As shown, the insulation voltage sampling point may be a connection point between the first switch S1 and the second switch S2 located at the other end of the third resistor R3 connected to the ground.

[0064] by Figure 1 or Figure 2 Taking the insulation detection circuit of FIG. 1 as an example, after the control chip controls the first target switch (ie, the first switch S1 and the second switch S2) to be closed, the insulation voltage sampling pin U of the ADC can be used to sample the insulation voltage of the ADC. isoAD The end collects n iso First insulation voltage U iso1 , thus obtaining the first isolation voltage sequence, which can be obtained from the total voltage sampling pin U of the ADC batAD The end collects n bat The first total voltage U bat1 , thus obtaining the first total voltage sequence.

[0065] Specifically, the sampling period t of the first total voltage sequence is bat and the sampling period t of the first insulation voltage sequenceiso This is related to voltage fluctuations, and it is desirable to identify as many voltage fluctuations as possible with as few samples as possible. The sampling period of the first total voltage sequence is the time interval between the sampling moments of two adjacent first total voltages, and the sampling period of the first insulation voltage sequence is the time interval between the sampling moments of two adjacent first insulation voltages.

[0066] Exemplarily, the sampling period of the first total voltage sequence and the sampling period of the first insulation voltage sequence can be in the millisecond (ms) level. For example, the sampling period of the first total voltage sequence can be 8ms or 10ms, and the sampling period of the first insulation voltage sequence can be 3ms or 5ms.

[0067] Specifically, when performing insulation testing on a battery pack, it is generally performed when the battery pack is relatively stable, so the voltage change of the battery pack is small and the sampling period can be appropriately relaxed. In addition to being affected by the total voltage change of the battery pack, the insulation voltage is also affected by the changes in capacitance charge and discharge caused by the switching of the switch. The capacitance charge and discharge time is long, and the change lasts for a long time, so a higher sampling frequency is required.

[0068] That is, the sampling period of the first total voltage sequence can be greater than the sampling period of the first insulation voltage sequence (ie, t bat >t iso ) At this time, n iso Greater than n bat .

[0069] In other embodiments, the sampling period of the first total voltage sequence may also be equal to the sampling period of the first insulation voltage sequence (ie, t bat =t iso ).

[0070] Step S302 : determining a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence.

[0071] The first stable insulation voltage may be the insulation voltage acquired after the first target switch is closed and the insulation voltage sampling point and the battery pack are both in a stable state. The first stable total voltage may be the total voltage acquired after the first target switch is closed and the insulation voltage sampling point and the battery pack are both in a stable state.

[0072] Specifically, after obtaining the first insulation voltage sequence and the first total voltage sequence, the control chip can iso First insulation voltage U iso1 The degree of fluctuation and n bat The first total voltage U bat1 The degree of fluctuation is used to determine whether the insulation voltage sampling point and the battery pack voltage are in a stable state.

[0073] For example, the degree of fluctuation can be represented by variance. If the first variance represents n iso First insulation voltage U iso1 The second variance characterizes the degree of fluctuation between bat The first total voltage U bat1 At this time, when the first variance is less than the first variance threshold and the second variance is less than the second variance threshold, the control chip believes that the insulation voltage sampling point and the battery pack voltage are both in a stable state.

[0074] Step S303: After the second target switch is also closed, a second insulation voltage sequence and a second total voltage sequence are obtained.

[0075] Among them, the second target switch is also closed means that the first target switch and the second target switch are both closed, the second insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the second target switch is also closed, and the second total voltage sequence is the total voltage of multiple battery packs collected after the second target switch is also closed.

[0076] If the voltage at the insulation voltage sampling point after the first target switch and the second target switch are both closed is recorded as the second insulation voltage, then the second insulation voltage sequence includes n iso Second insulation voltage U iso2 If the total voltage of the battery pack after the first target switch and the second target switch are both closed is recorded as the second total voltage, then the second total voltage sequence includes n bat The second total voltage U bat2 .

[0077] by Figure 1 or Figure 2 Taking the insulation detection circuit of FIG. 1 as an example, after the control chip controls the second target switch (ie, the third switch S3) to be closed, the insulation voltage sampling pin U of the ADC can be used to sample the insulation voltage of the ADC. isoAD The end collects n iso Second insulation voltage U iso2 , thus obtaining the second isolation voltage sequence, which can be obtained from the total voltage sampling pin U of the ADC batAD The end collects n bat The second total voltage U bat2 , thus obtaining the second total voltage sequence.

[0078] Step S304 : determining a second stable insulation voltage and a second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence.

[0079] The second stable insulation voltage may be an insulation voltage acquired after the first target switch and the second target switch are both closed, when the insulation voltage sampling point and the battery pack voltage are both stable. The second stable total voltage may be a total voltage acquired after the first target switch and the second target switch are both closed, when the insulation voltage sampling point and the battery pack voltage are both stable.

[0080] Similar to the above step S302, after obtaining the second insulation voltage sequence and the second total voltage sequence, the control chip can iso Second insulation voltage U iso2 The degree of fluctuation and n bat The second total voltage U bat2 The degree of fluctuation is used to determine whether the insulation voltage sampling point and the battery pack voltage are in a stable state.

[0081] Step S305 , determining the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage.

[0082] Specifically, battery pack insulation testing involves incorporating resistors of varying known values ​​to generate two equations, which are then used to determine the insulation resistance. The two equations differ depending on the structure of the insulation testing circuit. After determining the insulation testing circuit structure, the designer can confirm the two equations and pre-store them in the corresponding locations on the control chip.

[0083] For example, if the structure of the insulation detection circuit is as follows Figure 1 As shown, the expressions of the two equations can be shown as formula (1) and formula (2):

[0084]

[0085] In formula (1), V p Represents the upper arm voltage, V n Represents the lower bridge arm voltage, R x Indicates the resistance of the upper bridge arm insulation resistance Rx, R y represents the resistance of the lower bridge arm insulation resistor Ry, R1 represents the resistance of the first resistor R1, R2 represents the resistance of the second resistor R2, R3 represents the resistance of the third resistor R3, R4 represents the resistance of the fourth resistor R4, and U p1 It represents the first stable total voltage, and U1 represents the first stable insulation voltage.

[0086] In formula (2), U p2 represents the second stable total voltage, and U2 represents the second stable insulation voltage.

[0087] Specifically, if the structure of the insulation detection circuit is as follows Figure 1 As shown, after determining the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage, the control chip substitutes the first stable insulation voltage and the first stable total voltage into formula (1), and substitutes the second stable insulation voltage and the second stable total voltage into formula (2), and then solves the formula to determine the resistance value of the upper bridge arm insulation resistance Rx and the resistance value of the lower bridge arm insulation resistance Ry.

[0088] For example, if the structure of the insulation detection circuit is as follows Figure 2 As shown, the expressions of the two equations can be shown as formula (3) and formula (4):

[0089]

[0090] Specifically, if the structure of the insulation detection circuit is as follows Figure 2 As shown, after determining the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage, the control chip substitutes the first stable insulation voltage and the first stable total voltage into formula (3), and substitutes the second stable insulation voltage and the second stable total voltage into formula (4), and then solves to determine the resistance value of the upper bridge arm insulation resistance Rx and the resistance value of the lower bridge arm insulation resistance Ry.

[0091] The battery pack insulation detection method provided in this embodiment first determines the first stable insulation voltage and the first stable total voltage based on the first insulation voltage sequence and the first total voltage sequence obtained after the first target switch is closed and the second target switch is opened, then closes the second target switch, and determines the second stable insulation voltage and the second stable total voltage based on the second insulation voltage sequence and the second total voltage sequence obtained after the second target switch is also closed, and finally determines the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance based on the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage.

[0092] In this embodiment, whether the voltage is stable is first determined based on the insulation voltage sequence and the total voltage sequence. After the voltage is stable, the insulation resistance value is determined based on the insulation voltage and the total voltage. The insulation detection cycle changes dynamically based on whether the voltage is stable, which can improve the detection accuracy of the insulation resistance.

[0093] Figure 4 FIG. 1 is a flow chart of another battery pack insulation detection method according to an embodiment of the present invention. Figure 4 As shown, the method includes the following steps:

[0094] Step S401 : After the first target switch is closed and the second target switch is opened, a first insulation voltage sequence and a first total voltage sequence are acquired.

[0095] For details, please see Figure 3 Step S301 of the illustrated embodiment will not be described in detail here.

[0096] Step S402 : determining a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence.

[0097] Specifically, the above step S402 includes:

[0098] Step S4021: Determine the first difference and the second difference.

[0099] The first difference is the difference between the maximum value and the minimum value in the first insulation voltage sequence, and the second difference is the difference between the maximum value and the minimum value in the first total voltage sequence.

[0100] Specifically, after obtaining the first insulation voltage sequence, the control chip can iso First insulation voltage U iso1 Arrange them in order from large to small (or from small to large), and determine the difference between the first insulation voltage at the first position and the first insulation voltage at the last position as the first difference △U iso1 .

[0101] Similarly, after obtaining the first total voltage sequence, the control chip can bat The first total voltage U bat1 Arrange them in order from large to small (or from small to large), and determine the difference between the first total voltage at the first position and the first total voltage at the last position as the second difference △U bat1 .

[0102] Step S4022: Determine whether the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0103] Specifically, the collection of the first insulation voltage sequence and the first total voltage sequence is continuous and may not be in the same time period. When determining whether the voltage is stable, it is also necessary to determine whether the first insulation voltage sequence and the first total voltage sequence are in the same time period to ensure the correlation between the first insulation voltage sequence and the first total voltage sequence.

[0104] Exemplarily, the above step S4022 may include step a1, step a2, or step a3:

[0105] Step a1: when the first starting moment and the second starting moment are the same and the first ending moment and the second ending moment are the same, the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0106] Among them, the first starting time is the starting time of the first insulation voltage sequence, the second starting time is the starting time of the first total voltage sequence, the first ending time is the ending time of the first insulation voltage sequence, and the second ending time is the ending time of the first total voltage sequence.

[0107] That is to say, if Figure 5 As shown, when the control chip collects the first first total voltage in the first total voltage sequence and the first insulation voltage in the first insulation voltage sequence at the same time, and collects the last first total voltage in the first total voltage sequence and the last insulation voltage in the first insulation voltage sequence at the same time, it can be considered that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0108] That is, in the continuous n iso U iso1 and continuous n bat U bat When the total start and end times coincide, the control chip may consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0109] Step a2: When the first time period includes the second time period or the second time period includes the first time period, the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0110] The first time period is a time period corresponding to a first starting time and a first ending time, and the second time period is a time period corresponding to a second starting time and a second ending time.

[0111] That is to say, if Figure 6 As shown, if n consecutive iso U iso1 The total start and end time is included in the continuous n bat U bat The control chip can consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period. Figure 7 As shown, if n consecutive iso U iso1 The total start and end time includes the consecutive n bat U bat The total start and end time, the control chip can consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0112] Step a3: When the difference between the first start moment and the second start moment is less than the preset sampling period, and / or when the difference between the first end moment and the second end moment is less than the preset sampling period, the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0113] The preset sampling period is a sampling period of the first total voltage sequence or a sampling period of the first insulation voltage sequence.

[0114] That is to say, if n consecutive iso U iso1 Total start and end time and continuous n bat U bat If the single-ended starting point error and / or the single-ended ending point error between the total start and end times is less than the preset sampling period, the control chip may consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0115] For example, Figure 8 As shown, when the first start moment is later than the second start moment, the first end moment is later than the second end moment, but the difference between the two start moments is less than the preset sampling period and the difference between the two end moments is less than the preset sampling period, the control chip can consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0116] For example, Figure 9 As shown, when the first start time is later than the second start time, and the first end time is later than the second end time, but the difference between the two start times is less than the preset sampling period, the control chip can consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0117] For example, Figure 10 As shown, when the first start moment is earlier than the second start moment, the first end moment is later than the second end moment, but the difference between the two start moments is less than the preset sampling period and the difference between the two end moments is less than the preset sampling period, the control chip can consider that the first insulation voltage sequence and the first total voltage sequence are in the same time period.

[0118] Step S4023: When the first difference is less than the first threshold, the second difference is less than the second threshold, and the first insulation voltage sequence and the first total voltage sequence are in the same time period, the target insulation voltage is determined as the first stable insulation voltage and the target total voltage is determined as the first stable total voltage.

[0119] The target insulation voltage is the average value of the first insulation voltage sequence or the last sampled value in the first insulation voltage sequence, and the target total voltage is the average value of the first total voltage sequence or the last sampled value in the first total voltage sequence. isoi and the second threshold △U bati It is a fixed value and can be determined by the designer based on the sampling error and sampling accuracy, and configured in the control chip in advance.

[0120] Specifically, in △U iso1 <△Uisoi When △U bat1 <△U bati , indicating that the battery pack voltage is stable. When the insulation voltage and the battery pack voltage are both in a stable state and the first insulation voltage sequence and the first total voltage are in the same time period, the last first insulation voltage in the first insulation voltage sequence (or the average value of the first insulation voltage sequence) is determined as the first stable insulation voltage, and the last first total voltage in the first total voltage sequence (or the average value of the first total voltage sequence) is determined as the first stable total voltage.

[0121] It should be noted that when the first difference is greater than or equal to the first threshold and / or when the second difference is greater than or equal to the second threshold, the first insulation voltage sequence and the first total voltage sequence are reacquired until the first stable insulation voltage and the first stable total voltage are obtained.

[0122] That is, in △U iso1 ≥△U isoi When and / or △U bat1 ≥△U bati When , it indicates that the insulation voltage is not in a stable state and / or the total voltage is not in a stable state, and the first insulation voltage sequence and the first total voltage sequence need to be re-acquired from the ADC to obtain the first stable insulation voltage and the first stable total voltage.

[0123] Step S403 : After the second target switch is also closed, a second insulation voltage sequence and a second total voltage sequence are obtained.

[0124] For details, please see Figure 3 Step S303 of the illustrated embodiment will not be described in detail here.

[0125] Step S404: determining a second stable insulation voltage and a second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence.

[0126] Specifically, the specific process of determining the second stable insulation voltage and the second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence is similar to the above step S402 and will not be repeated here.

[0127] Step S405 , determining the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage.

[0128] For details, please see Figure 3 Step S305 of the illustrated embodiment will not be described in detail here.

[0129] In this embodiment, after obtaining the first insulation voltage sequence and the first total voltage sequence, determining whether the voltage is stable is based on the difference. This facilitates calculation and allows for faster determination of the first stable insulation voltage and the first stable total voltage, thereby improving detection efficiency. Furthermore, the first stable insulation voltage and the first stable total voltage are only determined when the voltage is stable and the first insulation voltage sequence and the first total voltage sequence are within the same time period. This ensures a correlation between the first stable insulation voltage and the first stable total voltage, thereby improving detection accuracy.

[0130] Figure 11 FIG. 1 is a flow chart of another battery pack insulation detection method according to an embodiment of the present invention. Figure 11 As shown, the method includes the following steps:

[0131] Step S1101: Obtain expected sampling time.

[0132] Specifically, the expected sampling time t i0 It can be the time during which the voltage is predicted to be in a stable state.

[0133] Step S1102 : After the first target switch is closed and the second target switch is opened, a first insulation voltage sequence and a first total voltage sequence are acquired according to an expected sampling time.

[0134] Specifically, see Figure 12 , the control chip starts timing after controlling the first target switch to close, and at the first timing time t i1 Equal to or greater than the first waiting time t sc1 and the expected sampling time t i0 and time (ie t i1 ≥t sc1 +t i0 When n is obtained from ADC iso First insulation voltage U iso1 and n bat The first total voltage U bat1 , thereby obtaining a first insulation voltage sequence and a first total voltage sequence.

[0135] First waiting time t sc1 The first target switch closing reaction waiting time can be t sc1 It includes the reaction time of the controller, the output time of the controller, the response time of the peripheral conversion circuit or the drive circuit, and the action time of the switch. The first waiting time t sc1 It can be configured in the control chip in advance by the designer.

[0136] In some embodiments, before the above step S1102, the battery pack insulation detection method further includes step b1:

[0137] Step b1: Determine the deviation correction time based on the last determined values ​​of the first insulation resistor and the second insulation resistor.

[0138] Specifically, due to changes in parameters (insulation resistance, capacitance of the first capacitor Cx, capacitance of the second capacitor Cy, and timing accuracy), the expected sampling time may change, and the deviation correction time Δt ip1 Amount used to characterize the expected variation in sampling time.

[0139] For example, the previously determined values ​​of the first insulation resistance and the second insulation resistance may be substituted into an empirical formula to determine the deviation correction time based on the empirical formula, wherein the empirical formula may be determined based on an experiment or simulation.

[0140] In other embodiments, the deviation correction time Δt ip1 It can be a fixed value, burned into the software at the factory.

[0141] At this time, the above step S1102 specifically includes: acquiring a first insulation voltage sequence and a first total voltage sequence according to the expected sampling time and the deviation correction time.

[0142] In one example, see Figure 13 , the control chip starts timing after controlling the first target switch to close, and at the first timing time t i1 Equal to or greater than the first waiting time t sc1 and the expected sampling time t i0 The sum of the deviation correction time △t ip1 Time (ie t i1 ≥t sc1 +t i0 -△t ip1 When n is obtained from ADC iso First insulation voltage U iso1 and n bat The first total voltage U bat1 , thereby obtaining a first insulation voltage sequence and a first total voltage sequence.

[0143] Step S1103 : determining a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence.

[0144] For details, please see Figure 4 Step S402 of the illustrated embodiment will not be described in detail here.

[0145] Step S1104 : After the second target switch is also closed, a second insulation voltage sequence and a second total voltage sequence are acquired according to the expected sampling time.

[0146] Specifically, see Figure 12 , the control chip starts timing after controlling the second target switch to close, and at the second timing time t i2 Equal to or greater than the second waiting time t sc2 and the expected sampling time t i0 and time (ie t i2 ≥t sc2 +t i0 When n is obtained from ADC iso Second insulation voltage U iso2 and n bat The second total voltage U bat2 , thereby obtaining the second insulation voltage sequence and the second total voltage sequence. Among them, the second waiting time t sc2 The second target switch closure reaction waiting time may be set.

[0147] In some embodiments, the battery pack insulation detection method further includes step b1. In this case, the above-mentioned step S1104 specifically includes: obtaining a second insulation voltage sequence and a second total voltage sequence according to the expected sampling time and the deviation correction time.

[0148] In one example, see Figure 13 , the control chip starts timing after controlling the second target switch to close, and at the second timing time t i2 Equal to or greater than the second waiting time t sc2 and the expected sampling time t i0 The sum of the deviation correction time △t ip1 Time (ie t i2 ≥t sc2 +t i0 -△t ip1 When n is obtained from ADC iso Second insulation voltage U iso2 and n bat The second total voltage U bat2 , thereby obtaining a second insulation voltage sequence and a second total voltage sequence.

[0149] Step S1105 : determining a second stable insulation voltage and a second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence.

[0150] For details, please see Figure 4 Step S404 of the illustrated embodiment will not be described in detail here.

[0151] Step S1106 : updating the expected sampling time according to the determination time of the first stable insulation voltage and the determination time of the second stable insulation voltage.

[0152] Exemplarily, after obtaining the determination time of the first stable insulation voltage and the determination time of the second stable insulation voltage, if the determination time of the first stable insulation voltage is greater than the determination time of the second stable insulation voltage, the expected sampling time is updated to the determination time of the first stable insulation voltage and the first waiting time t sc1 If the second stable insulation voltage is greater than the first stable insulation voltage determination time, the expected sampling time is updated to the second stable insulation voltage determination time and the second waiting time t sc2 difference.

[0153] Specifically, during the use of electric vehicles, the expected sampling time changes dynamically and needs to be periodically updated. For example, scenarios with a relatively long duration (on the order of seconds) such as vehicle startup, shutdown, parking, or waking from sleep can be selected to update the expected sampling time. The first expected sampling time can be an empirical value determined by the designer.

[0154] It should be noted that when updating the expected sampling time, the current i collected by the ADC must be within the current limit value i c Below, avoid battery voltage fluctuation. If i>i c , need to stop updating, when i≤i c Start again later.

[0155] For example, the expected sampling time is updated on a daily or weekly basis, which is not necessary. The updated expected sampling time overwrites the original data. In special circumstances such as vehicle maintenance, collision, or temperature fluctuations, the expected sampling time can be directly triggered to update.

[0156] In other implementations, the expected sampling time may be a fixed value, which is configured in advance in the control chip by a designer.

[0157] Step S1107 , determining the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage.

[0158] For details, please see Figure 3 Step S305 of the illustrated embodiment will not be described in detail here.

[0159] In this embodiment, the first insulation voltage sequence, the first total voltage sequence, the second insulation voltage sequence, and the second total voltage sequence are obtained based on the dynamically changing expected sampling time, so that the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage can be determined in advance, and the sampling frequency can be increased while ensuring the detection accuracy.

[0160] In some embodiments, the control chip can also determine the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance based on the last determined second stable insulation voltage, the last determined second stable total voltage, the currently determined first stable insulation voltage, and the currently determined first stable total voltage.

[0161] Specifically, see Figure 14 , if the formula obtained by substituting the first stable insulation voltage and the first stable total voltage determined each time into formula (1) is recorded as (i-1), and the formula obtained by substituting the first stable insulation voltage and the first stable total voltage determined each time into formula (2) is recorded as (i-2), i is an integer, i = 1, 2, 3, ..., n, then the resistance values ​​of the first insulation resistance and the second insulation resistance can be determined according to formula (i-2) and formula (i+1-1); or, the resistance values ​​of the first insulation resistance and the second insulation resistance can be determined according to formula (i-1) and formula (i+1-2).

[0162] In this embodiment, two adjacent sets of equations are combined to determine the insulation resistance value, which can double the insulation resistance acquisition frequency while keeping the sampling frequency unchanged, thereby increasing the insulation resistance detection frequency and breaking the cycle limitation.

[0163] Below Figure 1 Taking the insulation detection circuit shown in FIG. 1 as an example, the insulation detection process of the battery pack is described in detail.

[0164] For example, when performing insulation detection, the control chip can first send instructions to close the first switch S1, close the second switch S2, and open the third switch S3, and then determine the sampling time of the first insulation voltage and the first total voltage based on the first waiting time, the expected sampling time, and the deviation correction time.

[0165] After the sampling time is reached, n is continuously obtained from the ADC. iso Continuous U iso1, And get n bat Continuous U bat1 , and calculate the first difference and the second difference. Then continue to judge the relationship between the two differences and the time period until the first stable insulation voltage and the first total voltage that meet the requirements are obtained. If the data that meets the conditions is not obtained for a long time and the time limit T is exceeded max , then the insulation collection is ended; the valid data obtained needs to be analyzed for validity. If the data is invalid, obtain n iso Continuous U iso1, And get n bat Continuous U bat1 , if the number of invalid data occurrences exceeds the upper limit N max , then end this insulation collection; and maintain the insulation resistance value obtained in the last collection.

[0166] After obtaining the first stable insulation voltage and the first total voltage, the first stable insulation voltage and the first total voltage are substituted into the above formula 1 to obtain formula (1-1).

[0167] After obtaining formula (1-1), the control chip sends a command to close the third switch S3. Based on the second waiting time, the expected sampling time, and the deviation correction time, the control chip determines the sampling time for the second insulation voltage and the second total voltage. Similar operations are then performed to determine the second stable insulation voltage and the second total voltage.

[0168] After obtaining the second stable insulation voltage and the second total voltage, substitute the second stable insulation voltage and the second total voltage into the above formula 2 to obtain formula (1-2). Using formula (1-1) and formula (1-2), the insulation resistance value can be calculated.

[0169] In this embodiment, an electric device is also provided. The electric device includes a battery pack, an insulation detection circuit, and a control chip.

[0170] The insulation detection circuit includes an upper bridge arm circuit, a lower bridge arm circuit, a first target switch and a second target switch. The total positive terminal of the battery pack is connected to the upper bridge arm circuit, and the total negative terminal of the battery pack is connected to the lower bridge arm circuit. The first target switch is used to connect to the lower bridge arm circuit, and the second target switch is used to connect to the upper bridge arm circuit.

[0171] The control chip is used to control the closing of the first target switch, and to obtain a first insulation voltage sequence and a first total voltage sequence after the first target switch is closed and the second target switch is opened; the first insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the first target switch is closed, and the first total voltage sequence is the total voltage of multiple battery packs collected after the first target switch is closed. The insulation voltage sampling point is the position point connected to the grounding resistor in the lower bridge arm circuit.

[0172] The control chip is also used to determine the first stable insulation voltage and the first stable total voltage based on the first insulation voltage sequence and the first total voltage sequence; the control chip is also used to control the closure of the second target switch, and to obtain the second insulation voltage sequence and the second total voltage sequence after the second target switch is also closed; the second insulation voltage sequence is the voltage of multiple insulation voltage sampling points collected after the second target switch is also closed, and the second total voltage sequence is the total voltage of multiple battery packs collected after the second target switch is also closed; the control chip is also used to determine the second stable insulation voltage and the second stable total voltage based on the second insulation voltage sequence and the second total voltage sequence; the control chip is also used to determine the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance based on the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage.

[0173] The insulation detection circuit in this embodiment can be the above Figure 1 or Figure 2 The insulation detection circuit shown.

[0174] The control chip in this embodiment may refer to an application specific integrated circuit (ASIC), a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0175] An embodiment of the present invention further provides an electronic device, such as Figure 15 As shown, the electronic device includes: one or more processors 1510, a memory 1520, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. The various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process instructions executed in the electronic device, including instructions stored in or on the memory to display graphical information of the GUI on an external input / output device (such as a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple electronic devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 15 A processor 1510 is taken as an example.

[0176] Processor 1510 may be a central processing unit, a network processor, or a combination thereof. Processor 1510 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0177] The memory 1520 stores instructions that can be executed by at least one processor 1510, so as to enable at least one processor 1510 to execute the method shown in the above embodiment.

[0178] The memory 1520 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device, etc. In addition, the memory 1520 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 1520 may optionally include a memory remotely located relative to the processor 1510, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0179] Memory 1520 may include volatile memory, such as random access memory; memory may also include non-volatile memory, such as flash memory, hard disk or solid state drive; memory 1520 may also include a combination of the above types of memory.

[0180] The electronic device further includes a communication interface 1530 for the electronic device to communicate with other devices or a communication network.

[0181] The embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0182] A portion of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0183] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0184] In the description of this specification, the reference terms "this embodiment", "one embodiment", "some embodiments", "example", "specific example" or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples, unless they are contradictory.

[0185] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0186] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations shall all fall within the scope defined by the present invention.

Claims

1. A battery pack insulation detection method, characterized in that: The total positive terminal of the battery pack is connected to the upper bridge arm circuit in the insulation detection circuit, and the total negative terminal of the battery pack is connected to the lower bridge arm circuit in the insulation detection circuit. The insulation detection circuit further includes a first target switch and a second target switch. The first target switch is used to connect to the lower bridge arm circuit, and the second target switch is used to connect to the upper bridge arm circuit. The method includes: After the first target switch is closed and the second target switch is opened, a first insulation voltage sequence and a first total voltage sequence are acquired; the first insulation voltage sequence is the voltages of a plurality of insulation voltage sampling points acquired after the first target switch is closed, and the first total voltage sequence is the total voltage of a plurality of battery packs acquired after the first target switch is closed, and the insulation voltage sampling points are the locations in the lower bridge arm circuit connected to the grounding resistor; determining a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence; After the second target switch is also closed, a second insulation voltage sequence and a second total voltage sequence are acquired; the second insulation voltage sequence is the voltages of the plurality of insulation voltage sampling points acquired after the second target switch is also closed, and the second total voltage sequence is the total voltage of the plurality of battery packs acquired after the second target switch is also closed; determining a second stable insulation voltage and a second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence; The resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance are determined according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage, and the second stable total voltage.

2. The method according to claim 1, characterized in that The determining a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence includes: determining a first difference and a second difference, wherein the first difference is a difference between a maximum value and a minimum value in the first insulation voltage sequence, and the second difference is a difference between a maximum value and a minimum value in the first total voltage sequence; determining whether the first insulation voltage sequence and the first total voltage sequence are in the same time period; When the first difference is less than a first threshold, the second difference is less than a second threshold, and the first insulation voltage sequence and the first total voltage sequence are in the same time period, the target insulation voltage is determined as a first stable insulation voltage and the target total voltage is determined as the first stable total voltage; the target insulation voltage is the average value of the first insulation voltage sequence or the last sampling value in the first insulation voltage sequence, and the target total voltage is the average value of the first total voltage sequence or the last sampling value in the first total voltage sequence.

3. The method according to claim 2, characterized in that The determining whether the first insulation voltage sequence and the first total voltage sequence are in the same time period includes: When the first starting time and the second starting time are the same and the first ending time and the second ending time are the same, the first insulation voltage sequence and the first total voltage sequence are in the same time period; the first starting time is the starting time of the first insulation voltage sequence, the second starting time is the starting time of the first total voltage sequence, the first ending time is the ending time of the first insulation voltage sequence, and the second ending time is the ending time of the first total voltage sequence; or, When the first time period includes the second time period or the second time period includes the first time period, the first insulation voltage sequence and the first total voltage sequence are in the same time period; the first time period is the time period between the first starting time and the first ending time, and the second time period is the time period between the second starting time and the second ending time; or, When the difference between the first starting moment and the second starting moment is less than a preset sampling period, and / or when the difference between the first ending moment and the second ending moment is less than the preset sampling period, the first insulation voltage sequence and the first total voltage sequence are in the same time period; the preset sampling period is the sampling period of the first total voltage sequence or the sampling period of the first insulation voltage sequence.

4. The method according to claim 2, characterized in that The method further comprises: When the first difference is greater than or equal to the first threshold and / or when the second difference is greater than or equal to the second threshold, the first insulation voltage sequence and the first total voltage sequence are reacquired until the first stable insulation voltage and the first stable total voltage are determined.

5. The method according to any one of claims 1 to 4, characterized in that Before obtaining the first insulation voltage sequence and the first total voltage sequence, the method further includes: Get the expected sampling time; The obtaining of the first insulation voltage sequence and the first total voltage sequence includes: acquiring the first insulation voltage sequence and the first total voltage sequence according to the expected sampling time; The obtaining of the second insulation voltage sequence and the second total voltage sequence includes: The second insulation voltage sequence and the second total voltage sequence are acquired according to the expected sampling time.

6. The method according to claim 5, characterized in that After determining the second stable insulation voltage and the second stable total voltage, the method further includes: The expected sampling time is updated according to a time instant of determining the first stable insulation voltage and a time instant of determining the second stable insulation voltage.

7. The method according to claim 5, characterized in that Before obtaining the first insulation voltage sequence and the first total voltage sequence, the method further includes: determining a deviation correction time based on the last determined values ​​of the first insulation resistance and the second insulation resistance; The acquiring the first insulation voltage sequence and the first total voltage sequence according to the expected sampling time includes: Acquire the first insulation voltage sequence and the first total voltage sequence according to the expected sampling time and the deviation correction time; The acquiring, according to the expected sampling time, the second insulation voltage sequence and the second total voltage sequence, comprises: The second insulation voltage sequence and the second total voltage sequence are acquired according to the expected sampling time and the deviation correction time.

8. The method according to any one of claims 1 to 4, characterized in that The method further comprises: The resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance are determined according to the last determined second stable insulation voltage, the last determined second stable total voltage, the currently determined first stable insulation voltage, and the currently determined first stable total voltage.

9. An electrical device, characterized in that: The electrical equipment includes a battery pack, an insulation detection circuit and a control chip; The insulation detection circuit includes an upper bridge arm circuit, a lower bridge arm circuit, a first target switch and a second target switch, the total positive terminal of the battery pack is connected to the upper bridge arm circuit, the total negative terminal of the battery pack is connected to the lower bridge arm circuit, the first target switch is used to connect to the lower bridge arm circuit, and the second target switch is used to connect to the upper bridge arm circuit; The control chip is used to control the closing of the first target switch, and is used to obtain a first insulation voltage sequence and a first total voltage sequence after the first target switch is closed and the second target switch is opened; the first insulation voltage sequence is the voltages of multiple insulation voltage sampling points collected after the first target switch is closed, and the first total voltage sequence is the total voltage of multiple battery packs collected after the first target switch is closed. The insulation voltage sampling points are the locations in the lower bridge arm circuit that are connected to the grounding resistor; The control chip is further configured to determine a first stable insulation voltage and a first stable total voltage according to the first insulation voltage sequence and the first total voltage sequence; The control chip is further configured to control the second target switch to be closed, and to obtain a second insulation voltage sequence and a second total voltage sequence after the second target switch is also closed; the second insulation voltage sequence is the voltages of the plurality of insulation voltage sampling points acquired after the second target switch is also closed, and the second total voltage sequence is the total voltage of the plurality of battery packs acquired after the second target switch is also closed; The control chip is further configured to determine a second stable insulation voltage and a second stable total voltage according to the second insulation voltage sequence and the second total voltage sequence; The control chip is further used to determine the resistance values ​​of the upper bridge arm insulation resistance and the lower bridge arm insulation resistance according to the first stable insulation voltage, the first stable total voltage, the second stable insulation voltage and the second stable total voltage.

10. The electrical equipment according to claim 9, characterized in that: The first target switch includes a first switch and a second switch, the second target switch is a third switch, the upper bridge arm circuit includes an upper bridge arm insulation resistor, a first capacitor, a first resistor, and a second resistor, and the lower bridge arm circuit includes a lower bridge arm insulation resistor, a second capacitor, a third resistor, and a fourth resistor; One end of the upper bridge arm insulation resistor is connected to the total positive end, and the other end is connected to the chassis, one end of the lower bridge arm insulation resistor and one end of the first switch, and the other end of the lower bridge arm insulation resistor is connected to the total negative end; One end of the first capacitor is connected to the total positive end, the other end is connected to the other end of the upper bridge arm insulation resistor, one end of the first switch and one end of the second capacitor, and the other end of the second capacitor is connected to the total negative end; One end of the first resistor is connected to the total positive end, and the other end is connected to one end of the second resistor and one end of the third switch. The other end of the third switch is connected to the total negative end. The other end of the second resistor is connected to the other end of the first switch and one end of the third resistor. The other end of the third resistor is connected to one end of the second switch. The other end of the second switch is connected to one end of the fourth resistor. The other end of the fourth resistor is grounded.

11. An electronic device, characterized in that: include: A memory and a processor, wherein the memory stores computer instructions, and the processor executes the battery pack insulation detection method according to any one of claims 1 to 8 by executing the computer instructions.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable an electronic device to execute the battery pack insulation detection method according to any one of claims 1 to 8.

13. A computer program product, characterized in that The method comprises computer instructions for causing an electronic device to execute the battery pack insulation detection method according to any one of claims 1 to 8.