Semiconductor module

Abstract

A semiconductor module includes: a printed circuit board; and a plurality of insertion sheet terminals, wherein the plurality of insertion sheet terminals are located on the printed circuit board. The plurality of insert terminals comprise a plurality of signal terminals and a plurality of grounding terminals. The plurality of tab terminals are arranged along a first edge of the printed circuit board in a first direction, and each of the plurality of tab terminals extends in a second direction transverse to the first direction. Each of the plurality of signal terminals includes a first end portion adjacent to the first edge of the printed circuit board. The semiconductor module also includes an insulating member on the printed circuit board. The insulating member includes an extending portion and a plurality of protruding portions. Each of the plurality of protruding portions covers the first end portion of a respective signal terminal of the plurality of signal terminals.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor module. Background Art

[0002] The semiconductor module has a structure connecting a semiconductor chip and a tab terminal, wherein the semiconductor chip is arranged on a printed circuit board (PCB) corresponding to a substrate base area, the tab terminal is arranged on a first edge of the printed circuit board, and the wire is arranged on the printed circuit board. The semiconductor module can be installed in a test socket (socket) of automatic test equipment (ATE) to perform a test on the semiconductor module, or it can be installed in a socket of a mainboard to use the semiconductor module. The test socket of the automatic test equipment (ATE) and the socket of the mainboard may include socket pins corresponding to the tab terminals of the semiconductor module, and when the semiconductor module is installed in the test socket of the automatic test equipment (ATE) or when it is installed in the socket of the mainboard, the socket pins can be electrically and physically connected to the tab terminals of the semiconductor module.

[0003] Before installing a semiconductor module, the test socket of the automatic test equipment (ATE) or the socket of the mainboard may be in a charged state. This is because charges moved from other electronic devices may accumulate. When the semiconductor module is installed in the charged socket, when the signal terminals among the semiconductor module's plug-in terminals first contact the socket pins of the socket, the charge accumulated in the socket moves through the socket pins to the signal terminals of the semiconductor module, and then moves to the semiconductor chip through the signal terminals and signal wires. The socket, socket pins, signal terminals, and signal wires form a discharge path, and this discharge path may damage the internal circuit of the semiconductor chip, which may cause the product to malfunction and may lead to deterioration of signal integrity (SI). Summary of the Invention

[0004] In a semiconductor module including a blade terminal having a signal terminal and a ground terminal and being mountable in a socket, when the semiconductor module is mounted on the socket, an end portion of each signal terminal may be covered by an insulating member so that the ground terminal may contact a socket pin of the socket before the signal terminal.

[0005] In a semiconductor module including blade terminals having signal terminals and ground terminals and mountable in a socket, an end of each signal terminal and a tie-bar extending from each signal terminal may be covered by an insulating member without removing the tie-bar extending from the blade terminal.

[0006] A semiconductor module may include: a printed circuit board; a plurality of plug-in terminals, the plurality of plug-in terminals being located on the printed circuit board, wherein the plurality of plug-in terminals may include a plurality of signal terminals and a plurality of ground terminals, wherein the plurality of plug-in terminals are arranged along a first edge of the printed circuit board in a first direction, wherein each of the plurality of plug-in terminals extends in a second direction transverse to the first direction, and wherein each of the plurality of signal terminals may include a first end portion adjacent to the first edge of the printed circuit board; and a plurality of insulating members, the plurality of insulating members being located on the printed circuit board, wherein each of the plurality of insulating members covers the first end portion of a corresponding signal terminal of the plurality of signal terminals.

[0007] A semiconductor module may include: a printed circuit board; a plurality of plug-in terminals, the plurality of plug-in terminals being located on the printed circuit board, wherein the plurality of plug-in terminals may include a plurality of signal terminals and a plurality of ground terminals, wherein the plurality of plug-in terminals are arranged along a first edge of the printed circuit board in a first direction, wherein each of the plurality of plug-in terminals extends in a second direction transverse to the first direction, wherein each of the plurality of signal terminals may include a first end portion adjacent to the first edge of the printed circuit board; and an insulating member, the insulating member being located on the printed circuit board, wherein the insulating member may include an extending portion extending along the first edge of the printed circuit board in the first direction and a plurality of protruding portions extending from the extending portion along the second direction, and wherein each of the plurality of protruding portions covers the first end portion of a corresponding signal terminal of the plurality of signal terminals.

[0008] A semiconductor module may include: a printed circuit board; a plurality of semiconductor chips, the plurality of semiconductor chips being located on the printed circuit board; a plurality of plug-in terminals, the plurality of plug-in terminals being located on the printed circuit board, wherein the plurality of plug-in terminals may include a plurality of signal terminals electrically connected to the plurality of semiconductor chips and a plurality of ground terminals connected to ground, wherein the plurality of plug-in terminals are arranged along a first edge of the printed circuit board in a first direction, wherein each of the plurality of plug-in terminals extends in a second direction transverse to the first direction, and wherein each of the plurality of signal terminals may include a first end portion adjacent to the first edge of the printed circuit board; a plurality of first connecting bars, the plurality of first connecting bars being located on the printed circuit board, wherein each of the plurality of first connecting bars extends from a corresponding signal terminal among the plurality of signal terminals; a plurality of second connecting bars, the plurality of second connecting bars being located on the printed circuit board, wherein each of the plurality of second connecting bars extends from a corresponding ground terminal among the plurality of ground terminals; and a plurality of insulating members, the plurality of insulating members being located on the printed circuit board, wherein each of the plurality of insulating members covers the first end portion of a corresponding signal terminal among the plurality of signal terminals and the first connecting bar.

[0009] The end of each signal terminal may be covered by an insulating member so that when the semiconductor module is installed in the socket, the ground terminal can contact the socket pin of the socket before the signal terminal. Therefore, when the semiconductor module is installed in the socket, the discharge path of the charge accumulated in the socket, which may move to the semiconductor chip through the socket, the socket pin, the signal terminal and the signal wire and may damage the circuit in the semiconductor chip, can be eliminated, and the charge accumulated in the socket can be discharged to the ground through the ground terminal.

[0010] Without removing the connecting bars extending from the tab terminals, the ends of each signal terminal and the connecting bars extending from each signal terminal can be covered by an insulating member. Therefore, in the manufacturing process of the semiconductor module, a complex etch-back process for removing the connecting bars extending from the tab terminals can be omitted, thereby reducing the turnaround time (TAT) of the semiconductor module manufacturing process and the manufacturing cost of the semiconductor module. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a perspective view showing a semiconductor module aligned on a socket so as to be mounted in the socket.

[0012] Figure 2 It shows the order in which Figure 1 The semiconductor modules are mounted on Figure 1 Cross-sectional view of the process in the socket. Figure 2 The semiconductor modules and sockets are based on Figure 1 The semiconductor module and the socket are shown in a cross section along line BB'.

[0013] Figure 3 is a perspective view showing a semiconductor module mounted in a socket.

[0014] Figure 4 is shown when the semiconductor module is installed in the socket Figure 1 An enlarged perspective view of region A of a semiconductor module showing contact between the tab terminals and the socket pins of a socket.

[0015] Figure 5 is a perspective view showing a semiconductor module of the embodiment.

[0016] Figure 6 It shows Figure 5 An enlarged perspective view of region C of a semiconductor module.

[0017] Figure 7 yes Figure 6 sectional views of the semiconductor module taken along line DD′ and line EE′.

[0018] Figure 8 FIG. 1 is a diagram showing a state in which the semiconductor module of the embodiment is mounted in a socket. Figure 5 A perspective view of the contact between the tab terminals of region C of the semiconductor module and the socket pins of the socket.

[0019] Figure 9 It shows Figure 5 A perspective view of an exemplary variation of a semiconductor module.

[0020] Figure 10 It shows Figure 9 An enlarged perspective view of a region F of a semiconductor module.

[0021] Figure 11 is a perspective view showing a semiconductor module according to another embodiment.

[0022] Figure 12 It shows Figure 11 An enlarged perspective view of region G of a semiconductor module.

[0023] Figure 13 yes Figure 12 sectional views of the semiconductor module taken along lines HH′ and II′.

[0024] Figure 14 FIG. 1 is a diagram showing a state in which the semiconductor module of the embodiment is mounted in a socket. Figure 11 A perspective view of the contact between the tab terminals of region G of the semiconductor module and the socket pins of the socket.

[0025] Figure 15 It shows Figure 11 A perspective view of an exemplary variation of a semiconductor module.

[0026] Figure 16 It shows Figure 15 An enlarged perspective view of a region J of a semiconductor module.

[0027] Figure 17 is a perspective view showing a semiconductor module according to still another embodiment.

[0028] Figure 18 It shows Figure 17 An enlarged perspective view of a region K of a semiconductor module.

[0029] Figure 19 yes Figure 18 sectional views of the semiconductor module taken along line LL' and line MM'.

[0030] Figure 20 FIG. 1 is a diagram showing a state in which the semiconductor module of the embodiment is mounted in a socket. Figure 17 A perspective view of the contact between the tab terminals of region K of the semiconductor module and the socket pins of the socket.

[0031] Figure 21 It shows Figure 17 A perspective view of an exemplary variation of a semiconductor module.

[0032] Figure 22 It shows Figure 21 An enlarged perspective view of a region N of a semiconductor module. DETAILED DESCRIPTION

[0033] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement them. The present disclosure can be implemented in various forms and may not necessarily be limited to the embodiments described herein.

[0034] The drawings and description should be regarded as illustrative in nature and not restrictive.Throughout the specification, like reference numerals designate like elements.

[0035] Furthermore, in the drawings, the size and thickness of each element may be arbitrarily illustrated for ease of description, and the present disclosure is not necessarily limited to those elements illustrated in the drawings.

[0036] Throughout this specification and the appended claims, when it is described that an element is “coupled or connected” to another element, the element may be “directly coupled or connected” to the other element or “indirectly coupled or connected” to the other element through a third element. In addition, unless explicitly described to the contrary, the word “comprise” and expressions such as “comprising” or “having” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0037] It should be understood that when an element, such as a layer, film, region, area, or substrate, is referred to as being "on" another element, it can be directly on the other element, or intervening elements may be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements. Furthermore, in this specification, the terms "on" or "over" refer to being positioned above or below an object portion, and do not necessarily mean being positioned above an object portion based on the direction of gravity.

[0038] Furthermore, throughout the specification, the phrase “in a top view” or “on a plane” means observing a target portion from the top, and the phrase “in a cross-sectional view” or “on a cross section” means observing a cross section formed by vertically cutting the target portion from the side.

[0039] Hereinafter, a semiconductor module 10 of the embodiment will be described with reference to the drawings.

[0040] Figure 1 is a perspective view showing the semiconductor module 10 aligned with the socket 20 so as to be mounted in the socket 20 .

[0041] refer to Figure 1 The semiconductor module 10 may include a printed circuit board (PCB) 110, a semiconductor chip 120, a plug-in terminal 130, and a tie-bar 132E (a tie-bar whose portion is removed by an etch-back process, see FIG. Figure 4 In an embodiment, the semiconductor module 10 may include a memory module. In an embodiment, the semiconductor module 10 may include a dual inline memory module (DIMM), a small outline dual inline memory module (SODIMM), an unbuffered dual inline memory module (UDIMM), a registered dual inline memory module (RDIMM), a load-reduced dual inline memory module (LRDIMM), a hyper-cloud dual inline memory module (HDIMM), a non-volatile DIMM (NVDIMM), a fully buffered dual inline memory module (FB-DIMM), a CXL memory module (CMM), a multi-level buffered DIMM (MRDIMM), or a low-power compression attached memory module (LPCAMM).

[0042] Printed circuit board (PCB) 110 may be a substrate on which semiconductor chip 120 is mounted. In an embodiment, printed circuit board (PCB) 110 may have a multilayer structure in which core layers and prepregs are alternately stacked, with solder masks stacked at the uppermost and lowermost portions. In an embodiment, the core layer may include FR-4 and metal traces attached to the top and bottom of the FR-4.

[0043] In a multilayer structure, the printed circuit board (PCB) 110 may include a ground conductor layer, a power conductor layer, and a signal conductor layer. The ground conductor layer may be a bulk layer connected to the ground. The power conductor layer may be a bulk layer connected to a power source and providing a path for supplying power from the power source. The signal conductor layer may be a layer having a conductor pattern formed therein. The ground conductor layer, the power conductor layer, and the signal conductor layer may be arranged at different levels and may be connected by pathways.

[0044] The semiconductor chip 120 may be mounted on a surface of a printed circuit board (PCB) 110. The semiconductor chip 120 may be mounted on one surface or both surfaces of the printed circuit board (PCB) 110. In an embodiment, the semiconductor chips 120 may be arranged in a straight line along a first direction (X direction). In an embodiment, the semiconductor chip 120 may be mounted on the printed circuit board (PCB) 110 by a flip-chip method. In an embodiment, the semiconductor chip 120 may be a memory chip or a logic chip. In an embodiment, when the semiconductor chip 120 is a memory chip, the semiconductor chip 120 may include a dynamic random access memory (DRAM), a static random access memory (SRAM), a flash memory, an erasable programmable read-only memory (EPROM), a phase change random access memory (PRAM), a magnetic random access memory (MRAM), a resistive random access memory (RRAM), or a spin-transfer torque magnetic random access memory (STT-MRAM).

[0045] The plug-in terminal 130 can be arranged along the first edge 110E of the printed circuit board (PCB) 110. The plug-in terminal 130 can be arranged on both surfaces of the printed circuit board (PCB) 110. The plug-in terminal 130 can be arranged along the first edge 110E of the printed circuit board (PCB) 110 in a first direction (X direction). Each plug-in terminal 130 can be spaced apart from the adjacent plug-in terminal 130 at a predetermined interval in the first direction (X direction). Each plug-in terminal 130 can extend in a second direction (Y direction) transverse to the first direction (X direction). In an embodiment, the plug-in terminal 130 can be formed by performing an electroplating process or an electroless plating process. In an embodiment, the plug-in terminal 130 may include copper (Cu), nickel (Ni) or gold (Au).

[0046] The plug terminal 130 may include a signal terminal 141, a ground terminal 151, and a power terminal (not shown). The signal terminal 141 may include a data terminal for inputting or outputting data, an address terminal for inputting an address signal, a command terminal for inputting a command signal, a clock terminal for inputting a clock signal, and a control terminal for inputting a control signal. The signal terminal 141 may be electrically connected to a signal conductor layer within the multilayer structure of the printed circuit board (PCB) 110 and a signal conductor line on the surface of the printed circuit board (PCB) 110. The ground terminal 151 may be electrically connected to a ground conductor layer within the multilayer structure of the printed circuit board (PCB) 110. The power terminal may be electrically connected to a power conductor layer within the multilayer structure of the printed circuit board (PCB) 110. In an embodiment, the plug terminal 130 may also include a plated terminal or a non-connected terminal.

[0047] Connecting rod 132E (reference Figure 4 ) can be arranged along the first edge 110E of the printed circuit board (PCB) 110. The connecting rods 132E can be arranged on both surfaces of the printed circuit board (PCB) 110. Each connecting rod 132E can extend from the first end (or first end portion) of the corresponding plug terminal 130 toward the first edge 110E of the printed circuit board (PCB) 110. The first end of the plug terminal 130 can be defined as the end of the plug terminal 130 that is located adjacent to the first edge 110E of the printed circuit board (PCB) 110. The second end (or second end portion) of the plug terminal 130 can be defined as the end of the plug terminal 130 that is located away from the first edge 110E of the printed circuit board (PCB) 110. The connecting rods 132E can be arranged along the first edge 110E of the printed circuit board (PCB) 110 in a first direction (X direction). Each connecting rod 132E can be spaced apart from an adjacent connecting rod 132E in the first direction (X direction) at a predetermined interval. Each connecting rod 132E may extend in a second direction (Y direction) transverse to the first direction (X direction).

[0048] The connecting rods 132E can be used to perform electroplating on the tab terminals 130 and the wires. After the electroplating is performed, the connecting rods 132E are cut together when the flat plate of the printed circuit board (PCB) 110 is cut. In this case, when the line width of the connecting rods 132E in the first direction (X direction) is large, the tab terminals 130 may be damaged during the cutting process. Therefore, the line width of the connecting rods 132E in the first direction (X direction) can be smaller than the line width of the tab terminals 130 in the first direction (X direction). Each connecting rod 132E can extend from the leftmost portion, the rightmost portion, or the portion between the leftmost and rightmost portions of the first end of the corresponding tab terminal 130. In an embodiment, the connecting rods 132E may include copper (Cu), nickel (Ni), or gold (Au).

[0049] The semiconductor module 10 may include conductive lines connecting the semiconductor chip 120, other components (not shown), and the tab terminals 130. These conductive lines may have any pattern on the printed circuit board (PCB) 110.

[0050] The socket 20 may be located on an automatic test equipment (ATE) or a mainboard. The semiconductor module 10 may be mounted in the socket 20, and the socket 20 may couple and support the semiconductor module 10. The socket 20 may electrically connect the automatic test equipment (ATE) and the semiconductor module 10 or electrically connect the mainboard and the semiconductor module 10.

[0051] The socket 20 may include a frame 210, an inserting portion 220, and socket pins 230 (see FIG. Figure 2 ). The frame 210 may support the semiconductor module 10. The frame 210 may be formed of an insulating material. In an embodiment, the insulating material may include plasma enhanced oxide (PEOX), tetraethyl orthosilicate (TEOS), ethyl borosilicate (BTEOS), ethyl phosphoorthosilicate (PTEOS), ethyl borophosphoorthosilicate (BPTEOS), borosilicate glass (BSG), phosphoorthosilicate glass (PSG), or borophosphoorthosilicate glass (BPSG).

[0052] The insertion portion 220 may have a recessed structure so that the semiconductor module 10 is inserted therein. The lower portion of the semiconductor module 10 may be inserted into the insertion portion 220. The tab terminals 130 of the semiconductor module 10 may be inserted into the insertion portion 220.

[0053] The socket pins 230 may be located at the insertion portion 220 (see Figure 2 ) on the inner surface of the socket pins 230. The socket pins 230 may be arranged along a first direction (X direction). Each socket pin 230 may be spaced apart from adjacent socket pins 230 at a predetermined interval in the first direction (X direction). Each socket pin 230 may extend in a second direction (Y direction) transverse to the first direction (X direction). Each socket pin 230 may correspond to a corresponding plug-in terminal 130. In an embodiment, the socket pins 230 may include at least one of copper (Cu), aluminum (Al), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), tin (Sn), lead (Pb), titanium (Ti), chromium (Cr), palladium (Pd), indium (In), zinc (Zn) and carbon (C), or may include an alloy containing at least one of them.

[0054] Figure 2 2 are cross-sectional views sequentially showing a process of mounting the semiconductor module 10 in the socket 20 . Figure 2 The semiconductor module 10 and the socket 20 are based on Figure 1The semiconductor module 10 and the socket 20 are shown in a cross section along line BB′.

[0055] refer to Figure 2 , step (a) of aligning the semiconductor module 10 in the socket 20, step (b) of the semiconductor module 10 entering the insertion portion 220 of the socket 20 and starting to contact the socket pins 230, and step (c) of installing the semiconductor module 10 in the insertion portion 220 of the socket 20 can be performed sequentially.

[0056] Step (a) may be a step for aligning the semiconductor module 10 on the socket 20 so as to install the semiconductor module 10 in the socket 20. The socket 20 may include a fixing portion 221 within the frame 210. The fixing portion 221 may fix the socket pins 230 to the frame 210. The socket pins 230 may extend in the second direction (Y direction). The socket pins 230 may include a first extending portion 231, a contact portion 232, and a second extending portion 233. The lower portion of the first extending portion 231 may be fixed to the frame 210 via the fixing portion 221 and may be electrically connected to automatic test equipment (ATE) or a mainboard. As the first extending portion 231 extends upward, its upper portion may extend toward the insertion portion 220 of the socket 20. The contact portion 232 may be the portion that contacts the tab terminals 130 of the semiconductor module 10 installed in the insertion portion 220 of the socket 20. As the second extending portion 233 extends upward, it may extend toward the exterior of the frame 210. The socket pins 230 may have elasticity (ie, the socket pins 230 may bend or move during insertion of the semiconductor module 10 and then return to an unbent state when the semiconductor module 10 is removed).

[0057] Step (b) may be a step in which the semiconductor module 10 enters the insertion portion 220 of the socket 20 and comes into contact with the socket pins 230. The semiconductor module 10 may enter the insertion portion 220 while pushing the socket pins 230. Since the socket pins 230 have elasticity, the socket pins 230 may be pushed by the entry of the semiconductor module 10 to move in the outer direction of the frame 210 (in the direction of the outermost portion). Figure 2 When the semiconductor module 10 comes into contact with the contact portion 232 , the contact portion 232 may come into contact at the lowermost portion of each of the blade terminals 130 of the semiconductor module 10 .

[0058] Step (c) may be a step for completing the insertion of the semiconductor module 10 into the insertion portion 220 of the socket 20. Since the socket pins 230 are elastic, by pushing the socket pins 230 to move in the outer direction of the frame 210, elastic force can be applied in the inner direction of the frame 210, so that the socket pins 230 can fix (i.e., clamp and fix) the semiconductor module 10 in the frame 210.

[0059] In the present disclosure, although the socket 20 including the fixing portion 221 and the socket pin 230 including the first extending portion 231, the contact portion 232 and the second extending portion 233 within the frame 210 are illustrated and described, it is not limited thereto, and the socket 20 and the socket pin 230 having various shapes and structures may be included within the scope of the present disclosure.

[0060] Figure 3 is a perspective view showing the semiconductor module 10 mounted in the socket 20 .

[0061] refer to Figure 3 , the semiconductor module 10 can be installed in the socket 20. The frame 210 of the socket 20 can support the semiconductor module 10. The semiconductor module 10 can be located in the insertion portion 220 of the socket 20. The socket pins 230 can fix the semiconductor module 10. The socket pins 230 can electrically connect the semiconductor module 10 to automatic test equipment (ATE) or a mainboard. Each socket pin 230 can correspond to a corresponding plug-in terminal 130 among the plug-in terminals 130 of the semiconductor module 10.

[0062] Figure 4 FIG. 1 shows the state when the semiconductor module 10 is mounted in the socket 20. Figure 1 A perspective view of the contact between the tab terminals 130 of the region A of the semiconductor module 10 and the socket pins 230 of the socket 20 .

[0063] Before the semiconductor module 10 is installed, the test socket of the automatic test equipment (ATE) 20 or the socket 20 of the mainboard may be in a charged state due to the accumulation of charge e transferred from other electronic devices. Therefore, when the semiconductor module 10 is installed in the charged socket 20, if the signal terminal 141 among the blade terminals 130 of the semiconductor module 10 first contacts the socket pin 230 of the charged socket 20, the charge e accumulated in the socket 20 may move to the signal terminal 141 of the semiconductor module 10 through the socket pin 230 contacting the signal terminal 141, and may move to the semiconductor chip 120 through the signal terminal 141 via the signal wire 143. The socket 20, the socket pin 230, the signal terminal 141, and the signal wire 143 may form a discharge path, and this discharge path may damage the circuit within the semiconductor chip 120, which may prevent the product from operating or degrade the signal integrity (SI).

[0064] Figure 5 is a perspective view showing the semiconductor module 10 of the embodiment.

[0065] refer to Figure 5 , the semiconductor module 10 may include an insulating member 160. The insulating member 160 may be provided on the printed circuit board (PCB) 110. Each insulating member 160 may cover the first end portion (or first end) of the corresponding signal terminal 141 and the first connecting bar 142 (see FIG. 1 ) extending from the first end portion and not removed by the etching back process. Figure 6 The first end portion may be defined as a surface having a predetermined area that contacts the socket pin 230 when the insulating member 160 is not present, is adjacent to the first edge 110E of the printed circuit board (PCB) 110, and has a predetermined area. The insulating member 160 may not cover the ground terminal, the power terminal, the plating terminal, or the non-connected terminal.

[0066] The insulating member 160 may be provided along the first edge 110E of the printed circuit board (PCB) 110. The insulating member 160 may be provided on both surfaces of the printed circuit board (PCB) 110. The insulating members 160 may be arranged along the first edge 110E of the printed circuit board (PCB) 110 in a first direction (X direction). Each insulating member 160 may be spaced apart from an adjacent insulating member 160 at a predetermined interval in the first direction (X direction).

[0067] Figure 6 It shows Figure 5 FIG. 1 is an enlarged perspective view of a region C of a semiconductor module 10 .

[0068] refer to Figure 6, the semiconductor module 10 may include signal terminals 141 and ground terminals 151 corresponding to a portion of the plug terminals 130. The signal terminals 141 and the ground terminals 151 may be provided on a printed circuit board (PCB) 110. The signal terminals 141 and the ground terminals 151 may be provided along a first edge 110E of the printed circuit board (PCB) 110. The signal terminals 141 and the ground terminals 151 may be arranged along the first edge 110E of the printed circuit board (PCB) 110 in a first direction (X direction). The signal terminals 141 may be spaced apart from the ground terminals 151 at a predetermined interval in the first direction (X direction). The signal terminals 141 and the ground terminals 151 may extend in a second direction (Y direction) transverse to the first direction (X direction). Each signal terminal 141 may have a first end and a second end. The first end may be defined as the end of the signal terminal 141 that is located adjacent to the first edge 110E of the printed circuit board (PCB) 110. The second end may be defined as one end, among both ends of the signal terminal 141 , located at a position away from the first edge 110E of the printed circuit board (PCB) 110 .

[0069] The semiconductor module 10 may include a connecting bar 132 that has not been removed by the etch-back process. The connecting bar 132 may include a first connecting bar 142 and a second connecting bar 152. The first connecting bar 142 and the second connecting bar 152 may be disposed on a printed circuit board (PCB) 110. The first connecting bar 142 may extend from the first end of the signal terminal 141 toward the first edge 110E of the printed circuit board (PCB) 110 to the first edge 110E of the printed circuit board (PCB) 110. The second connecting bar 152 may extend from the first end of the ground terminal 151 toward the first edge 110E of the printed circuit board (PCB) 110 to the first edge 110E of the printed circuit board (PCB) 110. The first connecting bar 142 and the second connecting bar 152 may be arranged along the first edge of the printed circuit board (PCB) 110 in a first direction (X direction). The first connecting bar 142 may be spaced apart from the second connecting bar 152 at a predetermined interval in the first direction (X direction). The first connecting bar 142 and the second connecting bar 152 may extend in a second direction (Y direction) that is transverse to the first direction (X direction). The line width of the first connecting bar 142 in the first direction (X direction) can be smaller than the line width of the signal terminal 141 in the first direction (X direction). The line width of the second connecting bar 152 in the first direction (X direction) can be smaller than the line width of the ground terminal 151 in the first direction (X direction). The first connecting bar 142 can extend from the leftmost portion, the rightmost portion, or a portion between the leftmost and rightmost portions of the first end of the signal terminal 141. The second connecting bar 152 can extend from the leftmost portion, the rightmost portion, or a portion between the leftmost and rightmost portions of the first end of the ground terminal 151.

[0070] During the manufacturing process of the semiconductor module 10, an etch-back process may be performed to remove the connecting bars 132 extending from the tab terminals 130. The etch-back process may be performed through a complex process including forming a photoresist, exposing and developing the formed photoresist to form a photoresist pattern, etching the connecting bars, and removing the photoresist pattern. This etch-back process is performed through various processes, resulting in a long turnaround time (TAT) and increased manufacturing costs for the semiconductor module.

[0071] According to the present disclosure, the first connecting bar 142 extending from the first end of each signal terminal 141 can be covered by the insulating member 160 without removing the connecting bar 132 extending from the plug terminal 130. Therefore, in the manufacturing process of the semiconductor module 10, the complex etch-back process for removing the connecting bar 132 extending from the plug terminal 130 can be omitted. Therefore, the turnaround time (TAT) required to manufacture the semiconductor module 10 can be reduced, and the manufacturing cost of the semiconductor module 10 can be reduced.

[0072] The semiconductor module 10 may include a signal wire 143. The signal wire 143 may be provided on a printed circuit board (PCB) 110. The signal wire 143 may extend from a second end of the signal terminal 141 in a direction toward the semiconductor chip 120.

[0073] The semiconductor module 10 may include a ground conductor 153. The ground conductor 153 may be provided on a printed circuit board (PCB) 110. The ground conductor 153 may extend from the second end of the ground terminal 151 in a direction toward a through hole 154. The through hole 154 may be connected to a ground conductor layer within the printed circuit board (PCB) 110.

[0074] The semiconductor module 10 may include an insulating member 160. The insulating member 160 may be disposed on a printed circuit board (PCB) 110. Each insulating member 160 may cover the first end of the corresponding signal terminal 141 and the first connecting bar 142 that has not been removed by the etch-back process. The insulating member 160 may not cover the ground terminal, the power terminal, the electroplating terminal, or the unconnected terminal. The insulating member 160 may be spaced apart from the ground terminal, the power terminal, the electroplating terminal, or the unconnected terminal. As shown in the figure, the insulating member 160 may be disposed along a first edge 110E of the printed circuit board (PCB) 110. The insulating member 160 may be arranged along the first edge 110E of the printed circuit board (PCB) 110 in a first direction (X direction).

[0075] Each insulating member 160 may include a first region R1 and a second region R2 defined by a plane dividing the insulating member 160. The first region R1 of the insulating member 160 may contact the printed circuit board (PCB) 110. The second region R2 of the insulating member 160 may contact the signal terminal 141. The second region R2 of the insulating member 160 may be located on the first end portion of the signal terminal 141 and the first connecting bar 142 that has not been removed by the etch-back process, and may cover the first end portion of the signal terminal 141 and the first connecting bar 142 that has not been removed by the etch-back process.

[0076] Each signal terminal 141 may include a first surface exposed to air (i.e., the first surface is exposed to the external environment and is not covered by anything). Each ground terminal 151 may include a second surface exposed to air (i.e., the second surface is exposed to the external environment and is not covered by anything). The first surface and the second surface may be flat surfaces defined by a first direction (X direction) and a second direction (Y direction). Since the first end of the signal terminal 141 is covered by the insulating member 160 and the ground terminal 151 is not covered by the insulating member 160, the area of ​​the first surface may be smaller than the area of ​​the second surface. A first length D1 from the first edge 110E of the printed circuit board (PCB) 110 in the second direction (Y direction) to the exposed first surface is longer than a second length D2 from the first edge 110E of the printed circuit board (PCB) 110 in the second direction (Y direction) to the exposed second surface.

[0077] The insulating member 160 can be formed of a material that can withstand the force when the semiconductor module 10 is inserted into the socket 20 and does not cause defects when the semiconductor module 10 is repeatedly inserted into the socket 20 (for example, the insulating member 160 changes in appearance, the insulating member 160 breaks, or the signal terminal is exposed due to the loss of at least a portion of the insulating member 160). In an embodiment, the insulating member 160 may include a photo solder resist (PSR). The PSR may be an insulating material used in the manufacturing process of the printed circuit board (PCB) 110 and is configured to coat the surface of the printed circuit board (PCB) 110 to protect the circuit. In an embodiment, the insulating member 160 may include a coating material. The coating material may be a material that can improve the mechanical strength by being applied to the device to prevent it from being damaged. In an embodiment, the coating material may include polyurethane acrylate, urethane acrylate, polymethyl methacrylate (acrylic), modified acrylate, or epoxy resin.

[0078] Figure 7 yes Figure 6 The cross-sectional view of the semiconductor module 10 taken along the line DD' and the line EE' is shown in FIG. Figure 6The semiconductor module 10 is a cross-sectional view taken along the line D-D', and the cross section (B) shows Figure 6 FIG. 1 is a cross-sectional view of the semiconductor module 10 taken along line EE′.

[0079] refer to Figure 7 In cross section (A), signal terminals 141, signal conductors 143, and an insulating member 160 may be disposed on a printed circuit board (PCB) 110. The insulating member 160 may include a first region R1 covering the printed circuit board (PCB) 110 and a second region R2 covering the first end of the signal terminal 141. The first region R1 of the insulating member 160 may be located at a first level, and the second region R2 of the insulating member 160 may be located at a second level higher than the first level. With respect to the contact surface between the printed circuit board (PCB) 110 and the insulating member 160, the surface of the insulating member 160 may have a first height H1 in the first region R1, and the surface of the insulating member 160 may have a second height H2 higher than the first height H1 in the second region R2. In other words, the surface of the first region is located at a first level relative to the contact surface of the PCB 110, and the surface of the second region is located at a second level relative to the contact surface of the PCB 110, with the second level being located further outward than the first level relative to the contact surface of the PCB 110 (i.e., along the Z direction).

[0080] In cross section (B), the signal terminal 141, the first connecting bar 142 not removed by the etch-back process, and the insulating member 160 may be disposed on the printed circuit board (PCB) 110. The insulating member 160 may include a second region R2 covering the first end portion of the signal terminal 141 and the first connecting bar 142 not removed by the etch-back process.

[0081] Figure 8 FIG. 1 is a diagram showing a state in which the semiconductor module 10 of the embodiment is mounted in the socket 20. Figure 5 A perspective view of the semiconductor module 10 in region C showing contact between the tab terminals 130 and the socket pins 230 of the socket 20 .

[0082] refer to Figure 8, the first end of the signal terminal 141 may be covered by the insulating member 160, and the ground terminal 151 may not be covered by the insulating member 160. Therefore, when the semiconductor module 10 is installed in the socket 20 in a charged state, the ground terminal 151 or the second connecting bar 152, which is not covered by the insulating member 160, may contact the socket pin 230 of the socket 20 before the signal terminal 141, whose first end is covered by the insulating member 160. The charge e accumulated in the socket 20 can move through the socket pin 230 contacting the ground terminal 151 or the second connecting bar 152, move through the ground terminal 151 to the through-hole 154 via the ground wire 153, and be discharged to the ground through the ground wire layer of the printed circuit board (PCB) 110. The discharge path can be formed as a path through the socket 20, the socket pin 230, the ground terminal 151 (or the ground terminal 151 through the second connecting bar 152), the ground wire 153, the through-hole 154, the ground wire layer, and the ground. Therefore, according to the present disclosure, since a discharge path to the ground is formed, damage to circuits within the semiconductor chip 120 and degradation of signal integrity (SI) caused by charges e accumulated in the socket 20 moving to the semiconductor chip 120 can be prevented.

[0083] Figure 9 It shows Figure 5 1 is a perspective view of an exemplary variation of a semiconductor module 10 . Figure 10 It shows Figure 9 FIG. 1 is an enlarged perspective view of a region F of a semiconductor module 10 .

[0084] refer to Figure 9 and Figure 10 , the semiconductor module 10 may include an insulating member 161. The insulating member 161 may be provided on the printed circuit board (PCB) 110. The insulating member 161 may not cover the ground terminal, the power terminal, the plating terminal, or the unconnected terminal. The insulating member 161 may be spaced apart from the ground terminal, the power terminal, the plating terminal, or the unconnected terminal. The insulating member 161 may be provided along the first edge 110E of the printed circuit board (PCB) 110.

[0085] The insulating member 161 may include an extension portion 161E and a protrusion 161P. The extension portion 161E may extend along the first edge 110E of the printed circuit board (PCB) 110 in the first direction (X direction). The extension portion 161E may be located between the tab terminal 130 and the first edge 110E of the printed circuit board (PCB) 110. The extension portion 161E may contact the printed circuit board (PCB) 110 and the connecting bars 132 that have not been removed by the etch-back process. The extension portion 161E may cover a portion of each of the connecting bars 132 that have not been removed by the etch-back process. The extension portion 161E may be spaced apart from the tab terminal 130. The extension portion 161E may be spaced apart from the signal terminal 141 and the ground terminal 151.

[0086] The protrusion 161P may extend from the extension 161E in the second direction (Y direction). The protrusion 161P may be integrally formed with the extension 161E. The protrusion 161P may be provided with a step relative to the extension 161E in the second direction (Y direction) (i.e., the protrusion 161P extends above the extension 161E in the Y direction). The protrusions 161P may be arranged along the first edge 110E of the printed circuit board (PCB) 110 in the first direction (X direction). Each protrusion 161P may contact the printed circuit board (PCB) 110, the signal terminal 141, and the first connecting bar 142 that has not been removed by the etch-back process. Each protrusion 161P may cover a portion of the first connecting bar 142 that has not been removed by the etch-back process and the first end of the signal terminal 141. The first end may be defined as a surface having a predetermined area that contacts the socket pin 230 when the insulating member 161 is not present, is adjacent to the first edge 110E of the printed circuit board (PCB) 110, and is spaced apart from the ground terminal 151. Each protrusion 161P may be spaced apart from adjacent protrusions 161P at predetermined intervals in the first direction (X direction). Each protrusion 161P may include a first region R1 and a second region R2 defined by a plane dividing the protrusion 161P. The first region R1 may contact the printed circuit board (PCB) 110. The second region R2 may contact the first end of the signal terminal 141 and the first connecting bar 142 that has not been removed by the etch-back process.

[0087] Figure 11 is a perspective view showing a semiconductor module 10 according to another embodiment. Figure 12 It shows Figure 11 FIG. 1 is an enlarged perspective view of a region G of a semiconductor module 10 .

[0088] refer to Figure 11 and Figure 12, the semiconductor module 10 may include insulating members 160. Each insulating member 160 may cover the first end portion of the corresponding signal terminal 141 and the first connecting bar 142E extending from the first end portion and having a portion not removed by the etch-back process.

[0089] The semiconductor module 10 may include a plurality of connecting bars 132E, portions of which are not removed by the etch-back process. The connecting bars 132E, portions of which are not removed by the etch-back process, may include a first connecting bar 142E and a second connecting bar 152E. The first connecting bar 142E and the second connecting bar 152E may be disposed on a printed circuit board (PCB) 110. The first connecting bar 142E may extend from a first end of a signal terminal 141 toward a first edge 110E of the printed circuit board (PCB) 110. The second connecting bar 152E may extend from a first end of a ground terminal 151 toward the first edge 110E of the printed circuit board (PCB) 110. The first connecting bar 142E and the second connecting bar 152E may be arranged along the first edge of the printed circuit board (PCB) 110 in a first direction (X direction).

[0090] The semiconductor module 10 may include insulating members 160. Each insulating member 160 may include a first region R1 and a second region R2 defined by a plane dividing the insulating member 160. The first region R1 of the insulating member 160 may contact the printed circuit board (PCB) 110. The second region R2 of the insulating member 160 may contact the signal terminal 141. The second region R2 of the insulating member 160 may cover the first end portion of the signal terminal 141 and a portion of the first connecting bar 142E that has not been removed by the etch-back process.

[0091] Figure 13 yes Figure 12 The cross-sectional view of the semiconductor module 10 taken along the line H-H' and the line II'. The cross section (A) shows Figure 12 The cross section of the semiconductor module 10 is taken along the line H-H', and the cross section (B) shows Figure 12 FIG. 1 is a cross section of the semiconductor module 10 taken along line II′.

[0092] refer to Figure 13In cross section (A), the signal terminals 141, the signal conductors 143, and the insulating member 160 may be disposed on the printed circuit board (PCB) 110. The insulating member 160 may include a first region R1 covering the printed circuit board (PCB) 110 and a second region R2 covering the first end of the signal terminal 141. The first region R1 of the insulating member 160 may be located at a first level, and the second region R2 of the insulating member 160 may be located at a second level higher than the first level. In other words, the surface of the first region is located at the first level relative to the contact surface of the PCB 110, and the surface of the second region is located at the second level relative to the contact surface of the PCB 110, with the second level being further outward relative to the contact surface of the PCB 110 (i.e., along the Z direction). With reference to the contact surface between the printed circuit board (PCB) 110 and the insulating member 160, the surface of the insulating member 160 may have a first height H1 in the first region R1, and the surface of the insulating member 160 may have a second height H2 higher than the first height H1 in the second region R2.

[0093] In cross section (B), the signal terminal 141, the first connecting bar 142E, a portion of which is removed by the etch-back process, and the insulating member 160 may be disposed on the printed circuit board (PCB) 110. The insulating member 160 may include a first region R1 covering the printed circuit board (PCB) 110 and a second region R2 covering the first end portion of the signal terminal 141 and the first connecting bar 142E, a portion of which is not removed by the etch-back process.

[0094] Figure 14 FIG. 1 is a diagram showing a state in which the semiconductor module 10 of the embodiment is mounted in the socket 20. Figure 11 A perspective view of the semiconductor module 10 in region G showing contact between the tab terminals 130 and the socket pins 230 of the socket 20 .

[0095] refer to Figure 14, the first end portion of the signal terminal 141 and the first connecting bar 142E, a portion of which is not removed by the etch-back process, may be covered by the insulating member 160, and the ground terminal 151 and the second connecting bar 152E, a portion of which is not removed by the etch-back process, may not be covered by the insulating member 160. Therefore, when the semiconductor module 10 is mounted in the socket 20 in a charged state, the ground terminal 151 or the second connecting bar 152E, which is not covered by the insulating member 160, may contact the socket pin 230 of the socket 20 before the signal terminal 141, whose first end portion is covered by the insulating member 160. The charge e accumulated in the socket 20 may move through the socket pin 230 contacting the ground terminal 151 or the second connecting bar 152E, move through the ground terminal 151 to the through-hole 154 via the ground conductor 153, and be discharged to the ground through the ground conductor layer of the printed circuit board (PCB) 110. The discharge path can be formed as a path passing through the socket 20, the socket pin 230, the ground terminal 151 (or the ground terminal 151 through the second connecting bar 152E), the ground wire 153, the through hole 154, the ground wire layer, and the ground. Therefore, according to the present disclosure, since the discharge path leading to the ground is formed, it is possible to prevent the charge e accumulated in the socket 20 from moving to the semiconductor chip 120, thereby damaging the circuit within the semiconductor chip 120 and degrading the signal integrity (SI).

[0096] In addition to the above, Figures 5 to 8 Shown and referenced in Figures 5 to 8 The description can also be applied to Figures 11 to 14 characteristics.

[0097] Figure 15 It shows Figure 11 1 is a perspective view of an exemplary variation of a semiconductor module 10 . Figure 16 It shows Figure 15 FIG. 1 is an enlarged perspective view of a region J of a semiconductor module 10 .

[0098] refer to Figure 15 and Figure 16 , the semiconductor module 10 may include an insulating member 161. The insulating member 161 may be provided on the printed circuit board (PCB) 110. The insulating member 161 may not cover the ground terminal, the power terminal, the plating terminal, or the unconnected terminal. The insulating member 161 may be spaced apart from the ground terminal, the power terminal, the plating terminal, or the unconnected terminal. The insulating member 161 may be provided along the first edge 110E of the printed circuit board (PCB) 110.

[0099] Insulating member 161 may include an extension portion 161E and a protrusion 161P. Extension portion 161E may extend along first edge 110E of printed circuit board (PCB) 110 in a first direction (X direction). As shown, extension portion 161E may be located between blade terminal 130 and first edge 110E of printed circuit board (PCB) 110. Extension portion 161E may contact printed circuit board (PCB) 110. Extension portion 161E may be spaced apart from blade terminal 130. Extension portion 161E may be spaced apart from signal terminal 141 and ground terminal 151.

[0100] The protrusion 161P may extend from the extension 161E in the second direction (Y direction). The protrusion 161P may be integrally formed with the extension 161E. The protrusion 161P may be provided with a step relative to the extension 161E in the second direction (Y direction) (i.e., the protrusion 161P extends above the extension 161E in the Y direction). The protrusions 161P may be arranged along the first edge 110E of the printed circuit board (PCB) 110 in the first direction (X direction). Each protrusion 161P may contact the printed circuit board (PCB) 110, the signal terminal 141, and the portion of the first connecting bar 142E not removed by the etch-back process. Each protrusion 161P may cover the first end portion of the signal terminal 141 and the portion of the first connecting bar 142E not removed by the etch-back process. The first end portion may be defined as a surface having a predetermined area adjacent to the first edge 110E of the printed circuit board (PCB) 110 that contacts the socket pin 230 when the insulating member 161 is not present. The protrusion 161P may be spaced apart from the ground terminal 151. Each protrusion 161P may be spaced apart from adjacent protrusions 161P at predetermined intervals in the first direction (X direction). Each protrusion 161P may include a first region R1 and a second region R2 defined by a plane dividing the protrusion 161P. The first region R1 may contact the printed circuit board (PCB) 110. The second region R2 may contact the first end of the signal terminal 141 and a portion of the first connecting bar 142E, which has not been removed by the etch-back process.

[0101] Figure 17 is a perspective view showing a semiconductor module 10 according to still another embodiment. Figure 18 It shows Figure 17 FIG. 1 is an enlarged perspective view of a region K of a semiconductor module 10 .

[0102] refer to Figure 17 and Figure 18 , the semiconductor module 10 may include an insulating member 160 . Each insulating member 160 may cover a first end portion of each signal terminal 141 .

[0103] The semiconductor module 10 may not include the connecting bar 132 and the connecting bar 132E whose portion is not removed by the etch-back process. In an embodiment, the plug-in terminal 130 may be formed by performing an electroless plating process without the connecting bar 132 and the connecting bar 132E whose portion is not removed by the etch-back process. The semiconductor module 10 may include an insulating member 160. Each insulating member 160 may include a first region R1 and a second region R2 defined by a plane dividing each insulating member 160. The first region R1 of the insulating member 160 may contact the printed circuit board (PCB) 110. The second region R2 of the insulating member 160 may contact the signal terminal 141. The second region R2 of the insulating member 160 may cover the first end of the signal terminal 141.

[0104] Figure 19 yes Figure 18 The cross-sectional view of the semiconductor module 10 taken along the line LL' and the line MM'. The cross section (A) shows Figure 18 The semiconductor module 10 is a cross section taken along line LL', and the cross section (B) shows Figure 18 FIG. 1 is a cross section of the semiconductor module 10 taken along line MM′.

[0105] refer to Figure 19 In cross section (A), the signal terminals 141, the signal wires 143, and the insulating member 160 may be disposed on the printed circuit board (PCB) 110, and in cross section (B), the signal terminals 141 and the insulating member 160 may be disposed on the printed circuit board (PCB) 110. The insulating member 160 may include a first region R1 covering the printed circuit board (PCB) 110 and a second region R2 covering the first end portion of the signal terminal 141. The first region R1 of the insulating member 160 may be located at a first level, and the second region R2 of the insulating member 160 may be located at a second level higher than the first level. In other words, a surface of the first region is located at a first level relative to a contact surface of the PCB 110, a surface of the second region is located at a second level relative to the contact surface of the PCB 110, and the second level is located further outward than the first level relative to the contact surface of the PCB 110 (i.e., along the Z direction). With the contact surface of the printed circuit board (PCB) 110 and the insulating member 160 as a reference, the surface of the insulating member 160 may have a first height H1 in the first region R1, and the surface of the insulating member 160 may have a second height H2 higher than the first height H1 in the second region R2.

[0106] Figure 20 FIG. 1 is a diagram showing a state in which the semiconductor module 10 of the embodiment is mounted in the socket 20. Figure 17A perspective view of the contact between the tab terminals 130 of the region K of the semiconductor module 10 and the socket pins 230 of the socket 20 is shown.

[0107] refer to Figure 20 , the first end of the signal terminal 141 may be covered by the insulating member 160, and the ground terminal 151 may not be covered by the insulating member 160. Therefore, when the semiconductor module 10 is installed in the socket 20 in a charged state, the ground terminal 151, which is not covered by the insulating member 160, may contact the socket pin 230 of the socket 20 earlier than the signal terminal 141, whose first end is covered by the insulating member 160. The charge e accumulated in the socket 20 can move through the socket pin 230 contacting the ground terminal 151 of the semiconductor module 10, move through the ground terminal 151 via the ground wire 153 to the through-hole 154, and be discharged to the ground through the ground wire layer of the printed circuit board (PCB) 110. The discharge path can be formed as a path passing through the socket 20, the socket pin 230, the ground terminal 151, the ground wire 153, the through-hole 154, the ground wire layer, and the ground. Therefore, according to the present disclosure, since a discharge path to the ground is formed, damage to circuits within the semiconductor chip 120 and degradation of signal integrity (SI) caused by the charge e accumulated in the socket 20 moving to the semiconductor chip 120 can be prevented.

[0108] In addition to the above, Figures 5 to 8 Shown and referenced in Figures 5 to 8 The same applies to the description of Figures 17 to 20 characteristics.

[0109] Figure 21 It shows Figure 17 1 is a perspective view of an exemplary variation of a semiconductor module 10 . Figure 22 It shows Figure 21 FIG. 1 is an enlarged perspective view of a region N of a semiconductor module 10 .

[0110] refer to Figure 21 and Figure 22 , the semiconductor module 10 may include an insulating member 161. The insulating member 161 may be provided on the printed circuit board (PCB) 110. The insulating member 161 may not cover the ground terminal, the power terminal, the plating terminal, or the unconnected terminal. The insulating member 161 may be spaced apart from the ground terminal, the power terminal, the plating terminal, or the unconnected terminal. The insulating member 161 may be provided along the first edge 110E of the printed circuit board (PCB) 110.

[0111] Insulating member 161 may include an extension portion 161E and a protrusion 161P. Extension portion 161E may extend along first edge 110E of printed circuit board (PCB) 110 in a first direction (X direction). Extension portion 161E may be located between blade terminal 130 and first edge 110E of printed circuit board (PCB) 110. Extension portion 161E may contact printed circuit board (PCB) 110. As shown, extension portion 161E may be spaced apart from blade terminal 130. Extension portion 161E may be spaced apart from signal terminal 141 and ground terminal 151.

[0112] The protrusion 161P may extend from the extension 161E in the second direction (Y direction). The protrusion 161P may be integrally formed with the extension 161E. The protrusion 161P may be provided with a step relative to the extension 161E in the second direction (Y direction) (i.e., the protrusion 161P extends above the extension 161E in the Y direction). The protrusions 161P may be arranged along the first edge 110E of the printed circuit board (PCB) 110 in the first direction (X direction). Each protrusion 161P may contact the printed circuit board (PCB) 110 and the signal terminal 141. Each protrusion 161P may cover the first end of the signal terminal 141. The first end may be defined as a surface having a predetermined area that contacts the socket pin 230 when the insulating member 161 is not present, is adjacent to the first edge 110E of the printed circuit board (PCB) 110, and is spaced apart from the ground terminal 151. Each protrusion 161P may be spaced apart from adjacent protrusions 161P at predetermined intervals in the first direction (X direction). Each protrusion 161P may include a first region R1 and a second region R2 defined by a plane dividing the protrusion 161P. The first region R1 may contact the printed circuit board (PCB) 110.

[0113] The second region R2 may contact the first end portion of the signal terminal 141 .

[0114] While the invention has been described in connection with what are presently considered to be practical embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the purview of the appended claims.

Claims

1. A semiconductor module, comprising: printed circuit boards; a plurality of blade terminals, the plurality of blade terminals being located on the printed circuit board, wherein the plurality of blade terminals include a plurality of signal terminals and a plurality of ground terminals, wherein the plurality of blade terminals are arranged along a first edge of the printed circuit board in a first direction, wherein each of the plurality of blade terminals extends in a second direction transverse to the first direction, and wherein each of the plurality of signal terminals includes a first end portion adjacent to the first edge of the printed circuit board; and A plurality of insulating members are located on the printed circuit board, wherein each of the plurality of insulating members covers the first end portion of a corresponding signal terminal of the plurality of signal terminals.

2. The semiconductor module according to claim 1, wherein The plurality of ground terminals are spaced apart from the plurality of insulating members.

3. The semiconductor module according to claim 1, wherein The plurality of blade terminals also includes one or more power terminals.

4. The semiconductor module according to claim 3, wherein The one or more power terminals are spaced apart from the plurality of insulating members. The semiconductor module according to claim 1 , wherein: The plurality of insulating members include a photo solder resist. The semiconductor module according to claim 1 , wherein: The plurality of insulating members include a cladding material.

7. The semiconductor module according to claim 6, wherein: The coating material includes polyurethane acrylate, urethane acrylate, polymethyl methacrylate, modified acrylate or epoxy resin.

8. The semiconductor module according to claim 1, wherein: Each of the plurality of insulating members includes a first region and a second region; The first region contacts the printed circuit board; and The second region contacts the first end portion of a corresponding signal terminal among the plurality of signal terminals.

9. The semiconductor module according to claim 8, wherein: The surface of the first region is located at a first level relative to the surface of the printed circuit board; The surface of the second region is located at a second level relative to the surface of the printed circuit board; and The second level is located further outward than the first level relative to the surface of the printed circuit board.

10. The semiconductor module according to claim 1, wherein: Each of the plurality of signal terminals includes a first exposed surface, and each of the plurality of ground terminals includes a second exposed surface; and A distance from the first edge of the printed circuit board to the first exposed surface in the second direction is greater than a distance from the first edge of the printed circuit board to the second exposed surface in the second direction.

11. A semiconductor module, comprising: printed circuit boards; a plurality of blade terminals, the plurality of blade terminals being located on the printed circuit board, wherein the plurality of blade terminals include a plurality of signal terminals and a plurality of ground terminals, wherein the plurality of blade terminals are arranged along a first edge of the printed circuit board in a first direction, wherein each of the plurality of blade terminals extends in a second direction transverse to the first direction, and wherein each of the plurality of signal terminals includes a first end portion adjacent to the first edge of the printed circuit board; and an insulating member located on the printed circuit board, wherein the insulating member includes an extending portion extending along the first edge of the printed circuit board in the first direction and a plurality of protruding portions extending from the extending portion in the second direction, and wherein each of the plurality of protruding portions covers the first end portion of a corresponding signal terminal among the plurality of signal terminals.

12. The semiconductor module according to claim 11, wherein The plurality of ground terminals are spaced apart from the plurality of protruding portions.

13. The semiconductor module according to claim 11, wherein The extension portion extends along the first edge of the printed circuit board between the plurality of blade terminals.

14. The semiconductor module according to claim 11, wherein The extending portion is spaced apart from the plurality of blade terminals.

15. The semiconductor module according to claim 11, wherein: Each of the plurality of protruding portions includes a first region and a second region; The first region contacts the printed circuit board; and The second region contacts the first end portion of a corresponding signal terminal among the plurality of signal terminals.

16. A semiconductor module, comprising: printed circuit boards; a plurality of semiconductor chips, wherein the plurality of semiconductor chips are located on the printed circuit board; a plurality of blade terminals located on the printed circuit board, wherein the plurality of blade terminals include a plurality of signal terminals electrically connected to the plurality of semiconductor chips and a plurality of ground terminals connected to ground, wherein the plurality of blade terminals are arranged along a first edge of the printed circuit board in a first direction, wherein each of the plurality of blade terminals extends in a second direction transverse to the first direction, and wherein each of the plurality of signal terminals includes a first end portion adjacent to the first edge of the printed circuit board; a plurality of first connecting bars located on the printed circuit board, wherein each of the plurality of first connecting bars extends from a corresponding signal terminal of the plurality of signal terminals; a plurality of second connecting bars located on the printed circuit board, wherein each of the plurality of second connecting bars extends from a corresponding ground terminal of the plurality of ground terminals; and A plurality of insulating members are located on the printed circuit board, wherein each of the plurality of insulating members covers the first end portion of a corresponding signal terminal among the plurality of signal terminals and the first connecting bar.

17. The semiconductor module according to claim 16, wherein The plurality of first connecting bars and the plurality of second connecting bars extend in the second direction.

18. The semiconductor module according to claim 17, wherein The plurality of first connecting bars and the plurality of second connecting bars extend to the first edge of the printed circuit board.

19. The semiconductor module according to claim 16, wherein The plurality of ground terminals are spaced apart from the plurality of insulating members.

20. The semiconductor module according to claim 19, wherein The plurality of second connecting bars are spaced apart from the plurality of insulating members.

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