Embedded digital direct modulation spread spectrum module

Abstract

The invention provides an embeddable digital direct modulation spread spectrum module, which comprises a clock generation unit, a clock configuration information generation unit and a configuration selection generation unit which are connected in sequence, directly realizes signal spread spectrum in a digital mode, can be embedded into an existing programmable device, and can be directly modulated without adding peripheral devices such as a spread spectrum chip and the like. Under the condition that an original system circuit structure is kept, the spectrum spreading function is achieved, and electromagnetic interference emission of related signals such as a clock is restrained. Compared with a phase-locked loop implementation mode, the digital mode directly realizes signal spread spectrum, electromagnetic interference energy can be suppressed to a greater extent, and the electromagnetic compatibility of the system is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of electromagnetic compatibility, and in particular relates to an embeddable digital direct modulation spread spectrum module. Background Art

[0002] Advances in semiconductor technology have led to ever-increasing integration in modern electronic systems and data interconnection rates between devices and chips. Electromagnetic compatibility (EMC), encompassing both EMI (electromagnetic interference) and immunity, has become a crucial quality indicator for these systems. The transmission of periodic signals (such as clocks) and their derivatives is a major source of EMI, particularly in high-density, multi-node systems, where it can be particularly severe and even lead to system compatibility issues.

[0003] Currently, EMI suppression methods for the aforementioned signals primarily include grounding, shielding, filtering, and spread spectrum. The first three methods, particularly in high-density, multi-node systems, are not ideal, often leading to undesirable effects such as introducing clock signal interference into the ground plane (grounding), increasing structural design complexity (shielding), and compromising the signal integrity or timing of periodic signals (filtering). Spread spectrum technology, on the other hand, shifts the spectral energy of the original signal by altering the frequency of the periodic signal or adding jitter to the output, thereby reducing EMI electromagnetic emissions from the circuit at the source and meeting the system clock signal timing requirements. However, current spread spectrum technology relies heavily on hardware, often requiring PLL (phase-locked loop)-based circuits (or chips, hardware IP), resulting in high implementation costs. Summary of the Invention

[0004] To this end, the present invention directly implements signal spread spectrum digitally. This approach can be embedded in existing programmable devices, eliminating the need for additional peripheral components like spread spectrum chips and maintaining the existing system circuit structure. This functionality suppresses electromagnetic interference (EMI) emissions from clock-related signals and other signals. Compared to phase-locked loop (PLL) implementations, this digital approach directly implements signal spread spectrum, significantly reducing EMI energy and improving system electromagnetic compatibility.

[0005] The present invention discloses an embeddable digital direct modulation spread spectrum module, comprising a clock generation unit, a clock configuration information generation unit, and a configuration selection generation unit, which are connected in sequence. The clock generation unit receives clock generation parameters, including period, pulse starting position, pulse width, etc., input from the spread spectrum clock configuration information generation unit and generates a specified pulse signal in a counting and frequency division manner. The clock configuration information generation unit receives input from the configuration selection generation unit and outputs specified clock generation parameters, including period, pulse starting position, pulse width, etc., which include all clock signal parameter sets allowed by the system or a subset thereof. The configuration selection generation unit can generate a clock parameter selection sequence independently or in combination with external input. When the current pulse period of the clock generation unit ends, the selection signal is updated and output.

[0006] The specific working method is as follows: First, the configuration selection generation unit outputs a clock generation parameter selection signal. The clock configuration information generation unit outputs clock generation parameters according to this selection signal. The clock generation unit generates a pulse signal according to these parameters. When the pulse period ends, the configuration selection generation unit outputs the next clock generation parameter selection signal. This cycle eventually forms a pulse signal sequence. In particular, when the configuration selection generation unit uses a pseudo-random sequence or a true random signal to output the clock generation parameter selection signal, random or pseudo-random spread spectrum modulation can be achieved.

[0007] The beneficial effects of the present invention are

[0008] 1) Use programming method to directly realize signal spread spectrum by digital direct modulation without adding hardware.

[0009] 2) Digital direct modulation can achieve a variety of spread spectrum modulation profiles, especially when using external random input or pseudo-random code to achieve random and pseudo-random modulation (which cannot be achieved by spread spectrum circuits based on PLL (phase-locked loop)), which can suppress electromagnetic interference energy to a greater extent and improve the electromagnetic compatibility of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a principle block diagram of the embeddable digital direct modulation spread spectrum technology of the present invention.

[0011] Figure 2 Schematic diagram of the triangular modulation outline.

[0012] Figure 3 Pulse waveform diagram (from top to bottom: reference signal, case 1, case 2).

[0013] Figure 4 Comparison diagram of normalized power spectra of pulse signals (from top to bottom: reference signal-example 1, reference signal-example 2, example 1-example 2). DETAILED DESCRIPTION

[0014] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts are within the scope of protection of the present invention.

[0015] In Examples 1 and 2, the present invention is applied to data synchronization clock generation in a certain system as an example. The clock is obtained by dividing a 100 MHz clock. The operating clock range allowed by the system is 3 to 5 MHz. Both Examples 1 and 2 use periodic modulation to generate spread spectrum signals. The difference is that they use triangular modulation (Example 1) and pseudo-random modulation (Example 2) respectively.

[0016] Example 1 Press Figure 1 、 Figure 2 The configuration selection generating unit is configured to be triangular modulation profile, the modulation frequency is 4MHz, and the clock configuration information generating unit is set to output pulse fixed at 80ns, with periods of 200ns, 210ns, 220ns...300ns and other 11 kinds of pulse waveforms (the pulse is generated at the beginning of the period). Then the output waveform timing diagram of Example 1 is as follows: Figure 3 .

[0017] Example 2 Figure 1 The clock configuration information generating unit is set up the same as in Example 1. The configuration selection generating unit generates pseudo-random numbers in the range of 0 to 511 using the PRBS9 method and outputs the configuration selection signal in the modulo 11 method. The output waveform timing diagram of Example 2 is as follows: Figure 3 .

[0018] For the convenience of comparison and discussion, a reference signal pulse is added (the pulse is fixed at 80ns, the period is fixed at 250ns, and the frequency is 4MHz). The power spectrum of the output pulse signal of Examples 1 and 2 is compared with that of the reference signal. Figure 4 .

[0019] Table 1 Power spectrum characteristics of Examples 1 and 2

[0020]

[0021] The above is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto (for example, inputting a true random signal (noise voltage, temperature) into the configuration selection generation unit to generate the configuration selection signal). Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. An embeddable digital direct modulation spread spectrum module, characterized by: It includes a clock generating unit, a clock configuration information generating unit, and a configuration selection generating unit connected in sequence; The clock generating unit receives the clock generating parameters inputted by the spread spectrum clock configuration information generating unit, including the period, pulse starting position, and pulse width, and generates a specified pulse signal in a counting and frequency division manner; The clock configuration information generating unit receives the output signal of the configuration selection generating unit and outputs the specified clock generation parameters, including the period, pulse starting position, and pulse width; The configuration selection generating unit generates a clock parameter selection sequence independently or in combination with external input, and when the current pulse cycle of the clock generating unit ends, the selection signal is updated and output.

2. The embeddable digital direct modulation spread spectrum module according to claim 1, characterized in that: The specific working method is as follows: first, the configuration selection generating unit outputs a clock generation parameter selection signal, the clock configuration information generating unit outputs the clock generation parameter according to the selection signal, and the clock generating unit generates a pulse signal according to the clock generation parameter; When the pulse cycle ends, the configuration selection generating unit outputs the next clock generation parameter selection signal, and the cycle continues, eventually forming a pulse signal sequence.

3. The embeddable digital direct modulation spread spectrum module according to claim 2, characterized in that: When the configuration selection generating unit adopts a pseudo-random sequence or a true random signal output clock to generate the parameter selection signal, random or pseudo-random spread spectrum modulation can be realized.

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