Radio frequency processing board and test system

Abstract

The application provides a radio frequency processing board and a test system, and relates to the technical field of communication equipment testing.In the application, the receiving and transmitting end of the switch circuit is connected with the receiving test end when receiving test is performed, and the receiving and transmitting end of the switch circuit is connected with the transmitting test end when transmitting test is performed;the input end of the receiving test circuit is connected with the receiving test end, and the output end is connected with the input end of the FPGA processing board;the receiving test circuit has multiple output ends, which are respectively connected with the input end of the FPGA processing board, so that the radio frequency signals in different power intervals are respectively output to the FPGA processing board after being processed by different processing and stabilized in the target power interval;the output end of the transmitting test circuit is connected with the transmitting test end, and the input end is connected with the output end of the FPGA processing board.Based on the above, the problem that the power of the radio frequency signal cannot be effectively controlled in the prior art can be solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication equipment testing, in particular to a radio frequency processing board and a test system. BACKGROUND

[0002] In the process of the whole life cycle test of high-power series radio stations and wireless communication equipment in research and verification, production quality inspection, periodic verification and maintenance, a corresponding test system is needed for cooperation, which needs to cover the whole machine performance evaluation of radio stations, emergency communication systems and public safety dispatching equipment; integrate the functions of radio frequency characteristic test (transmit power, frequency error, adjacent channel power), modulation quality analysis (modulation accuracy EVM, frequency offset), audio parameter measurement (distortion, signal-to-noise ratio) and communication protocol analysis to meet the communication test specification; provide portable battery-powered end-to-end transceiver link test capability for field deployment, emergency rescue and other field scenarios, support communication distance simulation and anti-interference performance rapid diagnosis; through the reconfigurable hardware platform and the modular algorithm library, compatible with frequency modulation (FM), single sideband (SSB), frequency hopping and other multi-standard communication test requirements, provide benchmark verification for dynamic protocol adaptation of software defined radio (SDR) equipment. Therefore, it is necessary to provide a test system to test the radio station and the wireless communication equipment. However, due to the radio frequency signal processing capability of the radio frequency processing board in the test system, it is difficult to reliably test the radio station and the wireless communication equipment. Therefore, it is necessary to improve a radio frequency processing board which can effectively control the power of the radio frequency signal. SUMMARY

[0003] Therefore, the purpose of the present application is to provide a radio frequency processing board and a test system to improve the problem that it is difficult to effectively control the power of the radio frequency signal in the prior art.

[0004] To achieve the above-mentioned purpose, the technical scheme adopted by the present application is as follows:

[0005] A radio frequency processing board applied to a test system, the test system is used for testing high-power radio stations and wireless communication equipment, the radio frequency processing board is connected with an FPGA processing board in the test system, used for converting digital signals output by the FPGA processing board into radio frequency signals and outputting the radio frequency signals to the high-power radio station or the wireless communication equipment, or converting radio frequency signals received from the high-power radio station or the wireless communication equipment into digital signals and outputting the digital signals to the FPGA processing board, wherein the radio frequency processing board comprises:

[0006] A switch circuit, wherein, when receiving test is needed for the high-power radio station or the wireless communication device, the receiving-transmitting end and the receiving test end of the switch circuit are connected, and when transmitting test is needed for the high-power radio station or the wireless communication device, the receiving-transmitting end and the transmitting test end of the switch circuit are connected;

[0007] A receiving test circuit, wherein the input end of the receiving test circuit is connected with the receiving test end, and the output end is connected with the input end of the FPGA processing board card, for converting the received radio frequency signal into a digital signal and outputting the digital signal to the FPGA processing board card, and the receiving test circuit has a plurality of output ends connected with the input end of the FPGA processing board card respectively, so that the radio frequency signals in different power intervals are respectively output to the FPGA processing board card through the corresponding output ends after being processed by different processes and stabilized in the target power interval.

[0008] A transmitting test circuit, wherein the output end of the transmitting test circuit is connected with the transmitting test end, and the input end is connected with the output end of the FPGA processing board card, for converting the received digital signal into a radio frequency signal and outputting the radio frequency signal to the high-power radio station or the wireless communication device.

[0009] In the preferred selection of the present application, in the above radio frequency processing board card, the receiving test circuit comprises:

[0010] A first switch device connected with the receiving test end;

[0011] A first ADC device connected with the first output end of the first switch device, wherein, when the power of the received radio frequency signal belongs to the target power interval, the input end and the first output end of the first switch device are connected, and the first ADC device is used for sampling the received radio frequency signal and outputting the digital signal formed by the sampling to the FPGA processing board card;

[0012] A power adjustment module connected with the second output end of the first switch device, wherein, when the power of the received radio frequency signal does not belong to the target power interval, the input end and the second output end of the first switch device are connected, and the power adjustment module is used for adjusting the power of the radio frequency signal so that the adjusted power belongs to the target power interval;

[0013] A second ADC device connected with the output end of the power adjustment module, wherein the second ADC device is used for sampling the radio frequency signal after the power adjustment and outputting the digital signal formed by the sampling to the FPGA processing board card.

[0014] In the preferred selection of the present application, in the above-mentioned radio frequency processing board card, the power adjustment module comprises:

[0015] a first power divider, an input end of which is connected with the second output end of the first switch device, wherein the first power divider is used for two-way output of the received radio frequency signal;

[0016] a first attenuator, an input end of which is connected with the first output end of the first power divider;

[0017] a first detector, an input end of which is connected with the output end of the first attenuator;

[0018] a second attenuator, an input end of which is connected with the second output end of the first power divider;

[0019] a first automatic gain controller, an input end of which is connected with the output end of the second attenuator;

[0020] a first band-pass filter, an input end of which is connected with the output end of the first automatic gain controller, and an output end of which is connected with the input end of the second ADC device;

[0021] wherein the first detector is used for detecting the voltage of the first-way output signal of the first power divider, and the first automatic gain controller and the second attenuator are used for adjusting the power of the second-way output signal of the first power divider in response to the power size represented by the voltage, so that the power of the radio frequency signal output to the second ADC device belongs to the target power interval.

[0022] In the preferred selection of the present application, in the above-mentioned radio frequency processing board card, the receiving test circuit further comprises:

[0023] a first directional coupler, an input end of which is connected with the receiving test end;

[0024] a second power divider, an input end of which is connected with the first output end of the first directional coupler, wherein the first output end of the second power divider is connected with the input end of the first switch device, and the second output end of the first directional coupler is connected with a load module;

[0025] a limiter, an input end of which is connected with the second output end of the second power divider;

[0026] a second detector, an input end of which is connected with the output end of the limiter;

[0027] a first operational amplifier, an input end of which is connected with the output end of the second detector;

[0028] When the power of the received radio frequency signal belongs to the target power interval, the first operational amplifier outputs a first control signal in response to a voltage output of the second detector, which can represent the power, to control the first switch device to be conducted between the input end and the first output end;

[0029] When the power of the received radio frequency signal does not belong to the target power interval, the first operational amplifier outputs a second control signal in response to a voltage output of the second detector, which can represent the power, to control the first switch device to be conducted between the input end and the second output end.

[0030] In a preferred selection of the present application, in the above-mentioned radio frequency processing board card, the transmission test circuit comprises:

[0031] a DAC device connected to the output end of the FPGA processing board card, wherein the DAC device is used to convert the digital signal output by the FPGA processing board card into a radio frequency signal;

[0032] a third attenuator connected to the output end of the DAC device;

[0033] a second directional coupler connected to the output end of the third attenuator;

[0034] a third detector connected to the first output end of the second directional coupler, wherein the second output end of the third detector is connected to the transmission test end;

[0035] a third ADC device connected to the output end of the third detector, wherein the third ADC device is used to sample the voltage output by the third detector, and the third attenuator is used to adjust the power of the radio frequency signal in response to the power represented by the sampled voltage value.

[0036] In a preferred selection of the present application, in the above-mentioned radio frequency processing board card, the transmission test circuit further comprises:

[0037] an automatic gain control module connected to the first output end of the second directional coupler;

[0038] a second switch device connected to the output end of the automatic gain control module, wherein the first output end of the second switch device is connected to the transmission test end, and the second output end of the second switch device is used for transmission self-calibration.

[0039] In the preferred selection of the present application, in the above-mentioned radio frequency processing board card, the receiving test circuit comprises a power adjustment module and a second ADC device connected with the output end of the power adjustment module, the power adjustment module is used for adjusting the power of the radio frequency signal, so that the adjusted power belongs to the target power interval, and the second ADC device is used for sampling the radio frequency signal after power adjustment and outputting the digital signal formed by sampling to the FPGA processing board card.

[0040] The power adjustment module comprises a third switch device, when the first input end and the output end of the third switch device are conducted, the radio frequency signal output from the power adjustment module to the second ADC device is used for receiving test of the high-power radio station or the wireless communication device, when the second input end and the output end of the third switch device are conducted, the radio frequency signal output from the power adjustment module to the second ADC device is used for transmitting self-calibration, and the second output end of the second switch device is connected to the second input end of the third switch device.

[0041] In the preferred selection of the present application, in the above-mentioned radio frequency processing board card, the automatic gain control module comprises:

[0042] A second gain controller connected with the first output end of the second directional coupler;

[0043] A third gain controller connected with the output end of the second gain controller;

[0044] A fourth gain controller connected with the output end of the third gain controller, wherein the output end of the fourth gain controller is connected with the input end of the second switch device.

[0045] In the preferred selection of the present application, in the above-mentioned radio frequency processing board card, the transmitting test circuit further comprises:

[0046] A second band-pass filter connected with the output end of the DAC device and the input end of the third attenuator;

[0047] A low-noise amplifier connected with the output end of the third attenuator and the input end of the second directional coupler.

[0048] On the basis, the present application further provides a test system for testing high-power radio stations and wireless communication devices, wherein the test system comprises:

[0049] An FPGA processing board card;

[0050] The radio frequency processing board card is connected with the FPGA processing board card, and is configured to convert a digital signal output by the FPGA processing board card into a radio frequency signal and output the radio frequency signal to the high-power radio station or the wireless communication device, or convert a received radio frequency signal from the high-power radio station or the wireless communication device into a digital signal and output the digital signal to the FPGA processing board card.

[0051] The radio frequency processing board card and the test system provided in the application can conduct the receiving test when the receiving and transmitting end of the switch circuit is connected with the receiving test end, and can conduct the transmitting test when the receiving and transmitting end of the switch circuit is connected with the transmitting test end. The input end of the receiving test circuit is connected with the receiving test end, and the output end is connected with the input end of the FPGA processing board card. The receiving test circuit has a plurality of output ends, which are respectively connected with the input end of the FPGA processing card, so that the radio frequency signals in different power intervals are respectively output to the FPGA processing board card after being processed by different processing to be stable in the target power interval. The output end of the transmitting test circuit is connected with the transmitting test end, and the input end is connected with the output end of the FPGA processing board card. Based on the above, the radio frequency signals in different power intervals can be processed to be stable in the target power interval in the receiving test circuit, the power stability of the signals is guaranteed, the power of the radio frequency signals can be effectively controlled, and the problem that the power of the radio frequency signals cannot be effectively controlled in the prior art can be solved. BRIEF DESCRIPTION OF DRAWINGS

[0052] In order to make the above-mentioned purposes, features and advantages of the application more obvious and easy to understand, the following preferred embodiments are specifically described in detail below, and the accompanying drawings are referred to as follows.

[0053] Figure 1 The structure schematic diagram of the test system provided in the embodiments of the application.

[0054] Figure 2 The system block diagram of the test system provided in the embodiments of the application.

[0055] Figure 3 The circuit principle diagram of the radio frequency processing board card provided in the embodiments of the application.

[0056] Icons: 11-First RF switch; 12-First switching device; 13-First ADC device; 14-Second ADC device; 15-First power divider; 16-First attenuator; 17-First detector; 18-Second attenuator; 19-First automatic gain controller; 20-First bandpass filter; 21-First directional coupler; 22-Second power divider; 23-Limiter; 24-Second detector; 25-First operational amplifier; 26-Load module; 27-DAC device; 28-Third attenuator; 29-Second directional coupler; 30-Third detector; 31-Third ADC device; 32-Driver; 33-Second bandpass filter; 34-Low noise amplifier; 35-Second switching device; 36-Third switching device; 37-Second gain controller; 38-Third gain controller; 39-Fourth gain controller. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0058] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0059] like Figure 1 and Figure 2 As shown in the figure, this application provides a testing system. The testing system may include an FPGA processing board and a radio frequency (RF) processing board. The RF processing board is connected to the FPGA processing board and is used to convert digital signals output by the FPGA processing board into RF signals and output them to the high-power radio station or the wireless communication device; or, to convert received RF signals from the high-power radio station or the wireless communication device into digital signals and output them to the FPGA processing board.

[0060] It can be understood that in an alternative embodiment, the test system can include a host module (which can use a Windows system), a human-computer interaction module, a PXI / e backplane, a PXI / e board card (a special waveform board card), a comprehensive signal processing module (including the above-mentioned FPGA processing board card and the radio frequency processing board card, and can further include an audio processing board card), an assembly module and a power supply module.

[0061] In detail, the host module can serve as a controller (such as PXIe-3883 controller) of the test system, and the test software can be carried on the controller. In the test system, communication can be performed with each other module and the device under test through a PCIE bus, a USB interface, an RS232 interface and a Lan port and the like.

[0062] In detail, the PXI / e board card has a modulation and demodulation capability of FM, TCM, OFDM, FSK (BLOS) and the like waveforms in a range of 30MHz-6.5GHz. The PXI / e board card has a data transmission performance test capability, including data transmission performance tests in each mode of fixed / hopping, CSMA / TDMA, and has a frequency hopping performance test capability, including frequency hopping rate, frequency hopping bandwidth and the like functions.

[0063] In detail, the audio processing board card can receive an audio digital signal generated from the FPGA processing board card, generate an analog audio signal, and can also convert an externally received analog audio signal into an audio digital signal and output the audio digital signal to the FPGA processing board card for processing.

[0064] In detail, the radio frequency processing board card can demodulate and analog-to-digital convert a radio frequency signal to form a digital IQ signal, and can also digital-to-analog convert and modulate a digital IQ signal to form a radio frequency signal, and can have a radio frequency signal power detection and signal conditioning function. The radio frequency processing board card can achieve a maximum power measurement of 3kW.

[0065] In detail, the FPGA processing board card can control generation of digital IQ signals of AM, FM and digitally modulated signals, and can also analyze digital IQ signals of AM, FM and digitally modulated signals. In addition, it can also generate audio digital signals and analyze audio digital signals. Furthermore, it can be used for driving a radio frequency transceiver, driving an audio circuit, transmitting measurement results to a host module through a PXI / e backplane and receiving control instructions from the host module, and controlling a test device of the high-power radio station or the wireless communication device.

[0066] In detail, the component module can include a directional coupler, a programmable attenuator, and a low-frequency interface board card, etc. The directional coupler establishes a signal channel between the high-power radio station or the wireless communication device and an antenna, from which a signal is coupled for measurement, and receives short-wave and ultra-short-wave signals. The programmable attenuator mainly realizes precise control of signal attenuation of a radio frequency receiving link. The low-frequency interface board card provides a low-frequency interface for external control and communication.

[0067] In detail, the human-computer interaction module includes three parts of a display screen, a keyboard / touchpad, and a touch screen, and is mainly used for completing a human-computer interaction interface, a key, and control, and realizing an information interaction function between the human-computer interaction module and the main function board (such as the main control module).

[0068] In detail, the power supply module can include a battery pack and a charge-discharge control circuit. When an external power supply is provided, the external power supply can be introduced into the test system, and the battery pack can be charged. Otherwise, the battery pack can supply power to the whole machine, for example, can be connected with the main control module, the human-computer interaction module, the PXI / e backboard, the integrated signal processing module, and the component module respectively to complete corresponding power supply.

[0069] In combination Figure 3 The embodiment of the present application also provides a radio frequency processing board card which can be applied to the test system.

[0070] In detail, when receiving test of the high-power radio station or the wireless communication device is needed, the receiving-transmitting end and the receiving test end of the switch circuit are conducted. When transmitting test of the high-power radio station or the wireless communication device is needed, the receiving-transmitting end and the transmitting test end of the switch circuit are conducted.

[0071] In detail, the input end of the receiving test circuit is connected with the receiving test end, and the output end is connected with the input end of the FPGA processing board card, which is used for converting a received radio frequency signal (such as a radio frequency signal from the high-power radio station or the wireless communication device when receiving test is performed) into a digital signal and outputting the digital signal to the FPGA processing board card. The receiving test circuit has a plurality of output ends which are respectively connected with the input ends of the FPGA processing board card, so that radio frequency signals in different power intervals are respectively output to the FPGA processing board card through corresponding output ends after being stably in a target power interval through different processing.

[0072] In detail, the output end of the transmitting test circuit is connected with the transmitting test end, and the input end is connected with the output end of the FPGA processing board card, for converting the received digital signal (such as from the FPGA processing board card when transmitting test is performed) into a radio frequency signal and outputting the radio frequency signal to the high-power radio station or the wireless communication device.

[0073] Based on the above, since the radio frequency signals in different power intervals can be processed into signals stably in the target power interval in the receiving test circuit, the power stability of the signals is ensured, so that the power of the radio frequency signals can be effectively controlled, and thus the problem that the power of the radio frequency signals cannot be effectively controlled in the prior art can be improved.

[0074] In the first aspect, it needs to be explained that the specific structure of the switch circuit is not limited, and can be selected according to actual needs, as long as the receiving test circuit and the transmitting test circuit can be controlled to perform receiving test and transmitting test respectively.

[0075] For example, in an alternative embodiment, the switch circuit can include a first radio frequency switch 11 (in other embodiments, a plurality of radio frequency switches can be included based on different needs, to control different test needs). The first end of the first radio frequency switch 11 can serve as the receiving and transmitting end of the switch circuit, the second end of the first radio frequency switch 11 can serve as the receiving test end of the switch circuit, and the third end of the first radio frequency switch 11 can serve as the transmitting test end of the switch circuit.

[0076] For example, the radio frequency signal received by the receiving and transmitting end of the switch circuit can be in the range of 30MHz-6.5GHz and belong to the interval of-30dBm-65dBm. The radio frequency signal transmitted by the receiving and transmitting end of the switch circuit belongs to the interval of-120dBm-30dBm. In addition, the first radio frequency switch 11 can use a GaN (gallium nitride) radio frequency switch, the circuit board material uses a diamond copper substrate (thermal conductivity 800W / mK), the interface uses indium solder (thickness ≤20μm), and a semiconductor refrigeration sheet (TEC) is used for temperature control (target: substrate temperature ≤55℃) to design the switch assembly heat dissipation.

[0077] In the second aspect, it needs to be explained that the specific structure of the receiving test circuit is not limited, and can be selected according to actual needs.

[0078] For example, in an alternative embodiment, in order to ensure that the radio frequency signals in different power intervals are stabilized in the target power interval after being processed, the receiving test circuit can include a first switching device 12, a first ADC device 13, a power adjustment module, and a second ADC device 14.

[0079] In detail, the input end of the first switching device 12 is connected with the receiving test end. The input end of the first ADC device 13 is connected with the first output end of the first switching device 12. Thus, when the power of the received radio frequency signal belongs to the target power interval, the input end and the first output end of the first switching device 12 are conductive, the first ADC device 13 is used to sample the received radio frequency signal, and the digital signal formed by sampling is output to the FPGA processing board card.

[0080] The input end of the power adjustment module is connected with the second output end of the first switching device 12, and the input end of the second ADC device 14 is connected with the output end of the power adjustment module. Thus, when the power of the received radio frequency signal does not belong to the target power interval, the input end and the second output end of the first switching device 12 are conductive, the power adjustment module is used to adjust the power of the radio frequency signal, so that the adjusted power belongs to the target power interval, and the second ADC device 14 is used to sample the radio frequency signal after power adjustment, and output the digital signal formed by sampling to the FPGA processing board card.

[0081] In addition, it can be understood that the first switching device 12 can also be a radio frequency switch. The first ADC device 13 and the second ADC device 14 refer to an analog-to-digital converter. The target power interval can refer to an interval less than 8dBm. That is, the power of the radio frequency signal output by the receiving test circuit is less than 8dBm (i.e. stabilized in an interval less than 8dBm). Thus, for the radio frequency signal which is stabilized in an interval less than 8dBm, the first ADC device 13 can be directly sampled and output. For the radio frequency signal which is not stabilized in an interval less than 8dBm, the power adjustment module can be used to adjust the power first, so that it is stabilized in an interval less than 8dBm, and then the second ADC device 14 is used to sample and output.

[0082] It can be understood that the specific composition of the power adjustment module is not limited. For example, in an alternative embodiment, in order to ensure that the radio frequency signal can be reliably power adjusted and controlled, the power adjustment module can include a first power divider 15, a first attenuator 16, a first detector 17, a second attenuator 18, a first automatic gain controller 19, and a first band-pass filter 20.

[0083] In detail, the input end of the first power divider 15 is connected with the second output end of the first switch device 12, and the first power divider 15 is used for two-way output of the received radio frequency signal. The input end of the first attenuator 16 is connected with the first output end of the first power divider 15. The input end of the first detector 17 is connected with the output end of the first attenuator 16. The input end of the second attenuator 18 is connected with the second output end of the first power divider 15. The input end of the first automatic gain controller 19 is connected with the output end of the second attenuator 18. The input end of the first band-pass filter 20 is connected with the output end of the first automatic gain controller 19, and the output end is connected with the input end of the second ADC device 14.

[0084] The first detector 17 is used for detecting the voltage of the first-way output signal of the first power divider 15, and the first automatic gain controller 19 and the second attenuator 18 are used for adjusting the power of the second-way output signal of the first power divider 15 according to the power size represented by the voltage, so that the power of the radio frequency signal output to the second ADC device 14 belongs to the target power interval.

[0085] In addition, it should be noted that the voltage detected by the first detector 17 can be transmitted to other ADC devices, and then a corresponding voltage digital signal is formed by sampling, which can be transmitted to a processor. The processor can determine whether the corresponding power belongs to the target power interval according to the voltage digital signal, and control the first automatic gain controller 19 and the second attenuator 18 based on the difference between the power and the target power interval, so as to realize the power adjustment and control of the radio frequency signal, and stabilize in the target power interval.

[0086] In addition, it should be noted that the first attenuator 16 belongs to a 20dB attenuator, the second attenuator 18 belongs to a 25dB attenuator, and the first automatic gain controller 19 belongs to a 31.5dB automatic gain controller (AGC).

[0087] Further, in order to control the conduction between the input end and the first output end of the first switch device 12 or control the conduction between the input end and the second output end of the first switch device 12, so as to enable different processing of radio frequency signals of different powers, thereby ensuring the reliability of radio frequency signal processing, in an alternative embodiment, the receiving test circuit can further include a first directional coupler 21, a second power divider 22, a limiter 23, a second detector 24 and a first operational amplifier 25.

[0088] In detail, the input end of the first directional coupler 21 is connected with the receiving test end. The input end of the second power divider 22 is connected with the first output end of the first directional coupler 21, and the first output end of the second power divider 22 is connected with the input end of the first switch device 12. The second output end of the first directional coupler 21 is connected with a load module 26 (the impedance can be 50 ohms, etc.). The input end of the limiter 23 is connected with the second output end of the second power divider 22. The input end of the second detector 24 is connected with the output end of the limiter 23. The input end of the first operational amplifier 25 is connected with the output end of the second detector 24.

[0089] When the power of the received radio frequency signal belongs to the target power interval, the first operational amplifier 25 outputs a first control signal in response to the voltage output by the second detector 24, which can represent the power, to control the conduction between the input end and the first output end of the first switch device 12. When the power of the received radio frequency signal does not belong to the target power interval, the first operational amplifier 25 outputs a second control signal in response to the voltage output by the second detector 24, which can represent the power, to control the conduction between the input end and the second output end of the first switch device 12.

[0090] In addition, it needs to be noted that the first directional coupler 21 can be a directional coupler with a coupling factor of 30 dB.

[0091] In the third aspect, it needs to be noted that the specific structure of the transmitting test circuit is not limited and can be selected according to actual needs.

[0092] For example, in an alternative embodiment, in order to realize the power adjustment of the corresponding radio frequency signal during the transmitting test to guarantee the reliability of the transmitting test, the transmitting test circuit can include a DAC device 27, a third attenuator 28, a second directional coupler 29, a third detector 30 and a third ADC device 31.

[0093] In detail, the input end of the DAC device 27 is connected with the output end of the FPGA processing board card, and the DAC device 27 is used to convert the digital signal output by the FPGA processing board card into a radio frequency signal. For example, the FPGA processing board card can generate a radio frequency signal with a power of-30dBm~5dBm by controlling the DAC device 27 and output the radio frequency signal. The input end of the third attenuator 28 is connected with the output end of the DAC device 27. The input end of the second directional coupler 29 is connected with the output end of the third attenuator 28. The input end of the third detector 30 is connected with the first output end of the second directional coupler 29, and the second output end of the third detector 30 is connected with the transmitting test end. The input end of the third ADC device 31 is connected with the output end of the third detector 30, and the third ADC device 31 is used to sample the voltage output by the third detector 30. The third attenuator 28 is used to adjust the power of the radio frequency signal in response to the power value represented by the sampled voltage.

[0094] For example, after sampling the voltage output by the third detector 30, the third ADC device 31 can form a voltage digital signal and transmit the voltage digital signal to a processor. Thus, the processor can determine whether the power of the corresponding radio frequency signal is consistent with the required power according to the voltage digital signal, such as whether the power belongs to-30dBm~5dBm. If the power does not belong to-30dBm~5dBm, the third attenuator 28 can be used to make corresponding adjustment.

[0095] In addition, in some other embodiments, the transmitting test circuit can further include a driver 32 (such as an operational amplifier or the like), wherein the input end of the driver 32 can be connected with the output end of the third detector 30, and the output end of the driver 32 can be connected with the input end of the third ADC device 31, that is, the driver 32 is connected between the third detector 30 and the third ADC device 31.

[0096] In addition, in some other embodiments, the transmitting test circuit can further include a second band-pass filter 33 and a low-noise amplifier 34 (LNA, Low Noise Amplifier). Wherein the input end of the second band-pass filter 33 is connected with the output end of the DAC device 27, and the output end of the second band-pass filter 33 is connected with the input end of the third attenuator 28. The input end of the low-noise amplifier 34 is connected with the output end of the third attenuator 28, and the output end of the low-noise amplifier 34 is connected with the input end of the second directional coupler 29.

[0097] That is, the radio frequency signal output from the DAC device 27 can sequentially pass through the second band-pass filter 33, the third attenuator 28 and the low-noise amplifier 34, and then enter the second directional coupler 29, so as to realize two-way output.

[0098] Further, in some embodiments, in order to be able to correct the power under the transmission test in real time, so as to carry out transmission calibration, the transmission test circuit can further comprise an automatic gain control module and a second switching device 35.

[0099] In detail, the input end of the automatic gain control module is connected with the first output end of the second directional coupler 29. The input end of the second switching device 35 is connected with the output end of the automatic gain control module. The first output end of the second switching device 35 is connected with the transmission test end, and the second output end of the second switching device 35 is used for carrying out transmission self-calibration.

[0100] That is, when carrying out the transmission test, the input end and the first output end of the second switching device 35 are turned on, so that the corresponding radio frequency signal can be transmitted through the transmission test end and the receiving transmission end. When carrying out the transmission calibration, the input end and the second output end of the second switching device 35 are turned on, so that the corresponding radio frequency signal can be output from the second output end, and the corresponding transmission self-calibration is completed. For example, the power of the radio frequency signal output from the second output end can be used to control the automatic gain control module, so as to realize the calibration of the power.

[0101] It can be understood that the specific manner of carrying out the transmission self-calibration through the second output end of the second switching device 35 is not limited. For example, in an alternative embodiment, other ADC devices can be used for sampling output, and then a corresponding processor can be used for control. For another example, in another alternative embodiment, in order to reduce the cost of the device and the complexity of the device layout, considering that the receiving test circuit and the transmission test circuit are asynchronously operated, therefore, part of the electronic elements in the receiving test circuit can be directly used to realize the calibration.

[0102] In detail, the receiving test circuit comprises a power adjustment module and a second ADC device 14 connected with the output end of the power adjustment module. The power adjustment module is used for adjusting the power of the radio frequency signal, so that the adjusted power belongs to the target power interval. The second ADC device 14 is used for sampling the radio frequency signal after the power adjustment, and outputting the digital signal formed by the sampling to the FPGA processing board.

[0103] The power adjusting module includes a third switch device 36. When the first input end and the output end of the third switch device 36 are connected, the radio frequency signal output from the power adjusting module to the second ADC device 14 is used for receiving test of the high power radio station or the wireless communication device. When the second input end and the output end of the third switch device 36 are connected, the radio frequency signal output from the power adjusting module to the second ADC device 14 is used for transmitting self-calibration, and the second output end of the second switch device 35 is connected to the second input end of the third switch device 36.

[0104] In addition, it should be noted that the second switch device 35 and the third switch device 36 can be radio frequency switches.

[0105] It can be understood that the specific structure of the automatic gain control module is not limited. For example, in an alternative embodiment, the automatic gain control module can include a second gain controller 37, a third gain controller 38 and a fourth gain controller 39.

[0106] In detail, the input end of the second gain controller 37 is connected to the first output end of the second directional coupler 29. The input end of the third gain controller 38 is connected to the output end of the second gain controller 37. The input end of the fourth gain controller 39 is connected to the output end of the third gain controller 38, and the output end of the fourth gain controller 39 is connected to the input end of the second switch device 35.

[0107] In addition, it should be noted that the second gain controller 37, the third gain controller 38 and the fourth gain controller 39 all belong to 31.5dB automatic gain controllers.

[0108] In summary, the radio frequency processing board and the test system provided by the application, when receiving test is performed, the receiving and transmitting end of the switch circuit is connected with the receiving test end, when transmitting test is performed, the receiving and transmitting end of the switch circuit is connected with the transmitting test end; the input end of the receiving test circuit is connected with the receiving test end, and the output end is connected with the input end of the FPGA processing board, the receiving test circuit has multiple output ends which are respectively connected with the input end of the FPGA processing board, so that the radio frequency signals in different power intervals are respectively output to the FPGA processing board after being processed by different processing to be stable in the target power interval; the output end of the transmitting test circuit is connected with the transmitting test end, and the input end is connected with the output end of the FPGA processing board. Based on the above, since the radio frequency signals in different power intervals can be processed to be stable in the target power interval in the receiving test circuit, the power stability of the signals is guaranteed, so that the power of the radio frequency signals can be effectively controlled, and thus the problem that the power of the radio frequency signals cannot be effectively controlled in the prior art can be improved.

[0109] The preferred embodiments of the application have been described above with the preferred embodiments of the application, but are not intended to limit the application. Those skilled in the art can make various modifications and changes to the application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the application shall be included in the protection scope of the application.

Claims

1. A radio frequency processing board, characterized in that, An application is made in a test system for testing high-power radios and wireless communication devices. The radio frequency (RF) processing board is connected to an FPGA processing board in the test system. It converts the digital signals output by the FPGA processing board into RF signals and outputs them to the high-power radio or the wireless communication device; or, it converts received RF signals from the high-power radio or the wireless communication device into digital signals and outputs them to the FPGA processing board. The RF processing board includes: A switching circuit, wherein when a reception test is required for the high-power radio station or the wireless communication device, the receiving and transmitting ends of the switching circuit are connected to the receiving test end, and when a transmission test is required for the high-power radio station or the wireless communication device, the receiving and transmitting ends of the switching circuit are connected to the transmission test end. A receiving test circuit, wherein the input terminal of the receiving test circuit is connected to the receiving test terminal and the output terminal is connected to the input terminal of the FPGA processing board, is used to convert the received radio frequency signal into a digital signal and output it to the FPGA processing board, and the receiving test circuit has multiple output terminals respectively connected to the input terminal of the FPGA processing board, so that radio frequency signals in different power ranges are processed in different ways to stabilize in the target power range and then output to the FPGA processing board through their respective output terminals; A transmission test circuit, wherein the output terminal of the transmission test circuit is connected to the transmission test terminal and the input terminal is connected to the output terminal of the FPGA processing board, for converting the received digital signal into a radio frequency signal and outputting it to the high-power radio station or the wireless communication device; The launch test circuit includes: A DAC device whose input terminal is connected to the output terminal of the FPGA processing board, wherein the DAC device is used to convert the digital signal output by the FPGA processing board into a radio frequency signal; A third attenuator whose input terminal is connected to the output terminal of the DAC device; A second directional coupler whose input terminal is connected to the output terminal of the third attenuator; A third detector whose input terminal is connected to the first output terminal of the second directional coupler; A third ADC device is connected to the output of the third detector at its input terminal, wherein the third ADC device is used to sample the voltage output by the third detector, and the third attenuator is used to adjust the power of the radio frequency signal in response to the power represented by the sampled voltage value. An automatic gain control module whose input terminal is connected to the second output terminal of the second directional coupler; A second switching device whose input terminal is connected to the output terminal of the automatic gain control module, wherein the first output terminal of the second switching device is connected to the transmission test terminal, and the second output terminal of the second switching device is used for transmission self-calibration; The receiving test circuit includes a power adjustment module and a second ADC device whose input terminal is connected to the output terminal of the power adjustment module. The power adjustment module is used to adjust the power of the radio frequency signal so that the adjusted power falls within the target power range. The second ADC device is used to sample the power-adjusted radio frequency signal and output the sampled digital signal to the FPGA processing board. The power adjustment module includes a third switching device. When the first input terminal and the output terminal of the third switching device are connected, the radio frequency signal output by the power adjustment module to the second ADC device is used to perform a receiving test on the high-power radio station or the wireless communication device. When the second input terminal and the output terminal of the third switching device are connected, the radio frequency signal output by the power adjustment module to the second ADC device is used for transmission self-calibration, and the second output terminal of the second switching device is connected to the second input terminal of the third switching device.

2. The radio frequency processing board according to claim 1, characterized in that, The receiving test circuit includes: A first switching device whose input terminal is connected to the receiving test terminal; A first ADC device whose input terminal is connected to the first output terminal of the first switching device, wherein when the power of the received radio frequency signal belongs to the target power range, the input terminal and the first output terminal of the first switching device are connected, and the first ADC device is used to sample the received radio frequency signal and output the sampled digital signal to the FPGA processing board. A power adjustment module with its input terminal connected to the second output terminal of the first switching device, wherein when the power of the received radio frequency signal does not belong to the target power range, the input terminal and the second output terminal of the first switching device are connected, and the power adjustment module is used to adjust the power of the radio frequency signal so that the adjusted power belongs to the target power range; The input terminal of the second ADC device is connected to the output terminal of the power adjustment module. The second ADC device is used to sample the power-adjusted radio frequency signal and output the sampled digital signal to the FPGA processing board.

3. The radio frequency processing board according to claim 2, characterized in that, The power adjustment module includes: A first power divider whose input terminal is connected to the second output terminal of the first switching device, wherein the first power divider is used to output the received radio frequency signal in two channels; A first attenuator whose input terminal is connected to the first output terminal of the first power divider; A first detector whose input terminal is connected to the output terminal of the first attenuator; A second attenuator whose input terminal is connected to the second output terminal of the first power divider; A first automatic gain controller whose input terminal is connected to the output terminal of the second attenuator; A first bandpass filter whose input terminal is connected to the output terminal of the first automatic gain controller and whose output terminal is connected to the input terminal of the second ADC device; The first detector is used to detect the voltage of the first output signal of the first power divider, and the first automatic gain controller and the second attenuator are used to adjust the power of the second output signal of the first power divider in response to the power represented by the voltage, so that the power of the radio frequency signal output to the second ADC device belongs to the target power range.

4. The radio frequency processing board according to claim 2, characterized in that, The receiving test circuit also includes: A first directional coupler connecting the input end to the receiving test end; A second power divider whose input terminal is connected to the first output terminal of the first directional coupler, wherein the first output terminal of the second power divider is connected to the input terminal of the first switching device, and a load module is connected to the second output terminal of the first directional coupler; A limiter whose input terminal is connected to the second output terminal of the second power divider; A second detector whose input terminal is connected to the output terminal of the limiter; A first operational amplifier whose input terminal is connected to the output terminal of the second detector; When the power of the received radio frequency signal falls within the target power range, the first operational amplifier responds to the voltage output by the second detector that can characterize the power and outputs a first control signal to control the conduction between the input terminal and the first output terminal of the first switching device. When the power of the received radio frequency signal does not fall within the target power range, the first operational amplifier responds to the voltage output by the second detector that can characterize the power and outputs a second control signal to control the conduction between the input terminal and the second output terminal of the first switching device.

5. The radio frequency processing board according to claim 1, characterized in that, The automatic gain control module includes: A second gain controller whose input terminal is connected to the second output terminal of the second directional coupler; A third gain controller whose input terminal is connected to the output terminal of the second gain controller; A fourth gain controller whose input terminal is connected to the output terminal of the third gain controller, wherein the output terminal of the fourth gain controller is connected to the input terminal of the second switching device.

6. The radio frequency processing board according to claim 1, characterized in that, The launch test circuit also includes: A second bandpass filter whose input terminal is connected to the output terminal of the DAC device and whose output terminal is connected to the input terminal of the third attenuator; A low-noise amplifier whose input is connected to the output of the third attenuator and whose output is connected to the input of the second directional coupler.

7. A testing system, characterized in that, The testing system is used to test high-power radios and wireless communication devices, wherein the testing system includes: FPGA processing board; The radio frequency processing board according to any one of claims 1-6, wherein the radio frequency processing board is connected to the FPGA processing board and is used to convert the digital signal output by the FPGA processing board into a radio frequency signal and output it to the high-power radio station or the wireless communication device, or to convert the received radio frequency signal from the high-power radio station or the wireless communication device into a digital signal and output it to the FPGA processing board.

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