Embedded integrated system with multiple communication modes and multiple voltage domain power supply and charging pile
By designing an embedded integrated system with multiple communication modes and multi-voltage domain power supply, the problems of narrow power supply voltage range and single communication mode of traditional charging piles are solved, the integration of multi-voltage domain power supply and multiple communication modes is realized, and the adaptability and interactivity of charging piles are improved.
Patent Information
- Application Number
- CN202510982376.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-16
- Publication Date
- 2025-09-12
AI Technical Summary
The power supply voltage range of traditional charging piles is narrow, making it difficult to adapt to the complex and changeable industrial site power supply environment. In addition, the communication method is single and cannot meet the diverse communication needs in different energy replenishment scenarios.
An embedded integrated system with multiple communication modes and multi-voltage domain power supply is designed, including an energy supply module, a communication module and a control module. A preset voltage domain voltage is converted into multiple voltage domain voltages through a multi-stage step-down circuit and supplied to the control module, interface communication module and wireless communication module. It supports multiple voltage power supplies such as 24V, 12V, 3.3V and 4V, and integrates interface communication and wireless communication modules to realize multiple communication modes.
It realizes multi-voltage domain power supply, avoids damage to components caused by high-voltage domain, meets the power supply needs of different components, and supports multiple communication methods, improving the interactivity and communication capabilities of charging piles.
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Figure CN120621118A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of charging equipment, and in particular to an embedded integrated system and a charging pile with multiple communication modes and multiple voltage domain power supply. Background Art
[0002] With the development of new energy industries and intelligent technology, supporting charging piles also need to meet diverse functions and communication needs. The power supply voltage range of each device in the integrated PCB system of traditional charging piles is relatively narrow, making it difficult to adapt to the complex and changeable industrial site power supply environment. In actual application, additional power conversion equipment is required, which increases the cost and complexity of actual application. In addition, the integrated PCB system has a single communication method and cannot meet the diverse communication needs in different energy replenishment scenarios.
[0003] The above content is only used to assist in understanding the technical solution of the present invention and does not constitute an admission that the above content is prior art. Summary of the Invention
[0004] The main purpose of the present invention is to provide an embedded integrated system and charging pile with multiple communication modes and multi-voltage domain power supply, aiming to solve the technical problems in the prior art that the power supply voltage range of each device powered by the charging pile is narrow and the communication mode is single.
[0005] To achieve the above objectives, the present invention provides an embedded integrated system with multiple communication modes and multiple voltage domains for power supply, the embedded integrated system with multiple communication modes and multiple voltage domains for power supply comprising: an energy supply module, a communication module, and a control module, the control module being connected to the energy supply module and the communication module respectively, the communication module comprising at least an interface communication module and a wireless communication module; The energy supply module is used to step down the voltage of the preset voltage domain to obtain power supply voltages of multiple voltage domains, and provide power input to the control module, the interface communication module, and the wireless communication module; The control module is used to generate a control signal; The interface communication module is used to convert the control signal into a communication signal of the corresponding interface to realize the communication control function with the external device; The wireless communication module is used to convert the control signal into a wireless communication signal to achieve a communication control function with an external device.
[0006] Optionally, the energy supply module comprises at least: a primary step-down circuit, a secondary step-down circuit and a tertiary step-down circuit, wherein the primary step-down circuit, the secondary step-down circuit and the tertiary step-down circuit are connected in sequence; The first-stage step-down circuit is used to step down the voltage of the preset voltage domain to obtain a first-stage voltage, the preset voltage domain is a voltage domain of 20 to 60V, and the first-stage voltage is 24V; The secondary step-down circuit is used to perform a secondary step-down on the primary voltage to obtain a secondary voltage, wherein the secondary voltage is lower than the primary voltage and is 12V or 5V; The three-stage step-down circuit is used to perform three-stage step-down on the secondary voltage to obtain a third-stage voltage. The third-stage voltage is smaller than the secondary voltage and is 3.3V or 4V.
[0007] Optionally, the first-stage buck circuit includes: an LM5118 control chip, first to eighth resistors, first to sixth capacitors, a first diode, a second diode, a first MOSFET, and a second MOSFET; Among them, the VIN pin of the LM5118 control chip is connected to an external power supply that provides a preset voltage domain, and the external power supply is also grounded through a first resistor and a second resistor, the UVLO pin of the LM5118 control chip is connected to the first resistor and the second resistor respectively, the RT pin of the LM5118 control chip is grounded through a third resistor, the EN pin of the LM5118 control chip is connected to the VIN pin through a fourth resistor, the RAMP pin of the LM5118 control chip is grounded through a first capacitor, the AGND pin of the LM5118 control chip is grounded through a second capacitor, the SS pin of the LM5118 control chip forms a first loop with the COMP pin through a third capacitor, and forms a second loop with the COMP pin through a fourth capacitor and a sixth resistor, the first loop and the second loop are connected in parallel, the SS pin is also grounded through a fifth resistor, the VOUT pin of the LM5118 control chip is grounded through a seventh resistor and a fifth resistor in sequence, the EP pin of the LM5118 control chip is grounded, the CS pin of the LM5118 control chip is grounded, and the CSG pin of the LM5118 control chip is grounded through an eighth resistor The LM5118 control chip is grounded and connected to the anode end of the first diode, the PGND pin of the LM5118 control chip is grounded, the LO pin of the LM5118 control chip is connected to the gate end of the second MOS tube, the VCC pin of the LM5118 control chip is connected to the PGND pin and EP pin of the LM5118 control chip respectively through the fifth capacitor, the VCCX pin of the LM5118 control chip is connected to a fixed voltage of 12V, the HB pin of the LM5118 control chip is connected to the HS pin of the LM5118 control chip through the sixth capacitor, and the LM5 The HO pin of the 118 control chip is connected to the gate terminal of the first MOS switch, the HS pin of the LM5118 control chip is also connected to the first end of the first inductor, the source terminal of the first MOS transistor, and the cathode terminal of the first diode. The drain of the first MOS transistor is connected to the external power supply, the source terminal of the second MOS transistor is grounded, the drain of the second MOS transistor is connected to the second end of the first inductor and the anode terminal of the second diode, and the cathode of the second diode is connected to the VOUT pin of the LM5118 control chip, and a primary voltage of 24V is output through the VOUT pin.
[0008] Optionally, the secondary step-down circuit includes at least: an XL1509 chip, a third diode, a second inductor, a seventh capacitor, an eighth capacitor, and a ninth capacitor; Among them, the VIN pin of the XL1509 chip is respectively connected to the second end of the seventh capacitor, the second end of the eighth capacitor and the voltage output end of the first-level buck circuit, the OUTPUT pin of the XL1509 chip is respectively connected to the cathode of the third diode and the first end of the second inductor, the anode of the third diode and the first end of the ninth capacitor are grounded, and the FB of the XL1509 chip is respectively connected to the second end of the second inductor, the second end of the ninth capacitor and the voltage output end of the second-level buck circuit, and the voltage output end of the second-level buck circuit outputs a secondary voltage of 12V or 5V.
[0009] Optionally, the three-stage buck circuit includes at least: a buck chip, tenth to thirteenth capacitors, a ninth resistor, and a tenth resistor; The VIN pin of the buck chip is respectively connected to the voltage output end of the secondary buck circuit, the first end of the tenth capacitor and the first end of the eleventh capacitor, the second end of the tenth capacitor and the second end of the eleventh capacitor are grounded, the VOUT pin of the buck chip is connected to the voltage output end of the three-stage buck circuit, the first end of the ninth resistor, the first end of the twelfth capacitor and the first end of the thirteenth capacitor, the second end of the ninth resistor is connected to the first end of the tenth resistor and the ADJ pin of the buck chip, the second end of the tenth resistor is grounded, and the second end of the twelfth capacitor and the second end of the thirteenth capacitor are grounded.
[0010] Optionally, the control module includes an STM32F407 control chip, a crystal oscillator circuit, a reset circuit, a burning circuit and a memory circuit, the STM32F407 control chip is respectively connected to the crystal oscillator circuit, the reset circuit, the burning circuit and the memory circuit, the crystal oscillator circuit includes at least a resonator, a fourteenth capacitor, a fifteenth capacitor, and an eleventh resistor, the reset circuit includes at least a sixteenth capacitor and a twelfth resistor, and the memory circuit includes at least an AT24C04C chip; Wherein, the PH0 of the STM32F407 control chip is respectively connected with the second end of the fourteenth capacitor, the third port of the resonator, the first end of the eleventh resistor, the first end grounding of the fourteenth capacitor, the first port of the resonator and the second end of the eleventh resistor and the second end of the fifteenth capacitor, the fourth port of the resonator is connected with the first end grounding of the fifteenth capacitor, the VCC pin of the AT24C04C chip is connected with the voltage output end of the three-stage buck circuit, the SCL pin of the AT24C04C chip is connected with the PB10 pin of the STM32F407 control chip, and the SDA pin of the AT24C04C chip is connected with the PB11 pin of the STM32F407 control chip.
[0011] Optionally, the wireless communication module includes: a 4G communication module; The 4G communication module includes at least an AIR780EP chip, the PWEKEY pin of the AIR780EP chip is connected to the PE3 pin of the STM32F407 control chip, the RESET pin of the AIR780EP chip is connected to the PE2 pin of the STM32F407 control chip, the STATUS pin of the AIR780EP chip is connected to the PE4 pin of the STM32F407 control chip, the NET-STATUS pin of the AIR780EP chip is connected to the PE5 pin of the STM32F407 control chip, the RX pin of the AIR780EP chip is connected to the PC7 pin of the STM32F407 control chip, the TX pin of the AIR780EP chip is connected to the PC6 pin of the STM32F407 control chip, and the VBAT of the AIR780EP chip is connected to the voltage output end of the three-stage buck circuit.
[0012] Optionally, the wireless communication module further includes: a LORA wireless communication module; The LoRa wireless communication module at least includes a WH-L102-L module, a seventeenth capacitor and an eighteenth capacitor. The MO pin of the WH-L102-L module is connected to the PD7 pin of the STM32F407 control chip, the M1 pin of the WH-L102-L module is connected to the PD6 pin of the STM32F407 control chip, the RXD pin of the WH-L102-L module is connected to the PD5 pin of the STM32F407 control chip, and the WH-L102-L module is connected to the PD7 pin of the STM32F407 control chip. The TXD pin of the 2-L module is connected to the PA0 pin of the STM32F407 control chip, the AUX pin of the WH-L102-L module is connected to the PA1 pin of the STM32F407 control chip, the VCC pin of the WH-L102-L module is connected to the voltage output end of the three-stage buck circuit, the first end of the seventeenth capacitor and the first end of the eighteenth capacitor, the second end of the seventeenth capacitor, the second end of the eighteenth capacitor, and the GND pin of the WH-L102-L module are grounded.
[0013] Optionally, the interface module includes at least one of: a digital interface module, an analog interface module, a CAN interface module and a 485 interface module.
[0014] In addition, to achieve the above-mentioned object, the present invention also proposes a charging pile, which includes the embedded integrated system with multiple communication modes and multiple voltage domain power supply as described above.
[0015] The present invention integrates the energy supply module, the control module, the interface communication module and the wireless communication module, and provides a power supply range of multiple voltage domains through the functional module, thereby realizing the operation power supply of the control module, the interface communication module and the wireless communication module, avoiding the high voltage damage to each component caused by the high voltage domain of the external power supply of the charging pile, and meeting the power supply requirements of multiple voltage domains of different components. At the same time, by integrating the interface communication module and the wireless communication module, a variety of external communication methods are realized, which improves the communication when the charging pile charges various devices and improves interactivity, avoiding the technical problems in the prior art that the power supply voltage range of each device powered by the charging pile is narrow and the communication method is single. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0017] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0018] Figure 1 A schematic diagram of the main structural framework of an embedded integrated system with multiple communication modes and multiple voltage domains for power supply according to a method for an embedded integrated system with multiple communication modes and multiple voltage domains for power supply according to an embodiment of the present invention; Figure 2 A schematic diagram of the structure of a first-level buck circuit for an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains according to the present invention; Figure 3 A schematic structural diagram of a two-stage buck circuit according to an embodiment of the method for an embedded integrated system with multiple communication modes and multiple voltage domains; Figure 4 A schematic structural diagram of a three-stage buck circuit according to an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains of the present invention; Figure 5 A schematic diagram of the structure of a control module of an embodiment of an embedded integrated system method for powering multiple communication modes and multiple voltage domains according to the present invention; Figure 6 A schematic diagram of the circuit structure of a 4G communication module according to an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains of the present invention; Figure 7 A schematic diagram of the circuit structure of a LoRa wireless communication module according to an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains of the present invention; Figure 8 A schematic diagram of the circuit structure of a 24V digital input circuit of an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains according to the present invention; Figure 9 A schematic diagram of the structure of a 24V digital output circuit of an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains of the present invention; Figure 10 A schematic diagram of the structure of the analog input part of the analog interface module of an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains of the present invention; Figure 11 A schematic structural diagram of the analog output portion of an analog interface module in an embodiment of a method for an embedded integrated system with multiple communication modes and multiple voltage domains for power supply according to the present invention; Figure 12 A schematic structural diagram of a CAN interface module according to an embodiment of the method for an embedded integrated system with multiple communication modes and multiple voltage domains; Figure 13 A structural diagram of a 485 interface module according to an embodiment of the embedded integrated system method for powering multiple communication modes and multiple voltage domains of the present invention.
[0019] Reference numerals:
[0020] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings and in conjunction with the embodiments. DETAILED DESCRIPTION
[0021] It should be understood that the specific embodiments described herein are merely used to explain the technical solutions of the present application and are not intended to limit the present application.
[0022] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.
[0023] Based on this, an embodiment of the present invention provides an embedded integrated system with multiple communication modes and multiple voltage domain power supply, the embedded integrated system with multiple communication modes and multiple voltage domain power supply includes: an energy supply module, a communication module and a control module, the control module is connected to the energy supply module and the communication module respectively, and the communication module includes at least an interface communication module and a wireless communication module; The power supply module is used to step down the voltage of the preset voltage domain to obtain the power supply voltage of multiple voltage domains, and provide power input to the control module, the interface communication module and the wireless communication module; A control module, configured to generate a control signal; The interface communication module is used to convert the control signal into the communication signal of the corresponding interface to realize the communication control function with the external device; The wireless communication module is used to convert the control signal into a wireless communication signal to realize the communication control function with the external device.
[0024] It should be noted that the reference Figure 1 , Figure 1 This is a schematic diagram of the main structural framework of the embedded integrated system with multiple communication modes and multi-voltage domain power supply in this embodiment. The control module is mainly composed of the STM32F407 main control chip and some peripheral circuits, which are used to realize communication with external devices and data processing requests. The peripheral circuits include at least a clock circuit, a reset circuit, a debug interface circuit, and a memory circuit. The clock circuit provides a stable clock signal for the chip; the reset circuit is used to restore the chip to its initial state when an abnormality occurs in the system; and the debug interface circuit facilitates developers to debug the system and burn programs.
[0025] In this embodiment, the communication module is divided into an interface communication module for wired communication and a wireless communication module for wireless communication, wherein the interface communication module includes at least one of a digital interface module, an analog interface module, a CAN interface module and a 485 interface module. The digital interface module supports the input and output of 24V digital signals and can be directly connected to external sensors, actuators and devices, etc. to realize direct control of external devices. The analog interface module can convert external analog signals into digital signals for processing by the main control chip, and can also convert digital signals output by the main control chip into analog signals for controlling external analog devices, such as motor speed regulation, voltage regulation, etc. In this embodiment, the analog interface is provided with 4 ADC channels and 2 DAC channels.
[0026] A 485 interface module refers to a device that uses the RS-485 communication standard and supports half-duplex or full-duplex communication modes. The 485 interface uses differential signal transmission, which has advantages such as strong anti-interference capabilities and long transmission distances. Each 485 interface is connected to the UART interface of the main control chip through a 485 transceiver chip. The main control chip can communicate data with the 485 device using the UART protocol.
[0027] The CAN interface module features two CAN interfaces, suitable for high-speed, reliable communication in automotive electronics, industrial automation, and other fields. The CAN interface connects to the CAN controller of the main control chip via a CAN transceiver chip. The main control chip can exchange data with other CAN nodes using the CAN protocol.
[0028] Furthermore, the energy supply module at least includes: a primary step-down circuit, a secondary step-down circuit and a tertiary step-down circuit, wherein the primary step-down circuit, the secondary step-down circuit and the tertiary step-down circuit are connected in sequence; The first-stage step-down circuit is used to step down the voltage of the preset voltage domain to obtain a first-stage voltage, the preset voltage domain is a voltage domain of 20 to 60V, and the first-stage voltage is 24V; The secondary step-down circuit is used to perform a secondary step-down on the primary voltage to obtain a secondary voltage, wherein the secondary voltage is lower than the primary voltage and is 12V or 5V; The three-stage step-down circuit is used to perform three-stage step-down on the secondary voltage to obtain a third-stage voltage. The third-stage voltage is smaller than the secondary voltage and is 3.3V or 4V.
[0029] During the specific implementation process, the energy supply module in this embodiment adopts a combination of a switching power supply chip and a linear voltage regulator chip. The switching power supply chip converts the 20-60V input voltage into an intermediate voltage of 24V, and then converts the intermediate voltage 24V into 12V and 5V. The linear voltage regulator chip further converts the 5V voltage into 3.3V and 4V to power different modules or circuits and provide a stable operating environment.
[0030] It can be understood that since the operating voltages of the electronic components in each control chip and sub-circuit are different, in order to avoid overload damage to some components or malfunction of some components, this embodiment sets up a multi-stage step-down circuit to step down the external power supply step by step and provide it to circuits or components with different voltage requirements, thereby improving the stability of the operation of each circuit.
[0031] Furthermore, the first-stage buck circuit includes: an LM5118 control chip U2, a first resistor R1 to an eighth resistor R8, a first capacitor C1 to a sixth capacitor C6, a first diode D1, a second diode D2, a first MOS transistor Q1, and a second MOS transistor Q2; Among them, the VIN pin of the LM5118 control chip U2 is connected to an external power supply that provides a preset voltage domain, and the external power supply is also grounded through a first resistor R1 and a second resistor R2. The UVLO pin of the LM5118 control chip U2 is connected to the first resistor R1 and the second resistor R2 respectively. The RT pin of the LM5118 control chip U2 is grounded through a third resistor R3. The EN pin of the LM5118 control chip U2 is connected to the VIN pin through a fourth resistor R4. The RAMP pin of the LM5118 control chip U2 is grounded through a first capacitor C1. The AGND pin of the LM5118 control chip U2 is connected to the ground. The SS pin of the LM5118 control chip U2 is grounded through the second capacitor C2, the SS pin of the LM5118 control chip U2 forms a first loop with the COMP pin through the third capacitor C3, and forms a second loop with the COMP pin through the fourth capacitor C4 and the sixth resistor R6. The first loop and the second loop are connected in parallel, and the SS pin is also grounded through the fifth resistor R5. The VOUT pin of the LM5118 control chip U2 is grounded through the seventh resistor R7 and the fifth resistor R5 in sequence, the EP pin of the LM5118 control chip U2 is grounded, the CS pin of the LM5118 control chip U2 is grounded, and the CSG pin of the LM5118 control chip U2 is grounded through the The eight resistors R8 are grounded and connected to the anode end of the first diode D1. The PGND pin of the LM5118 control chip U2 is grounded. The LO pin of the LM5118 control chip U2 is connected to the gate end of the second MOS tube Q2. The VCC pin of the LM5118 control chip U2 is connected to the PGND pin and EP pin of the LM5118 control chip U2 through the fifth capacitor C5. The VCCX pin of the LM5118 control chip U2 is connected to a fixed voltage of 12V. The HB pin of the LM5118 control chip U2 is connected to the HS pin of the LM5118 control chip U2 through the sixth capacitor C6. The HO pin of the LM5118 control chip U2 is connected to the gate terminal of the first MOS switch. The HS pin of the LM5118 control chip U2 is also connected to the first end of the first inductor, the source terminal of the first MOS transistor Q1, and the cathode terminal of the first diode D1. The drain of the first MOS transistor Q1 is connected to the external power supply. The source terminal of the second MOS transistor Q2 is grounded. The drain of the second MOS transistor Q2 is connected to the second end of the first inductor and the anode terminal of the second diode D2. The cathode of the second diode D2 is connected to the VOUT pin of the LM5118 control chip U2, and a primary voltage of 24V is output through the VOUT pin.
[0032] The secondary step-down circuit at least includes: an XL1509 chip U3, a third diode D3, a second inductor, a seventh capacitor C7, an eighth capacitor C8, and a ninth capacitor C9; Among them, the VIN pin of the XL1509 chip U3 is respectively connected to the second end of the seventh capacitor C7, the second end of the eighth capacitor C8 and the voltage output end of the first-level buck circuit, the OUTPUT pin of the XL1509 chip U3 is respectively connected to the cathode of the third diode D3 and the first end of the second inductor, the anode of the third diode D3 and the first end of the ninth capacitor C9 are grounded, and the FB of the XL1509 chip U3 is respectively connected to the second end of the second inductor, the second end of the ninth capacitor C9 and the voltage output end of the secondary buck circuit, and the voltage output end of the secondary buck circuit outputs a secondary voltage of 12V or 5V.
[0033] The three-stage buck circuit at least includes: a buck chip, a tenth capacitor C10 to a thirteenth capacitor C13, a ninth resistor R9 and a tenth resistor R10; The VIN pin of the buck chip is respectively connected to the voltage output end of the secondary buck circuit, the first end of the tenth capacitor C10, and the first end of the eleventh capacitor C11, the second end of the tenth capacitor C10 and the second end of the eleventh capacitor C11 are grounded, the VOUT pin of the buck chip is connected to the voltage output end of the three-stage buck circuit, the first end of the ninth resistor R9, the first end of the twelfth capacitor C12, and the first end of the thirteenth capacitor C13, the second end of the ninth resistor R9 is connected to the first end of the tenth resistor R10 and the ADJ pin of the buck chip, the second end of the tenth resistor R10 is grounded, and the second end of the twelfth capacitor C12 and the second end of the thirteenth capacitor C13 are grounded.
[0034] refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of the first-level step-down circuit in this embodiment. Since the operating voltage of the digital interface module is 24V, in order to realize the input and output of 24V digital signals in the charging pile, the digital signal module in the interface communication module is powered by the first-level step-down circuit; Figure 3 , Figure 3 This is a schematic diagram of the structure of the secondary step-down circuit in this embodiment. The secondary step-down circuit is used to provide a secondary voltage of 12V or 5V. Since the digital output part in the digital interface module needs to be connected to a 12V voltage, and the operating voltage of the analog interface module is 12V, and the operating voltage of the chip in the CAN interface module is 5V, the analog signal module in the interface communication module is powered by the secondary step-down circuit; Figure 4 , Figure 4This is a schematic diagram of the structure of the three-stage buck circuit in this embodiment. Since the operating voltage of sub-circuits such as the 485 interface module, other crystal oscillator circuits or reset circuits is relatively low and their sensitivity is relatively high, these sub-circuits or chips are generally powered by a three-stage buck module to provide a stable operating voltage environment.
[0035] Furthermore, the control module includes an STM32F407 control chip, a crystal oscillator circuit, a reset circuit, a burning circuit and a memory circuit, the STM32F407 control chip is respectively connected to the crystal oscillator circuit, the reset circuit, the burning circuit and the memory circuit, the crystal oscillator circuit includes at least a resonator, a fourteenth capacitor C14, a fifteenth capacitor C15, and an eleventh resistor R11, the reset circuit includes at least a sixteenth capacitor C16 and a twelfth resistor R12, and the memory circuit includes at least an AT24C04C chip; Among them, reference Figure 5 , Figure 5 It is a structural diagram of the control module of the present embodiment, in which the PH0 of the STM32F407 control chip is respectively connected to the second end of the fourteenth capacitor C14, the third port of the resonator, and the first end of the eleventh resistor R11, the first end of the fourteenth capacitor C14 is grounded, the first port of the resonator and the second end of the eleventh resistor R11, and the second end of the fifteenth capacitor C15 are connected, the fourth port of the resonator and the first end of the fifteenth capacitor C15 are grounded, the VCC pin of the AT24C04C chip is connected to the voltage output end of the three-stage buck circuit, the SCL pin of the AT24C04C chip is connected to the PB10 pin of the STM32F407 control chip, and the SDA pin of the AT24C04C chip is connected to the PB11 pin of the STM32F407 control chip.
[0036] It should be understood that the control module is mainly used to realize communication and data processing requests with external devices. The peripheral circuits include at least clock circuits, reset circuits, debug interface circuits and memory circuits. The clock circuit provides a stable clock signal for the chip; the reset circuit is used to restore the chip to its initial state when an abnormality occurs in the system; the debug interface circuit facilitates developers to debug the system and burn programs.
[0037] The wireless communication module includes: a 4G communication module; The 4G communication module includes at least an AIR780EP chip U4, a PWEKEY pin of the AIR780EP chip U4 is connected to the PE3 pin of the STM32F407 control chip, a RESET pin of the AIR780EP chip U4 is connected to the PE2 pin of the STM32F407 control chip, a STATUS pin of the AIR780EP chip U4 is connected to the PE4 pin of the STM32F407 control chip, a NET-STATUS pin of the AIR780EP chip U4 is connected to the PE5 pin of the STM32F407 control chip, an RX pin of the AIR780EP chip U4 is connected to the PC7 pin of the STM32F407 control chip, a TX pin of the AIR780EP chip U4 is connected to the PC6 pin of the STM32F407 control chip, and VBAT of the AIR780EP chip U4 is connected to the voltage output end of the three-stage buck circuit.
[0038] The wireless communication module also includes: a LORA wireless communication module; The LoRa wireless communication module at least includes a WH-L102-L module U5, a seventeenth capacitor C17 and an eighteenth capacitor C18, the MO pin of the WH-L102-L module U5 is connected to the PD7 pin of the STM32F407 control chip, the M1 pin of the WH-L102-L module U5 is connected to the PD6 pin of the STM32F407 control chip, the RXD pin of the WH-L102-L module U5 is connected to the PD5 pin of the STM32F407 control chip, and the WH-L102-L The TXD pin of the module U5 is connected to the PA0 pin of the STM32F407 control chip, the AUX pin of the WH-L102-L module U5 is connected to the PA1 pin of the STM32F407 control chip, the VCC pin of the WH-L102-L module U5 is connected to the voltage output end of the three-stage buck circuit, the first end of the seventeenth capacitor C17, and the first end of the eighteenth capacitor C18, the second end of the seventeenth capacitor C17, the second end of the eighteenth capacitor C18, and the GND pin of the WH-L102-L module U5 are grounded.
[0039] refer to Figure 6 and Figure 7 , Figure 6 Schematic diagram of the circuit structure of the 4G communication module in this embodiment. Figure 7This is a schematic diagram of the circuit structure of the LORA wireless communication module in this embodiment. In addition to the wired communication method, this embodiment also adds wireless communication methods through 4G network communication and LoRa communication technology, taking into account the development of intelligent devices. Utilizing 4G high-speed data transmission and remote networking functions, it is connected to the main control chip through the UART interface. The main control chip can initialize the 4G module, perform network connection and data transmission operations through AT commands to achieve fast and efficient wireless network communication. It can also use low-power, long-distance LoRa communication technology for configuration and data transmission and reception control to achieve low-power data communication and real-time collection of the charging status of charging equipment (such as vehicles).
[0040] Furthermore, the interface module includes at least one of: a digital interface module, an analog interface module, a CAN interface module and a 485 interface module.
[0041] In a specific implementation, the digital interface module includes a 24V digital input circuit and a 24V digital output circuit, wherein: Figure 8 Schematic diagram of the circuit structure of the 24V digital input circuit in this embodiment. Figure 9 : This is a structural diagram of the 24V digital output circuit in this embodiment, wherein the digital input circuit includes at least a first transistor, a thirteenth resistor R13 and a fourteenth resistor R14, the first end of the thirteenth resistor R13 is connected to the voltage output end of the first step-down resistor, the second end of the thirteenth resistor R13 is connected to the first port of the first transistor, the first end of the fourteenth resistor R14 is connected to the voltage output end of the three-stage step-down circuit, the second section of the fourteenth resistor R14 is connected to any pin of PE7-PE12 in the STM32F407 control chip and the fourth port of the first transistor, the third port of the first transistor is grounded, and the second port of the first transistor is connected to the digital signal input interface of the external device; the 24V digital output circuit includes at least a second transistor, fifteenth resistors R15 to seventeenth resistors R17, a fourth diode D4 and the third MOS transistor Q3, wherein the second end of the fifteenth resistor R15 and the cathode end of the fourth diode D4 are grounded, the first end of the fifteenth resistor R15 and the anode end of the fourth diode D4 are connected to the digital signal output end and the source end of the third MOS transistor Q3, the gate of the third MOS transistor Q3 is connected to the third port of the second transistor, the drain of the third MOS transistor Q3 is grounded, the fourth port of the second transistor is connected to the first end of the sixteenth resistor R16, the second end of the sixteenth resistor R16 is connected to the voltage output end of the headphone buck circuit, the second port of the second transistor is connected to any pin PE7-PE12 in the STM32F407 control chip, the first port of the second transistor is connected to the first end of the seventeenth resistor R17, and the second end of the seventeenth resistor R17 is connected to the voltage output end of the three-stage buck circuit.
[0042] Figure 10 FIG. 1 is a schematic structural diagram of the analog input portion of the analog interface module in this embodiment. Figure 11 This is a structural diagram of the analog output part in the analog interface module in this embodiment. The analog input part in the analog interface module includes at least the eighteenth resistor R18 to the twenty-second resistor R22 and a first operational amplifier. The first end of the eighteenth resistor R18 is an external input end, the second end of the eighteenth resistor R18 is connected to the non-inverting input end of the first operational amplifier, the first end of the nineteenth resistor R19 is grounded, and the second end is connected to the inverting input end of the first operational amplifier. The first end of the twenty-second resistor R22 is connected to the non-inverting input end of the first operational amplifier and the second end of the eighteenth resistor R18. The second end of the twenty-second resistor R22 is grounded.
[0043] The analog output part in the analog interface module includes at least the twenty-first resistor R21 to the twenty-third resistor R23 and a second operational amplifier, wherein the first end of the twenty-first resistor R21 is connected to the output end of the second operational amplifier and the output end of the analog interface module, the second end of the twenty-first resistor R21 is connected to the inverting input end of the second operational amplifier, the first end of the twenty-second resistor R22 is connected to the non-inverting input end of the second operational amplifier, and the second end is connected to the PA4 or PA5 pin of the STM32F407 control chip, the first end of the twenty-third resistor R23 is connected to the inverting input end of the second operational amplifier, and the second end is grounded.
[0044] Figure 12 This is a structural diagram of the CAN interface module in this embodiment. The CAN interface module at least includes a CA-IS3062W control chip U6, an RS0102YH8 chip U7, and the nineteenth capacitor C19 to the twenty-second capacitor C22. Among them, the RXD pin of the CA-IS3062W control chip U6 is connected to the B1 pin of the RS0102YH8 chip U7, and the TXD pin of the CA-IS3062W control chip U6 is connected to the B2 pin of the RS0102YH8 chip U7.
[0045] Figure 13 485 interface module in this embodiment. The 485 interface module includes at least an SP3485 chip and a twenty-fifth capacitor.
[0046] This embodiment integrates the energy supply module, control module, interface communication module and wireless communication module, and provides a power supply range of multiple voltage domains through functional modules, thereby realizing operation power supply for the control module, interface communication module and the wireless communication module, avoiding high voltage damage to various components caused by the high voltage domain of the external power supply of the charging pile, and meeting the power supply requirements of multiple voltage domains of different components. At the same time, by integrating the interface communication module and the wireless communication module, multiple ways of communicating with the outside are realized, improving the communication when the charging pile charges various devices, improving interactivity, and avoiding the technical problems in the prior art that the power supply voltage range of various devices powered by the charging pile is narrow and the communication method is single.
[0047] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any one or more embodiments or examples in a suitable manner.
[0048] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.
[0049] The above description is only part of the embodiments of the present application and does not limit the patent scope of the present application. All equivalent structural transformations made by using the contents of the present application specification and drawings under the technical concept of the present application, or direct / indirect application in other related technical fields are included in the patent protection scope of the present application.
Claims
1. An embedded integrated system with multiple communication modes and multiple voltage domain power supply, characterized in that: The embedded integrated system with multiple communication modes and multiple voltage domains includes: an energy supply module, a communication module and a control module, wherein the control module is connected to the energy supply module and the communication module respectively, and the communication module includes at least an interface communication module and a wireless communication module; The energy supply module is used to step down the voltage of the preset voltage domain to obtain power supply voltages of multiple voltage domains, and provide power input to the control module, the interface communication module, and the wireless communication module; The control module is used to generate a control signal; The interface communication module is used to convert the control signal into a communication signal of the corresponding interface to realize the communication control function with the external device; The wireless communication module is used to convert the control signal into a wireless communication signal to achieve a communication control function with an external device.
2. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 1, characterized in that: The energy supply module at least includes: a primary step-down circuit, a secondary step-down circuit and a tertiary step-down circuit, wherein the primary step-down circuit, the secondary step-down circuit and the tertiary step-down circuit are connected in sequence; The first-stage step-down circuit is used to step down the voltage of the preset voltage domain to obtain a first-stage voltage, the preset voltage domain is a voltage domain of 20 to 60V, and the first-stage voltage is 24V; The secondary step-down circuit is used to perform a secondary step-down on the primary voltage to obtain a secondary voltage, wherein the secondary voltage is lower than the primary voltage and is 12V or 5V; The three-stage step-down circuit is used to perform three-stage step-down on the secondary voltage to obtain a third-stage voltage. The third-stage voltage is smaller than the secondary voltage and is 3.3V or 4V.
3. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 2, characterized in that: The first-stage step-down circuit includes: an LM5118 control chip, first to eighth resistors, first to sixth capacitors, a first diode, a second diode, a first MOSFET, and a second MOSFET; Among them, the VIN pin of the LM5118 control chip is connected to an external power supply that provides a preset voltage domain, and the external power supply is also grounded through a first resistor and a second resistor, the UVLO pin of the LM5118 control chip is connected to the first resistor and the second resistor respectively, the RT pin of the LM5118 control chip is grounded through a third resistor, the EN pin of the LM5118 control chip is connected to the VIN pin through a fourth resistor, the RAMP pin of the LM5118 control chip is grounded through a first capacitor, the AGND pin of the LM5118 control chip is grounded through a second capacitor, the SS pin of the LM5118 control chip forms a first loop with the COMP pin through a third capacitor, and forms a second loop with the COMP pin through a fourth capacitor and a sixth resistor, the first loop and the second loop are connected in parallel, the SS pin is also grounded through a fifth resistor, the VOUT pin of the LM5118 control chip is grounded through a seventh resistor and a fifth resistor in sequence, the EP pin of the LM5118 control chip is grounded, the CS pin of the LM5118 control chip is grounded, and the CSG pin of the LM5118 control chip is grounded through an eighth resistor The LM5118 control chip is grounded and connected to the anode end of the first diode, the PGND pin of the LM5118 control chip is grounded, the LO pin of the LM5118 control chip is connected to the gate end of the second MOS tube, the VCC pin of the LM5118 control chip is connected to the PGND pin and EP pin of the LM5118 control chip respectively through the fifth capacitor, the VCCX pin of the LM5118 control chip is connected to a fixed voltage of 12V, the HB pin of the LM5118 control chip is connected to the HS pin of the LM5118 control chip through the sixth capacitor, and the LM5 The HO pin of the 118 control chip is connected to the gate terminal of the first MOS switch, the HS pin of the LM5118 control chip is also connected to the first end of the first inductor, the source terminal of the first MOS transistor, and the cathode terminal of the first diode. The drain of the first MOS transistor is connected to the external power supply, the source terminal of the second MOS transistor is grounded, the drain of the second MOS transistor is connected to the second end of the first inductor and the anode terminal of the second diode, and the cathode of the second diode is connected to the VOUT pin of the LM5118 control chip, and a primary voltage of 24V is output through the VOUT pin.
4. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 2, characterized in that: The secondary step-down circuit comprises at least: an XL1509 chip, a third diode, a second inductor, a seventh capacitor, an eighth capacitor, and a ninth capacitor; Among them, the VIN pin of the XL1509 chip is respectively connected to the second end of the seventh capacitor, the second end of the eighth capacitor and the voltage output end of the first-level buck circuit, the OUTPUT pin of the XL1509 chip is respectively connected to the cathode of the third diode and the first end of the second inductor, the anode of the third diode and the first end of the ninth capacitor are grounded, and the FB of the XL1509 chip is respectively connected to the second end of the second inductor, the second end of the ninth capacitor and the voltage output end of the second-level buck circuit, and the voltage output end of the second-level buck circuit outputs a secondary voltage of 12V or 5V.
5. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 2, characterized in that: The three-stage buck circuit comprises at least: a buck chip, tenth to thirteenth capacitors, a ninth resistor and a tenth resistor; The VIN pin of the buck chip is respectively connected to the voltage output end of the secondary buck circuit, the first end of the tenth capacitor and the first end of the eleventh capacitor, the second end of the tenth capacitor and the second end of the eleventh capacitor are grounded, the VOUT pin of the buck chip is connected to the voltage output end of the three-stage buck circuit, the first end of the ninth resistor, the first end of the twelfth capacitor and the first end of the thirteenth capacitor, the second end of the ninth resistor is connected to the first end of the tenth resistor and the ADJ pin of the buck chip, the second end of the tenth resistor is grounded, and the second end of the twelfth capacitor and the second end of the thirteenth capacitor are grounded.
6. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 1, characterized in that: The control module includes an STM32F407 control chip, a crystal oscillator circuit, a reset circuit, a burning circuit and a memory circuit, wherein the STM32F407 control chip is connected to the crystal oscillator circuit, the reset circuit, the burning circuit and the memory circuit respectively, the crystal oscillator circuit includes at least a resonator, a fourteenth capacitor, a fifteenth capacitor and an eleventh resistor, the reset circuit includes at least a sixteenth capacitor and a twelfth resistor, and the memory circuit includes at least an AT24C04C chip; Wherein, the PH0 of the STM32F407 control chip is respectively connected with the second end of the fourteenth capacitor, the third port of the resonator, the first end of the eleventh resistor, the first end grounding of the fourteenth capacitor, the first port of the resonator and the second end of the eleventh resistor and the second end of the fifteenth capacitor, the fourth port of the resonator is connected with the first end grounding of the fifteenth capacitor, the VCC pin of the AT24C04C chip is connected with the voltage output end of the three-stage buck circuit, the SCL pin of the AT24C04C chip is connected with the PB10 pin of the STM32F407 control chip, and the SDA pin of the AT24C04C chip is connected with the PB11 pin of the STM32F407 control chip.
7. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 1, characterized in that: The wireless communication module includes: a 4G communication module; The 4G communication module includes at least an AIR780EP chip, the PWEKEY pin of the AIR780EP chip is connected to the PE3 pin of the STM32F407 control chip, the RESET pin of the AIR780EP chip is connected to the PE2 pin of the STM32F407 control chip, the STATUS pin of the AIR780EP chip is connected to the PE4 pin of the STM32F407 control chip, the NET-STATUS pin of the AIR780EP chip is connected to the PE5 pin of the STM32F407 control chip, the RX pin of the AIR780EP chip is connected to the PC7 pin of the STM32F407 control chip, the TX pin of the AIR780EP chip is connected to the PC6 pin of the STM32F407 control chip, and the VBAT of the AIR780EP chip is connected to the voltage output end of the three-stage buck circuit.
8. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 7, characterized in that: The wireless communication module also includes: a LORA wireless communication module; The LoRa wireless communication module at least includes a WH-L102-L module, a seventeenth capacitor and an eighteenth capacitor. The MO pin of the WH-L102-L module is connected to the PD7 pin of the STM32F407 control chip, the M1 pin of the WH-L102-L module is connected to the PD6 pin of the STM32F407 control chip, the RXD pin of the WH-L102-L module is connected to the PD5 pin of the STM32F407 control chip, and the WH-L102-L module is connected to the PD7 pin of the STM32F407 control chip. The TXD pin of the 2-L module is connected to the PA0 pin of the STM32F407 control chip, the AUX pin of the WH-L102-L module is connected to the PA1 pin of the STM32F407 control chip, the VCC pin of the WH-L102-L module is connected to the voltage output end of the three-stage buck circuit, the first end of the seventeenth capacitor and the first end of the eighteenth capacitor, the second end of the seventeenth capacitor, the second end of the eighteenth capacitor, and the GND pin of the WH-L102-L module are grounded.
9. The embedded integrated system with multiple communication modes and multiple voltage domains as claimed in claim 1, characterized in that: The interface module includes at least one of a digital interface module, an analog interface module, a CAN interface module and a 485 interface module.
10. A charging pile, characterized in that: The charging pile includes an embedded integrated system with multiple communication modes and multiple voltage domain power supply as described in any one of claims 1 to 9 above.
Citation Information
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CN121995903A