Display panel and driving method thereof
Through the coordinated control of the driver chip and the power management chip, the gate drive voltage and the power supply voltage are dynamically adjusted, which solves the problems of screen flickering and unevenness when the display panel brightness is switched, and achieves stable and uniform display of the display panel.
Patent Information
- Application Number
- CN202510947484.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-09
- Publication Date
- 2025-09-12
AI Technical Summary
In existing display panel driving schemes, the gate drive voltage is fixed and cannot be dynamically adjusted, resulting in screen flickering when the brightness switches. In addition, there is a lack of compensation mechanism when the power supply voltage fluctuates, resulting in uneven display. This problem is particularly prominent in high refresh rate, high resolution display panels.
By combining a driver chip and a power management chip, the brightness changes are monitored in real time through a digital voltage control module and an analog-to-digital converter, the voltage difference between the gate drive voltage and the power supply voltage is dynamically adjusted, and a dynamic correlation mechanism between the brightness parameters and the drive voltage is established to achieve real-time compensation for the working state of the transistor.
It effectively avoids screen flickering during brightness switching, improves display uniformity and stability, especially driving consistency within a wide brightness range, and reduces current fluctuations in light-emitting devices caused by voltage mismatch.
Smart Images

Figure CN120636331A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for driving the display panel. Background Art
[0002] With the rapid development of organic electroluminescence display (OLED) technology, especially the increasing application of oxide semiconductor materials in display panels, traditional display panel driving architectures are facing new technical challenges. Due to their unique circuit characteristics, oxide panels have higher requirements for the stability of gate drive voltage (Gate Voltage High, VGH) and power supply voltage (Electroluminescent Voltage Drain Drain, ELVDD). In existing driving schemes, the gate drive voltage is usually designed with a fixed value and cannot be dynamically adjusted according to changes in display brightness, resulting in screen flickering when the display brightness switches. At the same time, when the power supply voltage fluctuates, the traditional driving circuit lacks a corresponding compensation mechanism, further exacerbating the problem of uneven display. These problems are particularly prominent in new display panels with high refresh rates and high resolutions. In addition, the existing technology lacks a precise control mechanism for the relationship between dynamic brightness change data and gate drive voltage, making it difficult to achieve optimized display effects. These problems seriously restrict the performance of new display panels and improve user experience. Summary of the Invention
[0003] The purpose of the present application is to provide a display panel and a driving method for the display panel, aiming to solve the problem of screen flickering that easily occurs when the display brightness is switched in the existing driving scheme.
[0004] An embodiment of the present application provides a display panel, comprising a driver chip, a gate driver circuit, and a plurality of sub-pixels, wherein the sub-pixels include a light-emitting element and a pixel circuit that are electrically connected;
[0005] The pixel circuit includes a plurality of transistors for controlling the working state of the light emitting element;
[0006] The driver chip is used to provide a gate drive voltage to the gate drive circuit and adjust the gate drive voltage according to the change of dynamic brightness variation (DBV) data of the display panel;
[0007] The gate driving circuit outputs a gate driving signal to the transistor according to the gate driving voltage. The display panel includes a plurality of transistors for controlling the working state of the light-emitting element.
[0008] In some embodiments, the display panel further includes a power management chip (Power Management Integrated Circuit, PMIC) connected to the driver chip, the power management chip outputting a power supply voltage (ELVDD) for powering the light-emitting element to the display panel, and outputting the power supply voltage to the driver chip;
[0009] The driver chip includes a digital voltage control module, which is used to adjust the gate drive voltage when the power supply voltage changes, so that the voltage difference between the gate drive voltage and the power supply voltage remains within a set voltage difference range.
[0010] In some embodiments, the driver chip also includes an analog-to-digital converter (ADC), which is connected to a power output pin in the power management chip for outputting the power supply voltage. The ADC is used to sample the power supply voltage through the power output pin to detect whether the power supply voltage changes.
[0011] In some embodiments, the pixel circuit includes a driving transistor, a data writing transistor, a transfer transistor, a reset transistor, a first light emission control transistor, a second light emission control transistor; and a storage capacitor; wherein,
[0012] The first electrode of the first light emitting control transistor is connected to a power line for providing the power supply voltage, the second electrode of the first light emitting control transistor is connected to the second electrode of the driving transistor, and the gate is used to receive a first light emitting control signal;
[0013] The first electrode of the driving transistor is connected to the second electrode of the second light emitting control transistor; the gate of the driving transistor is connected to one end of the storage capacitor;
[0014] The first electrode of the second light emitting control transistor is connected to the anode of the light emitting element; the gate of the second light emitting control transistor is used to receive a second light emitting control signal;
[0015] The first electrode of the reset transistor is connected to the other end of the storage capacitor, and the second electrode of the reset transistor is used to receive a reset signal; the gate of the reset transistor is used to receive a second light emitting control signal;
[0016] The first electrode of the data writing transistor is used to receive a data signal, the second electrode of the data writing transistor is connected to the first electrode of the driving transistor, and the gate of the data writing transistor is used to receive a second scanning signal;
[0017] The first electrode of the transmission transistor is connected to one end of the storage capacitor, the second electrode of the transmission transistor is connected to the gate of the driving transistor, and the gate of the transmission transistor is used to receive a first scanning signal;
[0018] The gate driving signal includes at least one of the first light emitting control signal, the second light emitting control signal, and the reset signal.
[0019] In some embodiments, the parameter range corresponding to the dynamic brightness change data includes multiple parameter nodes, and the digital voltage control module is used to:
[0020] Acquiring current dynamic brightness change data of the display panel;
[0021] Obtaining a target gate drive voltage according to the current dynamic brightness change data and a plurality of parameter nodes;
[0022] The target gate drive voltage is output to the gate drive circuit.
[0023] In some embodiments, the digital voltage control module is further configured to:
[0024] Matching the current dynamic brightness change data with a plurality of the parameter nodes;
[0025] When any target parameter node among the plurality of parameter nodes matches the current dynamic brightness change data, a preset gate driving voltage corresponding to the target parameter node is used as the target gate driving voltage for displaying the panel.
[0026] In some embodiments, the digital voltage control module is further configured to:
[0027] When there is no target parameter node matching the current dynamic brightness change data among the plurality of parameter nodes, acquiring a first parameter node and a second parameter node adjacent to the current dynamic brightness change data from the plurality of parameter nodes;
[0028] According to the preset first gate driving voltage and second gate driving voltage corresponding to the first parameter node and the second parameter node, an interpolation algorithm is used to obtain a target gate driving voltage corresponding to the current dynamic brightness change data.
[0029] In some embodiments, the parameters of the plurality of parameter nodes and the set voltages form a mapping table;
[0030] The digital voltage control module is further configured to query the mapping table according to a current brightness parameter to obtain the target gate drive voltage.
[0031] An embodiment of the present application further provides a method for driving a display panel, the display panel comprising a driver chip, a gate driver circuit, and a plurality of sub-pixels, the sub-pixels comprising electrically connected light-emitting elements and pixel circuits, the pixel circuits comprising a plurality of transistors for controlling the operating state of the light-emitting elements, the method comprising the following steps performed by the driver chip:
[0032] The gate driving voltage output to the gate driving circuit is adjusted according to the dynamic brightness change data of the display panel, so that the gate driving circuit outputs a gate driving signal to the transistor according to the gate driving voltage.
[0033] In some embodiments, the display panel further includes a power management chip connected to the driver chip, the power management chip outputting a power supply voltage to the display panel for powering the light-emitting element, and outputting the power supply voltage to the driver chip, and the method further includes:
[0034] When the power supply voltage changes, the gate drive voltage is adjusted to keep the voltage difference between the gate drive voltage and the power supply voltage within a set voltage difference range. An embodiment of the present application further provides a display device comprising a display panel and the aforementioned display panel driver chip.
[0035] In the display panel and the driving method of the display panel provided in the present application, the display panel includes a driver chip, a gate driver circuit, and a plurality of sub-pixels, the sub-pixels including electrically connected light-emitting elements and pixel circuits; the pixel circuits include a plurality of transistors for controlling the working state of the light-emitting elements; the driver chip is used to provide a gate driver voltage to the transistors and adjust the gate driver voltage according to the dynamic brightness change data of the display panel. The driver chip of the present application dynamically adjusts the gate driver voltage according to the dynamic brightness change data, and adjusts the gate driver voltage by matching the brightness parameters with the preset nodes or interpolating the target gate driver voltage in real time, thereby solving the problems of screen flickering and uneven display caused by the traditional fixed gate driver voltage, and has the advantages of avoiding screen flickering when the display brightness is switched and improving display uniformity. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] The present application is further described below with reference to the accompanying drawings. It should be noted that the drawings described below are only used to illustrate some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort.
[0037] Figure 1 Schematic diagram of an application scenario of a driver chip for a display panel provided in an embodiment of the present application.
[0038] Figure 2 Schematic diagram of a pixel circuit in an embodiment of the present application.
[0039] Figure 3 Schematic diagram of the driving timing of the pixel circuit in the embodiment of the present application.
[0040] Figure 4 A schematic diagram of another application scenario of the driver chip of the display panel provided in the embodiment of the present application.
[0041] Figure 5 FIG. 1 is a schematic diagram of dynamic ELVDD and VGH settings in an embodiment of the present application.
[0042] Figure 6 Schematic diagram of dynamic ELVDD and VGH interpolation with DBV in an embodiment of the present application.
[0043] Figure 7 Schematic diagram of a large voltage difference formed when ELVDD is output by PMIC in an embodiment of the present application.
[0044] Figure 8 Schematic diagram of the voltage difference maintained by the PMIC output of ELVDD in an embodiment of the present application.
[0045] Figure 9 Schematic diagram of a display device in an embodiment of the present application. DETAILED DESCRIPTION
[0046] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.
[0047] In the description of this application, the terms "first," "second," and similar words do not indicate any order, quantity, or importance, but are merely used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise expressly limited. The embodiments of this application may be combined with each other.
[0048] The present invention provides a display device, which includes but is not limited to the following embodiments and combinations of the following embodiments.
[0049] In some embodiments, combined Figure 1 and Figure 2 As shown, Figure 1 A schematic diagram of an application scenario of a driver chip for a display panel provided in an embodiment of the present application; Figure 2 This is a schematic diagram of a pixel circuit in an embodiment of the present application. The display device 100 includes an electrically connected display panel 10; the display panel 10 includes a driver chip 20, a gate driver circuit 101, and a plurality of sub-pixels Pi, each of which includes an electrically connected light-emitting element Di and a pixel circuit 30. The pixel circuit 30 includes a plurality of transistors for controlling the operating state of the light-emitting element Di; the driver chip 20 is used to provide a gate drive voltage to the gate driver circuit and adjust the gate drive voltage according to changes in the dynamic brightness change data of the display panel 10.
[0050] The pixel circuit 30 includes: a driving transistor T1, a data writing transistor T2, a transfer transistor T3, a reset transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, and a storage capacitor Cst. The first electrode of the first light-emitting control transistor T5 is connected to the power line VDD for providing the power supply voltage, the second electrode of the first light-emitting control transistor T5 is connected to the second end of the driving transistor T1, and the gate is used to receive the first light-emitting control signal VEM1; the first end of the driving transistor T1 is connected to the second electrode of the second light-emitting control transistor T6; the gate of the driving transistor T1 is connected to one end of the storage capacitor Cst; the first electrode of the second light-emitting control transistor T6 is connected to the anode of the light-emitting device Di; the gate of the second light-emitting control transistor T6 is used to receive the second light-emitting control signal VEM2; the first electrode of the reset transistor T4 is connected to the other end of the storage capacitor Cst, and the first electrode of the reset transistor T4 is connected to the other end of the storage capacitor Cst. The second electrode of the reset transistor T4 is used to access the reset signal VI_ANO; the gate of the reset transistor T4 is used to access the second light-emitting control signal VEM2; the second electrode of the data write transistor T2 is connected to the first end of the driving transistor T1; the gate of the data write transistor T2 is used to access the second scan signal VSCAN2; the first electrode of the data write transistor T2 is used to access the data signal Data; the second electrode of the transmission transistor T3 is connected to the gate of the driving transistor T1; the gate of the transmission transistor T3 is used to access the first scan signal VSCAN1; wherein the gate drive signal includes at least one of the first light-emitting control signal, the second light-emitting control signal, and the reset signal.
[0051] The timing of VEM1, VEM2, VSCAN1, VSCAN2 and other signals can be combined Figure 3 For better understanding, VSCAN1 includes VSCAN1_1st and VSCAN1_2nd; VSCAN1_1st and VSCAN1_2nd represent the VSCAN1 timing at different times; VSCAN2 includes VSCAN2_1st and VSCAN2_2nd; VSCAN2_1st and VSCAN2_2nd represent the VSCAN2 timing at different times. The display panel 10 may be a self-luminous display panel, where the display panel 10 displays images through the self-luminescence of the light-emitting element Di in the sub-pixel Pi.
[0052] Specifically, such as Figure 1 As shown, the display panel 10 may further include a cascade of multi-stage gate driving units (forming a gate driving circuit 101), each gate driving unit being electrically connected to a plurality of pixel circuits 30 in a corresponding at least one pixel row to provide a corresponding gate signal Gate, and the driving chip 20 may be integrated with an analog-to-digital converter 202, which is electrically connected to the plurality of pixel circuits 30 to provide a plurality of data signals Data corresponding to a plurality of data lines, wherein the data signals include a plurality of data voltages corresponding to the plurality of pixel circuits 30 connected to the data lines.
[0053] For ease of description, an array arrangement of multiple sub-pixels Pi is used as an example. The multiple gate signals output by the multi-level gate driving unit are respectively transmitted to the multiple rows of sub-pixels Pi through the multiple gate lines. The multiple gate pulses in the multi-level gate signal used to turn on the multiple rows of sub-pixels Pi can be arranged in sequence on the time axis to turn on the multiple rows of sub-pixels Pi in sequence. The analog-to-digital converter 202 can generate multiple data signals Data that are output to the multiple columns of sub-pixels Pi through the multiple data lines. Each data signal Data can include multiple data voltages corresponding to the multiple sub-pixels Pi in the same column. When each row of sub-pixels Pi is turned on, the multiple data lines respectively receive the multiple data voltages of the multiple sub-pixels Pi in the row, so that the multiple data voltages act on the multiple sub-pixels Pi in the row to realize the light emission of the multiple light-emitting elements Di in the multiple sub-pixels Pi in the row. Similarly, the light-emitting elements Di in all rows can be controlled to emit light in sequence to present a complete picture.
[0054] Among them, the digital voltage control module 201 in the driver chip 20 can obtain the current dynamic brightness change data of the display panel; obtain a target gate drive voltage based on the current dynamic brightness change data and multiple parameter nodes; output the target gate drive voltage to the sub-pixel, and the analog-to-digital converter 202 in the driver chip 20 can be connected to the power output pin for outputting the power supply voltage in the power management chip, and the analog-to-digital converter 202 is used to sample the power supply voltage through the power output pin to detect whether the power supply voltage has changed.
[0055] At the same time, for pixel circuit 30, voltage signal ELVDD is used to control the maximum brightness of light-emitting element Di (i.e., the brightness corresponding to light-emitting element Di emitting at the maximum grayscale value). Specifically, the maximum brightness of light-emitting element Di varies under different voltage signals ELVDD. Of course, the brightness of light-emitting element Di at other grayscale values also varies. Specifically, voltage signal ELVDD and data signal Data are used to control the magnitude of drive current Id. The value of data signal Data (the data voltage therein) corresponding to the same grayscale is positively correlated with the value of voltage signal ELVDD. The larger the value of voltage signal ELVDD, the larger the value of data signal Data (the data voltage therein) corresponding to the same grayscale, and the greater the brightness of light-emitting element Di.
[0056] Combine Figure 1 and Figure 2 As shown, the display panel includes a driving chip 20, a gate driving circuit and a plurality of sub-pixels. The display panel 10 includes a plurality of sub-pixels, and the sub-pixels include a light-emitting element Di and a pixel circuit 30 that are electrically connected;
[0057] The pixel circuit 30 includes a plurality of transistors for controlling the working state of the light emitting element;
[0058] The driver chip 20 is used to provide a gate driving voltage to the gate driving circuit and adjust the gate driving voltage according to the change of the dynamic brightness change data of the display panel 10;
[0059] The gate driving circuit 101 outputs a gate driving signal to the transistor according to the gate driving voltage.
[0060] The driver chip 20 can be an integrated circuit with a voltage regulation function, specifically a dedicated display driver chip with a digital control module, which can dynamically calculate and output voltage parameters through a built-in logic unit. The light-emitting element can be a current-driven light-emitting device, specifically an organic light-emitting diode structure, with the anode connected to the Figure 2The transistor circuit structure shown forms a current path with the display panel. Dynamic brightness change data refers to the control signal that represents the panel's luminous intensity. Specifically, it can be implemented using a pulse width modulation signal or a current amplitude signal. The corresponding relationship between this parameter and the driving voltage is established through experimental calibration.
[0061] Specifically, the gate drive voltage can be a gate high voltage (Gate High Voltage, VGH); the driver chip receives external brightness control instructions and parses the voltage requirement corresponding to the current dynamic brightness change data. When the display panel switches to different brightness modes, the driver chip generates a corresponding gate drive voltage value based on a preset brightness-voltage mapping relationship. This voltage is transmitted to the transistor gate in the pixel circuit through the output port, so that the conduction state of the transistor matches the driving current requirement of the light-emitting device. During the continuous change of the brightness parameter, the driver chip continuously performs iterative calculation of the voltage parameter to ensure that the transistor is always in the optimal working range.
[0062] As an example, consider an OLED display panel with a brightness range (Dynamic Brightness Volume, DBV) from 0 to 255. Within this range, multiple parameter nodes can be identified, such as 0, 64, 128, 192, and 255. Based on these parameter nodes, VGH can be dynamically set. For example, when DBV is 0, VGH is set to 10V; when DBV is 64, VGH is set to 12V; when DBV is 128, VGH is set to 14V; when DBV is 192, VGH is set to 16V; and when DBV is 255, VGH is set to 18V. As DBV varies between these nodes, an interpolation algorithm can be used to calculate the corresponding VGH value. For example, when DBV is 96 (between 64 and 128), VGH might be set to 13V. Assume that ELVDD varies from 4.5V to 5.5V. As ELVDD increases, VGH also increases, maintaining a constant voltage difference between the two. For example, if ELVDD is initially 5V and VGH is 15V, when ELVDD rises to 5.2V, VGH will also rise to 15.2V. This allows VGH to be dynamically adjusted to meet varying brightness requirements while maintaining coordinated changes with ELVDD, effectively avoiding screen flicker and optimizing power consumption by reducing VGH at low brightness.
[0063] This application achieves real-time compensation for transistor operating conditions by establishing a dynamic correlation between brightness parameters and drive voltage. This active adjustment method effectively solves the problem of sudden changes in drive current during brightness switching and avoids the screen flickering caused by voltage mismatch in traditional architectures.
[0064] Through the above technical solution, the present application can dynamically optimize the drive voltage parameters according to the actual operating state of the display panel, ensuring the stability of the transistor drive capability in different brightness modes. This solution effectively suppresses the current fluctuations of the light-emitting device caused by voltage mismatch, significantly reduces the probability of screen flicker, and improves the drive consistency of the display panel over a wide brightness range.
[0065] In one embodiment, Figure 1 and Figure 4 As shown, the display panel also includes a power management chip connected to the driver chip 20, and the power management chip outputs the power supply voltage for powering the light-emitting element to the display panel, and outputs the power supply voltage to the driver chip; the driver chip 20 includes a digital voltage control module 201, and the digital voltage control module 201 is used to adjust the gate drive voltage when the power supply voltage changes, so that the voltage difference between the gate drive voltage and the power supply voltage is maintained within a set voltage difference range. Among them, the power management chip refers to an integrated circuit module for generating and managing the display panel power supply voltage, which can be specifically implemented by a power management chip with a multi-channel voltage output function, which converts the input voltage into the working voltage required by the light-emitting element through a voltage conversion circuit. The driver chip adjusts the gate drive voltage by dynamically adjusting the conduction state of the transistor according to the fluctuation of the power supply voltage, which can be achieved through a built-in voltage feedback loop or a digital control algorithm, thereby maintaining the working stability of the pixel circuit.
[0066] Specifically, the power management chip continuously provides power supply voltage to the light-emitting elements of the display panel, and transmits the voltage signal to the voltage detection port of the driver chip. When the external load changes or the panel operating mode switches, causing the power supply voltage to fluctuate, the voltage monitoring module inside the driver chip captures the voltage change in real time. Through the built-in voltage compensation algorithm, the driver chip automatically calculates the correction value of the gate drive voltage and synchronously adjusts the amplitude of the drive signal output to the pixel circuit. This linkage control mechanism enables the conduction characteristics of the transistor to be compensated in time when the power supply voltage of the light-emitting element shifts, avoiding uneven brightness or signal distortion caused by voltage mismatch.
[0067] In this way, the present application realizes the coordinated control of the power supply system and the drive system by establishing a real-time data interaction channel between the power management chip and the driver chip, effectively solving the display abnormality problem caused by the dynamic change of voltage parameters.
[0068] Through the above technical solution, the present application can monitor voltage fluctuations in the display panel power supply system in real time and automatically correct the output parameters of the drive signal to ensure that the pixel circuit maintains a stable operating point under different operating conditions. This dynamic compensation mechanism significantly reduces brightness jumps caused by power supply voltage fluctuations and is particularly suitable for new oxide semiconductor display panels that require wide-range brightness adjustment.
[0069] In one embodiment, Figure 1 As shown, the display panel further includes a power management chip connected to the driving chip, the power management chip outputs a power supply voltage for powering the light-emitting element to the display panel, and outputs the power supply voltage to the driving chip;
[0070] The driver chip 20 includes a digital voltage control module 201 , which is used to adjust the gate drive voltage when the power supply voltage changes, so that the voltage difference between the gate drive voltage and the power supply voltage remains within a set voltage difference range.
[0071] In one embodiment, the driver chip 20 also includes an analog-to-digital converter 202, which is connected to a power output pin in the power management chip for outputting the power supply voltage. The analog-to-digital converter is used to sample the power supply voltage through the power output pin to detect whether the power supply voltage changes.
[0072] The analog-to-digital converter 202 is an electronic device that converts analog voltage signals into digital signals. Specifically, it can be implemented using a successive approximation analog-to-digital converter (ADC) and is used to monitor changes in the power supply voltage in real time. The power output pin is a physical interface on the power management chip that directly outputs the power supply voltage. Specifically, it can be implemented using a pin structure made of a metallic conductive material to ensure electrical connectivity between the sampling point and the power supply output. Sampling refers to the periodic or triggered acquisition of the instantaneous value of the power supply voltage. Specifically, it can be implemented using a timer-triggered analog-to-digital converter to capture dynamic fluctuations in the power supply voltage.
[0073] Specifically, analog-to-digital converter 202 forms a signal path through a physical connection with the power output pin of the power management chip. During display panel operation, the analog-to-digital converter collects data on the power supply voltage at a preset frequency. When the power supply voltage fluctuates due to load changes or external interference, the analog-to-digital converter converts the detected voltage change into a digital signal and transmits it to the logic control unit of the driver chip. The driver chip dynamically adjusts the output gate drive voltage based on the voltage change to ensure that the gate drive voltage matches the power supply voltage.
[0074] In this way, the present application directly integrates the analog-to-digital converter inside the driver chip and uses the power output pin as a sampling point, which can accurately capture the instantaneous changes in the power supply voltage and avoid display anomalies caused by voltage feedback delay.
[0075] Through the above technical solution, the present application realizes real-time monitoring and rapid response to power supply voltage changes, effectively solves the gate drive voltage mismatch problem caused by power supply voltage fluctuations, thereby eliminating the screen flickering phenomenon caused by the display panel when the brightness is switched or the screen is refreshed, and improving the display stability.
[0076] In one embodiment, Figure 2 As shown, the pixel circuit includes a driving transistor T1, a data writing transistor T2, a transmission transistor T3, a reset transistor T4, a first light-emitting control transistor T5, and a second light-emitting control transistor T6; the pixel circuit 30 also includes a storage capacitor Cst; wherein,
[0077] The first electrode of the first light emitting control transistor T5 is connected to the power line VDD for providing the power supply voltage, the second electrode of the first light emitting control transistor T5 is connected to the second end of the driving transistor T1, and the gate is used to receive the first light emitting control signal VEM1;
[0078] The first end of the driving transistor T1 is connected to the second electrode of the second light emitting control transistor T6; the gate of the driving transistor T1 is connected to one end of the storage capacitor Cst;
[0079] The first electrode of the second light emitting control transistor T6 is connected to the anode of the light emitting device Di; the gate of the second light emitting control transistor T6 is used to receive the second light emitting control signal VEM2;
[0080] The first electrode of the reset transistor T4 is connected to the other end of the storage capacitor Cst, and the second electrode of the reset transistor T4 is used to receive the reset signal VI_ANO; the gate of the reset transistor T4 is used to receive the second light emitting control signal VEM2;
[0081] The second electrode of the data writing transistor T2 is connected to the first end of the driving transistor T1; the gate of the data writing transistor T2 is used to receive the second scanning signal VSCAN2; the first electrode of the data writing transistor T2 is used to receive the data signal Data;
[0082] The second electrode of the transmission transistor T3 is connected to the gate of the driving transistor T1; the gate of the transmission transistor T3 is used to receive the first scanning signal VSCAN1;
[0083] The gate driving voltage output by the gate driving chip 20 includes at least one of the first light-emitting control signal and the second light-emitting control signal.
[0084] The first light emitting control transistor T5 is a switch element for controlling the conduction state between the power line and the driving transistor T1 , and can be implemented by an oxide semiconductor transistor. The first light emitting control signal VEM1 is used to control the timing of supplying power to the driving transistor from the power line.
[0085] The second light emitting control transistor T6 is a switch element for controlling the conduction state between the driving transistor T1 and the light emitting device Di. Specifically, it can be implemented using a low-temperature polysilicon thin film transistor. The anode voltage of the light emitting device Di is adjusted by the second light emitting control signal.
[0086] The storage capacitor Cst refers to an energy storage element for maintaining the gate voltage of the driving transistor T1 , and can be specifically implemented by a metal-insulator-metal structure capacitor. The stability of the gate voltage of the driving transistor is maintained by the storage capacitor.
[0087] The reset transistor T4 is a switch element for discharging the storage capacitor, and can be implemented by a transistor with a dual-gate structure. The residual charge in the storage capacitor is cleared through the coordinated action of the reset signal and the second light-emitting control signal VEM2.
[0088] The transmission transistor T3 is a switching element for transmitting a data signal to the gate of the driving transistor T1 , and can be implemented by a thin film transistor with a top-gate structure. The data signal writing timing is controlled by the first scanning signal VSCAN1 .
[0089] Specifically, the power line VDD is connected to the second terminal of the driver transistor T1 via the first emission control transistor T5. When the first emission control signal VEM1 is at an active level, the power line VDD provides the operating voltage ELVDD to the driver transistor T1. ELVDD is provided via the VDD line, and ELVDD and VGH require coordinated control. The first terminal of the driver transistor T1 is connected to the anode of the light-emitting device Di via the second emission control transistor T6. When the second emission control signal VEM2 is active, the drive current generated by the driver transistor T1 is transmitted to the light-emitting device Di. One terminal of the storage capacitor Cst is connected to the gate of the driver transistor T1, and the other terminal is connected to the reset signal line via the reset transistor T4. During the reset phase, the second emission control signal VEM2 turns on the reset transistor T4, resetting the voltage of the storage capacitor Cst to a preset level. Under the control of the second scan signal VSCAN2, the data write transistor T2 transmits the data signal Data to the first terminal of the driver transistor T1. Under the control of the first scan signal VSCAN1, the transfer transistor T3 writes the data signal Data to the gate of the driver transistor T1, achieving precise control of the drive voltage.
[0090] Through the above technical solution, this application effectively solves the screen flickering problem that occurs when the gate drive voltage of new oxide panels is dynamically adjusted. The dual emission control transistor configuration reduces signal transmission delay and ensures the synchronization of emission control when the VGH voltage changes. The coordinated design of the storage capacitor and reset transistor eliminates the impact of voltage jumps on the drive transistor and maintains the stability of the gate voltage. The separate control mechanism of the data signal and the scan signal improves the adjustment accuracy of the drive voltage, meeting the strict requirements of new panels for dynamic voltage setting.
[0091] In one embodiment, the parameter range corresponding to the dynamic brightness change data includes multiple parameter nodes, and the digital voltage control module 201 is used to:
[0092] Acquiring current dynamic brightness change data of the display panel;
[0093] Obtaining a target gate drive voltage according to the current dynamic brightness change data and a plurality of parameter nodes;
[0094] The target gate drive voltage is output to the gate drive circuit.
[0095] The power management chip is an integrated circuit module used to generate and manage the display panel's supply voltage. Specifically, this can be achieved using a power management chip with multiple voltage outputs. It uses a voltage conversion circuit to convert the input voltage into the operating voltage required by the light-emitting elements. The driver chip adjusts the gate drive voltage by dynamically adjusting the transistor's conduction state based on fluctuations in the supply voltage. This can be achieved through a built-in voltage feedback loop or digital control algorithm to maintain the operating stability of the pixel circuit.
[0096] Specifically, the power management chip continuously provides power supply voltage to the light-emitting elements of the display panel, and transmits the voltage signal to the voltage detection port of the driver chip. When the external load changes or the panel operating mode switches, causing the power supply voltage to fluctuate, the voltage monitoring module inside the driver chip captures the voltage change in real time. Through the built-in voltage compensation algorithm, the driver chip automatically calculates the correction value of the gate drive voltage and synchronously adjusts the amplitude of the drive signal output to the pixel circuit. This linkage control mechanism enables the conduction characteristics of the transistor to be compensated in time when the power supply voltage of the light-emitting element shifts, avoiding uneven brightness or signal distortion caused by voltage mismatch.
[0097] In this way, the present application realizes the coordinated control of the power supply system and the drive system by establishing a real-time data interaction channel between the power management chip and the driver chip, effectively solving the display abnormality problem caused by the dynamic change of voltage parameters.
[0098] Through the above technical solution, the present application can monitor voltage fluctuations in the display panel power supply system in real time and automatically correct the output parameters of the drive signal to ensure that the pixel circuit maintains a stable operating point under different operating conditions. This dynamic compensation mechanism significantly reduces brightness jumps caused by power supply voltage fluctuations and is particularly suitable for new oxide semiconductor display panels that require wide-range brightness adjustment.
[0099] In one embodiment, the parameter range corresponding to the dynamic brightness change data includes multiple parameter nodes, and the digital voltage control module is further configured to:
[0100] Matching the current dynamic brightness change data with a plurality of the parameter nodes;
[0101] When any target parameter node among the plurality of parameter nodes matches the current dynamic brightness change data, a preset gate driving voltage corresponding to the target parameter node is used as the target gate driving voltage.
[0102] The digital voltage control module may be a hardware unit for executing logic operations and generating voltage regulation instructions, and may be implemented using a microcontroller or a dedicated integrated circuit, and parameter matching and voltage calculation functions may be achieved through programming.
[0103] The parameter nodes can be preset discrete values of dynamic brightness change data, which can be divided specifically by brightness levels or grayscale value ranges. For example, the brightness range of 0-1000 nits can be divided into 10 equidistant nodes to establish a corresponding relationship between brightness and voltage.
[0104] The target gate drive voltage refers to the gate drive voltage value that matches the current dynamic brightness change data, which can be obtained by table lookup or interpolation calculation, for example, selecting from the preset voltage values corresponding to the parameter nodes or generating an intermediate value through linear interpolation.
[0105] For example, after the current dynamic brightness change data is acquired, it is matched with multiple preset parameter nodes. When there is a node that completely matches the current parameter, the preset gate drive voltage corresponding to the node is directly called as the target gate drive voltage. If the current parameter is between two adjacent parameter nodes, the intermediate voltage value can be calculated through an interpolation algorithm and output as the target gate drive voltage to the gate of the sub-pixel transistor, thereby dynamically adjusting the driving capability of the pixel circuit according to the brightness change.
[0106] As an example, you can combine Figure 2 、 Figure 3 and Figure 4 To understand, Figure 4 Another application scenario diagram of the display panel provided by the embodiment of the present application; the digital voltage control module can also be called a digital voltage control module, adding a digital voltage control module, linking DBV changes, adding VGH external supply and ELVDD Tracking, that is, by adding a digital control module to the DDIC to control VRGH / L to output dynamic voltage bound to DBV, while the non-node voltage is transitioned by interpolation, so that the dynamic monitoring level tracking function module of ELVDD is added at the same time, and the VRGH / L rising ramp time is adjusted in real time by tracking ELVDD to ensure that the DBV curve is smooth and flicker-free. For example, Figure 6 As shown, Figure 6 This is a schematic diagram of the dynamic ELVDD and VGH interpolation with DBV in an embodiment of the present application. The voltage difference between VCH and ELVDD is maintained, and linear interpolation is performed at non-DBV binding points. When the dynamic VGH switching amplitude is large, there will be voltage mutations causing screen flickering, which can be solved by interpolation dimming.
[0107] This application uses discrete parameter nodes and an interpolation mechanism to achieve continuous adjustment of voltage as brightness changes, avoiding display anomalies caused by voltage mutations in traditional solutions.
[0108] Through the above technical solution, this application can dynamically adjust the gate drive voltage according to the actual brightness requirements of the display panel, solving the problem of insufficient driving capability or excessive power consumption caused by fixed voltage of the new oxide panel. At the same time, the voltage regulation complexity is reduced through the combination of discrete nodes and interpolation mechanism, thereby improving the display consistency and stability.
[0109] In one embodiment, Figure 1 As shown, the digital voltage control module 201 is further used for:
[0110] When there is no target parameter node matching the current dynamic brightness change data among the plurality of parameter nodes, acquiring a first parameter node and a second parameter node adjacent to the current dynamic brightness change data from the plurality of parameter nodes;
[0111] According to the preset first gate driving voltage and second gate driving voltage corresponding to the first parameter node and the second parameter node, an interpolation algorithm is used to obtain a target gate driving voltage corresponding to the current dynamic brightness change data.
[0112] Among them, the parameter node refers to a pre-set discrete reference point within the dynamic brightness change data range, which can be specifically implemented by using the boundary points of the brightness value division. For example, the brightness range is divided into nodes corresponding to intervals such as 0-100 and 101-200, which are used to establish the corresponding relationship between the brightness parameter and the gate drive voltage.
[0113] The interpolation algorithm refers to a method of performing linear or nonlinear calculations based on the voltage values of adjacent parameter nodes. Specifically, it can be implemented using a linear interpolation formula. For example, the voltage value corresponding to the intermediate brightness is calculated based on the brightness difference and voltage difference ratio of two adjacent nodes, which is used to generate a smooth transition gate drive voltage at non-node brightness.
[0114] Specifically, when the current dynamic brightness change data of the display panel does not match the preset node, the driver chip first determines the two adjacent nodes in the interval where the brightness value is located. For example, when the current brightness is 150, the adjacent nodes may be 100 and 200. Then, according to the gate drive voltages corresponding to these two nodes, for example, 100 brightness corresponds to 10V and 200 brightness corresponds to 12V, the voltage value corresponding to 150 brightness is calculated by linear interpolation. For example, if the brightness difference is 50 and the voltage difference is 2V, the voltage increment corresponding to each unit brightness is 0.04V, and the final target gate drive voltage is 11V. As a result, the driver chip can dynamically generate a gate drive voltage that matches any brightness parameter to avoid display abnormalities caused by voltage mutations.
[0115] As an example, Figure 7 Schematic diagram of the ELVDD output by the PMIC forming a large voltage difference in the embodiment of the present application, as shown in FIG. Figure 7 As shown in the figure, ELVDD is output by PMIC and has a certain ramp-up time, forming a large voltage difference △V1. Figure 8 Schematic diagram of the voltage difference maintained by the PMIC output of ELVDD in the embodiment of the present application, as shown in FIG. Figure 8 As shown, ELVDD is output by PMIC, VRGH TrackingELVDD, maintaining the voltage difference △V1=△V2.
[0116] This application generates a continuously adjustable voltage value through an interpolation algorithm to ensure that a smoothly changing gate drive voltage can be output under different brightness parameters, eliminating the impact of voltage jumps on the display effect.
[0117] Through the above technical solution, this application solves the problem that existing display panels cannot dynamically adjust the gate drive voltage. When the dynamic brightness change data changes continuously, an accurately matched target gate drive voltage is generated through interpolation calculation, avoiding the screen flickering phenomenon caused by voltage mutation, and improving the stability of the display panel and the uniformity of the picture.
[0118] In one embodiment, Figure 5 As shown, a mapping table is formed by parameters of multiple parameter nodes and set voltages.
[0119] The digital voltage control module 201 is further configured to query the mapping table according to the current brightness parameter to obtain the target gate driving voltage.
[0120] Parameter nodes are discrete brightness values within the dynamic brightness change data range. This can be achieved by using a preset brightness level division method, for example, dividing the brightness range of 0-1000 nits into nodes at intervals of 100 nits. A mapping table is a database that stores parameter nodes and corresponding gate drive voltage values. This can be implemented using non-volatile memory or a lookup table structure. By pre-establishing the correspondence between brightness parameters and voltage values, fast querying is possible.
[0121] Specifically, during operation, the driver chip first obtains the current dynamic brightness change data of the display panel, for example, the current brightness is 600 nits. Subsequently, the driver chip compares the current brightness parameter with the parameter node recorded in the mapping table. For example, the mapping table stores nodes such as 600 nits. If the current brightness parameter completely matches a certain node, for example, the current brightness is 600 nits, the corresponding voltage value pre-set in the mapping table is directly called as the target gate drive voltage. For example, the VGH voltage corresponding to the 600 nits node is 8.4V, and the driver chip outputs this voltage to the transistor of the sub-pixel without the need for interpolation calculations, thereby reducing the computational complexity.
[0122] As an example, Figure 5Schematic diagram of dynamic ELVDD and VGH settings in an embodiment of the present application; Figure 5 As shown in the figure, VGH is dynamically set to meet the high brightness and high voltage VGH requirements while also ensuring low brightness, low voltage and low power consumption.
[0123] This application directly calls the target gate drive voltage through a pre-stored mapping table, avoiding the consumption of computing resources and shortening the response time. It is especially suitable for scenarios with high refresh rates or frequent changes in dynamic brightness.
[0124] Through the above technical solution, the present application can achieve rapid and precise adjustment of the gate drive voltage, reduce display anomalies caused by voltage switching delays, such as effectively suppressing screen flickering when brightness changes suddenly, while reducing the computing load of the driver chip and improving system stability.
[0125] In order to better illustrate the display panel of the above display panel, the present invention also provides a driving method of the display panel.
[0126] The display panel includes a driver chip, a gate driver circuit, and a plurality of sub-pixels. The sub-pixels include a light-emitting element and a pixel circuit that are electrically connected. The pixel circuit includes a plurality of transistors for controlling the working state of the light-emitting element. The method includes the following steps performed by the driver chip:
[0127] Adjusting the gate driving voltage output to the gate driving circuit according to the dynamic brightness change data of the display panel, so that the gate driving circuit outputs a gate driving signal to the transistor according to the gate driving voltage:
[0128] Dynamic brightness change data refers to a numerical signal associated with the display panel's current brightness level. This data can be obtained through a brightness adjustment module or external input commands, and is used to reflect the desired luminous intensity of the displayed image. Gate drive voltage refers to the voltage signal applied to the transistor gate. This can be adjusted through the voltage generation circuit within the driver chip or an external power management module. Its changes directly affect the transistor's conduction state and the drive current of the light-emitting element.
[0129] Specifically, during the operation of the display panel, when the dynamic brightness change data changes, such as switching from low-brightness mode to high-brightness mode, the driving method dynamically adjusts the amplitude of the gate drive voltage to match the conduction characteristics of the transistor with the brightness requirements. In specific implementation, the current dynamic brightness change data can be first obtained, for example by reading a brightness register or receiving an external control signal. Then, based on a preset brightness-voltage correspondence, the target gate drive voltage is determined and output to the transistor in the pixel circuit. This adjustment process avoids insufficient or overdriving the transistor due to a fixed voltage, thereby optimizing the response speed and stability of the light-emitting element.
[0130] In one embodiment, the display panel further includes a power management chip connected to the driver chip, the power management chip outputting a power supply voltage to the display panel for powering the light-emitting element, and outputting the power supply voltage to the driver chip, and the method further includes:
[0131] When the power supply voltage changes, the gate drive voltage is adjusted so that the voltage difference between the gate drive voltage and the power supply voltage is maintained within a set voltage difference range.
[0132] The details of the driving method of the display panel can be found in the above-mentioned embodiments and will not be repeated here.
[0133] like Figure 9 As shown, Figure 9 Schematic diagram of a display device in an embodiment of the present application. This embodiment of the present application provides a display device comprising a display panel and the aforementioned display panel driver chip. Details regarding the display panel driver chip can be found in the aforementioned embodiments and will not be repeated here.
[0134] The above is a detailed introduction to the display panel and the driving method of the display panel provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A display panel, characterized in that: It includes a driving chip, a gate driving circuit and a plurality of sub-pixels, wherein the sub-pixels include a light-emitting element and a pixel circuit that are electrically connected; The pixel circuit includes a plurality of transistors for controlling the working state of the light emitting element; The driving chip is used to provide a gate driving voltage to the gate driving circuit, and adjust the gate driving voltage according to the change of the dynamic brightness change data of the display panel; The gate driving circuit outputs a gate driving signal to the transistor according to the gate driving voltage.
2. The display panel according to claim 1, wherein: Also included is a power management chip connected to the driver chip, the power management chip outputting a power supply voltage to the display panel for powering the light-emitting element, and outputting the power supply voltage to the driver chip; The driver chip includes a digital voltage control module, which is used to adjust the gate drive voltage when the power supply voltage changes, so that the voltage difference between the gate drive voltage and the power supply voltage remains within a set voltage difference range.
3. The display panel according to claim 2, wherein: The driver chip also includes an analog-to-digital converter, which is connected to a power output pin in the power management chip for outputting the power supply voltage. The analog-to-digital converter is used to sample the power supply voltage through the power output pin to detect whether the power supply voltage changes.
4. The display panel according to claim 2, wherein: The pixel circuit includes a driving transistor, a data writing transistor, a transmission transistor, a reset transistor, a first light emission control transistor, a second light emission control transistor; and a storage capacitor; wherein, The first electrode of the first light emitting control transistor is connected to a power line for providing the power supply voltage, the second electrode of the first light emitting control transistor is connected to the second electrode of the driving transistor, and the gate is used to receive a first light emitting control signal; The first electrode of the driving transistor is connected to the second electrode of the second light emitting control transistor; the gate of the driving transistor is connected to one end of the storage capacitor; The first electrode of the second light emitting control transistor is connected to the anode of the light emitting element; the gate of the second light emitting control transistor is used to receive a second light emitting control signal; The first electrode of the reset transistor is connected to the other end of the storage capacitor, and the second electrode of the reset transistor is used to receive a reset signal; the gate of the reset transistor is used to receive a second light emitting control signal; The first electrode of the data writing transistor is used to receive a data signal, the second electrode of the data writing transistor is connected to the first electrode of the driving transistor, and the gate of the data writing transistor is used to receive a second scanning signal; The first electrode of the transmission transistor is connected to one end of the storage capacitor, the second electrode of the transmission transistor is connected to the gate of the driving transistor, and the gate of the transmission transistor is used to receive a first scanning signal; The gate driving signal includes at least one of the first light emitting control signal, the second light emitting control signal, and the reset signal.
5. The display panel according to claim 2, wherein: The parameter range corresponding to the dynamic brightness change data includes multiple parameter nodes, and the digital voltage control module is used to: Acquiring current dynamic brightness change data of the display panel; Obtaining a target gate drive voltage according to the current dynamic brightness change data and a plurality of parameter nodes; The target gate drive voltage is output to the gate drive circuit.
6. The display panel according to claim 5, wherein: The digital voltage control module is further configured to: Matching the current dynamic brightness change data with a plurality of the parameter nodes; When any target parameter node among the plurality of parameter nodes matches the current dynamic brightness change data, a preset gate driving voltage corresponding to the target parameter node is used as the target gate driving voltage.
7. The display panel according to claim 6, wherein: The digital voltage control module is further configured to: When there is no target parameter node matching the current dynamic brightness change data among the plurality of parameter nodes, acquiring a first parameter node and a second parameter node adjacent to the current dynamic brightness change data from the plurality of parameter nodes; According to the preset first gate driving voltage and second gate driving voltage corresponding to the first parameter node and the second parameter node, an interpolation algorithm is used to obtain a target gate driving voltage corresponding to the current dynamic brightness change data.
8. The display panel according to claim 5, wherein: A mapping table is formed by parameters of the plurality of parameter nodes and the set voltages; The digital voltage control module is further configured to query the mapping table according to a current brightness parameter to obtain the target gate drive voltage.
9. A method for driving a display panel, the display panel comprising a driver chip, a gate driver circuit, and a plurality of sub-pixels, the sub-pixels comprising electrically connected light-emitting elements and pixel circuits, the pixel circuits comprising a plurality of transistors for controlling the operating state of the light-emitting elements, characterized in that: The method includes the following steps performed by the driver chip: The gate driving voltage output to the gate driving circuit is adjusted according to the dynamic brightness change data of the display panel, so that the gate driving circuit outputs a gate driving signal to the transistor according to the gate driving voltage.
10. The driving method according to claim 9, wherein: The display panel further includes a power management chip connected to the driver chip, the power management chip outputting a power supply voltage for powering the light-emitting element to the display panel and outputting the power supply voltage to the driver chip, and the method further includes: When the power supply voltage changes, the gate drive voltage is adjusted so that the voltage difference between the gate drive voltage and the power supply voltage is maintained within a set voltage difference range.
Citation Information
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