Semiconductor device and method of manufacturing the same
By forming strip-shaped contacts and peripheral contacts during the semiconductor device manufacturing process, the wafer acceptance test problem caused by mask shift is solved, achieving easier testing and higher yield.
Patent Information
- Application Number
- CN202510774447.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-11-28
- Filing Date
- 2025-06-11
- Publication Date
- 2025-09-12
AI Technical Summary
During wafer fabrication, mask shift caused by self-aligned double patterning makes wafer acceptance testing difficult, especially in target active areas where testing is difficult to control or avoid.
By forming multiple photoresist strips on the substrate and making strip-shaped contacts in the openings, the active area and the peripheral contacts are connected to form a single conductive path to facilitate wafer acceptance testing.
This enables easier wafer acceptance testing, ensures yield, and simplifies the testing process.
Smart Images
Figure CN120637240A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device. Background Art
[0002] During the final stages of memory cell manufacturing, wafer acceptance testing (WAT) is often performed to test the electrical properties of the wafer. However, as wafer manufacturing processes have changed and self-aligned double patterning (SADP) has been introduced, testing has become more difficult to perform due to the presence of many target active areas (AA) due to mask shift. This mask shift is difficult to control or avoid, necessitating new testing methods. Summary of the Invention
[0003] One aspect of the present disclosure provides a method for manufacturing a semiconductor device.
[0004] According to one embodiment of the present disclosure, a method for manufacturing a semiconductor device includes: forming a plurality of photoresist strips on a substrate, wherein an opening is formed in each of the plurality of photoresist strips; forming a plurality of contacts in the plurality of openings in the plurality of photoresist strips, wherein an outer profile of each of the plurality of contacts is strip-shaped; and forming a plurality of bit lines using the plurality of photoresist strips.
[0005] In some embodiments of the present disclosure, the method for manufacturing a semiconductor device further includes forming a plurality of active regions on the substrate.
[0006] In some embodiments of the present disclosure, each of the plurality of contacts connects two of the plurality of active regions.
[0007] In some embodiments of the present disclosure, each of the plurality of active regions is connected to two of the plurality of contacts.
[0008] In some embodiments of the present disclosure, the method for manufacturing a semiconductor device further includes forming a peripheral contact on the substrate.
[0009] In some embodiments of the present disclosure, the peripheral contact electrically connects the plurality of contacts.
[0010] In some embodiments of the present disclosure, the method for manufacturing a semiconductor device further includes measuring the resistance of the active region through a plurality of contacts.
[0011] Another aspect of the present disclosure provides a method for manufacturing a semiconductor device.
[0012] According to one embodiment of the present disclosure, a method for fabricating a semiconductor device includes: forming a plurality of active regions on a substrate; forming a plurality of contacts using a plurality of photoresist strips, wherein an opening is formed in each of the plurality of photoresist strips, and an outer periphery of each of the plurality of contacts is strip-shaped; and forming a plurality of bit lines using the plurality of photoresist strips.
[0013] In some embodiments of the present disclosure, each of the plurality of contacts connects two of the plurality of active regions.
[0014] In some embodiments of the present disclosure, each of the plurality of active regions is connected to two of the plurality of contacts.
[0015] In some embodiments of the present disclosure, the method for manufacturing a semiconductor device further includes forming a peripheral contact on the substrate.
[0016] In some embodiments of the present disclosure, the peripheral contact electrically connects the plurality of contacts.
[0017] In some embodiments of the present disclosure, the method for manufacturing a semiconductor device further includes measuring the resistance of the active region through a plurality of contacts.
[0018] Another aspect of the present disclosure provides a semiconductor device.
[0019] According to one embodiment of the present disclosure, a semiconductor device includes a substrate, a plurality of active regions, a plurality of contacts, a plurality of bit lines, and a plurality of peripheral contacts. The plurality of active regions are positioned on the substrate. The plurality of contacts are positioned on and electrically connect the plurality of active regions, wherein an outer periphery of each of the plurality of contacts is strip-shaped. The plurality of bit lines are positioned on the plurality of active regions. The plurality of peripheral contacts are positioned on the plurality of active regions.
[0020] In some embodiments of the present disclosure, each of the plurality of contacts connects two of the plurality of active regions.
[0021] In some embodiments of the present disclosure, each of the plurality of active regions is connected to two of the plurality of contacts.
[0022] In some embodiments of the present disclosure, a plurality of peripheral contacts electrically connect the plurality of contacts and the plurality of active regions.
[0023] In some embodiments of the present disclosure, two of the plurality of peripheral contacts are electrically connected to each other via the plurality of active regions and the plurality of contacts.
[0024] In the aforementioned embodiments of the present disclosure, since multiple strip contacts are formed during the semiconductor device manufacturing process, a test probe can electrically connect two of the multiple perimeter contacts during wafer acceptance testing. Consequently, a single conductive path formed by the perimeter contacts, the strip contacts, and the active region is formed and can be used to perform wafer acceptance testing. This single conductive path facilitates testing and ensures high yield. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] When accompanied by Figure 1 The present disclosure is best understood from the following detailed description when read together. Note that, in accordance with standard practice in this industry, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily increased or decreased for clarity of discussion.
[0026] Figures 1 to 4 FIG. 1 is a top view of an intermediate step of a method for fabricating a semiconductor device according to an embodiment of the present disclosure.
[0027] Figure 5 For semiconductor devices Figure 4 A top view of the steps.
[0028] Figure 6 FIG. 1 is a top view of an intermediate step of a method for fabricating a semiconductor device according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0029] The following disclosure provides many different embodiments or examples for implementing the various features of the provided objects. Specific examples of components and configurations are described below to simplify the disclosure. Of course, these components and configurations are merely examples and are not intended to be limiting. Furthermore, the disclosure may repeat reference numbers and / or letters throughout the various examples. This repetition is for simplicity and clarity and does not, in itself, indicate a relationship between the various embodiments and / or configurations discussed.
[0030] Additionally, spatially relative terms, such as "below," "beneath," "lower," "above," "upper," and the like, may be used herein for ease of description to describe the relationship of one or more elements or features to another or further elements or features as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should likewise be interpreted accordingly.
[0031] As used herein, the terms "about," "approximately," or "substantially" include values and averages within an acceptable tolerance range for a particular value as determined by one skilled in the art, taking into account the particular quantity measurement in question and the errors associated with the measurements (i.e., the limitations of the system being measured). For example, "about" can mean within one or more standard deviations of a value, or within ±30%, ±20%, ±10%, or ±5% of a value. Additionally, for the terms "about," "approximately," or "substantially" as used herein, a relatively acceptable tolerance range or standard deviation can be selected based on the optical properties, etching properties, or other properties, rather than one standard being applied to all properties.
[0032] Figures 1 to 4 FIG1 is a top view of an intermediate step of a method for manufacturing a semiconductor device 100 according to an embodiment of the present disclosure. Figure 1 First, a plurality of active regions 120 are formed on the substrate 110. The number of active regions 120 is not limited to the number shown in FIG. Figure 1 In some embodiments, the active region 120 is elliptical. In some embodiments, the active region 120 is circular, square, or any other suitable shape. In some embodiments, the active region 120 may be arranged in an array or other suitable configuration that maximizes the density of the active region 120.
[0033] See Figure 2 Subsequently, a plurality of photoresist strips 200 are formed on the substrate 110, wherein an opening 210 is formed in each of the photoresist strips 200. In some embodiments, the photoresist strips 200 are bit line (BL) profile etchants, as the photoresist strips 200 are used to form bit lines in a subsequent process. In some embodiments, the photoresist strips 200 are uniformly coated on the substrate and then undergo an exposure and development process. In some embodiments, the openings 210 of the photoresist strips 200 are arranged so that the openings 210 are all arranged in a row. The extension direction of the wiring can be parallel to the long axis of the elliptical active region 120, or at an angle thereto.
[0034] See Figure 3Subsequently, a plurality of contacts 130 are formed in openings 210 of photoresist strip 200, wherein each contact 130 has a stripe-shaped outer contour. Contacts 130 are positioned on and electrically connected to active regions 120. In some embodiments, contacts 130 are contact pads of active regions 120. In some embodiments, each contact 130 connects to two active regions 120. In some embodiments, each active region 120 connects to two contacts 130. Since each contact 130 connects to two active regions 120 and each active region 120 connects to two contacts 130, contact-AA-contact...AA-contact is formed after contacts 130 are formed on active regions 120. In some embodiments, the material of contacts 130 may include a conductive material such as copper (Cu), silver (Ag), silver (Au), gold (Au), alloys thereof, combinations thereof, or the like. In some embodiments, contacts 130 may be formed via a deposition process. It is worth noting that other contact pads other than strips are also formed in this step, which will be described in Figure 5 middle.
[0035] See Figure 4 , thereafter, peripheral contacts 140 are formed on substrate 110. Peripheral contacts 140 are positioned on contacts 130 at the outermost portion of substrate 110 and electrically connect contacts 130 at the outermost portion of substrate 110, such that peripheral contacts 140 electrically connect the conductive paths mentioned above. Figure 4 In FIG, only two perimeter contacts 140 are shown, but in actual applications, more perimeter contacts 140 may be formed. The perimeter contacts 140 are used to connect test probes for active area (AA) resistance testing so that wafer acceptance testing can be performed.
[0036] Figure 5 For semiconductor devices Figure 4 A top view of the steps. Figure 5 After the step of forming the peripheral contacts 140, the resistance of the active region is measured via the contacts 130. It is worth noting that the measurement uses only the strip-shaped contacts 130, and the plurality of strip-shaped contacts 130 are in the conductive path mentioned above. Other contact pads 160 that are not strip-shaped are used to electrically connect to circuits, such as bit lines, word lines, or other peripheral circuits in subsequent processes. In some embodiments, the measurement of the active region resistance is measured via a four-terminal sensing method, but the present disclosure is not limited thereto. In some embodiments, two of the probes of the four-terminal sensing method are electrically connected Figure 5 The peripheral contacts 140 in.
[0037] Figure 6 FIG1 is a top view of an intermediate step of a method for manufacturing a semiconductor device 100 according to an embodiment of the present disclosure. Figure 6 Afterwards, a plurality of bit lines 150 are formed using photoresist strips 200. After this step, semiconductor device 100 is fabricated. Bit lines 150 are positioned on and electrically connected to active region 120. It is noteworthy that despite the presence of openings 210 in photoresist strips 200, the formed bit lines 150 are continuous. In some embodiments, bit lines 150 are formed on both sides of photoresist strips 200, such that two bit lines 150 are formed per photoresist strip 200. In some embodiments, word lines (not shown) are formed after this step, with the word lines being perpendicular to the direction in which bit lines 150 extend.
[0038] In short, since the strip contacts 130 are formed during the manufacturing process of the semiconductor device 100, when performing a wafer acceptance test, a test probe can electrically connect two of the perimeter contacts 140. A single conductive path formed by the perimeter contacts 140, the strip contacts 130, and the active region 120 is then formed and can be used to perform a wafer acceptance test. Multiple wafer acceptance tests make testing easier and ensure yield.
[0039] The foregoing summarizes the features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art will appreciate that they may readily use this disclosure as a basis for designing or modifying other processes and structures for implementing the same purposes and / or achieving the same advantages of the embodiments introduced herein. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that such equivalent constructions may be variously modified, substituted, and replaced herein without departing from the spirit and scope of the present disclosure.
[0040] Although the present disclosure has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.
[0041] It should be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the present disclosure covers modifications and variations of the present disclosure, with the limitation that the modifications and variations are within the scope of the appended claims.
[0042]
Explanation of symbols
[0043] 100:Semiconductor device
[0044] 110:Substrate
[0045] 120: Active area
[0046] 130: Contact
[0047] 140: Peripheral contacts
[0048] 150: Bit line
[0049] 160: Contact pad
[0050] 200: Photoresist strips
[0051] 210: Speak.
Claims
1. A method for manufacturing a semiconductor device, characterized in that: The following steps are involved: forming a plurality of photoresist strips on a substrate, wherein an opening is formed in each of the plurality of photoresist strips; forming a plurality of contacts in the plurality of openings of the plurality of photoresist strips, wherein an outer contour of each of the plurality of contacts is in the shape of a strip; and A plurality of bit lines are formed using the plurality of photoresist strips.
2. The method for manufacturing a semiconductor device according to claim 1, wherein: Further comprising the following steps: A plurality of active regions are formed on the substrate.
3. The method for manufacturing a semiconductor device according to claim 2, wherein: Each of the plurality of contacts connects two of the plurality of active regions.
4. The method for manufacturing a semiconductor device according to claim 2, wherein: Each of the plurality of active regions connects two of the plurality of contacts.
5. The method for manufacturing a semiconductor device according to claim 1, wherein: Further comprising the following steps: Peripheral contacts are formed on the substrate.
6. The method for manufacturing a semiconductor device according to claim 5, wherein: The perimeter contact electrically connects the plurality of contacts.
7. The method for manufacturing a semiconductor device according to claim 1, wherein: Further comprising the following steps: The active region resistance is measured via the plurality of contacts.
8. A method for manufacturing a semiconductor device, characterized in that: The following steps are involved: forming a plurality of active regions on a substrate; forming a plurality of contacts using a plurality of photoresist strips, wherein an opening is formed in each of the plurality of photoresist strips, and an outer contour of each of the plurality of contacts is a strip shape; and A plurality of bit lines are formed using the plurality of photoresist strips.
9. The method for manufacturing a semiconductor device according to claim 8, wherein: Each of the plurality of contacts connects two of the plurality of active regions.
10. The method for manufacturing a semiconductor device according to claim 8, wherein: Each of the plurality of active regions connects two of the plurality of contacts.
11. The method for manufacturing a semiconductor device according to claim 8, wherein: Further comprising the following steps: Peripheral contacts are formed on the substrate.
12. The method for manufacturing a semiconductor device according to claim 11, wherein: The perimeter contact electrically connects the plurality of contacts in the plurality of openings of the plurality of bit lines.
13. The method for manufacturing a semiconductor device according to claim 8, wherein: Further comprising the following steps: The active region resistance is measured via the plurality of contacts.
14. A semiconductor device, characterized in that: Include: substrate; a plurality of active regions positioned on the substrate; a plurality of contacts positioned on the plurality of active regions and electrically connecting the plurality of active regions, wherein an outer profile of each of the plurality of contacts is in the shape of a strip; a plurality of bit lines positioned on the plurality of active regions; and A plurality of peripheral contacts are positioned on the plurality of active areas.
15. The semiconductor device according to claim 14, wherein Each of the plurality of contacts connects two of the plurality of active regions.
16. The semiconductor device according to claim 14, wherein Each of the plurality of active regions connects two of the plurality of contacts.
17. The semiconductor device according to claim 14, wherein The peripheral contacts electrically connect the contacts and the active regions.
18. The semiconductor device according to claim 14, wherein Two of the plurality of peripheral contacts are electrically connected to each other through the plurality of active regions and the plurality of contacts.