Semiconductor packaging structure, preparation method thereof and storage system

Abstract

The invention discloses a semiconductor packaging structure, a preparation method thereof and a storage system. The semiconductor package structure includes: a substrate; the semiconductor stacking structure comprises a plurality of semiconductor structures which are sequentially stacked on one side of the substrate in the first direction; and at least one part of the heat pipe structure is located in the semiconductor structure closest to the substrate, and at least the other part of the heat pipe structure penetrates through the semiconductor stacking structure in the first direction.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to a semiconductor packaging structure, a preparation method thereof, and a storage system. Background Art

[0002] With the advancement of semiconductor technology, electronic devices are becoming increasingly miniaturized, while their storage capacity is also increasing. Currently, semiconductor packaging structures in electronic devices typically utilize stack-die or flow-over-wire (FOW) stacking technologies to increase storage capacity. However, as the number of stacked semiconductor structures, or chips, increases, the heat flux density of the semiconductor packaging structure also increases.

[0003] Currently, how to further improve the heat dissipation capability of semiconductor packaging structures and reduce packaging thermal resistance is one of the technical problems that those skilled in the art urgently need to solve. Summary of the Invention

[0004] The semiconductor packaging structure and its preparation method, and the storage system provided in the embodiments of the present application can solve or partially solve the above-mentioned deficiencies in the prior art or other deficiencies in the prior art.

[0005] The semiconductor package structure provided according to the first aspect of the present application includes:

[0006] substrate;

[0007] A semiconductor stack structure comprising a plurality of semiconductor structures sequentially stacked on one side of the substrate along a first direction; and

[0008] A heat pipe structure, at least a portion of which is located in the semiconductor structure closest to the substrate, and at least another portion of which penetrates the semiconductor stack structure along the first direction.

[0009] According to the second aspect of the present application, a method for preparing a semiconductor package structure includes:

[0010] forming a semiconductor stack structure on one side of the carrier, the semiconductor stack structure comprising a plurality of semiconductor structures stacked sequentially along a first direction; and

[0011] replacing the carrier with a substrate;

[0012] A heat pipe structure is formed in at least the semiconductor stack structure, at least a portion of the heat pipe structure is located in the semiconductor structure closest to the substrate, and at least another portion passes through the semiconductor stack structure along the first direction.

[0013] According to the storage system provided in the third aspect of the present application, the storage system includes a controller and the semiconductor package structure described in the first aspect of the present application, the controller is coupled to the semiconductor package structure and is used to control the semiconductor package structure to store data.

[0014] The semiconductor packaging structure and its preparation method and storage system provided in the embodiments of the present application, by arranging a heat pipe structure in the semiconductor stack structure, and making at least a portion of the heat pipe structure located in the semiconductor structure closest to the substrate, and at least another portion penetrating the semiconductor stack structure along a first direction, can continuously transfer the heat generated by the semiconductor structure closest to the substrate to an external heat sink through the heat pipe structure, thereby not only allowing the semiconductor structure closest to the substrate to dissipate heat in a timely manner and avoiding thermal failure of the semiconductor structure closest to the substrate, but also reducing the packaging thermal resistance of the entire semiconductor packaging structure, improving its heat dissipation capacity, and enabling it to meet various complex application scenarios.

[0015] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Other features, objects, and advantages of the present application will become more apparent by reading the detailed description of the non-limiting embodiments made with reference to the following drawings. The drawings are provided for a better understanding of the present invention and do not constitute a limitation of the present application. In the drawings:

[0017] Figure 1 is a schematic cross-sectional view of a semiconductor package structure according to one embodiment of the present application;

[0018] Figures 2 to 5 is a process schematic diagram of a method for preparing a semiconductor packaging structure according to another embodiment of the present application;

[0019] Figure 6 is a schematic cross-sectional view of a semiconductor package structure according to another embodiment of the present application;

[0020] Figures 7 to 9 is a process schematic diagram of a method for preparing a semiconductor packaging structure according to yet another embodiment of the present application;

[0021] Figure 10 is a schematic cross-sectional view of a semiconductor package structure according to yet another embodiment of the present application;

[0022] Figure 11 is a schematic axial cross-sectional view of a heat pipe structure according to one embodiment of the present application;

[0023] Figure 12 is a schematic radial cross-sectional view of a heat pipe structure according to one embodiment of the present application;

[0024] Figure 13 is a schematic flow chart of a method for preparing a semiconductor packaging structure according to one embodiment of the present application; and

[0025] Figure 14 is a block diagram of a system having a semiconductor packaging structure according to one embodiment of the present application.

[0026] Reference numerals:

[0027] 100, substrate; 200, semiconductor stack structure; 210, semiconductor structure;

[0028] 211. First semiconductor structure; 212. Second semiconductor structure;

[0029] 213, third semiconductor structure; 300, heat pipe structure; 301, first receiving hole;

[0030] 302, second receiving hole; 303, tube shell; 304, liquid wick; 310, first heat pipe;

[0031] 311, first end; 312, second end; 320, second heat pipe; 330, heat pipe loop;

[0032] 331, first heat pipe section; 332, second heat pipe section; 333, third heat pipe section;

[0033] 334, fourth heat pipe section; 340, driving pump; 400, plastic package;

[0034] 510, first conductive structure; 520, second conductive structure; 530, third conductive structure;

[0035] 600, carrier; 700, system; 701, memory system;

[0036] 702 , semiconductor packaging structure; 703 , memory controller; 704 , host. DETAILED DESCRIPTION

[0037] For a better understanding of the present application, various aspects of the present application will be described in more detail with reference to the accompanying drawings. It should be understood that these detailed descriptions are merely descriptions of exemplary embodiments of the present application and are not intended to limit the scope of the present application in any way. Throughout the specification, the same reference numerals refer to the same elements. The expression "and / or" includes any and all combinations of one or more of the associated listed items.

[0038] It should be noted that in this specification, the expressions first, second, third, etc. are only used to distinguish one feature from another feature area, and do not represent any limitation on the features, and especially do not represent any order of precedence.

[0039] In the accompanying drawings, the thickness, size, and shape of components have been slightly adjusted for ease of illustration. The accompanying drawings are for illustration only and are not drawn strictly to scale. As used herein, the terms "substantially," "approximately," and similar terms are used to indicate approximations, not degrees, and are intended to account for the inherent variations in measurements or calculations that would be recognized by one of ordinary skill in the art.

[0040] It should also be understood that expressions such as "comprises," "including," "having," "includes," and / or "comprising" are open rather than closed expressions in this specification, indicating the presence of the stated features, elements, and / or components, but do not exclude the presence of one or more other features, elements, components, and / or combinations thereof. In addition, when expressions such as "at least one of..." appear after a list of listed features, they modify the entire list of features rather than just the individual elements in the list. In addition, when describing embodiments of the present application, "may" is used to mean "one or more embodiments of the present application." And, the term "exemplary" is intended to refer to an example or illustration.

[0041] Unless otherwise defined, all words used herein (including engineering terms and scientific and technological terms) have the same meaning as commonly understood by those skilled in the art to which this application belongs. It should also be understood that, unless otherwise specified in this application, words defined in commonly used dictionaries should be interpreted as having the same meaning as they do in the context of the relevant technology, and should not be interpreted in an idealized or overly formal sense.

[0042] It should be noted that, unless otherwise specified or inconsistent with the context, the embodiments and features of the embodiments in this application may be combined with each other. Furthermore, unless expressly limited or inconsistent with the context, the specific steps included in the methods described in this application are not necessarily limited to the order in which they are described, but may be performed in any order or in parallel. The present application will be described in detail below with reference to the accompanying drawings and in conjunction with the embodiments.

[0043] In addition, in the present application, the term "layer" refers to a material portion including an area with a thickness. A layer may extend over the entirety of the underlying or upper structure, or may have an extent that is smaller than the extent of the underlying or upper structure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure having a thickness that is smaller than the thickness of the continuous structure. A layer may extend horizontally, vertically and / or along an inclined surface. A layer may include multiple sublayers. In addition, in the present application, when "connected" or "coupled" is used, it may indicate direct contact or indirect contact between the corresponding parts, unless otherwise clearly defined or inferred from the context.

[0044] With the development of semiconductor technology, electronic devices are becoming more and more miniaturized and their storage capacity is also increasing. The semiconductor packaging structure of electronic devices usually uses chip stacking (Stack-Die) technology or chip FOW (Flow overwire) stacking technology to increase storage capacity. Figure 1 As shown, the semiconductor packaging structure generally includes a plastic package 400, a substrate 100, and a plurality of semiconductor structures 210 stacked in sequence on one side of the substrate 100 along a first direction (z direction). The plastic package 400 packages the plurality of semiconductor structures 210 on the substrate 100. As the number of stacked semiconductor structures 210, i.e., chips, continues to increase, the heat flux density of the semiconductor packaging structure also increases. The application scenarios of semiconductor packaging structures are very complex. If the heat generated by the semiconductor structure 210 cannot be dissipated in time under high-load working conditions, insufficient heat dissipation is likely to occur. In particular, for the bottom semiconductor structure 210, i.e., the semiconductor structure 210 closest to the substrate 100, reliability issues such as EM (electromigration) instability are prone to occur, resulting in a decrease in the performance stability of the semiconductor structure 210, and even thermal failure may occur.

[0045] Based on this, in order to solve at least part of the above problems, an embodiment of the present application provides a semiconductor packaging structure. Figure 5 、 Figure 6 、 Figure 9 and Figure 10 Schematic cross-sectional views of semiconductor package structures according to different embodiments of the present application are shown. The semiconductor package structure includes a substrate 100, a semiconductor stack structure 200, and a heat pipe structure 300. The semiconductor stack structure 200 includes a plurality of semiconductor structures 210, which are stacked sequentially on one side of the substrate 100 along a first direction (z direction). At least a portion of the heat pipe structure 300 is located in the semiconductor structure 210 closest to the substrate 100, and at least another portion thereof extends through the semiconductor stack structure 200 along the first direction (z direction).

[0046] Since at least a portion of the heat pipe structure 300 is located in the semiconductor structure 210 closest to the substrate 100, i.e., the bottommost semiconductor structure 210, the heat generated by the bottommost semiconductor structure 210 during operation of the semiconductor package structure is transferred to the heat pipe structure 300 by heat conduction. The liquid working medium in the heat pipe structure 300 is evaporated by the heat and converted into steam. The steam flows along the heat pipe structure 300 under the action of the pressure difference, while at least another portion of the heat pipe structure 300 penetrates the semiconductor stack structure 200 in the first direction (z direction). As a result, the heat carried by the steam can be released to an external heat sink through the portion of the heat pipe structure 300 that penetrates the semiconductor stack structure 200. The heat sink can be the external environment or an external heat sink, such as a heat sink or radiator. After the steam releases heat, the condensed liquid working medium will flow back to the portion of the heat pipe structure 300 located at the bottommost semiconductor structure 210 under the action of capillary force. This cycle repeats, and the heat generated by the bottommost semiconductor structure 210 is continuously transferred to the external heat sink through the heat pipe structure 300. As can be seen, the liquid working medium exists in at least two states, liquid and gas, within the heat pipe structure 300, and transfers heat through the phase change process of evaporation and condensation. In the embodiments of the present application, the liquid working medium may include, but is not limited to, a low-boiling-point, volatile working medium such as water, methanol, acetone, and / or ammonia.

[0047] As can be seen from the above, the embodiment of the present application sets a heat pipe structure 300 in the semiconductor stack structure 200, and makes at least a part of the heat pipe structure 300 located in the semiconductor structure 210 closest to the substrate 100, and at least another part passes through the semiconductor stack structure 200 along the first direction (z direction). The heat generated by the semiconductor structure 210 closest to the substrate 100 can be continuously transferred to the external heat sink through the heat pipe structure 300, thereby not only allowing the semiconductor structure 210 closest to the substrate 100 to dissipate heat in time and avoid thermal failure of the semiconductor structure 210 closest to the substrate 100, but also reducing the packaging thermal resistance of the entire semiconductor packaging structure, improving its heat dissipation capacity, so that it can meet various complex application scenarios.

[0048] In some embodiments, the semiconductor package structure may further include a plastic package 400, which packages the semiconductor stack structure 200 and the heat pipe structure 300 on the substrate 100. The material of the plastic package 400 may include, but is not limited to, at least one of polyimide, silicone, and EMC (Epoxy Molding Compound).

[0049] In order to improve the heat dissipation capability of the semiconductor package structure, the heat pipe structure 300 can adopt various structural forms, for example:

[0050] Form 1: The heat pipe structure 300 may include a first heat pipe 310. Figure 5 and Figure 6 As shown, the first heat pipe 310 can extend from the side of the semiconductor stack structure 200 away from the substrate 100 along the first direction (z direction) to the semiconductor structure 210 closest to the substrate 100, or as shown in FIG. Figure 9 As shown, the semiconductor stack structure 200 and the substrate 100 are penetrated along the first direction (z direction) from the side of the semiconductor stack structure 200 away from the substrate 100. In order to improve the heat dissipation efficiency, a plurality of first heat pipes 310 can be provided in the semiconductor stack structure 200, and the plurality of first heat pipes 310 can be spaced apart along a second direction (x direction) intersecting with the first direction (z direction). For example, at least one first heat pipe 310 is provided on both sides of the semiconductor stack structure 200 along the second direction (x direction). The extension lengths of at least two first heat pipes 310 along the first direction (z direction) can be the same or different. For example, in order to reduce the process difficulty, the extension lengths of all first heat pipes 310 along the first direction (z direction) are the same. For another example, the extension lengths of at least two first heat pipes 310 along the first direction (z direction) are different to meet the heat dissipation requirements of the semiconductor stack structure 200 at different positions.

[0051] like Figure 5 、 Figure 6 、 Figure 11 and Figure 12 As shown, taking the example of a first heat pipe 310 extending from the side of the semiconductor stack structure 200 away from the substrate 100 along a first direction (z-direction) through multiple semiconductor structures 210 and extending to the semiconductor structure 210 closest to the substrate 100, the first heat pipe 310 can include a closed tube shell 303 and a liquid wick 304 located within the tube shell 303. The tube shell 303 extends along the first direction (z-direction). The liquid wick 304 covers the inner sidewall of the tube shell 303 extending along the first direction (z-direction). The interior of the tube shell 303 is evacuated to a negative pressure state and filled with a low-boiling-point, volatile liquid working fluid. The first heat pipe 310 has a first end 311 and a second end 312 oppositely disposed along its extension direction. The first end 311 of the first heat pipe 310 is located in the semiconductor structure 210 closest to the substrate 100, and the second end 312 of the first heat pipe 310 extends through the semiconductor structure 210 farthest from the substrate 100. Therefore, during the operation of the semiconductor package structure, the heat generated by the bottom semiconductor structure 210 is transferred to the first end 311 of the first heat pipe 310 by heat conduction. After the first end 311 of the first heat pipe 310 is heated, the liquid working medium adsorbed in the first end of the liquid absorption core 304 will quickly evaporate and turn into steam. Figure 11As shown by the dotted arrow, the steam flows along the first direction (z direction) toward the second end 312 of the first heat pipe 310 under the action of the pressure difference. At the same time, the heat generated by other semiconductor structures 210 will also be transferred to the first heat pipe 310 by heat conduction, so that the liquid working medium adsorbed by the liquid wick 304 in the semiconductor structure 210 is also quickly converted into steam and flows toward the second end 312 of the first heat pipe 310. Compared with the semiconductor structure 210 closest to the substrate 100, the temperature of the side of the semiconductor structure 210 farthest from the substrate 100 facing away from the substrate 100 is relatively low. After the steam reaches the second end 312 of the first heat pipe 310, the heat it carries is transferred to the plastic package 400 by heat conduction and finally released to the external heat sink. As shown in FIG. Figure 11 As shown by the solid arrows, after the steam releases heat, it condenses into liquid working fluid, which then flows along the first direction (z direction) toward the first end 311 of the first heat pipe 310 under the capillary force of the wick 304. This cycle repeats, and the heat generated by all semiconductor structures 210 is continuously transferred to the second end 312 of the first heat pipe 310 and ultimately released to an external heat sink.

[0052] Form 2: Figure 5 and Figure 6As shown, the heat pipe structure 300 may include a second heat pipe 320. The second heat pipe 320 may extend from the side of the substrate 100 away from the semiconductor stack structure 200 along a first direction (z-direction) through the substrate 100 and into the semiconductor structure 210 closest to the substrate 100. Alternatively, the second heat pipe 320 may extend from the side of the substrate 100 away from the semiconductor stack structure 200 along the first direction (z-direction) through the substrate 100 and at least one semiconductor structure 210. For example, the second heat pipe 320 may extend from the side of the substrate 100 away from the semiconductor stack structure 200 along the first direction (z-direction) through the substrate 100 and all semiconductor structures 210. For another example, the second heat pipe 320 may extend from the side of the substrate 100 away from the semiconductor stack structure 200 along the first direction through at least the substrate 100 and the semiconductor structure 210 closest to the substrate 100. To improve heat dissipation efficiency, multiple second heat pipes 320 may be provided in the substrate 100. The multiple second heat pipes 320 may be spaced apart along a second direction (x-direction) that intersects the first direction (z-direction). For example, at least one second heat pipe 320 is provided on both sides of the substrate 100 along the second direction (x direction). Among them, the extension lengths of at least two second heat pipes 320 along the first direction (z direction) may be the same or different. For example, in order to reduce the difficulty of the process, the extension lengths of all second heat pipes 320 along the first direction (z direction) are the same. For another example, the extension lengths of at least two second heat pipes 320 along the first direction (z direction) are different to meet the heat dissipation requirements of the semiconductor structure 210 at different positions. The second heat pipe 320 can adopt a structure that is exactly the same or similar to that of the first heat pipe 310, and this application is not limited to this.

[0053] Form 3, such as Figure 5 and Figure 6As shown, the heat pipe structure 300 may include a first heat pipe 310 and a second heat pipe 320. The first heat pipe 310 may extend from a side of the semiconductor stack structure 200 away from the substrate 100 along a first direction (z direction) to the semiconductor structure 210 closest to the substrate 100. The second heat pipe 320 may penetrate the substrate 100 along the first direction (z direction) from a side of the substrate 100 away from the semiconductor stack structure 200 and extend to the semiconductor structure 210 closest to the substrate 100. Neither the first heat pipe 310 nor the second heat pipe 320 penetrates the semiconductor structure 210 closest to the substrate 100. Thus, the heat generated by the semiconductor structure 210 closest to the substrate 100 can be transferred to the plastic package 400 and ultimately released to an external heat sink through the first heat pipe 310 along the first direction (z direction) away from the substrate 100, and can also be transferred to an external heat sink through the second heat pipe 320 along the first direction (z direction) away from other semiconductor structures 210. It can be seen that by using the first heat pipe 310 and the second heat pipe 320 to transfer heat outward at the same time, the heat dissipation efficiency of the semiconductor structure 210 closest to the substrate 100 can be significantly improved. Especially for the case where the semiconductor structure 210 closest to the substrate 100 is thicker or has higher power consumption, the simultaneous provision of the first heat pipe 310 and the second heat pipe 320 can more effectively avoid the semiconductor structure 210 closest to the substrate 100 from experiencing reliability problems such as EM (electromigration) instability or thermal failure.

[0054] Form 4: Figure 10 As shown, the heat pipe structure 300 may further include a heat pipe loop 330, at least a portion of which is located within the plastic package 400, and at least another portion of which is located within the semiconductor structure 210 closest to the substrate 100. As an example, the heat pipe loop 330 may include a closed annular shell and a wick 304 located within the annular shell. The wick 304 covers the inner wall of the annular shell. The interior of the annular shell is pumped to a negative pressure and filled with a low-boiling-point, volatile liquid working fluid. To increase the circulation speed of the liquid working fluid and improve heat dissipation efficiency, the heat pipe structure 300 also includes a drive pump 340 in communication with the heat pipe loop 330.

[0055] For example, a heat pipe loop 330 includes a first heat pipe segment 331, a second heat pipe segment 332, a third heat pipe segment 333, and a fourth heat pipe segment 334, which are connected end-to-end. The first heat pipe segment 331, the second heat pipe 320, the third heat pipe segment 333, and the fourth heat pipe segment 334 each include a sub-tube shell and a sub-wick. The sub-tube shells of the first heat pipe segment 331 through the fourth heat pipe segment 334 are connected end-to-end to form a closed annular tube shell, and all the sub-wicks are connected in sequence to form the wick 304. As an example, the first heat pipe segment 331 is located in the plastic package 400, the third heat pipe segment 333 is located in the substrate 100, and the second heat pipe segment 332 and the fourth heat pipe segment 334 both extend along the first direction (z-direction) and penetrate the semiconductor stack structure 200. In addition, the driving pump 340 can be provided in any one of the first heat pipe segment 331 , the second heat pipe segment 332 , the third heat pipe segment 333 and the fourth heat pipe segment 334 . For example, the driving pump 340 is provided in the first heat pipe segment 331 .

[0056] Assuming that the liquid working medium within the heat pipe loop 330 flows in a clockwise direction under the drive pump 340, during operation of the semiconductor package structure, the liquid working medium flowing into the second heat pipe segment 332 first flows through the semiconductor structure 210 closest to the substrate 100, and then flows sequentially through the other semiconductor structures 210 in the first direction (z-direction) away from the substrate 100. The heat generated by each semiconductor structure 210 is transferred to the second heat pipe segment 332 via thermal conduction, causing the liquid working medium flowing through these semiconductor structures 210 in the second heat pipe segment 332 to rapidly evaporate and transform into steam. The generated steam then flows along the second heat pipe segment 332 toward the first heat pipe segment 331. After the steam enters the first heat pipe segment 331, the heat it carries is transferred to the plastic package 400 via thermal conduction. The plastic package 400 then releases the heat to an external heat sink via thermal conduction and convection. After releasing heat, the steam condenses into a liquid working medium that then flows into the fourth heat pipe segment 334. The liquid working medium then flows sequentially through each semiconductor structure 210 along the first direction (z-direction) toward the substrate 100. The heat generated by each semiconductor structure 210 is then transferred to the fourth heat pipe segment 334 by heat conduction. This causes the liquid working medium flowing through the semiconductor structures 210 in the fourth heat pipe segment 334 to rapidly evaporate and transform into steam. The generated steam then flows along the fourth heat pipe segment 334 into the third heat pipe segment 333. After the steam enters the third heat pipe segment 333, the heat it carries is transferred to the substrate 100 by heat conduction. The substrate 100 then releases the heat to an external heat sink by heat conduction and convection. In the embodiment of the present application, the heat of each semiconductor structure 210 is absorbed by the second heat pipe segment 332 and the fourth heat pipe segment 334, while the heat absorbed by the second heat pipe segment 332 and the fourth heat pipe segment 334 is released outward through the first heat pipe segment 331 and the third heat pipe segment 333. This can significantly improve the heat dissipation efficiency of the entire semiconductor packaging structure.

[0057] It should be noted that, in the absence of conflicts, the various structural forms of the heat pipe structures 300 mentioned above can be arbitrarily combined. In addition, in addition to the above-mentioned structural forms, the heat pipe structure 300 may also adopt other structural forms, which is not limited in this application. The above-mentioned semiconductor structure 210 may include, but is not limited to, at least one storage array and / or at least one peripheral circuit. Two adjacent semiconductor structures 210 may be the same or different. If the semiconductor structure 210 includes multiple storage arrays, the types of at least two storage arrays may be the same or different. The storage array may be a non-volatile storage array, such as a NAND storage array, a PROM (Programmable Read-Only memory) storage array or a NOR storage array, or it may be a volatile storage array, such as a DRAM (Dynamic Random Access Memory) storage array or an SRAM (Static Random-Access Memory) storage array.

[0058] Peripheral circuits may include, but are not limited to, at least one of high-voltage devices, low-voltage devices, and ultra-low-voltage devices. High-voltage devices may include, but are not limited to, at least one of a row decoder, a column decoder, a word line driver, and a bit line driver. Low-voltage devices may include, but are not limited to, page buffers or logic devices. Ultra-low-voltage devices may include, but are not limited to, I / O circuits. The operating voltage of high-voltage devices is generally greater than 3.3V, for example, 5V to 30V. As an example, the operating voltage of high-voltage devices may be 5V, 10V, 15V, 20V, 25V, or 30V. The operating voltage of low-voltage devices is generally between 1.3V and 3.3V. As an example, the operating voltage of low-voltage devices may be 1.3V, 1.8V, 2.3V, 2.8V, or 3.3V. The operating voltage of ultra-low-voltage devices is generally lower than 1.3V, for example, 0.9V to 1.2V. As an example, the operating voltage of ultra-low-voltage devices may be 0.9V, 0.95V, 1V, 1.05V, 1.1V, 1.15V, or 1.2V. It should be noted that the operating voltage of a high-voltage device, a low-voltage device, or an ultra-low-voltage device may also be any value between any two of the above voltage values. Those skilled in the art should understand that the above description of the operating voltage ranges of high-voltage devices, low-voltage devices, and ultra-low-voltage devices is intended to facilitate a better understanding of the present solution and does not constitute a limitation of the present application.

[0059] In addition, if Figure 6 、 Figure 9 and Figure 10 The two adjacent semiconductor structures 210 shown can be bonded together, or can be connected as shown in FIG. Figure 5As shown, the semiconductor structure 210 is connected via a first conductive structure 510. The semiconductor structure 210 closest to the substrate 100 can be bonded to the substrate 100 or connected to the substrate 100 via a second conductive structure 520. The first conductive structure 510 and / or the second conductive structure 520 can include, but are not limited to, at least one of solder balls, solder pillars, and conductive adhesive. Compared to conductive adhesive, solder balls and solder pillars significantly improve the data transmission rate and signal quality of the semiconductor structure 210. The material of the first conductive structure 510 and / or the second conductive structure 520 can include, but are not limited to, a tin-based alloy or tin.

[0060] like Figure 13 As shown, the embodiment of the present application further provides a method for preparing a semiconductor package structure, and the preparation method 1000 includes:

[0061] S100 , forming a semiconductor stacked structure 200 on one side of a carrier 600 , wherein the semiconductor stacked structure 200 includes a plurality of semiconductor structures 210 stacked sequentially along a first direction (z direction);

[0062] S200 , replacing the carrier 600 with the substrate 100 .

[0063] The heat pipe structure 300 is formed in at least the semiconductor stack structure 200 . At least a portion of the heat pipe structure 300 is located in the semiconductor structure 210 closest to the substrate 100 , and at least another portion penetrates the semiconductor stack structure 200 along the first direction (z direction).

[0064] In some embodiments, as Figure 2 As shown, multiple semiconductor structures 210 are stacked in sequence on one side of the carrier 600 along the first direction (z direction), and two adjacent semiconductor structures 210 can be bonded or connected through the first conductive structure 510. The bonding method of the two adjacent semiconductor structures 210 can be, but is not limited to, hybrid bonding, vacuum bonding, metal bonding, or wafer bonding. Figure 6Taking the semiconductor package structure shown as an example, the semiconductor stacked structure 200 includes three semiconductor structures 210 arranged sequentially along a first direction (z direction). For ease of description, the three semiconductor structures 210 may be referred to as the first semiconductor structure 211, the second semiconductor structure 212, and the third semiconductor structure 213 in sequence hereinafter. Thus, step S100 may include: forming a first adhesive layer (not shown) on a surface of a carrier 600; attaching the first semiconductor structure 211 to the carrier 600 via the first adhesive layer; forming a second adhesive layer (not shown) on a side of the first semiconductor structure 211 away from the carrier 600; attaching the second semiconductor structure 212 to the first semiconductor structure 211 via the second adhesive layer; forming a third adhesive layer (not shown) on a side of the second semiconductor structure 212 away from the first semiconductor structure 211; and attaching the third semiconductor structure 213 to the second semiconductor structure 212 via the third adhesive layer. The carrier 600 may be, but is not limited to, a quartz wafer, a glass wafer, a metal wafer, a silicon wafer, or a ceramic wafer. The adhesive layer can have properties such as adhesive strength, chemical resistance, acid and alkali resistance, and high temperature resistance. The first adhesive layer, the second adhesive layer, and / or the third adhesive layer can be, but are not limited to, DAF film (die attach film), FOW film (film on wire), laminate tape, or dry film. The material of the first adhesive layer, the second adhesive layer, and / or the third adhesive layer can be, but are not limited to, epoxy resin, novolac epoxy resin, or other adhesive resin. The first adhesive layer, the second adhesive layer, and / or the third adhesive layer can also be doped with an adhesive additive or crosslinking agent, such as PSA (pressure sensitive adhesive), polybenzoxazole (PBO), or benzocyclobutene (BCB), depending on actual process requirements.

[0065] In some embodiments, as Figure 4 and Figure 5 As shown, after the carrier 600 is replaced with the substrate 100, a plastic package 400 for encapsulating the semiconductor stack structure 200 may be formed on one side of the substrate 100. The material of the plastic package 400 may include, but is not limited to, at least one of polyimide, silicone, and EMC (Epoxy Molding Compound).

[0066] In some embodiments, the heat pipe structure 300 includes a first heat pipe 310, which extends from a side of the semiconductor stack structure 200 away from the substrate 100 along a first direction (z direction) to at least the semiconductor structure 210 closest to the substrate 100. For example, the first heat pipe 310 can be formed in the semiconductor stack structure 200 in the following manner: Figure 2As shown, a first receiving hole 301 is formed from a side of the semiconductor stack structure 200 away from the carrier 600 and extending along a first direction (z direction) at least to the semiconductor structure 210 closest to the carrier 600; Figure 3 As shown, a heat pipe is placed in the first receiving hole 301 to form a first heat pipe 310. For example, the first heat pipe 310 can also be formed in the following manner: Figure 7 As shown, a first receiving hole 301 is formed along a first direction (z direction) penetrating the substrate 100 from a side of the semiconductor stack structure 200 away from the substrate 100; Figure 8 As shown, a heat pipe is placed in the first receiving hole 301 to form a first heat pipe 310 .

[0067] In some embodiments, the heat pipe structure 300 includes a second heat pipe 320. The second heat pipe 320 extends from the side of the substrate 100 away from the semiconductor stack structure 200 along the first direction (z direction) through the substrate 100 and at least to the semiconductor structure 210 closest to the substrate 100. As an example, the second heat pipe 320 can be formed in the semiconductor structure 210 in the following manner: Figure 3 As shown, a second receiving hole 302 is formed from a side of the substrate 100 away from the semiconductor stack structure 200, penetrating the substrate 100 along a first direction (z direction) and extending at least to the semiconductor structure 210 closest to the substrate 100; Figure 4 As shown, a heat pipe is placed in the second receiving hole 302 to form a second heat pipe 320 .

[0068] In some embodiments, as Figure 10As shown, the heat pipe structure 300 includes a first heat pipe segment 331, a second heat pipe segment 332, a third heat pipe segment 333, and a fourth heat pipe segment 334. The first heat pipe segment 331 is located in the plastic package 400, and the third heat pipe segment 333 is located in the substrate 100. The second heat pipe segment 332 and the fourth heat pipe segment 334 both extend along a first direction (z-direction) and penetrate the semiconductor stack structure 200. Since the first heat pipe segment 331 is located in the plastic package 400, the plastic package 400 can be formed in steps. For example, the plastic package 400 can include a first sub-molded package and a second sub-molded package. When the first sub-molded package and the second sub-molded package are made of the same material, there is no obvious interface between them. The third heat pipe segment 333 can be pre-installed in the substrate 100. Thus, after replacing the carrier 600 with the substrate 100, a first sub-molded body can be formed to encapsulate the semiconductor stack structure 200. Then, from the side of the first sub-molded body away from the substrate 100, a second heat pipe segment 332 and a fourth heat pipe segment 334 are formed, extending along a first direction (z direction) through the semiconductor stack structure 200 and respectively to the ends of the third heat pipe segment 333. A first heat pipe segment 331 is formed on the side of the first sub-molded body away from the substrate 100, with the ends of the first heat pipe segment 331 communicating with the ends of the second heat pipe segment 332 and the fourth heat pipe segment 334, respectively. Finally, a second sub-molded body is formed on the side of the first sub-molded body away from the substrate 100. Thus, the first heat pipe segment 331, the second heat pipe segment 332, the third heat pipe segment 333, and the fourth heat pipe segment 334 are connected end to end in sequence to form a closed heat pipe loop 330. The interior of the heat pipe loop 330 can be evacuated to a negative pressure state and filled with a low-boiling-point, volatile liquid working medium.

[0069] In some embodiments, step S200 may include: removing the carrier 600 using a laser or thermal stripping process; forming a seed layer (not shown) on one side of the semiconductor stack structure 200 by processes such as physical sputtering, magnetron sputtering, or evaporation; patterning the seed layer to form metal traces; forming a dielectric layer covering the metal traces; forming a solder resist layer on the side of the dielectric layer facing away from the semiconductor stack structure 200; and opening holes in the solder resist layer to expose the pad areas of the metal traces, thereby forming the substrate 100. The seed layer may be a single layer or multiple layers, and the material of the seed layer may be titanium, copper, silver, tin, nickel, etc. Furthermore, after executing step S300, a plurality of third conductive structures 530 may be formed on the side of the substrate 100 facing away from the semiconductor stack structure 200. The third conductive structures 530 are electrically connected to the metal traces of the substrate 100. The third conductive structures 530 may include, but are not limited to, at least one of solder balls, solder pillars, and conductive adhesive. The material of the third conductive structures 530 may include, but is not limited to, a tin-based alloy or tin.

[0070] In addition, an embodiment of the present application further provides a storage system, which includes a controller and the above-mentioned semiconductor package structure. The controller is coupled to the semiconductor package structure and is used to control the semiconductor package structure to store data.

[0071] Figure 14 FIG2 is a block diagram of a system having a semiconductor package structure according to an embodiment of the present application. The system 700 may be a mobile phone, a desktop computer, a laptop computer, a tablet computer, a car computer, a game console, a printer, a positioning device, a wearable electronic device, a smart sensor, a virtual reality (VR) device, an augmented reality (AR) device, or any other suitable electronic device having a storage device located therein. Figure 14 As shown in FIG, system 700 may include a host 704 and a memory system 701, wherein the memory system 701 has one or more semiconductor package structures 702 and a memory controller 703. The host 704 may be a processor of an electronic device, such as a central processing unit (CPU), or may be a system on a chip (SoC), such as an application processor (AP). The host 704 may be configured to send data to or receive data from the semiconductor package structure 702.

[0072] The semiconductor package structure 702 may be any semiconductor package structure disclosed in this application, for example Figure 5 、 Figure 6 、 Figure 9 and Figure 10 According to some embodiments, the memory controller 703 is coupled to the semiconductor package structure 702 and the host 704 and is configured to control the semiconductor package structure 702. The memory controller 703 can manage data stored in the semiconductor package structure 702 and communicate with the host 704.

[0073] In some embodiments, the memory controller 703 is designed to operate in a low duty cycle environment, such as a Secure Digital (SD) card, a Compact Flash (CF) card, a Universal Serial Bus (USB) flash drive, or other media used in electronic devices such as personal computers, digital cameras, mobile phones, etc. In some embodiments, the memory controller 703 is designed to operate in a high duty cycle environment, such as an SSD or an embedded MultiMediaCard (eMMC), which is used as a data storage device for mobile devices such as smartphones, tablets, laptops, etc., as well as enterprise storage arrays. The memory controller 703 can be configured to control the operations of the semiconductor package structure 702, such as read, erase, and program operations. The memory controller 703 can also be configured to manage various functions related to data stored in or to be stored in the semiconductor package structure 702, including but not limited to bad block management, garbage collection, logical to physical address translation, wear leveling, etc. In some embodiments, the memory controller 703 is further configured to process error correction code (ECC) associated with data read from or written to the semiconductor package structure 702. The memory controller 703 may also perform any other appropriate functions, such as formatting the semiconductor package structure 702. The memory controller 703 may communicate with an external device (e.g., the host 704) according to a specific communication protocol. For example, the memory controller 703 may communicate with the external device through at least one of various interface protocols, such as a USB protocol, an MMC protocol, a peripheral component interconnect (PCI) protocol, a PCI-Express (PCI-E) protocol, an Advanced Technology Attachment (ATA) protocol, a serial ATA protocol, a parallel ATA protocol, a small computer miniature interface (SCSI) protocol, an enhanced minidisk interface (ESDI) protocol, an integrated drive electronics (IDE) protocol, a FireWire protocol, etc.

[0074] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. As an example, the steps described in the present disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this application can be achieved. This is not limited herein.

[0075] The above specific embodiments do not limit the scope of protection of this application. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application shall be included within the scope of protection of this application.

Claims

1. A semiconductor packaging structure, characterized in that: include: substrate; A semiconductor stack structure, comprising a plurality of semiconductor structures stacked sequentially on one side of the substrate along a first direction; as well as A heat pipe structure, at least a portion of which is located in the semiconductor structure closest to the substrate, and at least another portion of which penetrates the semiconductor stack structure along the first direction.

2. The semiconductor package structure according to claim 1, wherein: The heat pipe structure comprises: The first heat pipe extends from a side of the semiconductor stack structure away from the substrate along the first direction at least to the semiconductor structure closest to the substrate.

3. The semiconductor package structure according to claim 2, wherein: The first heat pipe penetrates the semiconductor stack structure and the substrate along the first direction.

4. The semiconductor package structure according to claim 2, wherein: At least one first heat pipe is disposed on both sides of the semiconductor stack structure along a second direction, and the first direction and the second direction intersect.

5. The semiconductor package structure according to claim 4, wherein: The extension lengths of the plurality of first heat pipes along the first direction are different.

6. The semiconductor package structure according to any one of claims 1 to 5, wherein: The heat pipe structure comprises: The second heat pipe penetrates the substrate along the first direction from a side of the substrate away from the semiconductor stack structure and extends at least to the semiconductor structure closest to the substrate.

7. The semiconductor package structure according to claim 6, wherein: At least one second heat pipe is disposed on both sides of the substrate along the second direction.

8. The semiconductor package structure according to any one of claims 1 to 5, wherein: The semiconductor packaging structure further includes a plastic package, which packages the semiconductor stacking structure and the heat pipe structure on the substrate.

9. The semiconductor package structure according to claim 8, wherein: The heat pipe structure comprises: A heat pipe loop, at least a portion of which is located in the plastic package, and at least another portion of which is located in the semiconductor structure closest to the substrate.

10. The semiconductor package structure according to claim 9, wherein: The heat pipe loop includes a first heat pipe segment, a second heat pipe segment, a third heat pipe segment, and a fourth heat pipe segment connected end to end in sequence. The first heat pipe segment is located in the plastic package, the third heat pipe segment is located in the substrate, and the second heat pipe segment and the fourth heat pipe segment both extend along the first direction and penetrate the semiconductor stack structure.

11. The semiconductor package structure according to claim 9, wherein: The heat pipe structure further includes a driving pump in communication with the heat pipe loop.

12. The semiconductor package structure according to any one of claims 1 to 5, wherein: Two adjacent semiconductor structures are bonded and connected.

13. The semiconductor package structure according to any one of claims 1 to 5, wherein: Two adjacent semiconductor structures are connected via a first conductive structure.

14. A method for preparing a semiconductor packaging structure, characterized in that: include: forming a semiconductor stack structure on one side of the carrier, wherein the semiconductor stack structure includes a plurality of semiconductor structures stacked sequentially along a first direction; as well as replacing the carrier with a substrate; A heat pipe structure is formed in at least the semiconductor stack structure, at least a portion of the heat pipe structure is located in the semiconductor structure closest to the substrate, and at least another portion passes through the semiconductor stack structure along the first direction.

15. The method for preparing a semiconductor package structure according to claim 14, wherein: The heat pipe structure includes a first heat pipe; Wherein, the preparation method further comprises: forming a first receiving hole extending from a side of the semiconductor stack structure away from the carrier along the first direction to at least a portion of the semiconductor structure closest to the carrier; and A heat pipe is placed in the first receiving hole to form the first heat pipe.

16. The method for preparing a semiconductor package structure according to claim 14 or 15, wherein: The heat pipe structure includes a second heat pipe; Wherein, the preparation method further comprises: forming a second receiving hole from a side of the substrate away from the semiconductor stack structure, penetrating the substrate along the first direction and extending at least to the semiconductor structure closest to the substrate; and A heat pipe is placed in the second receiving hole to form the second heat pipe.

17. The method for preparing a semiconductor package structure according to claim 14 or 15, wherein: The preparation method further comprises: A plastic package for encapsulating the semiconductor stack structure is formed on one side of the substrate.

18. The method for preparing a semiconductor package structure according to claim 17, wherein: The heat pipe structure includes a first heat pipe segment, a second heat pipe segment, a third heat pipe segment and a fourth heat pipe segment, the plastic package includes a first sub-plastic package and a second sub-plastic package, and the substrate is provided with the third heat pipe segment; The plastic package body for encapsulating the semiconductor stack structure includes: forming a first sub-plastic package encapsulating the semiconductor stack structure; The second heat pipe segment and the fourth heat pipe segment are formed from a side of the first sub-molded body away from the substrate, penetrating the semiconductor stack structure along the first direction and extending to both ends of the third heat pipe segment respectively; forming a first heat pipe segment on a side of the first sub-molded body away from the substrate, wherein both ends of the first heat pipe segment are respectively connected to ends of the second heat pipe segment and the fourth heat pipe segment; and The second sub-plastic packaging body is formed on a side of the first sub-plastic packaging body away from the substrate.

19. A storage system, characterized in that: The storage system includes a controller and the semiconductor package structure according to any one of claims 1 to 13, wherein the controller is coupled to the semiconductor package structure and is used to control the semiconductor package structure to store data.

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