Capacitor voltage balance control method, electronic equipment and LLC resonant converter

By using real-time sampling and PI controller to adjust the phase shift angle, the problem of voltage imbalance of the voltage divider capacitor in the LLC resonant converter is solved, the stability of the output voltage and soft switching characteristics are achieved, and the reliability and safety of the converter are improved.

CN120638832AInactive Publication Date: 2025-09-12SHENZHEN POWEROAK NEWENER CO LTD
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Patent Information

Application Number
CN202511141068.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-15
Publication Date
2025-09-12
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The voltage imbalance problem of the divider capacitor in the existing LLC resonant converter leads to inconsistent voltage stress of the switch tube, affecting the reliability of the converter and the stability of the output voltage.

Method used

By sampling the voltage of the voltage divider capacitor in real time, it is determined whether the voltage difference exceeds the set threshold, and the phase shift angle between the switching tubes is adjusted. The PI controller is used to adjust the phase shift angle control amount to achieve the conduction timing adjustment of the switching tube to achieve capacitor voltage balance.

Benefits of technology

The voltage balance of the voltage divider capacitor is achieved, the stability of the output voltage and the soft switching characteristics are guaranteed, and the reliability and safety of the converter are improved.

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Abstract

The embodiment of the invention discloses a capacitor voltage balance control method, electronic equipment and an LLC resonant converter. The method comprises the following steps: judging whether a capacitor voltage difference value Vc1-Vc2 exceeds a set threshold value or not by sampling capacitor voltages Vc1 and Vc2 of a voltage dividing capacitor C1 and a voltage dividing capacitor C2 in real time; when the voltage exceeds the threshold value, the phase shift angle between the switching tube S1 and the switching tube S4 is adjusted, and the conduction time sequence of the switching tube S1 relative to the switching tube S4 is controlled according to the capacitance voltage magnitude relation; when Vc1 is greater than Vc2, S1 is controlled to be lagged behind S4 to be conducted; when Vc1lt; and when Vc1 is greater than Vc2, S1 is controlled to be conducted ahead of S4, and the execution is repeated until the capacitor voltage difference value does not exceed the set threshold value. By means of the mode, the problem that voltage dividing capacitors in the bridge arm series connection type LLC resonant converter are not uniform in voltage can be solved, input bus voltage balance is achieved, and it is guaranteed that output voltage is stable; meanwhile, the soft switching characteristics of LLC primary side zero-voltage switching-on and secondary side zero-current switching-off are kept, and the reliability and safety of operation of the resonant converter are improved.
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Description

Technical Field

[0001] The embodiments of the present invention relate to the field of resonant converters, and in particular to a capacitor voltage balance control method, an electronic device, and an LLC resonant converter. Background Art

[0002] The half-bridge three-level (TL) resonant converter offers advantages such as low voltage stress on the main switch and soft switching of the main power transistor, making it ideal for power conversion applications with high input voltages. Currently, widely used three-level topologies include flying capacitor clamped, diode clamped, a hybrid diode and flying capacitor clamped, and a series bridge arm configuration.

[0003] The series-arm LLC resonant converter is a half-bridge three-level LLC topology. It offers advantages such as a simple structure, no flying capacitors or clamping diodes, avoidance of potential switching capacitor modes, low switch stress, and soft switching of power transistors. It is widely used in power conversion applications with high-voltage inputs. The primary side of the series-arm LLC converter consists of two half-bridge LLCs connected in series, while the secondary side can be either a diode or a switch.

[0004] However, most three-level converters suffer from uneven voltage distribution across the divider capacitors. This is due to differences in the control circuit, driver circuit, and main circuit parameters. This imbalance in the divider capacitors increases switching stress on the switches, severely impacting the converter's reliability and safety. Unbalanced voltage distribution across the divider capacitors causes inconsistent voltage stress on each switch, potentially damaging some switches due to excessive voltage. This also impacts output voltage stability and the converter's overall performance. Summary of the Invention

[0005] The main technical problem solved by the embodiments of the present invention is to provide a capacitor voltage balance control method, an electronic device and an LLC resonant converter, which can solve the defects caused by the voltage imbalance of the voltage divider capacitor of the existing LLC resonant converter.

[0006] In a first aspect, an embodiment of the present invention provides a capacitor voltage balance control method, which is applied to an LLC resonant converter, wherein the LLC resonant converter includes a primary side composed of two half-bridge circuits connected in series, the first half-bridge circuit includes a switch tube S1, a switch tube S2 and a voltage-dividing capacitor C1, and the second half-bridge circuit includes a switch tube S3, a switch tube S4 and a voltage-dividing capacitor C2, and the method includes the following steps: Step A: real-time sampling of the first capacitor voltage Vc1 of the voltage-dividing capacitor C1 and the second capacitor voltage Vc2 of the voltage-dividing capacitor C2; Step B: determining whether the capacitor voltage difference |Vc1-Vc2| exceeds a set threshold; Step C: when the capacitor voltage difference |Vc1-Vc2| exceeds the set threshold, adjusting the phase shift angle between the switch tube S1 and the switch tube S4; Step D: according to the adjusted phase shift angle, controlling the switch tube S1 to be ahead of or behind the switch tube S4 to be turned on; repeating the above steps until the capacitor voltage difference |Vc1-Vc2| does not exceed the set threshold.

[0007] Optionally, adjusting the phase shift angle between the switch tube S1 and the switch tube S4 includes the following steps: increasing the phase shift angle according to a preset step value.

[0008] Optionally, adjusting the phase shift angle between the switch tube S1 and the switch tube S4 includes the following steps: inputting the capacitor voltage difference |Vc1-Vc2| as an error signal into a PI controller, and obtaining a phase shift angle control amount according to the error signal by the PI controller; and adjusting the phase shift angle according to the phase shift angle control amount.

[0009] Optionally, controlling the switch tube S1 to be turned on before or after the switch tube S4 according to the adjusted phase shift angle includes the following steps: when the first capacitor voltage Vc1 is greater than the second capacitor voltage Vc2, controlling the switch tube S1 to be turned on after lagging behind the switch tube S4 according to the phase shift angle; when the first capacitor voltage Vc1 is less than the second capacitor voltage Vc2, controlling the switch tube S1 to be turned on before the switch tube S4 according to the phase shift angle.

[0010] Optionally, controlling the switch tube S1 to be turned on later than the switch tube S4 according to the phase shift angle includes the following steps: adjusting the first conduction signal or the fourth conduction signal according to the phase shift angle so that the phase difference between the first conduction signal or the fourth conduction signal is the phase shift angle; outputting the adjusted fourth conduction signal to turn on the switch tube S4 so that the switch tube S4 leads the switch tube S1; or outputting the adjusted first conduction signal to turn on the switch tube S1 so that the switch tube S1 lags behind the switch tube S4; the first conduction signal is used to turn on the switch tube S1, and the fourth conduction signal is used to turn on the switch tube S4.

[0011] Optionally, controlling the switch tube S1 to be turned on before the switch tube S4 according to the phase shift angle includes the following steps: adjusting the first conduction signal or the fourth conduction signal according to the phase shift angle so that the phase difference between the first conduction signal or the fourth conduction signal is the phase shift angle; outputting the adjusted fourth conduction signal to turn on the switch tube S4 so that the switch tube S4 lags behind the switch tube S1; or outputting the adjusted first conduction signal to turn on the switch tube S1 so that the switch tube S1 leads the switch tube S4; the first conduction signal is used to turn on the switch tube S1, and the fourth conduction signal is used to turn on the switch tube S4.

[0012] Optionally, before step A, the method further comprises: after the LLC resonant converter is connected to a DC input, adjusting the duty cycle of the LLC resonant converter to 50%; adjusting the operating frequency of the LLC resonant converter to a resonant frequency f s .

[0013] Optionally, the resonant frequency f s The calculation formula is as follows: , Wherein, Lr is the inductance value of the resonant inductor in the LLC resonant converter, and Cr is the capacitance value of the resonant capacitor in the LLC resonant converter.

[0014] In a second aspect, an embodiment of the present invention provides an electronic device comprising: at least one processor; at least one network interface, the network interface being communicatively connected to the corresponding processor; and a memory being communicatively connected to the at least one processor; wherein the network interface is used to establish a communication connection between the processor and other external devices; the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor so that the at least one processor can execute the capacitor voltage balance control method as described in the first aspect.

[0015] In a third aspect, an embodiment of the present invention provides an LLC resonant converter, comprising: an LLC resonant conversion circuit; and the electronic device as described in the second aspect.

[0016] The beneficial effects of the embodiments of the present invention are as follows: different from the existing technology, the embodiments of the present invention can solve the problem of uneven voltage of the voltage-dividing capacitors in the bridge arm series LLC resonant converter, achieve input bus voltage balance, and ensure output voltage stability; at the same time, maintain the soft switching characteristics of LLC primary side zero voltage turn-on and secondary side zero current turn-off, thereby improving the reliability and safety of the resonant converter operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] One or more embodiments are exemplarily illustrated by corresponding drawings, which do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0018] Figure 1 It is a structural diagram of a bridge arm series type LLC resonant conversion circuit; Figure 2 Shown Figure 1 The current loop of the resonant converter shown when the switch tubes S1 and S3 are turned on; Figure 3 Shown Figure 1 The current loop of the resonant converter shown when the switch tubes S2 and S4 are turned on; Figure 4 1 is a flow chart of a capacitor voltage balance control method provided by an embodiment of the present invention; Figure 5 The figure shows the conduction timing of the switch tube when the voltage of the voltage-dividing capacitor C1 is higher than the voltage of the voltage-dividing capacitor C2; Figure 6 The figure shows the conduction timing of the switch tube when the voltage of the voltage-dividing capacitor C2 is higher than the voltage of the voltage-dividing capacitor C1; Figure 7 This is a control block diagram of a phase shift angle provided by an embodiment of the present invention; Figure 8 It is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0019] In order to facilitate the understanding of the present application, the present application is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or there can be one or more centered elements therebetween. When an element is described as being "connected to" another element, it can be directly connected to the other element, or there can be one or more centered elements therebetween. The terms "upper", "lower", "inner", "outer", "bottom" and the like used in this specification indicate an orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third" and the like are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0020] Unless otherwise defined, all technical and scientific terms used in this specification have the same meanings as those commonly understood by those skilled in the art to which this application belongs. The terms used in this specification and in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the relevant listed items.

[0021] In addition, the technical features involved in different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.

[0022] The technical solution in this application will be described below with reference to the accompanying drawings.

[0023] In some embodiments of the present application, reference is made to Figure 1 As shown, the LLC resonant converter includes a primary circuit consisting of two series-connected half-bridge circuits. The first half-bridge circuit includes switches S1 and S2, and a voltage-divider capacitor C1; the second half-bridge circuit includes switches S3 and S4, and a voltage-divider capacitor C2. The LLC resonant converter also includes a resonant network consisting of a resonant inductor Lr, a resonant capacitor Cr, and a magnetizing inductor Lm, and an output rectifier circuit consisting of secondary rectifier diodes Q1, Q2, Q3, and Q4, and an output capacitor Co. The DC input voltage is divided by voltage-divider capacitors C1 and C2 to provide operating voltage for the two series-connected half-bridge circuits.

[0024] The bridge-arm series LLC resonant converter operates based on a specific switching timing control scheme. Under normal operating conditions, switches S1 and S2 conduct in a complementary manner. That is, when switch S1 is on, switch S2 is off, and when switch S1 is off, switch S2 is on. An appropriate dead time is set between the two to prevent shoot-through. Similarly, switches S3 and S4 are controlled in a complementary manner. Switches S1 and S4 conduct simultaneously, while switches S2 and S3 conduct simultaneously.

[0025] Specifically, when switches S1 and S4 are turned on simultaneously, a specific current loop forms in the primary circuit. The current path is: positive DC input voltage Vin → switch S1 → resonant inductor Lr → magnetizing inductor Lm → resonant capacitor Cr → switch S4 → negative DC input voltage Vin. Current begins to flow through Lr, Cr, and the transformer primary. At this point, due to the relatively large inductive reactance of magnetizing inductor Lm (near the resonant frequency), the current rises relatively slowly, with most of the current flowing into Cr and the load reflection loop. The resonant inductor Lr and resonant capacitor Cr begin to resonate in series, resulting in a sinusoidal current. This resonant current provides energy to the load and also excites Lm.

[0026] In some embodiments of the present application, due to the existence of dead time, when the switch tubes S1 and S4 are turned off and the switch tubes S2 and S3 have not yet turned on, and because the direction of the inductor current cannot suddenly change, the current begins to charge the junction capacitance of the switch tubes S1 and S4 while discharging the junction capacitance of the switch tubes S2 and S3 to achieve ZVS of the switch tubes S2 and S3.

[0027] When switches S2 and S3 are simultaneously on, the primary circuit's current loop undergoes a fundamental change. The new current path is: switch S2 → resonant inductor Lr → magnetizing inductor Lm → resonant capacitor Cr → switch S3. This operating state is known as the freewheeling state, during which the resonant current gradually decreases to zero while providing energy to the load. The cycle then repeats.

[0028] The LLC resonant converter achieves soft switching, meaning the primary-side switch achieves zero-voltage turn-on, while the secondary-side rectifier diode achieves zero-current turn-off. During the dead time between the switch's turn-off and its immediate turn-on, the resonant current charges and discharges the switch's parasitic capacitance, causing the voltage across the switch to drop to zero before the turn-on signal is applied, achieving zero-voltage turn-on. On the secondary side, the rectifier diode turns off when the current naturally drops to zero, avoiding reverse recovery losses. This soft switching characteristic significantly reduces switching losses, improves converter efficiency, and reduces electromagnetic interference.

[0029] In some embodiments of the present application, voltage balance between the voltage-dividing capacitors C1 and C2 is crucial for the proper operation of the LLC resonant converter. Ideally, the two voltage-dividing capacitors should carry equal voltages, i.e., Vc1 = Vc2 = Vin / 2, to ensure that each switch experiences the same voltage stress. However, in actual engineering applications, due to various factors, the voltage-dividing capacitors often cannot maintain perfect voltage balance.

[0030] It's easy to understand that factors that contribute to voltage imbalance in the voltage divider capacitors include differences in control circuit parameters, inconsistencies in the driver circuit, dispersion in the parameters of the main circuit components, and changes in the operating temperature. Signal processing delays in the control circuit, propagation delays in the driver circuit, switching characteristics of the switches, and variations in the capacitance of the voltage divider capacitors themselves all affect the charging and discharging processes, leading to deviations between the first capacitor voltage Vc1 and the second capacitor voltage Vc2.

[0031] Specifically, when the voltage of the voltage divider capacitor is unbalanced, a series of adverse effects will occur. First, the voltage stress borne by each switch tube is unevenly distributed. Assuming that the first capacitor voltage Vc1 is greater than the second capacitor voltage Vc2, the switch tube S1 and the switch tube S2 will be subjected to higher voltage stress, which may exceed the safe operating range of the device and increase the risk of device damage. Secondly, the voltage imbalance will affect the effective voltage on the primary side of the transformer. When Vc1≠Vc2, the primary side voltage of the transformer is no longer the standard ±Vin / 2, but ±Vc1 or ±(Vin-Vc2), resulting in deviation and fluctuation of the output voltage.

[0032] Furthermore, voltage imbalance in the divider capacitors can affect the dynamic response of the LLC resonant converter. In the event of sudden load changes or input voltage fluctuations, capacitor voltage imbalance exacerbates the system's transient response, potentially causing the output voltage to overshoot or undershoot beyond specifications. Furthermore, voltage imbalance can affect the implementation of soft switching characteristics. When voltage stress is unevenly distributed, some switches may not achieve zero-voltage turn-on under optimal conditions, increasing switching losses and electromagnetic interference.

[0033] In some embodiments of the present application, long-term voltage imbalance in the divider capacitors can severely impact the reliability and service life of the LLC resonant converter. Switches subjected to excessive voltage stress are prone to thermal breakdown or avalanche breakdown, resulting in permanent damage to the device. Furthermore, voltage imbalance can accelerate the aging process of the divider capacitors, especially those subjected to higher voltages, as their dielectrics are subject to greater electric field strength, accelerating the degradation of insulation performance.

[0034] Existing LLC resonant converter control methods primarily focus on output voltage regulation and soft switching implementation, but lack effective solutions for balancing the voltage across the voltage divider capacitors. While traditional frequency modulation methods can regulate the output voltage, they cannot directly address the capacitor voltage imbalance.

[0035] Based on the above situation, the embodiment of the present invention provides a capacitor voltage balance control method, the flow chart of which is as follows: Figure 4 As shown, the specific steps include: Step S100: After the LLC resonant converter is connected to a DC input, the duty cycle of the LLC resonant converter is adjusted to 50%.

[0036] When the LLC resonant converter is first connected to a DC input power source, initialization is required to ensure a safe startup. To ensure safe LLC resonant startup and minimize current surges, the output voltage must be gradually built up. This solution uses a soft-start method that first varies the duty cycle and then modulates the frequency to achieve a gradual buildup of the output voltage. In this step, the controller generates a PWM signal with a duty cycle that gradually increases to 50% at a high frequency.

[0037] Step S200: Adjust the operating frequency of the LLC resonant converter to the resonant frequency f s .

[0038] By way of example and not limitation, the resonant frequency f s The calculation method is: , where Lr represents the inductance of the resonant inductor in the LLC resonant converter, and Cr represents the capacitance of the resonant capacitor. In actual implementation, the controller first reads the pre-stored resonant inductor and resonant capacitor parameter values ​​and calculates the accurate resonant frequency value using the built-in mathematical operation unit. The controller then adjusts the generated PWM signal frequency so that the operating frequency of the switching tube gradually approaches the calculated resonant frequency. When operating at the resonant frequency, the LLC resonant converter can achieve optimal soft switching characteristics, with the primary-side switching tube achieving zero voltage turn-on and the secondary-side rectifier diode achieving zero current turn-off, thereby achieving the highest operating efficiency and the lowest electromagnetic interference.

[0039] Step S300 : sampling the first capacitor voltage Vc1 of the voltage-dividing capacitor C1 and the second capacitor voltage Vc2 of the voltage-dividing capacitor C2 in real time.

[0040] As an example and not a limitation, real-time sampling of the capacitor voltage is achieved through a high-precision analog-to-digital converter (ADC). Two independent voltage sampling channels are configured in the control system, which are connected to the positive ends of the voltage divider capacitor C1 and the voltage divider capacitor C2 respectively. The sampling circuit includes a voltage divider network, a signal conditioning circuit and an ADC converter. The voltage divider network attenuates the high voltage signal of the voltage divider capacitor to within the input range of the ADC, and the signal conditioning circuit filters and amplifies the sampled signal to eliminate the influence of high-frequency noise. The ADC converter digitizes the capacitor voltage at a sufficiently high sampling frequency (usually not less than 10 times the switching frequency) to ensure that the dynamic changes of the voltage can be accurately captured. The controller reads the ADC conversion results in real time to obtain the values ​​of the first capacitor voltage Vc1 and the second capacitor voltage Vc2 at the current moment.

[0041] Step S400: determining whether the capacitor voltage difference |Vc1-Vc2| exceeds a set threshold.

[0042] In some embodiments of the present application, the controller performs a difference calculation on the capacitor voltage values ​​obtained by sampling to obtain the absolute value of the capacitor voltage difference |Vc1-Vc2|. The selection of the set threshold value needs to comprehensively consider the control accuracy requirements of the system, the voltage tolerance of the device, and the response characteristics of the control system. As an example and not a limitation, the threshold value is set to be within the range of 1% to 3% of the input voltage, which can not only ensure sufficient control accuracy, but also avoid frequent triggering of control actions due to small voltage fluctuations. The controller compares the calculated capacitor voltage difference with the preset threshold value. When |Vc1-Vc2| is less than or equal to the set threshold value, it indicates that the voltage of the voltage divider capacitor has reached a balanced state, and the controller continues to monitor but does not perform the adjustment action; when |Vc1-Vc2| exceeds the set threshold value, it indicates that there is an obvious capacitor voltage imbalance, and the capacitor voltage balance adjustment function needs to be started.

[0043] Step S500: When the capacitor voltage difference |Vc1-Vc2| exceeds a set threshold, the phase shift angle between the switch tube S1 and the switch tube S4 is adjusted.

[0044] A variety of control strategies can be used to determine the phase-shift angle. One method is trial and error, which involves setting a fixed step value (e.g., 0.5 degrees or 1 degree). When a capacitor voltage imbalance is detected, the phase-shift angle is gradually increased according to the preset step value until the capacitor voltage difference falls within an acceptable range. Another method is to use a PI controller, inputting the capacitor voltage difference |Vc1-Vc2| as an error signal into the PI controller and calculating the corresponding phase-shift angle control value using a proportional-integral control algorithm. The PI control method achieves smoother and more precise control, avoiding the oscillation that may occur with the trial-and-error method. The controller calculates the required phase-shift angle value based on the selected control strategy and converts this value into a corresponding time delay, preparing for subsequent switch timing control.

[0045] Step S600: According to the adjusted phase shift angle, the switch tube S1 is controlled to be turned on before or after the switch tube S4.

[0046] Specifically, the control of the switch timing is achieved by adjusting the phase relationship of the PWM drive signal, and the control direction depends on the relative magnitude relationship of the capacitor voltages. When the first capacitor voltage Vc1 is greater than the second capacitor voltage Vc2, as shown in FIG. Figure 5 As shown, the controller makes the turn-on time of the switch tube S1 lag relative to the turn-on time of the switch tube S4, so that the switch tubes S2 and S4 are turned on at the same time. Figure 3 As shown, the current loop of the primary circuit undergoes a fundamental change. The new current path is: positive DC input voltage Vin → upper end of voltage divider capacitor C1 → switch S2 → resonant inductor Lr → magnetizing inductor Lm → resonant capacitor Cr → switch S4 → negative DC input voltage Vin. In this operating state, voltage divider capacitor C1 acts as an energy source, providing energy to the resonant network, and the current flow direction is opposite to the previous state. Voltage divider capacitor C2 is charged by the input power supply, and its terminal voltage Vc2 gradually increases. Voltage divider capacitor C1 discharges by supplying power to the resonant network, and its terminal voltage Vc1 gradually decreases.

[0047] The voltage on the primary side of the transformer during the conduction period of switches S2 and S4 is equal to the voltage across the voltage-divider capacitor C1, meaning the transformer primary voltage is Vc1. Taking into account the change in current direction, the actual transformer primary voltage is -Vc1. Under ideal capacitor equalization, the first capacitor voltage Vc1 equals Vin / 2, resulting in a transformer primary voltage of -Vin / 2. The negative voltage polarity changes the conduction state of the secondary rectifier diodes, achieving continuous energy transfer and output voltage stability through alternating positive and negative voltage application.

[0048] During implementation, the controller maintains the timing of the drive signal for switch S4 unchanged while delaying the drive signal for switch S1 by a corresponding amount of time. The delay is determined by the calculated phase-shift angle. The conversion relationship between the phase-shift angle and the time delay is: delay time = phase-shift angle × switching period / 360 degrees. This timing adjustment shortens the on-time of switches S1 and S3, while increasing the on-time of switches S2 and S4. This alters the charge and discharge time ratios of divider capacitors C1 and C2, gradually reducing the voltage on the first capacitor Vc1 and increasing the voltage on the second capacitor Vc2, ultimately achieving voltage balance.

[0049] As an example and not a limitation, when the first capacitor voltage Vc1 is less than the second capacitor voltage Vc2, as Figure 6As shown, the controller makes the switch S1 turn on earlier than the switch S4, so that the switch S1 and the switch S3 are turned on at the same time. Figure 2 As shown, the primary circuit forms a specific current loop. The current path is: positive DC input voltage Vin → switch S1 → resonant inductor Lr → magnetizing inductance Lm → resonant capacitor Cr → switch S3 → lower end of voltage divider capacitor C2 → negative DC input voltage Vin. In this operating state, the input power injects energy into the resonant network through switch S1, and current flows through the resonant cavity. When operating near the resonant frequency, a near-sinusoidal resonant current can be achieved. Simultaneously, voltage divider capacitor C1 is charged by the input power, and its terminal voltage Vc1 gradually increases. Voltage divider capacitor C2 is discharged through the conduction path of switch S3, and its terminal voltage Vc2 gradually decreases.

[0050] During the conduction period of switches S1 and S3, the voltage on the transformer primary side is equal to the input voltage minus the voltage across the voltage-divider capacitor C2. This means the transformer primary voltage is Vin - Vc2. Under ideal capacitor equalization, the voltage across the second capacitor, Vc2, equals Vin / 2, resulting in a transformer primary voltage of Vin / 2. Energy is transferred to the secondary side through electromagnetic coupling within the transformer. The secondary rectifier diode selectively conducts based on the polarity of the transformer secondary voltage, providing energy to the output capacitor Co and the load.

[0051] In this case, the controller advances the drive signal for switch S1 by a corresponding amount, or delays the drive signal for switch S4, thereby extending the on-time of switches S1 and S3 and shortening the on-time of switches S2 and S4. By adjusting the timing in reverse, the voltage-dividing capacitor C1 gains more time to charge and the voltage-dividing capacitor C2 gains more time to discharge, gradually increasing the first capacitor voltage Vc1 and decreasing the second capacitor voltage Vc2, thus rebalancing the capacitor voltages.

[0052] Step S700: Repeat steps S300-S600 until the capacitor voltage difference |Vc1-Vc2| does not exceed the set threshold.

[0053] In some embodiments of the present application, capacitor voltage balance control is a continuous closed-loop control process. The controller continuously executes a cyclic process of voltage sampling, difference calculation, threshold judgment and phase shift adjustment until the voltage of the voltage divider capacitor reaches a balanced state. The execution frequency of the control loop is usually set to an integer multiple of the switching frequency to ensure that there is sufficient control bandwidth to track the changes in the capacitor voltage. When the capacitor voltage difference drops to within the set threshold, the controller stops the phase shift angle adjustment and restores the normal symmetrical switching timing, but continues to monitor the capacitor voltage to prevent the recurrence of the imbalance phenomenon.

[0054] In some embodiments of the present application, step S500 specifically includes: Step S510: increasing the phase shift angle according to a preset step value.

[0055] When a capacitor voltage imbalance is detected, the phase shift angle is not gradually adjusted according to the pre-set angle increment, and the switch tube is controlled by the adjusted phase shift angle until the capacitor voltage difference is reduced to an acceptable range. Specifically, the step value parameter pre-stored in the memory is first read. This parameter is usually optimized and selected during the design phase based on the specific parameters, load characteristics and control accuracy requirements of the LLC resonant converter. The controller maintains a current phase shift angle variable, and the initial value is usually set to zero, indicating a symmetrical switching timing. When it is determined that the capacitor voltage difference exceeds the set threshold, the controller increases the current phase shift angle variable by a step value.

[0056] As an example and not a limitation, assume the preset step value is 1 degree, the current phase shift angle is 0 degrees, and upon detecting a capacitor voltage imbalance, the controller adjusts the phase shift angle to 1 degree. In the next control cycle, if the capacitor voltage difference still exceeds the set threshold, the controller increases the phase shift angle by 1 degree, to 2 degrees. This process continues until the capacitor voltage difference falls within the set threshold, or the phase shift angle reaches the preset maximum limit.

[0057] In some embodiments of the present application, in order to prevent the phase shift angle from being too large and affecting the normal operation of the LLC resonant converter, a maximum limit value of the phase shift angle is generally set. The setting of this limit value needs to take into account the maintenance of soft switching characteristics, the guarantee of output voltage stability, and the optimization of system efficiency. As an example and not a limitation, the maximum limit value of the phase shift angle is set in the range of 15 degrees to 30 degrees, which can provide sufficient capacitor voltage regulation capability without significantly affecting the basic performance of the LLC resonant converter.

[0058] In some other embodiments of the present application, step S500 specifically includes: Step S520: inputting the capacitor voltage difference |Vc1-Vc2| as an error signal to the PI controller, and the PI controller obtains the phase shift angle control value according to the error signal.

[0059] Specifically, the PI controller consists of two parts: proportional control and integral control. It generates a continuous control output through proportional response and integral accumulation of the error signal. The mathematical expression for the PI controller is: u(t) = Kp × e(t) + Ki × ∫e(t)dt, where u(t) represents the output control variable of the PI controller, namely the phase shift angle control variable; e(t) represents the input error signal, namely the capacitor voltage difference |Vc1-Vc2|; Kp represents the proportional gain; and Ki represents the integral gain. In digital control systems, the integral term is typically implemented in a discretized form, namely ∫e(t)dt ≈ Σe(k)×T, where T is the control period and e(k) is the error value at the kth sampling moment.

[0060] Specifically, the proportional term Kp × e(t) provides an immediate response to the current capacitor voltage difference. When the capacitor voltage difference is large, the proportional term generates a larger control variable, allowing the phase shift angle to adjust quickly to reduce the voltage difference. When the capacitor voltage difference is small, the proportional term generates a smaller control variable, enabling finer adjustment. The choice of proportional gain Kp directly affects the system's response speed and stability. A larger Kp value provides a faster response but may cause system overshoot or oscillation. A smaller Kp value ensures system stability but has a relatively slow response.

[0061] As an example, not a limitation, the primary function of the integral term Ki × ∫e(t)dt is to eliminate steady-state error. Even if the capacitor voltage difference has been significantly reduced by the proportional term, if a small steady-state deviation still exists, the integral term will continue to accumulate this deviation, generating additional control to completely eliminate the steady-state error. The setting of the integral gain Ki requires careful consideration. Excessively large Ki values ​​may lead to integral saturation or system oscillation, while too small Ki values ​​may not effectively eliminate steady-state error.

[0062] The PI controller also requires appropriate limiting to prevent excessive control. Because the phase shift angle has a physically limited range, the PI controller's output must be constrained to a reasonable value. Typically, the upper limit of the phase shift angle is set to +30 degrees, and the lower limit is set to -30 degrees to ensure that the phase shift adjustment does not exceed the normal operating range of the LLC resonant converter. Furthermore, to prevent the accumulation of the integral term, which can lead to integral saturation, further accumulation of the integral term must be stopped when the control variable reaches the limit.

[0063] Specifically, if Figure 7As shown in Figure 1, PI controllers are typically implemented using digital control. During each control cycle, the controller reads the capacitor voltage difference at the current moment and calculates the error signal e(k) = |Vc1(k) - Vc2(k)|, where k represents the current sampling moment. The proportional term is calculated as P(k) = Kp × e(k), and the integral term is calculated as I(k) = I(k-1) + Ki × e(k) × T, where I(k-1) represents the cumulative integral value at the previous moment and T represents the control period. The output of the PI controller is u(k) = P(k) + I(k), which is output as the phase shift angle control variable after limiting.

[0064] Step S530: adjusting the phase shift angle according to the phase shift angle control amount.

[0065] As an example, and not a limitation, the phase-shift angle adjustment process requires converting the phase-shift angle control value output by the PI controller into actual switching timing adjustments. The phase-shift angle control value is typically expressed in degrees and needs to be converted into a corresponding time delay before it can be applied to PWM signal generation. The conversion formula is: Time delay = Phase-shift angle control value × Switching period / 360 degrees. For example, when the phase-shift angle control value is 10 degrees and the switching frequency is 100kHz (corresponding to a switching period of 10μs), the corresponding time delay is 10 × 10μs / 360 = 0.278μs.

[0066] In some embodiments of the present application, the controller adjusts the timing of the drive signals for switches S1 and S4 based on the calculated time delay. The specific implementation method depends on the positive or negative sign of the phase-shift angle control value. When the phase-shift angle control value is a positive value, it indicates that switch S1 needs to be turned on later than switch S4, and the controller delays the drive signal for switch S1 by a corresponding amount of time. When the phase-shift angle control value is a negative value, it indicates that switch S1 needs to be turned on earlier than switch S4, and the controller advances the drive signal for switch S1 by a corresponding amount of time, or equivalently delays the drive signal for switch S4.

[0067] PWM signal timing is adjusted using a timer module within the controller. Modern digital controllers are typically equipped with high-precision PWM generation units that can adjust the signal phase relationship with nanosecond accuracy. Based on the calculated time delay, the controller reconfigures the PWM timer's comparison value or triggering time to generate the drive signal with the desired phase relationship.

[0068] It should also be noted that the implementation of phase-shift angle adjustment also requires consideration of maintaining dead time. When adjusting the phase relationship between switches S1 and S4, it is necessary to ensure that sufficient dead time is maintained between the upper and lower switches in the same half-bridge (switches S1 and S2, and switches S3 and S4) to prevent shoot-through short circuits.

[0069] By way of example and not limitation, phase-shift adjustment achieves capacitor voltage balance by changing the ratio of charge and discharge times of the voltage-divider capacitors. When switch S1 turns on after switch S4, the on-times of switches S1 and S3 decrease, while the on-times of switches S2 and S4 increase. This results in a decrease in the charging time and an increase in the discharge time of voltage-divider capacitor C1, while increasing the charging time and decreasing the discharge time of voltage-divider capacitor C2. This results in a decrease in the first capacitor voltage Vc1 and an increase in the second capacitor voltage Vc2. The opposite phase-shift adjustment produces the opposite effect, increasing the first capacitor voltage Vc1 and decreasing the second capacitor voltage Vc2.

[0070] In some embodiments of the present application, the PI control method offers significant advantages over the trial-and-error method. PI control enables continuous, smooth phase-shift angle adjustment, avoiding output voltage fluctuations that can be caused by step-like adjustments. Furthermore, the integral action of the PI controller completely eliminates steady-state errors, ensuring the ultimate capacitor-voltage balance accuracy.

[0071] In some embodiments, step S600 specifically includes the following steps: Step S610 : When the first capacitor voltage Vc1 is greater than the second capacitor voltage Vc2 , the switch tube S1 is controlled to be turned on later than the switch tube S4 according to the phase shift angle.

[0072] In some embodiments of the present application, when it is detected that the first capacitor voltage Vc1 is greater than the second capacitor voltage Vc2, it indicates that the voltage-dividing capacitor C1 is subjected to an excessively high voltage, while the voltage of the voltage-dividing capacitor C2 is relatively low. A control strategy is required to reduce the first capacitor voltage Vc1 and increase the second capacitor voltage Vc2 to achieve voltage balance. The core of this control strategy is to cause the switch S1 to conduct with a lag relative to the switch S4, thereby changing the charge and discharge time distribution of the two voltage-dividing capacitors.

[0073] like Figure 5As shown, the controller maintains the timing of the drive signal for switch S4 as a reference and delays the turn-on of switch S1 by a time determined by the phase shift angle. In practice, the controller calculates the time delay as follows: Delay time = phase shift angle × switching period / 360 degrees. For example, when the phase shift angle is 5 degrees and the switching frequency is 100kHz, the corresponding delay time is 5 × 10μs / 360 = 0.139μs. The controller delays the output of the PWM drive signal for switch S1 by 0.139μs relative to the original time.

[0074] Specifically, the effect of the delayed turn-on of switch S1 on the circuit operating state is reflected in the change in the switching timing. In the normal symmetrical working mode, switch S1 and switch S4 should be turned on and off at the same time, but after the introduction of hysteresis control, switch S4 is turned on before switch S1, and switch S1 is turned off after switch S4. This timing change directly affects the charging and discharging process of the voltage divider capacitor. When switch S4 is turned on and switch S1 is not turned on yet, the current cannot form a complete loop of switch S1 → resonant cavity → switch S3 → voltage divider capacitor C2. The voltage divider capacitor C1 cannot be discharged through switch S1, while the voltage divider capacitor C2 can still be charged through other paths. Only when switch S1 is turned on with a delay can the normal current loop be established.

[0075] During the hysteresis period of switch S1, input energy is primarily transferred to the resonant network via voltage-divider capacitor C2. While voltage-divider capacitor C1 is relatively isolated, this reduces the time it takes to discharge energy into the resonant network. Furthermore, after the conduction phase of switches S1 and S3 ends, when the switch switches S2 and S4 switch to the on-state, voltage-divider capacitor C1 gains more time to charge via switch S2, compensating for the previous reduction in discharge. This mechanism reduces the net discharge of voltage-divider capacitor C1, gradually decreasing the first capacitor voltage Vc1.

[0076] In some embodiments of the present application, the hysteresis control of the switch tube S1 also affects the charge and discharge balance of the voltage-dividing capacitor C2. Due to the delayed conduction of the switch tube S1, the duration of the conduction phase of the switch tubes S2 and S3 is relatively extended, and the voltage-dividing capacitor C2 obtains more charging time through the input power supply. At the same time, during the conduction phase of the switch tubes S2 and S4, the discharge time of the voltage-dividing capacitor C2 through the switch tube S4 is relatively reduced. This dual effect increases the net charge of the voltage-dividing capacitor C2, and the second capacitor voltage Vc2 gradually increases, which complements the decrease in the first capacitor voltage Vc1, and drives the system to converge to a capacitor voltage equilibrium state.

[0077] Step S620 : When the first capacitor voltage Vc1 is less than the second capacitor voltage Vc2 , the switch tube S1 is controlled to be turned on before the switch tube S4 according to the phase shift angle.

[0078] If it is detected that the first capacitor voltage Vc1 is less than the second capacitor voltage Vc2, the capacitor voltage imbalance situation is the opposite of step S610, and the opposite control strategy is required to increase the first capacitor voltage Vc1 and reduce the second capacitor voltage Vc2. The advance control strategy turns on switch S1 earlier than switch S4, redistributing the charge and discharge time of the two voltage-dividing capacitors by changing the switching timing.

[0079] like Figure 5 As shown, the controller advances the turn-on timing of switch S1 by a time determined by the phase shift angle. This can be achieved by directly advancing the drive signal for switch S1 or, equivalently, by delaying the drive signal for switch S4. The time calculation method is the same as in step S610, but the adjustment direction is reversed. For example, when the phase shift angle is 3 degrees, the drive signal for switch S1 is issued 3 × 10μs / 360 = 0.083μs earlier than the original time.

[0080] As an example and not a limitation, the effect of the early conduction of the switch tube S1 on the operation of the circuit is reflected in the change in the timing of the switch state switching. When the switch tube S1 is turned on in advance, the duration of the conduction phase of the switch tube S1 and the switch tube S3 is relatively extended, providing more charging time for the voltage-dividing capacitor C1. In this stage, the current loop is Vin positive → switch tube S1 → resonant cavity → switch tube S3 → voltage-dividing capacitor C2 negative → Vin negative. The input power charges the voltage-dividing capacitor C1 through the switch tube S1, and the voltage-dividing capacitor C2 discharges to the resonant network through the switch tube S3. The extended conduction time of the switch tube S1 and the switch tube S3 allows the voltage-dividing capacitor C1 to obtain more charging energy, while the discharge time of the voltage-dividing capacitor C2 is increased.

[0081] In some embodiments of the present application, the influence of the advance control of the switch tube S1 on the subsequent switch state is equally important. When the system switches from the conduction state of the switch tube S1 and the switch tube S3 to the conduction state of the switch tube S2 and the switch tube S4, due to the advance conduction of the switch tube S1, the starting time of the conduction phase of the switch tube S2 and the switch tube S4 is relatively advanced, but the end time remains unchanged, resulting in a relatively shortened duration of this phase. During the conduction phase of the switch tube S2 and the switch tube S4, the voltage divider capacitor C2 is charged by the input power supply, and the voltage divider capacitor C1 is discharged to the resonant network through the switch tube S2. The shortened conduction time of the switch tube S2 and the switch tube S4 reduces the charging time of the voltage divider capacitor C2 and the discharge time of the voltage divider capacitor C1.

[0082] The voltage-dividing capacitor C1 gains more charging time when switches S1 and S3 are on, and reduces its discharge time when switches S2 and S4 are on. The net effect is an increase in the voltage Vc1 of the first capacitor. The voltage-dividing capacitor C2 increases its discharge time when switches S1 and S3 are on, and reduces its charging time when switches S2 and S4 are on. The net effect is a decrease in the voltage Vc2 of the second capacitor. Through this mechanism, the imbalanced state in which the voltage Vc1 of the first capacitor is lower than the voltage Vc2 of the second capacitor gradually converges to a balanced state.

[0083] In some embodiments, step S610 specifically includes the following steps: Step S611: adjusting the first conduction signal or the fourth conduction signal according to the phase shift angle, so that the phase difference between the first conduction signal and the fourth conduction signal is the phase shift angle.

[0084] In some embodiments of the present application, the first conduction signal is used to control the on / off switching of switch S1, and the fourth conduction signal is used to control the on / off switching of switch S4. The key to achieving a lag in the on / off switching of switch S1 after switch S4 lies in adjusting the phase relationship between the two conduction signals so that their phase difference equals the calculated phase shift angle. Adjusting the phase difference can be achieved in two equivalent ways: by adjusting the phase of the first conduction signal or by adjusting the phase of the fourth conduction signal.

[0085] It's easy to understand that the concept of phase difference refers to the offset relationship between two periodic signals on the time axis. In the control of the LLC resonant converter, the first and fourth conduction signals are both PWM signals with the same frequency and duty cycle. Under normal circumstances, they should be in phase, that is, the phase difference is zero. When it is necessary to make switch S1 turn on later than switch S4, a specific phase difference needs to be introduced between the two signals. The value of this phase difference is equal to the phase shift angle calculated in step S500.

[0086] Specifically, the first adjustment method maintains the timing of the fourth conduction signal unchanged while adjusting the phase of the first conduction signal. Using the fourth conduction signal as a timing reference, the controller delays the rising edge (turn-on time) of the first conduction signal relative to its original scheduled time. The amount of delay is calculated by converting the phase shift angle: Delay time = phase shift angle × switching period / 360 degrees. For example, when the phase shift angle is 6 degrees and the switching frequency is 100kHz, the first conduction signal needs to be delayed by 6 × 10μs / 360 = 0.167μs. The controller reconfigures the triggering time of the first conduction signal in the PWM generation unit, delaying it by 0.167μs relative to its original scheduled time.

[0087] By way of example and not limitation, the second adjustment method maintains the timing of the first conduction signal unchanged while adjusting the phase of the fourth conduction signal. In this method, the controller uses the first conduction signal as a timing reference and advances the rising edge of the fourth conduction signal relative to its original timing. The amount of this advance is also calculated using the phase shift angle, and the value is the same as in the first method. The controller reconfigures the triggering time of the fourth conduction signal to advance it by a corresponding amount relative to the original timing, thereby causing the fourth conduction signal to lead the first conduction signal.

[0088] In some embodiments of the present application, the two adjustment methods are completely equivalent in terms of the final effect, and both can achieve the control goal of switching tube S1 lagging behind the conduction of switch tube S4. The choice of which method to choose depends mainly on the hardware structure of the controller and the convenience of software implementation. Some controllers may be more suitable for fixing the timing of one signal and adjusting the other signal, while some controllers may support adjusting both signals simultaneously to amortize the phase difference. In practical applications, the method with lower implementation complexity and lower computational overhead is usually selected.

[0089] Step S612: outputting the adjusted fourth conduction signal to turn on the switch S4 so that the switch S4 leads the switch S1; or outputting the adjusted first conduction signal to turn on the switch S1 so that the switch S1 lags the switch S4.

[0090] Specifically, this step describes two equivalent signal output strategies, corresponding to the two adjustment methods in step S611. The first strategy outputs the adjusted fourth conduction signal and achieves a relative timing relationship by enabling switch S4 to conduct early. The second strategy outputs the adjusted first conduction signal and achieves the same timing relationship by enabling switch S1 to conduct late.

[0091] By way of example and not limitation, when the first strategy is employed, the controller outputs a fourth conduction signal that has undergone phase advance adjustment. The rising edge of this signal occurs earlier than originally scheduled, causing switch S4 to turn on earlier than originally planned. Simultaneously, the first conduction signal maintains its original timing, causing switch S1 to turn on at the originally scheduled time. In this manner, the turn-on timing of switch S4 is advanced while the turn-on timing of switch S1 remains unchanged, resulting in a timing relationship in which switch S4 leads switch S1, effectively achieving the control objective of switch S1 lagging behind switch S4.

[0092] In some embodiments of the present application, when the second strategy is adopted, the controller outputs a first turn-on signal with a phase delay adjustment. The rising edge of this signal occurs later than originally scheduled, causing switch S1 to turn on later than originally planned. The fourth turn-on signal maintains its original timing, causing switch S4 to turn on at the originally scheduled time. In this way, the turn-on time of switch S1 is delayed while the turn-on time of switch S4 remains unchanged, directly achieving a timing relationship in which switch S1 lags behind switch S4.

[0093] As an example, not a limitation, during actual signal output, the controller also needs to maintain the normal operating timing of other switches. Although the phase relationship between the first and fourth conduction signals has been adjusted, the second conduction signal (controlling switch S2) and the third conduction signal (controlling switch S3) must still maintain the correct complementary relationship with their corresponding complementary switches. The controller must synchronously adjust the timing of all relevant signals to ensure that the basic requirements of switches S1 and S2 complement each other, and switches S3 and S4 complement each other, are met, while also maintaining sufficient dead time between each complementary pair.

[0094] In some embodiments, step S620 specifically includes the following steps: Step S621: adjusting the first conduction signal or the fourth conduction signal according to the phase shift angle, so that the phase difference between the first conduction signal and the fourth conduction signal is the phase shift angle.

[0095] In some embodiments of the present application, when it is desired to turn on switch S1 before switch S4, a specific phase difference relationship is also established between the first conduction signal and the fourth conduction signal. The value of this phase difference is equal to the calculated phase shift angle. The difference from step S611 is that the phase difference adjustment direction is opposite in this case. The goal is to make the first conduction signal lead the fourth conduction signal, rather than lag behind it.

[0096] Phase difference adjustment in lead control can also be achieved through two equivalent methods. The first method uses the timing of the fourth conduction signal as a reference and adjusts the phase of the first conduction signal forward. The second method uses the timing of the first conduction signal as a reference and adjusts the phase of the fourth conduction signal backward. Regardless of which method is used, the first conduction signal ultimately leads the fourth conduction signal in phase.

[0097] Specifically, when using the first regulation method, the controller uses the fourth conduction signal as a timing reference and advances the rising edge of the first conduction signal relative to its original scheduled time. The amount of advance is calculated using the phase shift angle: Advance Time = Phase Shift Angle × Switching Period / 360 degrees. For example, when the phase shift angle is 4 degrees and the switching frequency is 100kHz, the first conduction signal needs to be advanced by 4 × 10μs / 360 = 0.111μs. The controller reconfigures the PWM generation unit to advance the triggering time of the first conduction signal by 0.111μs relative to the original time.

[0098] By way of example and not limitation, the second adjustment method fixes the timing of the first conduction signal and adjusts the phase of the fourth conduction signal. In this method, the controller delays the rising edge of the fourth conduction signal relative to its original timing. The amount of delay is the same as the advance time in the first method, and both are equal to the time value corresponding to the phase shift angle. The controller reconfigures the triggering time of the fourth conduction signal to delay it by a corresponding amount relative to the original timing, thereby achieving a phase relationship in which the first conduction signal leads the fourth conduction signal.

[0099] In some embodiments of the present application, phase difference adjustment for lead control requires careful coordination with dead time. When the first conduction signal is advanced or the fourth conduction signal is delayed, this may affect the dead time setting between the complementary switches. The controller must synchronously adjust the timing of the second conduction signal (controlling switch S2) and the third conduction signal (controlling switch S3) to ensure sufficient dead time between switches S1 and S2, and between switches S3 and S4, to prevent shoot-through between the upper and lower switches in the same half-bridge.

[0100] Step S622: outputting the adjusted fourth conduction signal to turn on the switch S4 so that the switch S4 lags behind the switch S1; or outputting the adjusted first conduction signal to turn on the switch S1 so that the switch S1 leads the switch S4.

[0101] Specifically, this step describes two equivalent signal output strategies for achieving a lead turn-on of switch S1 before switch S4. The first strategy outputs a phase-delayed fourth turn-on signal, causing switch S4 to turn on later; the second strategy outputs a phase-advanced first turn-on signal, causing switch S1 to turn on earlier. Both strategies are completely equivalent in terms of the final timing relationship and both achieve the control goal of having switch S1 lead switch S4.

[0102] By way of example and not limitation, when using the first output strategy, the controller outputs a fourth turn-on signal with a phase delay. The rising edge of this signal occurs later than originally scheduled, causing switch S4 to turn on later than originally planned. Simultaneously, the first turn-on signal maintains its original timing, causing switch S1 to turn on at the originally scheduled time. This timing arrangement delays the turn-on time of S4 while maintaining the turn-on time of S1, resulting in a timing relationship in which S4 lags behind S1, effectively achieving the control objective of S1 leading S4.

[0103] In some embodiments of the present application, the second output strategy directly adjusts the output timing of the first conduction signal. The controller outputs the first conduction signal after phase advance adjustment, with the rising edge of this signal occurring earlier than originally scheduled, causing switch S1 to turn on earlier than originally planned. The fourth conduction signal maintains its original timing, causing switch S4 to turn on at the originally scheduled time. In this way, the turn-on time of switch S1 is advanced while the turn-on time of switch S4 remains unchanged, directly achieving a timing relationship in which switch S1 leads switch S4.

[0104] It's easy to understand that the effect of advanced turn-on of switch S1 on the operating state of the LLC resonant converter is completely opposite to that of delayed turn-on of switch S1. When switch S1 is advanced, the duration of the conduction phase of switches S1 and S3 is relatively prolonged, providing more time for the voltage divider capacitor C1 to charge. During this phase, the current loop follows the positive input voltage path → S1 → resonant cavity → S3 → C2 → negative input voltage path. The input power charges the voltage divider capacitor C1 through switch S1, while the voltage divider capacitor C2 provides energy to the resonant network through switch S3. This extended charging time causes the first capacitor voltage Vc1 to gradually increase.

[0105] Specifically, the early turn-on of switch S1 also affects the subsequent turn-on phase of switches S2 and S4. Due to the early turn-on of switch S1, when the system switches to the turn-on state of switches S2 and S4, the duration of this phase is relatively shortened. During the turn-on phase of switches S2 and S4, the voltage-dividing capacitor C2 is charged by the input power supply, while the voltage-dividing capacitor C1 discharges into the resonant network through S2. The shortened turn-on time of switches S2 and S4 reduces the charging time of voltage-dividing capacitor C2 and the discharge time of voltage-dividing capacitor C1, further promoting the increase of the first capacitor voltage Vc1 and the decrease of the second capacitor voltage Vc2.

[0106] By enabling switch S1 ahead of switch S4, voltage-dividing capacitor C1 receives more charging opportunities and less discharge time, gradually increasing first capacitor voltage Vc1. Meanwhile, voltage-dividing capacitor C2 receives fewer charging opportunities and more discharge time, gradually decreasing second capacitor voltage Vc2. This process continues until voltages Vc1 and Vc2 reach equilibrium again, and the difference between the capacitor voltages falls below the set threshold.

[0107] Different from the existing technology, the implementation mode of the present invention can solve the problem of uneven voltage of the voltage-dividing capacitor in the bridge arm series LLC resonant converter, realize input bus voltage balance, and ensure output voltage stability; at the same time, it maintains the soft switching characteristics of LLC primary side zero voltage turn-on and secondary side zero current turn-off, thereby improving the reliability and safety of the resonant converter operation.

[0108] The embodiment of the present invention also provides an electronic device based on the above capacitor voltage balance control method, the structural diagram of which is shown in FIG. Figure 8 As shown, the electronic device 100 includes: One or more processors 101, network interface 102, and memory 103, Figure 8 In the figure, a processor 101, a network interface 102 and a memory 103 are taken as an example.

[0109] The network interface 102 is in communication with the corresponding processor 101, and the processor 101 and the memory 103 can be connected via a bus or other means. Figure 8 The bus connection is taken as an example.

[0110] The network interface 102 is used to establish a communication connection between the processor 101 and other external devices, and includes the following types of interfaces: RJ-45 interface, SC fiber optic interface, AUI interface, FDDI interface, and Console interface.

[0111] Memory 103, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs, and modules. Processor 101 executes the non-volatile software programs, instructions, and units stored in memory 103 to execute various functional applications and data processing of the electronic device, thereby implementing the capacitor voltage balancing control method of the above-mentioned method embodiment.

[0112] The memory 103 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and applications required for at least one function; the data storage area may store data created based on the use of the electronic device, etc. In addition, the memory 103 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 103 may optionally include a memory remotely located relative to the processor 101, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0113] The one or more units are stored in the memory 103 , and when executed by one or more processors 101 , perform the capacitor voltage balancing control method in any of the above method embodiments.

[0114] The electronic device can execute the capacitor voltage balance control method provided by the embodiment of the present invention, and has the corresponding program module and beneficial effects of the execution method. For technical details not fully described in the electronic device embodiment, please refer to the capacitor voltage balance control method provided by the embodiment of the present invention.

[0115] In some embodiments of the present application, an LLC resonant converter is provided, which includes two main components: an LLC resonant conversion circuit and an electronic device.

[0116] The LLC resonant conversion circuit adopts a bridge arm series topology structure, such as Figure 1 As shown in Figure 1, the circuit includes a primary circuit consisting of two series-connected half-bridge circuits. The first half-bridge circuit includes switches S1 and S2, and a voltage-divider capacitor C1. The second half-bridge circuit includes switches S3 and S4, and a voltage-divider capacitor C2. The resonant network, consisting of a resonant inductor Lr, a resonant capacitor Cr, and a magnetizing inductor Lm, enables resonant energy transfer. The secondary rectifier circuit, consisting of rectifier diodes Q1, Q2, Q3, and Q4, and an output filter capacitor Co, converts the resonantly transmitted AC energy into a stable DC output.

[0117] Specifically, the electronic device serving as the control core of the LLC resonant converter includes at least one processor, at least one network interface, and memory connected to the processor. The processor, a high-performance digital signal processor (DSP) or microcontroller (MCU), offers powerful real-time computing capabilities and a rich set of peripheral interfaces. The processor integrates a high-precision analog-to-digital converter (ADC) for real-time sampling of the voltage divider capacitors C1 and C2, and a high-resolution PWM generation unit for generating precise switch drive signals.

[0118] As an example and not a limitation, the memory stores control program instructions that can be executed by the processor, which implement the capacitor voltage balance control method described in the above embodiment. The control program includes a voltage sampling module, a voltage difference calculation module, a threshold judgment module, a phase shift angle adjustment module, and a PWM signal generation module. The voltage sampling module reads the values ​​of Vc1 and Vc2 in real time through the ADC interface, the voltage difference calculation module calculates |Vc1-Vc2| and compares it with the set threshold, the phase shift angle adjustment module determines the required phase shift angle based on trial and error or PI control method, and the PWM signal generation module adjusts the driving signal timing of each switch tube based on the phase shift angle.

[0119] In some embodiments of the present application, a network interface provides the LLC resonant converter with the ability to communicate with an external monitoring system or host computer. Through the network interface, the external device can monitor the operating status of the LLC resonant converter in real time, including key parameters such as input and output voltages, divider capacitor voltage, switching frequency, and phase shift angle. At the same time, the external device can issue control instructions through the network interface to adjust the operating parameters or control strategy of the LLC resonant converter, thereby realizing remote monitoring and intelligent control functions.

[0120] The LLC resonant converter circuit and electronic devices exchange information and execute control via various interfaces. The voltage sampling interface transmits the voltage signal from the voltage divider capacitor to the ADC input of the electronic device. The drive signal output interface transmits the PWM control signal generated by the electronic device to the gate drive circuit of each switching transistor. The protection signal interface transmits fault information such as overvoltage, overcurrent, and overtemperature, enabling the electronic device to promptly shut down the switching transistor in abnormal situations to protect circuit safety.

[0121] Specifically, the LLC resonant converter first performs an initialization sequence during operation. The electronics adjust the LLC resonant converter circuit's duty cycle to 50% and its operating frequency to the resonant frequency fs. It then enters normal operation mode, continuously monitoring the voltage on the divider capacitors. If an imbalance in the capacitor voltages is detected, the electronics automatically activate the capacitor voltage balancing control function. This dynamically balances the capacitor voltages by adjusting the phase shift angle, ensuring safe and reliable operation of the LLC resonant converter.

[0122] Different from the existing technology, the implementation mode of the present invention can solve the problem of uneven voltage of the voltage-dividing capacitor in the bridge arm series LLC resonant converter, realize input bus voltage balance, and ensure output voltage stability; at the same time, it maintains the soft switching characteristics of LLC primary side zero voltage turn-on and secondary side zero current turn-off, thereby improving the reliability and safety of the resonant converter operation.

[0123] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Based on the idea of ​​the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the present application as above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A capacitor voltage balance control method, applied to an LLC resonant converter, characterized in that: The LLC resonant converter includes a primary side consisting of two half-bridge circuits connected in series, wherein the first half-bridge circuit includes a switch tube S1, a switch tube S2, and a voltage-dividing capacitor C1, and the second half-bridge circuit includes a switch tube S3, a switch tube S4, and a voltage-dividing capacitor C2. The method includes the following steps: Step A: sampling the first capacitor voltage Vc1 of the voltage-dividing capacitor C1 and the second capacitor voltage Vc2 of the voltage-dividing capacitor C2 in real time; Step B: Determine whether the capacitor voltage difference |Vc1-Vc2| exceeds a set threshold; Step C: When the capacitor voltage difference |Vc1-Vc2| exceeds the set threshold, adjusting the phase shift angle between the switch tube S1 and the switch tube S4; Step D: controlling the switch tube S1 to be turned on before or after the switch tube S4 according to the adjusted phase shift angle; The above steps are repeated until the capacitor voltage difference |Vc1-Vc2| does not exceed the set threshold.

2. The method according to claim 1, characterized in that The adjusting of the phase shift angle between the switch tube S1 and the switch tube S4 comprises the following steps: The phase shift angle is increased according to a preset step value.

3. The method according to claim 1, characterized in that The adjusting of the phase shift angle between the switch tube S1 and the switch tube S4 comprises the following steps: Inputting the capacitor voltage difference |Vc1-Vc2| as an error signal into a PI controller, and the PI controller obtains a phase shift angle control value according to the error signal; The phase shift angle is adjusted according to the phase shift angle control amount.

4. The method according to claim 1, wherein The step of controlling the switch tube S1 to be turned on before or after the switch tube S4 according to the adjusted phase shift angle comprises the following steps: When the first capacitor voltage Vc1 is greater than the second capacitor voltage Vc2, the switch tube S1 is controlled to be turned on later than the switch tube S4 according to the phase shift angle; When the first capacitor voltage Vc1 is less than the second capacitor voltage Vc2 , the switch tube S1 is controlled to be turned on before the switch tube S4 according to the phase shift angle.

5. The method according to claim 4, characterized in that The step of controlling the switch tube S1 to be turned on later than the switch tube S4 according to the phase shift angle includes the following steps: adjusting the first conduction signal or the fourth conduction signal according to the phase shift angle so that the phase difference between the first conduction signal or the fourth conduction signal is the phase shift angle; Outputting the adjusted fourth conduction signal to turn on the switch tube S4, so that the switch tube S4 is ahead of the switch tube S1; or outputting the adjusted first conduction signal to turn on the switch tube S1, so that the switch tube S1 lags behind the switch tube S4; The first conduction signal is used to turn on the switch S1 , and the fourth conduction signal is used to turn on the switch S4 .

6. The method according to claim 4, characterized in that The step of controlling the switch tube S1 to be turned on before the switch tube S4 according to the phase shift angle includes the following steps: adjusting the first conduction signal or the fourth conduction signal according to the phase shift angle so that the phase difference between the first conduction signal or the fourth conduction signal is the phase shift angle; outputting the adjusted fourth conduction signal to turn on the switch tube S4, so that the switch tube S4 lags behind the switch tube S1; or outputting the adjusted first conduction signal to turn on the switch tube S1 so that the switch tube S1 leads the switch tube S4; The first conduction signal is used to turn on the switch S1 , and the fourth conduction signal is used to turn on the switch S4 .

7. The method according to claim 1, characterized in that Before step A, the method further includes: after the LLC resonant converter is connected to a DC input, adjusting the duty cycle of the LLC resonant converter to 50%; Adjust the operating frequency of the LLC resonant converter to the resonant frequency f s .

8. The method according to claim 7, characterized in that The resonant frequency f s The calculation formula is as follows: , Wherein, Lr is the inductance value of the resonant inductor in the LLC resonant converter, and Cr is the capacitance value of the resonant capacitor in the LLC resonant converter.

9. An electronic device, characterized in that: include: at least one processor; at least one network interface, the network interface being communicatively connected to a corresponding processor; as well as, a memory communicatively connected to the at least one processor; wherein, The network interface is used to establish a communication connection between the processor and other external devices; The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the capacitor voltage balancing control method according to any one of claims 1 to 8.

10. An LLC resonant converter, characterized in that: include: LLC resonant conversion circuit; as well as The electronic device according to claim 9.

Citation Information

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