LED chip with vertical structure

Abstract

The invention discloses an LED chip with a vertical structure, and relates to the technical field of semiconductors. The vertical structure LED chip comprises a P metal electrode, an epitaxial layer, a p-type metal reflecting layer, an n-type metal reflecting layer, a bonding metal layer and a conductive substrate. The epitaxial layer comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer; the bonding metal layer is laminated on the conductive substrate, the n-type metal reflecting layer is laminated on the bonding metal layer, the p-type metal reflecting layer is laminated above the n-type metal reflecting layer, and the top of the n-type metal reflecting layer penetrates through the p-type metal reflecting layer to be in contact with the N-type semiconductor layer; the P metal electrode is electrically connected with the p-type metal reflecting layer, and the p-type metal reflecting layer is electrically connected with the P-type semiconductor layer; the orthographic projection of the light-emitting layer on the plane where the p-type metal reflecting layer is located is completely located in the orthographic projection area of the p-type metal reflecting layer. On the basis of not increasing the production cost, the light extraction efficiency of the LED chip with the vertical structure can be improved, so that the brightness is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a vertical structure LED chip. Background Art

[0002] Vertical LED chips hold promising prospects for future development, particularly in high-power lighting, automotive headlights, display backlighting, and specialty lighting applications (such as ultraviolet and infrared LEDs). Compared to face-mount and flip-chip chips, vertical LED chips offer superior heat dissipation and high current carrying capacity, enabling higher brightness output and longer lifespans. Furthermore, their uniform current distribution effectively improves luminous efficiency, meeting market demand for efficient and stable light sources.

[0003] However, despite the obvious advantages of vertical structure LED chips in terms of brightness and current expansion, the manufacturing process of vertical structure LED chips is complex and the production cost is high, which means that most of the products are limited to high-end applications. In addition, in order to maximize brightness, current vertical structure LED chips generally use the silver mirror metal structure with the highest reflectivity as the reflective layer on the p-electrode and n-electrode. However, when people want to continue to improve the brightness of vertical structure LED chips, it is increasingly difficult to further increase the brightness of the chip by changing the reflectivity of the material. Therefore, how to further improve the brightness of vertical structure LED chips without increasing the chip manufacturing cost has become a key technical problem that needs to be solved in this field. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a vertical structure LED chip, which can improve the light extraction efficiency of the vertical structure LED chip without increasing the production cost, thereby improving the brightness.

[0005] In order to solve the above technical problems, the present invention provides a vertical structure LED chip, including a P metal electrode, an epitaxial layer, a p-type metal reflective layer, an n-type metal reflective layer, a bonding metal layer and a conductive substrate;

[0006] The epitaxial layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer stacked in sequence;

[0007] The bonding metal layer is stacked on the surface of the conductive substrate, the n-type metal reflective layer is stacked on the surface of the bonding metal layer, the p-type metal reflective layer is stacked above the n-type metal reflective layer, and the top of the n-type metal reflective layer passes through the p-type metal reflective layer and contacts the N-type semiconductor layer;

[0008] The p-type metal reflective layer and the n-type metal reflective layer are insulated from each other, the P-metal electrode is electrically connected to the p-type metal reflective layer, and the p-type metal reflective layer is electrically connected to the P-type semiconductor layer;

[0009] The orthographic projection of the light-emitting layer on the plane where the p-type metal reflective layer is located is completely located within the orthographic projection area of ​​the p-type metal reflective layer.

[0010] As an improvement to the above technical solution, the bonding metal layer includes a first connecting portion and a second connecting portion connected to each other, and the second connecting portion protrudes from the surface of the first connecting portion;

[0011] The width of the n-type metal reflective layer is smaller than the width of the bonding metal layer, and the n-type metal reflective layer includes a first n-type metal reflective portion and a second n-type metal reflective portion connected to each other, the second n-type metal reflective portion covers a surface of the second connecting portion, and the first n-type metal reflective portion is stacked on a surface of the first connecting portion;

[0012] The p-type metal reflective layer includes a first p-type metal reflective portion and a second p-type metal reflective portion connected to each other, wherein the first p-type metal reflective portion is stacked above the first connecting portion and is electrically connected to the p-type semiconductor layer; the second p-type metal reflective portion covers the exterior of the second n-type metal reflective portion; and the top of the second n-type metal reflective portion passes through the second p-type metal reflective portion and contacts the n-type semiconductor layer;

[0013] The top of the second p-type metal reflecting portion is flush with the upper surface of the light-emitting layer, or the top of the second p-type metal reflecting portion protrudes from the upper surface of the light-emitting layer; the periphery of the first p-type metal reflecting portion corresponds to the periphery of the light-emitting layer, or the periphery of the first p-type metal reflecting portion protrudes from the periphery of the light-emitting layer.

[0014] As an improvement to the above technical solution, the second p-type metal reflecting portion protrudes from the first p-type metal reflecting portion, so that an angle α1 is formed between the sidewall of the second p-type metal reflecting portion and the first p-type metal reflecting portion, and the angle α1 is 125° to 140°;

[0015] The second n-type metal reflecting portion protrudes from the first n-type metal reflecting portion, so that an angle α2 is formed between the sidewall of the second n-type metal reflecting portion and the first n-type metal reflecting portion. The angle α2 is 125° to 140°.

[0016] As an improvement to the above technical solution, the top of the second p-type metal reflective portion protrudes from the upper surface of the light-emitting layer by 5nm to 50nm;

[0017] The outer periphery of the first p-type metal reflective portion protrudes from the outer periphery of the light emitting layer by 10 nm to 50 nm.

[0018] As an improvement of the above technical solution, the vertical structure LED chip further includes a current blocking layer, a p-type metal electrode extension layer and a first passivation protection layer;

[0019] The first passivation protection layer includes a first passivation protection portion A and a first passivation protection portion B connected to each other, the first passivation protection portion A covers the surface of the first connecting portion, and the first passivation protection portion B covers the outer surface of the second n-type metal reflecting portion;

[0020] The p-type metal electrode extension layer is stacked on the surface of the first passivation protection portion A, and the P metal electrode and the p-type metal electrode extension layer are electrically connected;

[0021] The first p-type metal reflective portion covers the surface of the p-type metal electrode extension layer, and the second p-type metal reflective portion covers the surface of the first passivation protection portion B;

[0022] The current blocking layer includes a first current blocking portion and a second current blocking portion connected to each other; the light-emitting layer is located above the first current blocking portion, and the first current blocking portion covers the surface of the first p-type metal reflecting portion and the p-type metal electrode extension layer; the second current blocking portion covers the surface of the second p-type metal reflecting portion, and an end of the second current blocking portion away from the first current blocking portion is connected to the first passivation protection portion B, and a portion of the second p-type metal reflecting portion passes through the first current blocking portion and is electrically connected to the P-type semiconductor layer;

[0023] A top portion of the second n-type metal reflecting portion passes through the second current blocking portion and contacts the N-type semiconductor layer.

[0024] As an improvement of the above technical solution, the vertical structure LED chip further includes a current spreading layer;

[0025] The current spreading layer is disposed between the P-type semiconductor layer and the first current blocking portion, and the first P-type metal reflecting portion is electrically connected to the current spreading layer.

[0026] As an improvement to the above technical solution, an n-type hole is provided on a side of the epitaxial layer close to the current blocking layer, and the n-type hole continuously penetrates the current spreading layer, the P-type semiconductor layer and the light-emitting layer until the N-type semiconductor layer is exposed;

[0027] The shape of the second current blocking portion matches the shape of the n-type hole, and the second current blocking portion is adhered to the hole wall of the n-type hole; and the second connecting portion, the second n-type metal reflecting portion, the first passivation protection portion B, the second p-type metal reflecting portion and the second current blocking portion are respectively arranged in the n-type hole from the inside to the outside.

[0028] As an improvement of the above technical solution, an angle θ between a surface of the P-type semiconductor layer close to the conductive substrate and a hole wall of the n-type hole is 125° to 140°.

[0029] As an improvement of the above technical solution, the materials of the p-type metal reflective layer and the n-type metal reflective layer respectively include at least two of Ag, Ti, Ni and Cr, and the p-type metal reflective layer and the n-type metal reflective layer must contain Ag.

[0030] As an improvement of the above technical solution, the vertical structure LED chip further includes a second passivation protection layer, and the second passivation protection layer covers the outer surface of the epitaxial layer.

[0031] The implementation of the present invention has the following beneficial effects:

[0032] 1. Without increasing production costs, by improving the structure of the vertical structure LED chip, the light extraction efficiency of the LED chip can be improved, thereby increasing the chip brightness. Through testing, it was found that the brightness of the vertical structure LED chip of the present invention reached more than 659mW under a test current of 350mA and a voltage of 2.84V.

[0033] 2. By improving the structure of vertical LED chips, a conductive substrate serves as the chip's N-electrode. The conductive substrate is electrically connected to the N-type semiconductor layer via an n-type metal reflective layer. Because the conductive substrate is positioned on the side facing away from the light-emitting surface, it does not obstruct the light-emitting surface, further improving light emission efficiency and display uniformity, thereby further enhancing the brightness of the LED chip. This structural design effectively avoids the light loss caused by obstruction caused by forming the N-electrode on the N-type semiconductor layer, maximizing the luminous flux of the LED chip while reducing uneven brightness across the light-emitting area. This significantly improves image clarity and lighting quality, resulting in a better visual effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 This is a schematic structural diagram of a vertical structure LED chip according to an embodiment of the present invention;

[0035] Figure 2 yes Figure 1 A partial enlarged view of the vertical structure LED chip of the embodiment shown;

[0036] Figure 3 It is a structural schematic diagram of a vertical structure LED chip of a comparative example of the present invention. DETAILED DESCRIPTION

[0037] To make the objectives, technical solutions, and advantages of the present invention more apparent, the present invention will be described in further detail below with reference to the accompanying drawings. The present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present invention.

[0038] If no specific techniques or conditions are specified in the examples, the techniques or conditions described in the literature in this field or the product instructions were used. Raw materials used without manufacturer specified are all commercially available conventional products.

[0039] like Figure 1 and Figure 2 As shown, this embodiment provides a vertical structure LED chip, including a P metal electrode 1, an epitaxial layer 3, a p-type metal reflective layer 6, an n-type metal reflective layer 9, a bonding metal layer 10 and a conductive substrate 11;

[0040] The epitaxial layer 3 includes an N-type semiconductor layer 31, a light-emitting layer 32 and a P-type semiconductor layer 33 stacked in sequence from top to bottom;

[0041] The bonding metal layer 10 is stacked on the surface of the conductive substrate 11, the n-type metal reflective layer 9 is stacked on the surface of the bonding metal layer 10, the p-type metal reflective layer 6 is stacked on the n-type metal reflective layer 9, and the top of the n-type metal reflective layer 9 passes through the p-type metal reflective layer 6 and contacts the N-type semiconductor layer 31;

[0042] The p-type metal reflective layer 6 and the n-type metal reflective layer 9 are insulated from each other, the P-metal electrode 1 is electrically connected to the p-type metal reflective layer 6, and the p-type metal reflective layer 6 is electrically connected to the P-type semiconductor layer 33;

[0043] The orthographic projection of the light-emitting layer 32 on the plane where the p-type metal reflective layer 6 is located is completely located within the orthographic projection area of ​​the p-type metal reflective layer 6, so that the p-type metal reflective layer 6 covers the entire light-emitting layer 32, so that the output light of the light-emitting layer 32 can be completely reflected by the p-type metal reflective layer 6, thereby improving the light extraction efficiency and thereby improving the brightness of the LED chip.

[0044] Furthermore, since the resistance of the N-type semiconductor layer 31 is typically relatively large, directly forming an N-electrode on the N-type semiconductor layer 31 can easily cause uneven current spreading, which in turn significantly reduces the brightness of the LED chip. Therefore, existing technologies often improve current spreading by increasing the number of N-electrodes on the N-type semiconductor layer 31. However, excessive N-electrodes can significantly block the light-emitting surface, also causing a decrease in the brightness of the LED chip. The present invention improves the structure of a vertically structured LED chip, using a conductive substrate 11 as the chip's N-electrode. The conductive substrate 11 is electrically connected to the N-type semiconductor layer 31 via an n-type metal reflective layer 9. Since the conductive substrate 11 is disposed on the side facing away from the light-emitting surface, it does not block the light-emitting surface, further improving light emission efficiency and display uniformity, thereby further improving the brightness of the LED chip. This structural design effectively avoids the light loss problem caused by blocking the N-electrode formed on the N-type semiconductor layer 31, maximizing the luminous flux of the LED chip while reducing the uneven brightness of the light-emitting area. This significantly improves image clarity and lighting quality, resulting in a better visual effect of the light source.

[0045] In one embodiment, the N-type semiconductor layer 31 is a Si-doped N-GaN layer;

[0046] In one embodiment, the light emitting layer 32 is an InGaN / GaN multi-quantum well layer;

[0047] In one embodiment, the P-type semiconductor layer 33 is a Mg-doped P-GaN layer.

[0048] Preferably, the total thickness of the epitaxial layer 3 is 4 μm to 8 μm. In one embodiment, the total thickness of the light emitting layer 32 and the P-type semiconductor layer 33 is 500 nm to 1000 nm, and the thickness of the N-type semiconductor layer 31 is 3 μm to 7.5 μm.

[0049] Preferably, the bonding metal layer 10 is a metal stack, which connects the epitaxial layer and its structural layers to the conductive substrate through metal bonding technology, providing a high thermal conductivity, low resistance bonding interface, ensuring good electrical connection and mechanical stability between the chip and the conductive substrate. The bonding metal layer 10 can be a metal stack such as Ti / Au / Sn or Ti / Ni / Sn.

[0050] Conductive substrate 11 provides mechanical support for the LED chip, securing it in place for easy processing, packaging, and use. Conductive substrate 11 has excellent thermal conductivity, quickly dissipating heat generated by the chip during operation, reducing chip temperature and improving chip reliability and stability. It also serves as a current conduction path, forming a loop with P-metal electrode 1, allowing current to flow through the chip and ensuring normal light emission.

[0051] like Figure 2 As shown, in one embodiment, the bonding metal layer 10 includes a first connecting portion 101 and a second connecting portion 102 connected to each other, and the second connecting portion 102 protrudes from the surface of the first connecting portion 101; preferably, the cross-section of the second connecting portion 102 is a trapezoid or a triangle, and more preferably, the cross-section of the second connecting portion 102 is an isosceles trapezoid or an isosceles triangle;

[0052] The width of the n-type metal reflective layer 9 is smaller than the width of the bonding metal layer 10 (it should be understood that the width of the n-type metal reflective layer 9 in the present invention refers to the width of the projection surface of the n-type metal reflective layer 9 obtained in a horizontal projection). The n-type metal reflective layer 9 includes a first n-type metal reflective portion 91 and a second n-type metal reflective portion 92 that are interconnected. The second n-type metal reflective portion 92 follows the shape of the second connecting portion 102 and covers the surface of the second connecting portion 102. The first n-type metal reflective portion 91 is stacked on the surface of the first connecting portion 101, thereby electrically connecting the n-type metal reflective layer 9 and the second connecting portion 102.

[0053] The p-type metal reflective layer 6 includes a first p-type metal reflective portion 61 and a second p-type metal reflective portion 62 connected to each other. The first p-type metal reflective portion 61 is stacked above the first connecting portion 101 and is electrically connected to the p-type semiconductor layer 33. The second p-type metal reflective portion 62 covers the exterior of the second n-type metal reflective portion 92. The top of the second n-type metal reflective portion 92 passes through the second p-type metal reflective portion 62 and contacts the n-type semiconductor layer 31, forming an ohmic contact between the n-type metal reflective layer 9 and the n-type semiconductor layer 31.

[0054] The top of the second p-type metal reflective portion 62 is flush with the upper surface of the light-emitting layer 32, or the top of the second p-type metal reflective portion 62 protrudes from the upper surface of the light-emitting layer 32; the periphery of the first p-type metal reflective portion 61 corresponds to the periphery of the light-emitting layer 32, or the periphery of the first p-type metal reflective portion 61 protrudes from the periphery of the light-emitting layer 32. This structural improvement ensures that the entire light-emitting layer 32 is covered by the p-type metal reflective layer 6, so that all the emitted light generated by the light-emitting layer 32 is reflected by the p-type metal reflective layer 6, thereby improving light extraction efficiency and thus increasing the brightness of the LED chip. It prevents emitted light from entering other structural layers of the chip through the light-emitting layer 32 not covered by the p-type metal reflective layer 6 and being absorbed, resulting in reduced light extraction efficiency.

[0055] In one embodiment, the second p-type metal reflecting portion 62 protrudes from the first p-type metal reflecting portion 61, so that an angle α1 is formed between the sidewall of the second p-type metal reflecting portion 62 and the first p-type metal reflecting portion 61, and the angle α1 is 125° to 140°. The second n-type metal reflecting portion 92 protrudes from the first n-type metal reflecting portion 91, so that an angle α2 is formed between the sidewall of the second n-type metal reflecting portion 92 and the first n-type metal reflecting portion 91, and the angle α2 is 125° to 140°. Since both the p-type metal reflecting layer 6 and the n-type metal reflecting layer 9 are silver mirror metal structures, and since metallic silver is prone to migration, limiting the angles α1 and α2 can not only ensure that the brightness of the chip is within a preferred range, but also prevent silver migration caused by breakage at sharp corners, thereby ensuring chip yield and reliability.

[0056] In one embodiment, the top of the second p-type metal reflective portion 62 protrudes from the upper surface of the light-emitting layer 32 by 5 nm to 50 nm;

[0057] The outer periphery of the first p-type metal reflective portion 61 protrudes from the outer periphery of the light emitting layer 32 by 10 nm to 50 nm, thereby further improving the light extraction efficiency and thus further increasing the brightness of the chip.

[0058] In one embodiment, the vertical structure LED chip further includes a current blocking layer 5, a p-type metal electrode extension layer 7 and a first passivation protection layer 8;

[0059] The first passivation protection layer 8 includes a first passivation protection portion A 81 and a first passivation protection portion B 82 connected to each other, wherein the first passivation protection portion A 81 covers the surface of the first connecting portion 101 , and the first passivation protection portion B 82 covers the outer surface of the second n-type metal reflecting portion 92 ;

[0060] The p-type metal electrode extension layer 7 is stacked on the surface of the first passivation protection A portion 81 , and the P metal electrode 1 and the p-type metal electrode extension layer 7 are electrically connected;

[0061] The first p-type metal reflective portion 61 covers the surface of the p-type metal electrode extension layer 7 to achieve electrical connection between the p-type metal reflective layer 6 and the p-type metal electrode extension layer 7. The second p-type metal reflective portion 62 covers the surface of the first passivation protection portion B 82.

[0062] The current blocking layer 5 includes a first current blocking portion 51 and a second current blocking portion 52 connected to each other. The light-emitting layer 32 is located above the first current blocking portion 51, and the first current blocking portion 51 covers the surface of the first p-type metal reflective portion 61 and the p-type metal electrode extension layer 7. The second current blocking portion 52 covers the surface of the second p-type metal reflective portion 62, and an end of the second current blocking portion 52 away from the first current blocking portion 51 is connected to the first passivation protection portion B 82, and a portion of the second p-type metal reflective portion 62 passes through the first current blocking portion 51 and is electrically connected to the p-type semiconductor layer 33. Because the current blocking layer 5 and the first passivation protection layer 8 are both insulating layers, the p-type metal reflective layer 6 and the p-type metal electrode extension layer 7 are located between the current blocking layer 5 and the first passivation protection layer 8. Through the synergistic effect of the current blocking layer 5 and the first passivation protection layer 8, the p-type metal reflective layer 6 and the p-type metal electrode extension layer 7 are separated from the n-type metal reflective layer 9, thereby preventing short circuits between the electrodes and ensuring the electrical characteristics of the device.

[0063] The top of the second n-type metal reflecting portion 92 passes through the second current blocking portion 52 and contacts the N-type semiconductor layer 31, so that the n-type metal reflecting layer 9 and the N-type semiconductor layer 31 are electrically connected; preferably, the top of the second n-type metal reflecting portion 92 is flush with the top of the second current blocking portion 52, or the top of the second n-type metal reflecting portion 92 protrudes from the top of the second current blocking portion 52.

[0064] The current-blocking layer 5 prevents current from flowing directly vertically from the area below the electrode into the P-type semiconductor layer 33, reducing current accumulation below the chip electrode and allowing more current to spread laterally to the active area, thereby improving the chip's luminous efficiency. Furthermore, by partially blocking the current, the current path can be adjusted, improving the uniformity of the chip's light distribution. Preferably, the current-blocking layer 5 is made of SiO2.

[0065] Preferably, the p-type metal electrode extension layer 7 is a metal stack, and the p-type metal electrode extension layer 7 can be a metal stack such as Ti / Pt / Au / Cr, Cr / Pt / Au / Ti or Cr / Pt / Au / Cr.

[0066] Preferably, the material of the first passivation protection layer 8 is SiO 2 . In addition, the first passivation protection layer 8 may also be a composite structure of Al 2 O 3 + SiO 2 .

[0067] In one embodiment, the vertical structure LED chip further includes a current spreading layer 4. Due to the poor conductivity of the P-type semiconductor layer 33, the current spreading layer 4 can evenly distribute the current on the P-type semiconductor layer 33, avoiding current concentration and improving the uniformity of the chip's light emission. In addition, the current spreading layer 4 can evenly inject current into the active area, allowing the active area to fully emit light, reducing the problem of reduced luminous efficiency caused by uneven current, thereby improving the overall light extraction efficiency and further increasing the brightness. Preferably, the material of the current spreading layer 4 can be ITO;

[0068] The current spreading layer 4 is disposed between the P-type semiconductor layer 33 and the first current blocking portion 51, and the first p-type metal reflector 61 is electrically connected to the current spreading layer 4. Specifically, the first current blocking portion 51 is provided with a plurality of conductive vias 511. These conductive vias 511 penetrate the first current blocking portion 51 until the current spreading layer 4 is exposed. Portions of the first p-type metal reflector 61 fill the conductive vias 511, establishing good ohmic contact between the p-type metal reflector 6 and the current spreading layer 4. This allows current to be smoothly injected from the external circuit into the P-type semiconductor layer 33, providing the necessary current path for the normal operation of the chip.

[0069] In one embodiment, the second current blocking portion 52 includes a current blocking side wall 521 and a current blocking top cover 522; one end of the current blocking side wall 521 is connected to the current blocking top cover 522, and the other end of the current blocking side wall 521 is connected to the first current blocking portion 51;

[0070] The current-blocking sidewalls 521 cover the side surfaces of the second p-type metal reflective portion 62. The current-blocking top cap 522 covers the top surfaces of the second p-type metal reflective portion 62 and the first passivation protection portion B 82. The top of the second n-type metal reflective portion 92 passes through the current-blocking top cap 522 and contacts the n-type semiconductor layer 31. Preferably, the top of the n-type metal reflective layer 9 is flush with the top of the current-blocking top cap 522.

[0071] In one embodiment, an n-type hole 34 is provided on a side of the epitaxial layer 3 close to the current blocking layer 5 , and the n-type hole 34 continuously penetrates the current spreading layer 4 , the P-type semiconductor layer 33 , and the light emitting layer 32 until the N-type semiconductor layer 31 is exposed.

[0072] The shape of the second current blocking portion 52 matches the shape of the n-type hole 34, and the second current blocking portion 52 adheres to the hole wall of the n-type hole 34. Furthermore, the second connecting portion 102, the second n-type metal reflecting portion 92, the first passivation protection portion B 82, the second p-type metal reflecting portion 62, and the second current blocking portion 52 are disposed from the inside out within the n-type hole 34. Without increasing chip production costs, the present invention designs the second p-type metal reflecting portion 62 within the n-type hole, thereby improving reflection efficiency within the chip structure, thereby improving light extraction efficiency and increasing chip brightness. This prevents some light emitted from the light-emitting layer 32 from entering the first passivation protection layer 8, where it is reflected back and forth between metals and ultimately absorbed, resulting in light energy loss and reduced light extraction efficiency. The light is primarily absorbed by the p-type metal electrode extension layer 7 without the silver mirror structure.

[0073] In one embodiment, the angle θ between the surface of the P-type semiconductor layer 33 close to the conductive substrate 11 and the hole wall of the n-type hole 34 is 125° to 140°, that is, 125°≤θ≤140°.

[0074] During the fabrication of the vertically structured LED chip of this embodiment, a hole is first formed in the epitaxial layer 3 stacked with the current spreading layer 4 to form an n-type hole 34. Then, a current blocking layer 5, a p-type metal reflective layer 6, a p-type metal electrode expansion layer 7, a first passivation protective layer 8, and an n-type metal reflective layer 9 are sequentially grown. By controlling the angle θ between the surface of the p-type semiconductor layer 33 near the conductive substrate 11 and the wall of the n-type hole 34 to be between 125° and 140°, the angle α1 between the first p-type metal reflective portion 61 and the second p-type metal reflective portion 62, as well as the angle α2 between the first n-type metal reflective portion 91 and the second n-type metal reflective portion 92, can also be controlled to be between 125° and 140°, or close to 125° and 140°. Controlling this angle range not only ensures that the chip brightness is within an optimal range but also guarantees chip yield and reliability. Since the n-type metal reflective layer 9 and the p-type metal reflective layer 6 in the present invention are both obtained by the silver mirror process, metallic silver is prone to migration, so the angle θ of the n-type hole 34 is crucial. If the angle θ is too small, the silver mirror (p-type metal reflective layer 6, n-type metal reflective layer 9) is prone to breakage at the sharp corners after evaporation, causing silver migration, resulting in a decrease in chip yield and reliability; if the angle θ is too large, the area of ​​the effective light-emitting area will be reduced, resulting in a decrease in chip brightness.

[0075] In one embodiment, the materials of the p-type metal reflective layer 6 and the n-type metal reflective layer 9 include at least two of Ag, Ti, Ni and Cr, respectively, and the p-type metal reflective layer 6 and the n-type metal reflective layer 9 must contain Ag.

[0076] The p-type metal reflective layer 6 and the n-type metal reflective layer 9 may be Ag / Ti / Ni / Ti / Ni or Ag / Ti / Cr, respectively, and the Ag metal layer in the p-type metal reflective layer 6 and the n-type metal reflective layer 9 is located on the side away from the conductive substrate 11 .

[0077] It should be noted that the structures of the n-type metal reflective layer 9 and the p-type metal reflective layer 6 can be the same or different. However, the light-reflecting surface of the n-type metal reflective layer 9 and the p-type metal reflective layer 6 is an Ag metal layer (located on the side away from the conductive substrate 11 in this embodiment), which can ensure maximum chip brightness. Preferably, the thickness of the Ag metal layer is 80nm to 200nm, which has a good light reflection effect.

[0078] In some embodiments, the conductive substrate 11 is made of one or more of silicon, molybdenum, and copper-tungsten alloy.

[0079] In one embodiment, the vertical structure LED chip further includes a second passivation protection layer 2, which covers the outer surface of the epitaxial layer 3. Preferably, the second passivation protection layer 2 can be made of SiO2.

[0080] It is worth mentioning that when the test current is 350mA and the voltage is 2.84V, the luminous brightness test is carried out on the vertical structure LED chip (size is 1235μm*1060μm) of this embodiment, and the test shows that the brightness of the vertical structure LED chip of this embodiment is 659.3mW.

[0081] Comparative Example

[0082] This comparative example provides a vertical structure LED chip. The structural diagram of the vertical structure LED chip of this comparative example is shown as follows: Figure 3 As shown, the vertical structure LED chip of this comparative example includes a P metal electrode ( Figure 3 Not shown), the second passivation protection layer ( Figure 3 ), an epitaxial layer 3', a current spreading layer 4', a current blocking layer 5', a p-type metal reflective layer 6', a p-type metal electrode extension layer 7', a first passivation protection layer 8', an n-type metal reflective layer 9', a bonding metal layer 10' and a conductive substrate 11'; the epitaxial layer 3' includes an N-type semiconductor layer 31', a light-emitting layer 32' and a P-type semiconductor layer 33' stacked in sequence from top to bottom.

[0083] The difference between the vertical structure LED chip of this comparative example and the vertical structure LED chip of this embodiment is that the p-type metal reflective layer 6' of comparative example 1 is arranged outside the n-type hole 34', that is, the p-type metal reflective layer 6' of comparative example 1 is only composed of the first p-type metal reflective portion, and the p-type metal reflective layer 6 covers the surface of the p-type metal electrode extension layer 7'.

[0084] Specifically, the brightness of the vertical structure LED chip of the comparative example (size 1235μm*1060μm) was tested under the test current of 350mA and the voltage of 2.84V. The test showed that the brightness of the vertical structure LED chip of the comparative example was 651.5mW. Figure 3 It can be seen that although part of the emitted light from the light-emitting layer 32' in Comparative Example 1 is directly reflected by the p-type metal reflective layer 6', part of the emitted light near the n-type hole 34' will pass through the current blocking layer 5' and enter the first passivation protection layer 8'. Since there is no angle for light emission, this part of the emitted light can only be reflected back and forth between the metals and will eventually be absorbed, mainly absorbed by the p-type metal electrode extension layer 7', resulting in a decrease in light extraction efficiency, which in turn leads to a decrease in brightness of the chip in Comparative Example 1.

[0085] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed as above in terms of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art may, without departing from the scope of the technical solution of the present invention, make some changes or modifications to equivalent embodiments using the technical contents suggested above. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall still fall within the scope of the solution of the present invention.

Claims

1. A vertical structure LED chip, characterized in that: It includes a P metal electrode, an epitaxial layer, a p-type metal reflective layer, an n-type metal reflective layer, a bonding metal layer and a conductive substrate; The epitaxial layer includes an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer stacked in sequence; The bonding metal layer is stacked on the surface of the conductive substrate, the n-type metal reflective layer is stacked on the surface of the bonding metal layer, the p-type metal reflective layer is stacked above the n-type metal reflective layer, and the top of the n-type metal reflective layer passes through the p-type metal reflective layer and contacts the N-type semiconductor layer; The p-type metal reflective layer and the n-type metal reflective layer are insulated from each other, the P-metal electrode is electrically connected to the p-type metal reflective layer, and the p-type metal reflective layer is electrically connected to the P-type semiconductor layer; The orthographic projection of the light-emitting layer on the plane where the p-type metal reflective layer is located is completely located within the orthographic projection area of ​​the p-type metal reflective layer.

2. The vertical structure LED chip according to claim 1, characterized in that: The bonding metal layer includes a first connecting portion and a second connecting portion connected to each other, wherein the second connecting portion protrudes from a surface of the first connecting portion; The width of the n-type metal reflective layer is smaller than the width of the bonding metal layer, and the n-type metal reflective layer includes a first n-type metal reflective portion and a second n-type metal reflective portion connected to each other, the second n-type metal reflective portion covers the surface of the second connecting portion, and the first n-type metal reflective portion is stacked on the surface of the first connecting portion; The p-type metal reflective layer includes a first p-type metal reflective portion and a second p-type metal reflective portion connected to each other, wherein the first p-type metal reflective portion is stacked above the first connecting portion and is electrically connected to the p-type semiconductor layer; the second p-type metal reflective portion covers the exterior of the second n-type metal reflective portion; and the top of the second n-type metal reflective portion passes through the second p-type metal reflective portion and contacts the n-type semiconductor layer; The top of the second p-type metal reflecting portion is flush with the upper surface of the light-emitting layer, or the top of the second p-type metal reflecting portion protrudes from the upper surface of the light-emitting layer; the periphery of the first p-type metal reflecting portion corresponds to the periphery of the light-emitting layer, or the periphery of the first p-type metal reflecting portion protrudes from the periphery of the light-emitting layer.

3. The vertical structure LED chip according to claim 2, characterized in that: The second p-type metal reflecting portion protrudes from the first p-type metal reflecting portion, so that an angle α1 is formed between the sidewall of the second p-type metal reflecting portion and the first p-type metal reflecting portion, and the angle α1 is 125° to 140°; The second n-type metal reflecting portion protrudes from the first n-type metal reflecting portion, so that an angle α2 is formed between the sidewall of the second n-type metal reflecting portion and the first n-type metal reflecting portion. The angle α2 is 125° to 140°.

4. The vertical structure LED chip according to claim 2, characterized in that: The top of the second p-type metal reflective portion protrudes from the upper surface of the light-emitting layer by 5 nm to 50 nm; The outer periphery of the first p-type metal reflective portion protrudes from the outer periphery of the light emitting layer by 10 nm to 50 nm.

5. The vertical structure LED chip according to claim 3, characterized in that: The vertical structure LED chip further includes a current blocking layer, a p-type metal electrode extension layer and a first passivation protection layer; The first passivation protection layer includes a first passivation protection portion A and a first passivation protection portion B connected to each other, the first passivation protection portion A covers the surface of the first connecting portion, and the first passivation protection portion B covers the outer surface of the second n-type metal reflecting portion; The p-type metal electrode extension layer is stacked on the surface of the first passivation protection portion A, and the P metal electrode and the p-type metal electrode extension layer are electrically connected; The first p-type metal reflective portion covers the surface of the p-type metal electrode extension layer, and the second p-type metal reflective portion covers the surface of the first passivation protection portion B; The current blocking layer includes a first current blocking portion and a second current blocking portion connected to each other; the light-emitting layer is located above the first current blocking portion, and the first current blocking portion covers the surface of the first p-type metal reflecting portion and the p-type metal electrode extension layer; the second current blocking portion covers the surface of the second p-type metal reflecting portion, and an end of the second current blocking portion away from the first current blocking portion is connected to the first passivation protection portion B, and a portion of the second p-type metal reflecting portion passes through the first current blocking portion and is electrically connected to the P-type semiconductor layer; A top portion of the second n-type metal reflecting portion passes through the second current blocking portion and contacts the N-type semiconductor layer.

6. The vertical structure LED chip according to claim 5, characterized in that: The vertical structure LED chip further includes a current spreading layer; The current spreading layer is disposed between the P-type semiconductor layer and the first current blocking portion, and the first P-type metal reflecting portion is electrically connected to the current spreading layer.

7. The vertical structure LED chip according to claim 6, characterized in that: An n-type hole is provided on a side of the epitaxial layer close to the current blocking layer, and the n-type hole continuously penetrates the current spreading layer, the P-type semiconductor layer and the light-emitting layer until the N-type semiconductor layer is exposed; The shape of the second current blocking portion matches the shape of the n-type hole, and the second current blocking portion is adhered to the hole wall of the n-type hole; and the second connecting portion, the second n-type metal reflecting portion, the first passivation protection portion B, the second p-type metal reflecting portion and the second current blocking portion are respectively arranged in the n-type hole from the inside to the outside.

8. The vertical structure LED chip according to claim 7, characterized in that: An included angle θ between a surface of the P-type semiconductor layer close to the conductive substrate and a hole wall of the n-type hole is 125° to 140°.

9. The vertical structure LED chip according to claim 1, characterized in that: The materials of the p-type metal reflective layer and the n-type metal reflective layer respectively include at least two of Ag, Ti, Ni and Cr, and the p-type metal reflective layer and the n-type metal reflective layer contain Ag.

10. The vertical structure LED chip according to claim 1, characterized in that: The vertical structure LED chip further includes a second passivation protection layer, and the second passivation protection layer covers the outer surface of the epitaxial layer.

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