Display device

Abstract

There is provided a display device including: a substrate; a thin film transistor on the substrate; a protective layer on the thin film transistor; a bank layer on the protective layer and having a plurality of grooves; a plurality of light emitting elements on the bank layer, each corresponding to each of the plurality of grooves, and including a pixel electrode, a light emitting layer, and a common electrode; and a pixel defining layer defining a light emitting area on the bank layer, in which the groove has a multi-stage inclined surface, and the pixel electrode includes a first inclined portion having a first inclination along the multi-stage inclined surface of the groove and a second inclined portion over the first inclined portion and having a second inclination different from the first inclination, wherein a horizontal width of the first inclined portion is wider than a horizontal width of the second inclined portion.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0033831 filed on March 11, 2024, in the Korean Intellectual Property Office (KIPO), the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] Aspects of some embodiments of the present disclosure relate to a display device. Background Art

[0003] With the development of the information society, consumers' demand for display devices for displaying images in various forms is increasing. For example, display devices can be applied to various electronic devices such as smart phones, digital cameras, laptop computers, navigation systems, and smart TVs.

[0004] The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, and a light-emitting display device. The light-emitting display device includes, for example, an organic light-emitting display device including an organic light-emitting element, an inorganic light-emitting display device including an inorganic light-emitting element such as an inorganic semiconductor, and an ultra-compact light-emitting display device including an ultra-compact light-emitting element.

[0005] An organic light emitting element may include two opposing electrodes and a light emitting layer interposed therebetween. The light emitting layer may receive electrons and holes from the two electrodes and recombine the electrons and holes to generate excitons, which may transition from an excited state to a ground state and emit light.

[0006] Unlike liquid crystal displays (LCDs), organic light-emitting display devices (OLEDs) typically do not require a separate light source because they utilize self-luminescent elements to achieve display. Consequently, OLEDs can be relatively thin and lightweight, and they can offer superior characteristics such as relatively high response speed, color reproduction, low power consumption, and a wide viewing angle.

[0007] However, as the viewing angle increases in an organic light emitting display device, the overall intensity of display light becomes relatively weaker, and the peak wavelength of each color shifts toward shorter wavelengths, resulting in distortion of color coordinates.

[0008] The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore the information discussed in this Background section does not necessarily constitute prior art. Summary of the Invention

[0009] Aspects of some embodiments of the present disclosure include a display device including a pixel electrode having a multi-level inclined structure, which can reduce a brightness ratio deviation depending on a viewing angle while relatively improving light emitting efficiency at a front side.

[0010] However, aspects of the embodiments according to the present disclosure are not limited to those specifically described herein. The above and other aspects of the embodiments according to the present disclosure will become more apparent to those skilled in the art by referring to the detailed description of the disclosure given below.

[0011] According to some embodiments, a display device includes: a substrate; a thin film transistor on the substrate; a protective layer on the thin film transistor; a embankment layer on the protective layer and having a plurality of grooves; a plurality of light-emitting elements on the embankment layer, each corresponding to each of the plurality of grooves and including a pixel electrode, a light-emitting layer and a common electrode; and a pixel defining layer defining a light-emitting area on the embankment layer, wherein the groove has a multi-level inclined surface, the pixel electrode includes a first inclined portion having a first inclination along the multi-level inclined surface of the groove and a second inclined portion above the first inclined portion and having a second inclination different from the first inclination, wherein the horizontal width of the first inclined portion is wider than the horizontal width of the second inclined portion.

[0012] According to some embodiments, a horizontal width of the first inclined portion is 3 μm to 5 μm, wherein a horizontal width of the second inclined portion is 1 μm to 3 μm.

[0013] According to some embodiments, the second inclination is smaller than the first inclination.

[0014] According to some embodiments, the first inclination is in the range of 20° to 30°, wherein the second inclination is in the range of 5° to 15°.

[0015] According to some embodiments, the pixel electrode further includes a bottom portion connected to a bottom of the first inclined portion and a top portion connected to a top of the second inclined portion and on a top surface of the bank layer.

[0016] According to some embodiments, the pixel defining layer partially overlaps the top portion.

[0017] According to some embodiments, the light emitting layer overlaps the bottom portion of the pixel electrode, the first inclined portion, and the second inclined portion.

[0018] According to some embodiments, the second inclination is greater than the first inclination.

[0019] According to some embodiments, the first inclination is in the range of 10° to 30°, wherein the second inclination is in the range of 30° to 60°.

[0020] According to some embodiments, the groove has different multi-level inclined structures.

[0021] According to some embodiments, a display device includes: a substrate including a first light-emitting area and a second light-emitting area; a thin film transistor on the substrate; a protective layer on the thin film transistor; a embankment layer on the protective layer and having a first groove and a second groove overlapping the first light-emitting area and the second light-emitting area, respectively; a first light-emitting element corresponding to the first groove on the embankment layer and including a first pixel electrode, a first light-emitting layer and a common electrode; a second light-emitting element corresponding to the second groove on the embankment layer and including a second pixel electrode, a second light-emitting layer and a common electrode; and a pixel defining layer defining the light-emitting area on the embankment layer, wherein the first pixel electrode has a single-stage inclined portion, wherein the second pixel electrode has a multi-stage inclined portion, the multi-stage inclined portion including a first inclined portion having a first inclination and a second inclined portion above the first inclined portion and having a second inclination different from the first inclination, wherein the horizontal width of the first inclined portion is wider than the horizontal width of the second inclined portion.

[0022] According to some embodiments, a horizontal width of the first inclined portion is 3 μm to 5 μm, wherein a horizontal width of the second inclined portion is 1 μm to 3 μm.

[0023] According to some embodiments, the second inclination is smaller than the first inclination.

[0024] According to some embodiments, the first inclination is in the range of 20° to 30°, wherein the second inclination is in the range of 5° to 15°.

[0025] According to some embodiments, the first groove has a single-stage inclined structure, wherein the second groove has a multi-stage inclined structure.

[0026] According to some embodiments, the second inclination is greater than the first inclination.

[0027] According to some embodiments, the first inclination is in the range of 10° to 30°, wherein the second inclination is in the range of 30° to 60°.

[0028] According to some embodiments, the second light emitting layer overlaps a bottom portion of the second pixel electrode, the first inclined portion, and the second inclined portion.

[0029] According to some embodiments, the display device further includes a thin film encapsulation layer on the first light-emitting element and the second light-emitting element, a color filter layer on the thin film encapsulation layer, an outer coating layer and a touch electrode layer between the thin film encapsulation layer and the color filter layer, wherein the thin film encapsulation layer includes a first inorganic film layer, a second inorganic film layer, and an organic film layer between the first inorganic film layer and the second inorganic film layer.

[0030] According to some embodiments, the color filter layer includes a first color filter overlapping the first light-emitting area and a second color filter overlapping the second light-emitting area, wherein the first color filter is a blue filter that transmits blue light or a red filter that transmits red light, and the second color filter is a green filter that transmits green light.

[0031] In the display device according to some embodiments, white angle dependence (WAD) may be relatively improved, and front light efficiency may be relatively increased.

[0032] However, the characteristics of the embodiment according to the present disclosure are not limited to the above-mentioned characteristics, and various other characteristics are included in the specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other aspects and features according to embodiments of the present disclosure will become more apparent by describing aspects of some embodiments of the present disclosure in more detail with reference to the accompanying drawings, in which: Figure 1 is a schematic perspective view of an electronic device according to some embodiments; Figure 2 is a perspective view showing a folded state of a foldable display device according to some embodiments; Figure 3 It shows Figure 2 A perspective view of a foldable display device in an unfolded state; Figure 4 is a perspective view illustrating a display device included in an electronic device according to some embodiments; Figure 5 It is shown along Figure 4 An example cross-sectional view of a display panel cut along line X1-X1'; Figures 6 to 10 is a plan view illustrating a pixel according to some embodiments; Figure 11 is a cross-sectional view illustrating a display device according to some embodiments; Figure 12 (a), (b) and (c) are shown in FIG. Figure 11 A graph showing correlations among the horizontal width of the inclined portion, viewing angle, brightness ratio deviation, and front contrast brightness in a display device according to some embodiments shown in FIG. Figure 13 (a), (b) and (c) are shown in FIG. Figure 11 A graph showing correlations among the inclination of an inclined portion, viewing angle, brightness ratio deviation, and front contrast brightness in a display device according to some embodiments shown in FIG. Figure 14 is a cross-sectional view illustrating a display device according to some embodiments; Figure 15It shows Figure 14 An enlarged view of the multi-level tilted structure of the pixel electrode; Figure 16 is a cross-sectional view illustrating a display device according to some embodiments; Figure 17 It shows Figure 16 An enlarged view of the multi-level tilted structure of the pixel electrode; Figure 18 is shown as reference Figure 16 and Figure 17 A graph illustrating a brightness ratio deviation of a display device using a multi-level tilt structure according to some embodiments; Figure 19 Reference Figure 16 and Figure 17 A graph showing front contrast brightness of the display device using the multi-level tilt structure; Figure 20 is a cross-sectional view illustrating a display device including light emitting regions emitting light of different wavelengths according to some embodiments; and Figure 21 is a cross-sectional view illustrating a display device including light emitting regions emitting light of different wavelengths according to some embodiments. DETAILED DESCRIPTION

[0034] Aspects of some embodiments will now be described more fully below with reference to the accompanying drawings. However, the embodiments may be provided in different forms and should not be construed as limiting. Throughout this disclosure, the same reference numerals and / or figure characters indicate the same components. In the accompanying drawings, the thickness of layers and regions may be exaggerated for clarity.

[0035] For the purpose of describing the disclosed embodiments, some parts that are not relevant to the description may not be provided.

[0036] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present.

[0037] Furthermore, the phrase "in a plan view" means when viewing a portion of an object from above, while the phrase "in a schematic cross-sectional view" means when viewing a schematic cross-section obtained by vertically cutting a portion of an object from the side. The term "overlying" or variations thereof means that a first object can be above, below, or to the side of a second object, or vice versa. Additionally, the term "overlying" may include layered, stacked, facing or opposite, extending over, covering or partially covering, or any other suitable term as would be understood and appreciated by a person of ordinary skill in the art. The expression "not overlapping" may include meanings such as "away from," "disposed to one side relative to," or "offset relative to," as well as any other suitable equivalents as would be understood and appreciated by a person of ordinary skill in the art. The terms "facing" and "opposite" may mean that a first object can be directly or indirectly opposite to a second object. In the event that a third object intervenes between the first and second objects, the first and second objects, while still facing each other, may be understood to be indirectly opposite to each other.

[0038] For ease of description, spatially relative terms such as "below," "beneath," "lower," "above," or "above" may be used herein to describe the relationship between one element or component and another element or component as shown in the accompanying drawings. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the accompanying drawings. For example, where the device shown in the accompanying drawings is flipped, a device positioned "below" or "beneath" another device may be placed "above" the other device. Thus, the exemplary term "below" may include both a lower position and a higher position. The device may also be oriented in other directions, so the spatially relative terms may be interpreted differently depending on the orientation.

[0039] When an element is referred to as being “connected” or “coupled” to another element, the element may be “directly connected” or “directly coupled” to the other element, or “electrically connected” or “electrically coupled” to the other element with one or more intervening elements interposed therebetween. It will also be understood that when the terms “comprises,” “having,” “includes,” and / or variations thereof are used, they may indicate the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of other features, integers, steps, operations, elements, components, and / or any combination thereof.

[0040] It will be understood that although the terms "first," "second," or "third," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element or to facilitate description and explanation thereof. For example, when discussing a "first element" in the description, it could be named a "second element" or a "third element" without departing from the teachings herein, and the "second element" and "third element" could be named in a similar manner.

[0041] As used herein, the term "about" or "approximately" is inclusive of the stated value and means within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art, taking into account the measurements in question and errors associated with the measurement of the particular quantity (e.g., limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0042] In the specification and claims, the term "and / or" is intended to include any combination of the terms "and" and "or" for purposes of its meaning and interpretation. For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunction or disjunction sense and may be understood to be equivalent to "and / or". For the purposes of this disclosure, the phrase "at least one of A and B" may be interpreted as only A, only B, or any combination of A and B. In addition, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z.

[0043] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an ideal or overly formal sense unless expressly defined in the specification.

[0044] Figure 1 is a schematic perspective view of an electronic device according to some embodiments.

[0045] Reference Figure 1, electronic device 1 displays a moving image (e.g., a video image) or a still image (e.g., a static image). Electronic device 1 may refer to any electronic device that includes a display screen. For example, electronic device 1 may include a television that provides a display screen, a laptop computer, a monitor, a billboard, an IoT device, a mobile phone, a smartphone, a tablet personal computer (PC), an electronic watch, a smartwatch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, a gaming device, a digital camera, a video camera, and the like.

[0046] The electronic device 1 may include a display device ( Figure 4 10). Examples of display devices include inorganic light-emitting diode display devices, organic light-emitting display devices, quantum dot light-emitting display devices, plasma display devices, and field emission display devices. Hereinafter, an organic light-emitting diode display device is used as an example of a display device, but is not limited thereto, and the same technical concept can be applied to other display devices as long as it is applicable.

[0047] The shape of the electronic device 1 can be modified in various ways. For example, in a plan view (e.g., a view toward the display surface of the electronic device 1), the electronic device 1 can have a shape such as a horizontally long rectangle, a vertically long rectangle, a square, a square with rounded corners (vertices), other polygons, a circle, or an ellipse. The shape of the display area DA of the electronic device 1 can also be the same as or similar to the overall shape of the electronic device 1. Figure 1 , the electronic device 1 having an elongated rectangular shape in the second direction Y is shown.

[0048] The electronic device 1 may include a display area DA and a non-display area NDA. The display area DA is an area where images can be displayed, and the non-display area NDA is an area where images are not displayed. The display area DA may be referred to as an active area, and the non-display area NDA may be referred to as an inactive area. The display area DA may generally occupy the center of the electronic device 1, and the non-display area NDA may surround the display area DA (e.g., at the periphery of the display area DA or outside the coverage area of ​​the display area DA).

[0049] Figure 2 is a perspective view illustrating a folded state of a foldable display device according to some embodiments. Figure 3 It shows Figure 2 A perspective view of a foldable display device in an unfolded state.

[0050] Reference Figure 2 and Figure 3According to some embodiments, the electronic device 1 may be a foldable display device. The foldable electronic device 1 may be foldable about a folding axis FL. The display area DA may be located outside and / or inside the foldable electronic device 1. According to some embodiments, Figure 2 and Figure 3 The foldable electronic device 1 shows that the display area DA is located on the outer side and the inner side respectively.

[0051] The display area DA may be located outside the electronic device 1. An outer surface of the folded electronic device 1 may include the display area DA, and an inner surface of the unfolded electronic device 1 may include the display area DA.

[0052] Figure 4 is a perspective view illustrating a display device included in an electronic device according to some embodiments.

[0053] Reference Figures 1 to 4 According to some embodiments, the electronic device 1 may include a display device 10. The display device 10 may include a screen for displaying an image on the electronic device 1. The display device 10 may have a planar shape similar to that of the electronic device 1. For example, the display device 10 may have a shape similar to a rectangle having a short side in the first direction X and a long side in the second direction Y. The corner at which the short side in the first direction X and the long side in the second direction Y intersect may be rounded (or called, chamfered) to have a curvature, but is not limited thereto, and may also be formed as a right angle. The planar shape of the display device 10 is not limited to a square, and may be similar to other polygons, a circle, or an ellipse.

[0054] The display device 10 may include a display panel 100 , a display driver 200 , a circuit board 300 , and a touch driver 400 .

[0055] The display panel 100 may include a main area MA and a sub-area SBA.

[0056] The main area MA may include a display area DA containing pixels that display an image, and a non-display area NDA arranged around the display area DA (e.g., arranged at the periphery of the display area DA or outside the cover area of ​​the display area DA). The display area DA may emit light from multiple light-emitting areas or multiple opening areas, as will be described in more detail later. For example, the display panel 100 may include a pixel circuit including a switching element, a pixel-defining layer that defines the light-emitting area or opening area, and a self-luminous element.

[0057] For example, the self-luminous element may include at least one of an organic light-emitting diode (OLED) including an organic light-emitting layer, a quantum dot light-emitting diode (QD LED) including a quantum dot light-emitting layer, an inorganic light-emitting diode (INORGANIC LED) including an inorganic semiconductor, and a micro light-emitting diode (MICRO LED), but the embodiments of the present disclosure are not limited thereto. In the following figures, the self-luminous element is shown as an OLED.

[0058] The non-display area NDA may be an area outside the display area DA. The non-display area NDA may be defined as an edge area of ​​the main area MA of the display panel 100. The non-display area NDA may include a gate driver that supplies gate signals to gate lines and a fan-out line that connects the display driver 200 to the display area DA.

[0059] The sub-area SBA may be an area extending from one side of the main area MA. The sub-area SBA may include a flexible material capable of bending, folding, curling, and the like. For example, when the sub-area SBA is bent, the sub-area SBA may overlap the main area MA in the thickness direction (third direction Z). The sub-area SBA may include a pad portion (also referred to as a soldering pad portion or solder pad portion) connected to the display driver 200 and the circuit board 300. In some embodiments, the sub-area SBA may be omitted, and the display driver 200 and the pad portion may be located in the non-display area NDA.

[0060] The display driver 200 can output signals and voltages for driving the display panel 100. The display driver 200 can supply data voltages to the data lines. The display driver 200 can also supply power voltages to the power lines and gate control signals to the gate driver. The display driver 200 can be formed as an integrated circuit (IC) and can be mounted on the display panel 100 using a chip-on-glass (COG) method, a chip-on-plastic (COP) method, or an ultrasonic bonding method. For example, the display driver 200 can be located in the sub-area SBA and can overlap with the main area MA in the thickness direction by bending the sub-area SBA. In another example, the display driver 200 can be mounted on the circuit board 300.

[0061] The circuit board 300 may be attached to the pad portion of the display panel 100 using an anisotropic conductive film (ACF). Leads of the circuit board 300 may be electrically connected to the pad portion of the display panel 100. The circuit board 300 may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip on film.

[0062] The touch driver 400 may be mounted on the circuit board 300. The touch driver 400 may be connected to the touch sensing portion of the display panel 100. The touch driver 400 may supply touch drive signals to the touch electrodes of the touch sensing portion and sense changes in capacitance between the touch electrodes. For example, the touch drive signal may be a pulse signal having a frequency (e.g., a set or predetermined frequency). The touch driver 400 may calculate input status and input coordinates based on the capacitance changes between the touch electrodes. The touch driver 400 may be implemented as an integrated circuit (IC).

[0063] Figure 5 It is shown along Figure 4 FIG. 1 is a cross-sectional view of an example of a display panel cut along line X1 - X1 ′.

[0064] Reference Figure 5 The display device 10 may include a substrate SUB and a thin film transistor layer TFTL, a light emitting element layer EML, a thin film encapsulation layer TFEL, a touch electrode layer TSL, a color filter layer CFL, and a cover window WM located on the substrate SUB.

[0065] The substrate SUB may be made of an insulating material such as a polymer resin. For example, the substrate SUB may be made of polyimide. The substrate SUB may be a flexible substrate that can be bent, folded, and / or rolled.

[0066] The thin film transistor layer TFTL may be located on the substrate SUB. The thin film transistor layer TFTL may be located in the main area MA and may include a thin film transistor.

[0067] In the thin film transistor layer TFTL, not only the thin film transistor TFT of each pixel can be formed, but also the scanning line and the data line can be formed. Figure 11 As shown in , each of the thin film transistors TFT may include a gate electrode GE, a semiconductor layer ACT, a source electrode SE, and a drain electrode DE.

[0068] The light emitting element layer EML may be located on the thin film transistor layer TFTL. The light emitting element layer EML may include Figure 11 The first light emitting element ED1 including the first pixel electrode AE1, the first light emitting layer EL1 and the common electrode CE and the first light emitting area PA1 (corresponding to Figure 6 The first pixel defining layer PDL1 of the sub-emission area SEA1, SEA2 or SEA3 described in the following is provided. The first emission layer EL1 may be an organic emission layer containing an organic material. In this case, the first emission layer EL1 may include a hole transport layer, an organic emission layer and an electron transport layer.

[0069] When a voltage (e.g., a set or predetermined voltage) is applied to the first pixel electrode AE1 through the thin film transistor TFT of the thin film transistor layer TFTL and a cathode voltage is applied to the common electrode CE, holes and electrons move to the organic light emitting layer through the hole transport layer and the electron transport layer, respectively, and recombine with each other in the organic light emitting layer to emit light.

[0070] The thin film encapsulation layer TFEL may be located on the light emitting element layer EML. The thin film encapsulation layer TFEL may be arranged to cover the thin film transistor layer TFTL and the light emitting element layer EML.

[0071] The thin film encapsulation layer (TFEL) may include at least one inorganic layer to prevent or reduce the penetration of contaminants such as oxygen or moisture into the light-emitting element layer (EML). The inorganic layer may be a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, but the embodiments of the present disclosure are not limited thereto. In addition, the thin film encapsulation layer (TFEL) may include at least one organic film to protect the light-emitting element layer (EML) from foreign matter such as dust. The organic film may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, but the embodiments of the present disclosure are not limited thereto.

[0072] The touch electrode layer TSL may be located on the thin film encapsulation layer TFEL. By directly disposing the touch electrode layer TSL on the thin film encapsulation layer TFEL, the thickness of the display device 10 may be reduced compared to a case where a separate touch panel including the touch electrode layer TSL is attached to the thin film encapsulation layer TFEL.

[0073] The touch electrode layer TSL may include touch electrodes for detecting a user's touch in a capacitive manner. For example, the touch electrode layer TSL may detect a user's touch using the touch electrodes in at least one of a self-capacitance method and a mutual-capacitance method.

[0074] The color filter layer CFL may be located on the touch electrode layer TSL.

[0075] According to some embodiments, the color filter layer CFL may include a light-blocking pattern overlapping the color filter.

[0076] The cover window WM may be positioned on the color filter layer CFL. In this case, the color filter layer CFL and the cover window WM may be attached by an adhesive member such as an optically clear adhesive film (OCA) or an optically clear resin (OCR).

[0077] Figures 6 to 10 is a plan view showing pixels according to various embodiments. For example, Figures 6 to 10 Shows information about what can be set or arranged in Figures 1 to 5 Different embodiments of the configuration, shape and / or arrangement structure of the pixels PX in the display area DA.

[0078] Reference Figures 6 to 10 , the pixel PX may include at least two sub-pixels SPX, each of the at least two sub-pixels SPX including a sub-emission area SEA. The pixel PX may include a light emitting area EA including the sub-emission area SEA of the sub-pixel SPX. For example, the light emitting area EA of each pixel PX may be formed by the sub-emission area SEA of the sub-pixel SPX disposed within the pixel PX.

[0079] Each sub-pixel SPX may include at least one light-emitting element (e.g., an organic light-emitting diode) disposed in each sub-emission area SEA. According to some embodiments, each sub-pixel SPX may also include pixel circuitry connected to each light-emitting element. According to some embodiments, the term "connected" may include physical and / or electrical connections.

[0080] According to some embodiments, the pixel PX includes a first color sub-pixel SPX1 (also referred to as a "first sub-pixel") that emits light of a first color (e.g., red light), a second color sub-pixel SPX2 (also referred to as a "second sub-pixel") that emits light of a second color (e.g., green light), and a third color sub-pixel SPX3 (also referred to as a "third sub-pixel") that emits light of a third color (e.g., blue light).

[0081] The first color sub-pixel SPX1 may include a first color sub-emission region SEA1 (e.g., a light-emitting region of the first color sub-pixel SPX1) provided with a light-emitting element (e.g., an organic light-emitting diode) that emits light of the first color. According to some embodiments, the first color sub-pixel SPX1 may include a light-emitting element that emits light of the first color (e.g., an organic light-emitting diode that emits red light), or may include a light-emitting element that emits light of a specific color and a wavelength conversion element that converts the specific color light into light of the first color. Therefore, light of the first color may be emitted from the first color sub-emission region SEA1.

[0082] The second color sub-pixel SPX2 may include a second color sub-emission region SEA2 (e.g., the light-emitting region of the second color sub-pixel SPX2) provided with a light-emitting element (e.g., an organic light-emitting diode) that emits light of the second color. According to some embodiments, the second color sub-pixel SPX2 may include a light-emitting element that emits light of the second color (e.g., an organic light-emitting diode that emits green light), or may include a light-emitting element that emits light of a specific color and a wavelength conversion element that converts the specific color light into light of the second color. Therefore, light of the second color may be emitted from the second color sub-emission region SEA2.

[0083] The third color sub-pixel SPX3 may include a third color sub-emission region SEA3 (e.g., a light-emitting region of the third color sub-pixel SPX3) provided with a light-emitting element (e.g., an organic light-emitting diode) and emitting light of the third color. According to some embodiments, the third color sub-pixel SPX3 may include a light-emitting element that emits light of the third color (e.g., an organic light-emitting diode that emits blue light), or may include a light-emitting element that emits light of a specific color and a wavelength conversion element that converts the specific color light into light of the third color. Therefore, light of the third color may be emitted from the third color sub-emission region SEA3.

[0084] Figures 6 to 10 While an embodiment is shown in which a single pixel PX is provided with a first subpixel SPX1, a second subpixel SPX2, a third subpixel SPX3, and / or a fourth subpixel SPX4, embodiments of the present disclosure are not limited thereto. For example, two or more subpixels SPX emitting light of the same color may be provided within a single pixel PX. In different embodiments, the type and / or number of subpixels SPX included in each pixel PX may vary.

[0085] Each sub-pixel SPX may include a sub-emission area SEA having a rectangular shape, a non-rectangular polygonal shape, a circular shape, an elliptical shape, or other shapes. For example, the shape, size, ratio, and / or arrangement structure of the sub-emission area SEA provided for each pixel PX may be varied to achieve target values ​​of various characteristics such as aperture, transmittance, luminous efficiency, white balance, and / or visibility of each sub-pixel SPX and the pixel PX including it.

[0086] According to some embodiments, the pixels PX may each include: Figure 6 and Figure 7 The sub-emission areas SEA shown in FIG have a rectangular shape (such as a square) and are arranged in a triangular shape. According to some embodiments, as shown in FIG Figure 6 As shown in , the sub-emission areas SEA provided in each pixel PX may have substantially the same or similar sizes to each other. According to some embodiments, at least two sub-emission areas SEA provided in each pixel PX may have different sizes. For example, Figure 7 As shown in FIG, the sub-emission area SEA disposed in each pixel PX may have different sizes.

[0087] According to some embodiments, the pixel PX may include sub-emission areas SEA arranged in a stripe shape along one direction. Figure 8As shown in FIG, the pixel PX has sub-emission areas SEA each having a rectangular shape extending in the second direction Y and sequentially arranged along the first direction X. According to some embodiments, the first color sub-emission area SEA1, the second color sub-emission area SEA2, and the third color sub-emission area SEA3 may be sequentially arranged along the first direction X, but the arrangement order of the sub-emission areas SEA may vary. The sub-emission areas SEA may have the same area as each other, or may have different areas.

[0088] According to some embodiments, the pixel PX may include a sub-emission area SEA having a non-rectangular shape. Figure 9 As shown in FIG, the pixel PX may have a non-rectangular polygonal shape (e.g., a hexagonal shape) and may include sub-emission areas SEA arranged in a triangular shape. The sub-emission areas SEA may have the same area as each other, or may have different areas. The arrangement order of the sub-emission areas SEA may vary in different embodiments.

[0089] According to some embodiments, Figure 10 As shown in FIG, pixel PX may further include a fourth color sub-pixel SPX4 (also referred to as a "fourth sub-pixel") that emits light of a fourth color (e.g., white light). The fourth color sub-pixel SPX4 may include a fourth color sub-emission area SEA4 (e.g., the light-emitting area of ​​the fourth color sub-pixel SPX4) that is provided with a light-emitting element (e.g., an organic light-emitting diode) and emits light of the fourth color. According to some embodiments, the fourth color sub-pixel SPX4 may include a light-emitting element that emits light of the fourth color (e.g., an organic light-emitting diode that emits white light), or may include a light-emitting element that emits light of a specific color and a wavelength conversion element that converts the specific color light into light of the fourth color. Thus, light of the fourth color may be emitted from the fourth color sub-emission area SEA4. According to some embodiments, pixel PX may include sub-emission areas SEA, each having a rectangular shape extending in the second direction Y and arranged sequentially along the first direction X. According to some embodiments, the second color sub-emission area SEA2, the first color sub-emission area SEA1, the fourth color sub-emission area SEA4, and the third color sub-emission area SEA3 may be arranged sequentially along the first direction X, but the order of arrangement of the sub-emission areas SEA may vary. The sub-emission areas SEA may have the same area or different areas.

[0090] Apart from Figures 6 to 10 In addition to the embodiments, the display device 10 may further include pixels PX having various configurations, structures, and / or shapes.

[0091] Figure 11 is a cross-sectional view illustrating aspects of a display device according to some embodiments.

[0092] Since the substrate SUB is mentioned above, a detailed description will be omitted.

[0093] The thin film transistor layer TFTL may include a first buffer layer BF1, a bottom metal layer BML, a second buffer layer BF2, a thin film transistor TFT, a gate insulating layer GI, a first interlayer insulating layer ILD1, a capacitor electrode CPE, a second interlayer insulating layer ILD2, a first connection electrode CNE1, a first protection layer PVX1, a second connection electrode CNE2, a second protection layer PVX2, and a bank layer BNK.

[0094] The first buffer layer BF1 may be located on the substrate SUB. The first buffer layer BF1 may include an inorganic film that may prevent or reduce the penetration of pollutants such as air or moisture. For example, the first buffer layer BF1 may include a plurality of inorganic films alternately stacked.

[0095] The bottom metal layer (BML) may be located on the first buffer layer (BF1). For example, the bottom metal layer (BML) may be formed as a single layer or multiple layers of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof.

[0096] The second buffer layer BF2 may cover the first buffer layer BF1 and the bottom metal layer BML. The second buffer layer BF2 may include an inorganic film that may prevent or reduce the penetration of pollutants such as air or moisture. For example, the second buffer layer BF2 may include a plurality of inorganic films alternately stacked.

[0097] The thin film transistor TFT may be located on the second buffer layer BF2 and may form a pixel circuit for each of the plurality of pixels PX. For example, the thin film transistor TFT may be a driving transistor or a switching transistor of the pixel circuit. The thin film transistor TFT may include a semiconductor layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0098] The semiconductor layer ACT may be located on the second buffer layer BF2. The semiconductor layer ACT may overlap the bottom metal layer BML and the gate electrode GE in the thickness direction and may be insulated from the gate electrode GE by the gate insulating layer GI. A portion of the semiconductor layer ACT may include a conductive semiconductor material to form the source electrode SE and the drain electrode DE.

[0099] The gate electrode GE may be positioned on the gate insulating layer GI. The gate electrode GE may overlap the semiconductor layer ACT with the gate insulating layer GI interposed therebetween.

[0100] The gate insulating layer GI may be located on the semiconductor layer ACT. For example, the gate insulating layer GI may cover the semiconductor layer ACT and the second buffer layer BF2 and may insulate the semiconductor layer ACT from the gate electrode GE. The gate insulating layer GI may include a contact hole through which the first connection electrode CNE1 penetrates.

[0101] The first interlayer insulating layer ILD1 may cover the gate electrode GE and the gate insulating layer GI. The first interlayer insulating layer ILD1 may include a contact hole through which the first connection electrode CNE1 penetrates. The contact hole of the first interlayer insulating layer ILD1 may be connected to the contact hole of the gate insulating layer GI and the contact hole of the second interlayer insulating layer ILD2.

[0102] The capacitor electrode CPE may be located on the first interlayer insulating layer ILD1 , overlap the gate electrode GE in the thickness direction, and form an electrostatic capacitor with the gate electrode GE.

[0103] The second interlayer insulating layer ILD2 may cover the capacitor electrode CPE and the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may include a contact hole through which the first connection electrode CNE1 penetrates. The contact hole of the second interlayer insulating layer ILD2 may be connected to the contact hole of the first interlayer insulating layer ILD1 and the contact hole of the gate insulating layer GI.

[0104] The first connection electrode CNE1 may be located on the second interlayer insulating layer ILD2. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT to the second connection electrode CNE2. The first connection electrode CNE1 may be inserted into a contact hole formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI to contact the drain electrode DE of the thin film transistor TFT.

[0105] The first protective layer PVX1 may cover the first connection electrode CNE1 and the second interlayer insulating layer ILD2 , protect the thin film transistor TFT, and include a contact hole through which the second connection electrode CNE2 penetrates.

[0106] The second connection electrode CNE2 may be located on the first protection layer PVX1. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 to the first pixel electrode AE1 of the first light emitting element ED1. The second connection electrode CNE2 may be inserted into a contact hole formed in the first protection layer PVX1 to contact the first connection electrode CNE1.

[0107] The second protective layer PVX2 may cover the second connection electrode CNE2 and the first protective layer PVX1. The second protective layer PVX2 may include a contact hole through which the first pixel electrode AE1 of the first light emitting element ED1 penetrates.

[0108] The bank layer BNK may be located on the second protective layer PVX2. The bank layer BNK may include a plurality of openings. The plurality of openings may penetrate the bank layer BNK to expose the second protective layer PVX2, but is not limited thereto.

[0109] The bank layer BNK has an inclined surface SSL1 defining a downwardly concave groove BNK-R. Furthermore, the inclined surface SSL1 of the bank layer BNK may have a gentle slope relative to the top surface of the bank layer BNK. An inclined angle θ is formed between the inclined surface SSL1 of the bank layer BNK and an extension line of the lower surface of the groove BNK-R. The inclined angle θ may be an acute angle. The inclined angle θ may be in a range of 20 to 70 degrees (or approximately 20 to approximately 70 degrees), but embodiments of the present disclosure are not limited thereto. The groove BNK-R may have an upper width that is wider than its lower width (e.g., significantly wider). Thus, the bank layer BNK may have an inclined structure defined by the groove BNK-R.

[0110] According to some embodiments, the bank layer BNK is shown as a single insulating layer, but the bank layer BNK may be composed of multiple insulating layers. For example, the bank layer BNK may include a first bank layer and a second bank layer. The second bank layer may be located on the first bank layer, and the second bank layer may have a groove exposing the first bank layer.

[0111] The bank layer BNK may be formed of an organic material such as acrylic resin, epoxy resin, phenol resin, polyamide resin, or polyimide resin.

[0112] The light emitting element layer EML may be located on the thin film transistor layer TFTL. The light emitting element layer EML may include a first light emitting element ED1 and a first pixel defining layer PDL1. The first light emitting element ED1 may include a first pixel electrode AE1, a first light emitting layer EL1, and a common electrode CE.

[0113] The first pixel electrode AE1 may be arranged to overlap one of the grooves BNK-R defined by the bank layer BNK. The first pixel electrode AE1 is arranged along the inclined surface of the bank layer BNK. Therefore, the first pixel electrode AE1 may have an inclined structure (also known as a single-stage inclined structure). The first pixel electrode AE1 may include an inclined portion (also known as a single-stage inclined portion) AE1-S located on the inclined surface SSL1 of the groove BNK-R of the bank layer BNK, a bottom portion AE1-B connected to the bottom of the inclined portion AE1-S, and a top portion AE1-T connected to the top of the inclined portion AE1-S and located on top of the bank layer BNK. The inclination angle of the inclined portion AE1-S of the first pixel electrode AE1 may be the same as the inclination angle of the inclined surface SSL1 of the bank layer BNK. For example, the inclination angle of the inclined portion AE1-S may be between 20 and 70 degrees. As the inclination angle increases, the viewing angle narrows, while as the inclination angle decreases, the brightness may relatively increase. The first pixel electrode AE1 may have a concave shape. Slanted portion AE1-S surrounds bottom portion AE1-B, and slanted portion AE1-S and bottom portion AE1-B do not vertically overlap. Bottom portion AE1-B and top portion AE1-T may be flat, but may be formed to have a curvature during processing. Even if bottom portion AE1-B and top portion AE1-T have a curvature during processing, they may be formed to be relatively flat compared to slanted portion AE1-S.

[0114] The first pixel electrode AE1 may be electrically connected to the drain electrode DE of the thin film transistor TFT through the first and second connection electrodes CNE1 and CNE2 .

[0115] The first pixel defining layer PDL1 may define a light emitting portion, and the areas or sizes thereof may be different. The first pixel defining layer PDL1 may overlap the first light blocking area BA1 and may be located on the bank layer BNK and a portion of the first pixel electrode AE1. At least a portion of the top portion AE1-T of the first pixel electrode AE1 may be covered by the first pixel defining layer PDL1.

[0116] The first pixel defining layer PDL1 may separate and insulate the first pixel electrode AE1 of each of the plurality of first light-emitting elements ED1. The first pixel defining layer PDL1 may include a light-absorbing material to prevent or reduce light reflection. According to some embodiments, the first pixel defining layer PDL1 may include carbon black. The first pixel defining layer PDL1 including carbon black may include a black color and may absorb light reflected by the electrode.

[0117] The first light-emitting layer EL1 may be located on a portion of the first pixel electrode AE1 and a portion of the first pixel defining layer PDL1. For example, the first light-emitting layer EL1 may be located on one surface of the first pixel electrode AE1 exposed by the first opening OA1 formed by the first pixel defining layer PDL1, and on a portion of the first pixel defining layer PDL1. The first light-emitting layer EL1 is formed on and along the first pixel electrode AE1, and may therefore have an inclined structure.

[0118] The first light-emitting layer EL1 may be an organic light-emitting layer made of an organic material. When the first light-emitting layer EL1 corresponds to an organic light-emitting layer, the first light-emitting layer EL1 may emit light when the thin film transistor TFT applies a voltage (e.g., a set or predetermined voltage) to the first pixel electrode AE1 of the first light-emitting element ED1 and the common electrode CE of the first light-emitting element ED1 receives a common voltage or a cathode voltage.

[0119] The common electrode CE may be located on the first light-emitting layer EL1 in the first light-emitting area PA1, and may be located on the first pixel-defining layer PDL1 in the first light-blocking area BA1. For example, the common electrode CE may be located on the portion of the first pixel-defining layer PDL1 where the first light-emitting layer EL1 is not located, and on the first light-emitting layer EL1. Furthermore, the common electrode CE may be formed on the entire surface of the display area DA in the form of an electrode common to all pixels, rather than being divided for each pixel.

[0120] The common electrode CE may receive a common voltage or a low potential voltage. When the first pixel electrode AE1 receives a voltage corresponding to the data voltage and the common electrode CE receives a low potential voltage, the first light emitting layer EL1 may emit light when a potential difference is formed between the first pixel electrode AE1 and the common electrode CE.

[0121] The thin film encapsulation layer TFEL may be located on the common electrode CE to cover the plurality of first light-emitting elements ED1. According to some embodiments, the thin film encapsulation layer TFEL may include at least one inorganic film and at least one organic film to prevent or reduce the penetration of foreign matter or contaminants (such as oxygen, moisture, or dust) into the light-emitting element layer EML.

[0122] According to some embodiments, the thin film encapsulation layer TFEL may include a first thin film encapsulation layer TFE1, a second thin film encapsulation layer TFE2, and a third thin film encapsulation layer TFE3 sequentially stacked in a third direction Z. The first thin film encapsulation layer TFE1 and the third thin film encapsulation layer TFE3 may be inorganic layers (or inorganic film layers), and the second thin film encapsulation layer TFE2 located therebetween may be an organic layer (or organic film layer).

[0123] The first thin film encapsulation layer TFE1 and the third thin film encapsulation layer TFE3 may each include one or more inorganic insulating materials. In one example, the inorganic insulating material may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0124] The second thin film encapsulation layer TFE2 may include a polymer material. Polymer materials may include acrylic resin, epoxy resin, polyimide, polyethylene, etc. For example, the second thin film encapsulation layer TFE2 may include an acrylic resin such as polymethyl methacrylate or polyacrylic acid. The second thin film encapsulation layer TFE2 may be formed by curing a monomer or applying a polymer.

[0125] The first overcoat layer OC1 may be located on the third thin film encapsulation layer TFE3. The first overcoat layer OC1 may have a relatively lower dielectric constant than the second thin film encapsulation layer TFE2, thereby increasing the sensitivity of the touch electrode layer TSL, which will be described in more detail below. For example, the dielectric constant of the first overcoat layer OC1 may be 2 F / m, but is not limited thereto.

[0126] The touch electrode layer TSL may be located on the first overcoat layer OC1. The touch electrode layer TSL may include a touch insulating layer TIL and touch electrodes TE.

[0127] The touch electrodes TE may include drive electrodes and sense electrodes. The drive electrodes and sense electrodes may each be formed as a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), and indium tin oxide (ITO), or may be formed as a laminated structure of aluminum and titanium (Ti / Al / Ti), a laminated structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, and a laminated structure of an APC alloy and ITO (ITO / APC / ITO). The touch insulating layer TIL may include an inorganic film and / or an organic film and may cover the touch electrodes TE.

[0128] The touch insulation layer TIL may have insulating and optical functions and may include, for example, an inorganic film including at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer. According to some embodiments, the touch electrode layer TSL may be omitted.

[0129] The color filter layer CFL may be located on the touch insulating layer TIL, and the color filter layer CFL may include a first color filter CF1, a second color filter CF2 (see Figure 20 ) and the light blocking pattern BM. According to some embodiments in which the touch electrode layer TSL is omitted, the color filter layer CFL may be located on the first overcoat layer OC1.

[0130] The light-blocking pattern BM may be located on the touch insulation layer TIL, overlapping the first light-blocking area BA1. The light-blocking pattern BM may include a light-absorbing material. For example, the light-blocking pattern BM may include an inorganic black pigment or an organic black pigment. The inorganic black pigment may be carbon black, and the organic black pigment may include, but is not limited to, at least one of lactam black, perylene black, and aniline black. The light-blocking pattern BM can relatively improve the color gamut of the display device 10 by preventing or reducing visible light from entering between the first, second, third, and fourth light-emitting portions and mixing between them.

[0131] According to some embodiments, the first pixel defining layer PDL1 and the light blocking pattern BM may partially block light emitted from the light emitting element layer EML. Therefore, only light having an optical path that does not overlap with the first pixel defining layer PDL1 and the light blocking pattern BM may be emitted to the outside of the display device 10.

[0132] According to some embodiments, the first color filters CF1 of the color filter layer CFL may be positioned on the light blocking pattern BM and the touch insulating layer TIL. The first color filters CF1 may be arranged to correspond to different light emitting areas, respectively.

[0133] According to some embodiments, the first color filter CF1 can selectively transmit light of a specific color and block or absorb light of a specific color. For example, if the first color filter CF1 is a red filter, it can transmit red light and block blue and green light, but is not limited thereto.

[0134] The second overcoat layer OC2 may be located on the color filter layer CFL. The second overcoat layer OC2 may be a colorless transmissive layer having no color in the visible light band. For example, the second overcoat layer OC2 may include a colorless light-transmitting organic material such as an acrylic resin.

[0135] Figure 12 (a), (b) and (c) are shown in FIG. Figure 11 Graph showing correlations among the horizontal width of the inclined portion, viewing angle, luminance ratio deviation dL / d, and front contrast luminance in a display device according to some embodiments. Figure 12 (a) is a graph showing the correlation between the horizontal width of the inclined portion and the viewing angle, Figure 12 (b) is a graph showing the correlation between the horizontal width of the inclined portion and the brightness ratio deviation, Figure 12 (c) is a graph showing the correlation between the horizontal width of the inclined portion and the front contrast brightness. Figure 12In (a), (b), and (c), Reference Ref. represents the luminance ratio deviation dL / d and the front contrast luminance when the inclined portion AE1 -S is inclined by 20° and the horizontal width of the inclined portion AE1 -S is 1 μm.

[0136] Figure 12 The graphs (a), (b) and (c) show that Figure 11 , luminance ratio deviation dL / d and front contrast luminance as a function of the horizontal width of the inclined portion AE1 -S in a display device having a fixed inclination (also referred to as an inclination angle) θ of the inclined portion AE1 -S according to some embodiments are shown in FIG.

[0137] According to some embodiments, the inclination angle θ of the inclined portion AE1-S is set to 20°, and the luminance ratio deviation (dL / d) and front contrast brightness are shown as the horizontal width of the inclined portion AE1-S increases to 2μm, 3μm, and 5μm. At a viewing angle of 40° to 50°, the luminance ratio deviation (dL / d) significantly decreases as the horizontal width of the inclined portion AE1-S increases to 2μm, 3μm, and 5μm. Furthermore, at a viewing angle of 40° to 50°, the front contrast brightness increases as the horizontal width of the inclined portion AE1-S increases to 2μm, 3μm, and 5μm.

[0138] Figure 13 (a), (b) and (c) are shown in FIG. Figure 11 Graph showing correlations among the inclination of the inclined portion, viewing angle, luminance ratio deviation dL / d, and front contrast luminance in a display device according to some embodiments. Figure 13 (a) is a graph showing the correlation between the inclination of the inclined portion and the viewing angle, Figure 13 (b) is a graph showing the correlation between the inclination of the inclined portion and the brightness ratio deviation, Figure 13 (c) is a graph showing the correlation between the inclination of the inclined portion and the front contrast luminance. Figure 13 In (a), (b), and (c), Ref. represents the luminance ratio deviation dL / d and the front contrast luminance when the inclination θ of the inclined portion AE1 -S is 0° and the horizontal width of the inclined portion AE1 -S is 3 μm.

[0139] Figure 13 The graphs (a), (b) and (c) show that Figure 11shows the luminance ratio deviation dL / d and front contrast brightness as a function of the inclination θ of the inclined portion AE1-S in a display device having a fixed horizontal width of the inclined portion AE1-S according to some embodiments. According to some embodiments, the horizontal width of the inclined portion AE1-S is 3 μm, and the luminance ratio deviation (dL / d) and front contrast brightness are compared when the inclination θ of the inclined portion AE1-S increases to 20°, 25°, and 30°. The front contrast brightness increases as the inclination θ of the inclined portion AE1-S increases to 20°, 25°, and 30°. For example, at a viewing angle LvA of 40° to 50°, the front contrast brightness increases significantly as the inclination θ of the inclined portion AE1-S increases to 20°, 25°, and 30°. On the other hand, at a viewing angle of 40° to 50°, the luminance ratio deviation dL / d does not change significantly as the inclination θ of the inclined portion AE1-S increases to 20°, 25°, and 30°.

[0140] Figure 14 is a cross-sectional view illustrating a display device according to some embodiments. Figure 15 It shows Figure 14 An enlarged view of the multi-level inclined structure of the pixel electrode.

[0141] Reference Figure 14 The display device shown is Figure 11 The display device of FIG. 1 is different in that the bank layer BNK and the first light emitting element ED1 have a multi-level inclined structure.

[0142] Reference Figure 14 and Figure 15 The bank layer BNK has a multi-level inclined structure. The multi-level inclined structure includes inclined surfaces SSL1 having different inclinations. For example, the inclined surface SSL1 includes a first inclined surface SSL1-1 having a first inclination θ1 and a second inclined surface SSL1-2 having a second inclination θ2. The second inclined surface SSL1-2 extends upward from the first inclined surface SSL1-1. The second inclination θ2 may be smaller than the first inclination θ1. For example, the first inclination θ1 may be approximately 20° to 30°, and the second inclination θ2 may be approximately 5° to 15°.

[0143] The first pixel electrode AE1 may be arranged to overlap one of the plurality of grooves BNK-R defined by the bank layer BNK. The first pixel electrode AE1 is arranged along the inclined surface SSL1 of the bank layer BNK. Therefore, the first pixel electrode AE1 may have a multi-step inclined structure. For example, the first pixel electrode AE1 may have a stepped structure in which a first inclined portion AE1-S1 having a first inclination θ1 and a second inclined portion AE1-S2 having a second inclination θ2 are formed. The second inclined portion AE1-S2 extends upward from the first inclined portion AE1-S1. The first pixel electrode AE1 may include a top portion AE1-T connected to the top of the second inclined portion AE1-S2 and located on the top of the bank layer BNK, and a bottom portion AE1-B connected to the bottom of the first inclined portion AE1-S1.

[0144] The first inclined portion AE1-S1 has a first inclination θ1, and the second inclined portion AE1-S2 extends from the first inclined portion AE1-S1 toward the top and has a second inclination θ2. The second inclination θ2 may be formed to be gentler than the first inclination θ1. The second inclination θ2 may be smaller than the first inclination θ1. For example, the first inclination θ1 may be approximately 20° to 30°, and the second inclination θ2 may be approximately 5° to 15°.

[0145] The horizontal width d1 of the first slanted portion AE1-S1 may be greater than the horizontal width d2 of the second slanted portion AE1-S2. For example, the horizontal width d1 of the first slanted portion AE1-S1 is about 3 μm to 5 μm, and the horizontal width d2 of the second slanted portion AE1-S2 is about 1 μm to 3 μm.

[0146] The first light-emitting layer EL1 may be located on a portion of the first pixel electrode AE1 and a portion of the first pixel defining layer PDL1. For example, the first light-emitting layer EL1 may be located on a surface of the first pixel electrode AE1 exposed by the first opening OA1 formed by the first pixel defining layer PDL1 and a portion of the first pixel defining layer PDL1. The first light-emitting layer EL1 is formed on and along the first pixel electrode AE1, and thus may have a multi-step inclined structure. The first light-emitting layer EL1 may overlap the bottom portion AE1-B, the first inclined portion AE1-S1, and the second inclined portion AE1-S2 of the first pixel electrode AE1. According to some embodiments, the first light-emitting layer EL1 may overlap the top portion AE1-T of the first pixel electrode AE1.

[0147] The first light-emitting layer EL1 may be an organic light-emitting layer made of an organic material. When the first light-emitting layer EL1 corresponds to an organic light-emitting layer, the first light-emitting layer EL1 may emit light when the thin film transistor TFT applies a voltage (e.g., a set or predetermined voltage) to the first pixel electrode AE1 of the first light-emitting element ED1 and the common electrode CE of the first light-emitting element ED1 receives a common voltage or a cathode voltage.

[0148] The common electrode CE may be located on the first light emitting layer EL1 in the first light emitting area PA1 and may be located on the first pixel defining layer PDL1 in the first light blocking area BA1 .

[0149] Figure 16 is a cross-sectional view illustrating a display device according to some embodiments. Figure 17 It shows Figure 16 An enlarged view of the multi-level inclined structure of the pixel electrode.

[0150] Reference Figure 16 The display device shown is Figure 11 The display device of FIG. 1 is different in that the bank layer BNK and the first light emitting element ED1 have a multi-step inclined portion AE1 -S.

[0151] Reference Figure 16 and Figure 17 The bank layer BNK has a multi-level inclined structure. The multi-level inclined structure includes inclined surfaces SSL1 having different inclinations. For example, the inclined structure includes a first inclined surface SSL1-11 having a first inclination θ11 and a second inclined surface SSL1-21 having a second inclination θ21. The second inclined surface SSL1-21 extends upward from the first inclined surface SSL1-11. The second inclination θ21 may be greater than the first inclination θ11. For example, the first inclination θ11 may be approximately 10° to 30°, and the second inclination θ21 may be approximately 30° to 60°.

[0152] The first pixel electrode AE1 may be arranged to overlap one of the plurality of grooves BNK-R defined by the bank layer BNK. The first pixel electrode AE1 is arranged along the inclined surface SSL1 of the bank layer BNK. Thus, the first pixel electrode AE1 may have a multi-step inclined structure. For example, the first pixel electrode AE1 may have a stepped structure in which a first inclined portion AE1-S11 having a first inclination θ11 and a second inclined portion AE1-S21 having a second inclination θ21 are formed. The second inclined portion AE1-S21 extends upward from the first inclined portion AE1-S11. The first pixel electrode AE1 may include a top portion AE1-T connected to the top of the second inclined portion AE1-S21 and located on top of the bank layer BNK, and a bottom portion AE1-B connected to the bottom of the first inclined portion AE1-S11.

[0153] The first inclined portion AE1-S11 has a first inclination θ11, and the second inclined portion AE1-S21 extends from the first inclined portion AE1-S11 and is located at the top portion and has a second inclination θ21. The second inclination θ21 may be steeper than the first inclination θ11. For example, the first inclination θ11 may be approximately 10° to 30°, and the second inclination θ21 may be approximately 30° to 60°.

[0154] The horizontal width d1 of the first inclined portion AE1-S11 may be greater than the horizontal width d2 of the second inclined portion AE1-S21. For example, the horizontal width d1 of the first inclined portion AE1-S11 may be about 3 μm to 5 μm, and the horizontal width d2 of the second inclined portion AE1-S21 may be about 1 μm to 3 μm.

[0155] Figure 18 is shown as reference Figure 16 and Figure 17 A graph illustrating brightness ratio deviation of a display device using a multi-level tilt structure according to some embodiments is described.

[0156] Figure 18 is a graph showing a luminance ratio deviation dL / d according to a viewing angle in a display device adopting a multi-step tilt structure. Compared with an alternative display device, the luminance ratio deviation is reduced by about 1.5% at a viewing angle of 45 degrees. Figure 18 Ref. in shows that Figure 11 In the display device having the structure of the single-layer inclined portion AE1-S shown in FIG, a luminance ratio deviation dL / d according to a viewing angle occurs.

[0157] Figure 19 It shows the reference Figure 16 and Figure 17 A graph showing front-side contrast luminance of a display device with a multi-level tilt structure is described.

[0158] Figure 19 is a graph showing front contrast luminance according to viewing angles in a display device adopting a multi-level tilt structure, and compared with an alternative display device, the luminance ratio compared to the front at a viewing angle of 45 degrees is relatively improved by about 57%.

[0159] Figure 20 is a cross-sectional view illustrating a display device including light emitting regions emitting light of different wavelengths according to some embodiments.

[0160] Figure 20 A cross-sectional view spanning the first light emitting area PA1 and the second light emitting area PA2 is shown.

[0161] Will refer to Figure 20 as well as Figures 11 to 15The cross-sectional structure of the display device 11 will be described in more detail.

[0162] The first light emitting area PA1 and the second light emitting area PA2 may emit light of different wavelengths. For example, the first light emitting area PA1 and the second light emitting area PA2 may emit red light and green light, or blue light and green light, respectively. However, the embodiments of the present disclosure are not limited thereto.

[0163] The first light emitting region PA1 may include a first light emitting element ED1, and the second light emitting region PA2 may include a second light emitting element ED2.

[0164] The light emitting elements included in different light emitting regions may have different structures. For example, the first light emitting element ED1 may include Figure 11 The single-stage tilt structure described. Figure 14 and Figure 15 As described, the second light emitting element ED2 may include a multi-level inclined structure.

[0165] The first light emitting element ED1 may include a first pixel electrode AE1 , a first light emitting layer EL1 , and a common electrode CE.

[0166] The first pixel electrode AE1 may be arranged to overlap one of the grooves BNK-R defined by the bank layer BNK. The first pixel electrode AE1 is arranged along the inclined surface SSL1 of the bank layer BNK. Therefore, the first pixel electrode AE1 may have an inclined structure. The first pixel electrode AE1 may include an inclined portion AE1-S located on the inclined surface SSL1 of the groove BNK-R of the bank layer BNK, a bottom portion AE1-B connected to the bottom of the inclined portion AE1-S, and a top portion AE1-T connected to the top of the inclined portion AE1-S and located on top of the bank layer BNK. The inclination angle of the inclined portion AE1-S of the first pixel electrode AE1 may be the same as the inclination angle of the inclined surface SSL1 of the bank layer BNK. For example, the inclination angle of the inclined portion AE1-S may be approximately 20 degrees to approximately 70 degrees. As the inclination angle increases, the viewing angle narrows, while as the inclination angle decreases, the brightness may relatively increase. The first pixel electrode AE1 may have a concave shape.

[0167] The first light-emitting layer EL1 may be located on a portion of the first pixel electrode AE1 and a portion of the first pixel-defining layer PDL1. For example, the first light-emitting layer EL1 may be located on one surface of the first pixel electrode AE1 exposed by the first opening OA1 formed by the first pixel-defining layer PDL1 and a portion of the first pixel-defining layer PDL1. The first light-emitting layer EL1 is formed on and along the first pixel electrode AE1, and thus may have an inclined structure.

[0168] The first light-emitting layer EL1 may be an organic light-emitting layer made of an organic material. When the first light-emitting layer EL1 corresponds to an organic light-emitting layer, the first light-emitting layer EL1 may emit light when the thin film transistor TFT applies a voltage (e.g., a set or predetermined voltage) to the first pixel electrode AE1 of the first light-emitting element ED1 and the common electrode CE of the first light-emitting element ED1 receives a common voltage or a cathode voltage.

[0169] The common electrode CE may be located on the first light emitting layer EL1 in the first light emitting area PA1 and may be located on the first pixel defining layer PDL1 in the first light blocking area BA1 .

[0170] The second light emitting element ED2 may include a second pixel electrode AE2, a second light emitting layer EL2, and a common electrode CE.

[0171] The second pixel electrode AE2 may be arranged to overlap one of the plurality of grooves BNK-R defined by the bank layer BNK. The second pixel electrode AE2 is arranged along the multi-step inclined surface SSL1 of the bank layer BNK. Therefore, the second pixel electrode AE2 may have a multi-step inclined structure. For example, the second pixel electrode AE2 may have a stepped structure in which a first inclined portion AE1-S1 having a first inclination θ1 and a second inclined portion AE1-S2 having a second inclination θ2 are arranged. The second inclined portion AE1-S2 extends upward from the first inclined portion AE1-S1. The second pixel electrode AE2 may include a top portion AE1-T connected to the top of the second inclined portion AE1-S2 and located on the top of the bank layer BNK, and a bottom portion AE1-B connected to the bottom of the first inclined portion AE1-S1.

[0172] The first inclined portion AE1-S1 has a first inclination θ1, and the second inclined portion AE1-S2 extends from the first inclined portion AE1-S1 and is located on top of the first inclined portion AE1-S1 and has a second inclination θ2. The second inclination θ2 may be formed to be gentler than the first inclination θ1. The second inclination θ2 may be smaller than the first inclination θ1. For example, the first inclination θ1 may be approximately 20° to 30°, and the second inclination θ2 may be approximately 5° to 15°.

[0173] The horizontal width d1 of the first inclined portion AE1-S1 may be greater than the horizontal width d2 of the second inclined portion AE1-S2. For example, the horizontal width d1 of the first inclined portion AE1-S1 may be about 3 μm to 5 μm, and the horizontal width d2 of the second inclined portion AE1-S2 may be about 1 μm to 3 μm.

[0174] The second light-emitting layer EL2 may be located on a portion of the second pixel electrode AE2 and a portion of the second pixel-defining layer PDL2. For example, the second light-emitting layer EL2 may be located on a side of the second pixel electrode AE2 exposed by the second opening OA2 formed by the second pixel-defining layer PDL2 and on a portion of the second pixel-defining layer PDL2. The second light-emitting layer EL2 is formed on and along the second pixel electrode AE2, and thus may have a multi-stage inclined structure.

[0175] The second light-emitting layer EL2 may be an organic light-emitting layer made of an organic material. When the second light-emitting layer EL2 corresponds to an organic light-emitting layer, the second light-emitting layer EL2 may emit light when the thin film transistor TFT applies a voltage (e.g., a set or predetermined voltage) to the second pixel electrode AE2 of the second light-emitting element ED2 and the common electrode CE of the second light-emitting element ED2 receives a common voltage or a cathode voltage.

[0176] The common electrode CE may be located on the second light emitting layer EL2 in the second light emitting area PA2 and may be located on the second pixel defining layer PDL2 in the second light blocking area BA2.

[0177] Color filters CF1 and CF2 may be located in different light emitting areas PA1 and PA2, respectively. The color filters CF1 and CF2 may include a first color filter CF1 and a second color filter CF2. The color filters CF1 and CF2 may include a colorant such as a dye or pigment that absorbs light in a wavelength band different from light in a specific wavelength band, and may be arranged to correspond to the color of light emitted from the light emitting areas PA1 and PA2.

[0178] For example, the first color filter CF1 may be a red filter arranged to overlap the first light emitting region PA1 and transmit only red first light. The second color filter CF2 may be a green filter arranged to overlap the second light emitting region PA2 and transmit only green second light.

[0179] like Figure 20 As shown in the example of , by adopting pixel electrodes of different structures in light emitting regions emitting light of different wavelengths, appropriate compensation can be performed according to the characteristics depending on the wavelength.

[0180] A light emitting region requiring front light emitting efficiency may adopt a multi-stage structure in which the inclination angle decreases sequentially.

[0181] Figure 21 is a cross-sectional view illustrating a display device including light emitting regions emitting light of different wavelengths according to some embodiments.

[0182] Figure 21A cross-sectional view through the first light emitting area PA1 and the second light emitting area PA2 is shown.

[0183] Figure 21 Examples and Figure 20 The difference of the embodiment is that the inclination of the second pixel electrode AE2 of the second light emitting area PA2 increases toward the top. The description will focus on Figure 20 The second light emitting area PA2 is different from the second light emitting area PA2.

[0184] Will refer to Figure 21 as well as Figure 11 、 Figure 16 and Figure 17 The cross-sectional structure of the display device 12 will be described.

[0185] The first light emitting area PA1 and the second light emitting area PA2 may emit light of different wavelengths. For example, the first light emitting area PA1 and the second light emitting area PA2 may emit red light and green light, respectively, or may emit blue light and green light, respectively. However, the embodiments of the present disclosure are not limited thereto.

[0186] The first light emitting region PA1 may include a first light emitting element ED1, and the second light emitting region PA2 may include a second light emitting element ED2.

[0187] The light emitting elements included in different light emitting regions may have different structures. For example, the first light emitting element ED1 may include Figure 11 The single-stage tilt structure described. Figure 16 and Figure 17 As described, the second light emitting element ED2 may include a multi-step inclined structure in which the inclination gradually increases.

[0188] The second light emitting element ED2 may include a second pixel electrode AE2, a second light emitting layer EL2, and a common electrode CE.

[0189] The second pixel electrode AE2 may be arranged to overlap one of the plurality of grooves BNK-R defined by the bank layer BNK. The second pixel electrode AE2 is arranged along the multi-step inclined surface SSL1 of the bank layer BNK. Thus, the second pixel electrode AE2 may have a multi-step inclined structure. For example, the second pixel electrode AE2 may have a stepped structure in which a first inclined portion AE1-S11 having a first inclination θ11 and a second inclined portion AE1-S21 having a second inclination θ21 are formed. The second inclined portion AE1-S21 extends upward from the first inclined portion AE1-S11. The second pixel electrode AE2 may include a top portion AE1-T connected to the top of the second inclined portion AE1-S21 and located on top of the bank layer BNK, and a bottom portion AE1-B connected to the bottom of the first inclined portion AE1-S11.

[0190] The first inclined portion AE1-S11 has a first inclination θ11, and the second inclined portion AE1-S21 extends from the first inclined portion AE1-S11 and is located at the top of the first inclined portion AE1-S11 and has a second inclination θ21. The second inclination θ21 may be steeper than the first inclination θ11. For example, the first inclination θ11 may be approximately 10° to 30°, and the second inclination θ21 may be approximately 30° to 60°.

[0191] The horizontal width d1 of the first inclined portion AE1-S11 may be greater than the horizontal width d2 of the second inclined portion AE1-S21. For example, the horizontal width d1 of the first inclined portion AE1-S11 may be about 3 μm to 5 μm, and the horizontal width d2 of the second inclined portion AE1-S21 may be about 1 μm to 3 μm.

[0192] The second light-emitting layer EL2 may be located on a portion of the second pixel electrode AE2 and a portion of the second pixel-defining layer PDL2. For example, the second light-emitting layer EL2 may be located on one surface of the second pixel electrode AE2 exposed by the second opening OA2 formed by the second pixel-defining layer PDL2 and on a portion of the second pixel-defining layer PDL2. The second light-emitting layer EL2 is formed on and along the second pixel electrode AE2, and thus may have a multi-stage inclined structure.

[0193] The second light-emitting layer EL2 may be an organic light-emitting layer made of an organic material. When the second light-emitting layer EL2 corresponds to an organic light-emitting layer, the second light-emitting layer EL2 may emit light when the thin film transistor TFT applies a voltage (e.g., a set or predetermined voltage) to the second pixel electrode AE2 of the second light-emitting element ED2 and the common electrode CE of the second light-emitting element ED2 receives a common voltage or a cathode voltage.

[0194] The common electrode CE may be located on the second light emitting layer EL2 in the second light emitting area PA2 and may be located on the second pixel defining layer PDL2 in the second light blocking area BA2.

[0195] Color filters CF1 and CF2 may be located in different light emitting areas PA1 and PA2, respectively. The color filters CF1 and CF2 may include a first color filter CF1 and a second color filter CF2. The color filters CF1 and CF2 may include a colorant such as a dye or pigment that absorbs light in a wavelength band different from light in a specific wavelength band, and may be arranged to correspond to the color of light emitted from the light emitting areas PA1 and PA2.

[0196] For example, the first color filter CF1 may be a red color filter arranged to overlap the first light emitting area PA1 and transmit only the red first light, or may be a blue color filter transmitting only the blue third light. The second color filter CF2 is arranged to overlap the second light emitting area PA2 and may be a green color filter transmitting only the green second light.

[0197] The light emitting area in which the brightness ratio deviation at each viewing angle is to be relatively improved may adopt a multi-stage structure in which the inclination angle increases sequentially.

[0198] According to some embodiments, light emitted from the first light-emitting layer EL1 overlapping the first inclined portion AE1-S1 of the first pixel electrode AE1 in a path inclined relative to the third direction Z toward the outside of the display device 10 may be referred to as first inclined light, and light emitted from the first light-emitting layer EL1 overlapping the second inclined portion AE1-S2 of the first pixel electrode AE1 in a path inclined relative to the third direction Z toward the outside of the display device 10 may be referred to as second inclined light. The first and second inclined lights may be emitted from the surface of the display device 10 at various angles relative to the third direction Z.

[0199] When the inclination of the second oblique portion AE1 - S2 is greater than that of the first oblique portion AE1 - S1 , since the viewing angle of the second oblique light is greater than that of the first oblique light, the brightness ratio deviation for each viewing angle may be relatively improved.

[0200] When the inclination of the second inclined portion AE1-S2 is smaller than that of the first inclined portion AE1-S1, since the viewing angle of the second inclined light is smaller than that of the first inclined light, white angle dependence (WAD) can be relatively improved and front light efficiency can be relatively improved.

[0201] The embodiments disclosed in the disclosure are not intended to limit the technical spirit of the embodiments of the present disclosure, but to describe the technical spirit of the embodiments of the present disclosure, and the scope of the technical spirit of the embodiments of the present disclosure is not limited by these embodiments. The scope of protection disclosed should be interpreted by the appended claims and their equivalents, and it should be interpreted that all technical spirits within the equivalent scope are included in the scope of the embodiments of the present disclosure.

Claims

1. A display device, comprising: substrate; a thin film transistor on the substrate; a protective layer on the thin film transistor; a bank layer on the protective layer and having a plurality of grooves; a plurality of light emitting elements, each corresponding to each of the plurality of grooves on the bank layer, and including a pixel electrode, a light emitting layer, and a common electrode; as well as a pixel defining layer, defining a light emitting area on the bank layer; wherein a groove from among the plurality of grooves has a multi-level inclined surface, and the pixel electrode includes a first inclined portion having a first inclination along the multi-level inclined surface of the groove, and a second inclined portion located above the first inclined portion and having a second inclination different from the first inclination, and The horizontal width of the first inclined portion is wider than the horizontal width of the second inclined portion.

2. The display device according to claim 1, wherein The horizontal width of the first inclined portion is in the range of 3 μm to 5 μm, and The horizontal width of the second inclined portion is in a range of 1 μm to 3 μm.

3. The display device according to claim 1, wherein The second inclination is smaller than the first inclination.

4. The display device according to claim 3, wherein The first inclination is in the range of 20° to 30°, and The second inclination is in the range of 5° to 15°.

5. The display device according to claim 1, wherein The pixel electrode further includes a bottom portion connected to a bottom of the first inclined portion and a top portion connected to a top of the second inclined portion and on a top surface of the bank layer. The display device according to claim 5 , wherein: The pixel defining layer partially overlaps the top portion.

7. The display device according to claim 5, wherein: The light emitting layer overlaps the bottom portion of the pixel electrode, the first inclined portion, and the second inclined portion.

8. The display device according to claim 1, wherein The second inclination is greater than the first inclination.

9. The display device according to claim 8, wherein The first inclination is in the range of 10° to 30°, and Wherein, the second inclination is in the range of 30° to 60°.

10. The display device according to claim 1, wherein The grooves have different multi-level inclined structures.

11. A display device, comprising: a substrate comprising a first light emitting region and a second light emitting region; a thin film transistor on the substrate; a protective layer on the thin film transistor; a bank layer on the protective layer and having a first groove and a second groove respectively overlapping the first light emitting region and the second light emitting region; a first light emitting element, corresponding to the first groove on the bank layer, and comprising a first pixel electrode, a first light emitting layer, and a common electrode; a second light emitting element, corresponding to the second groove on the bank layer, and comprising a second pixel electrode, a second light emitting layer, and a common electrode; as well as a pixel defining layer, defining a light emitting area on the bank layer, wherein the first pixel electrode has a single-stage inclined portion, wherein the second pixel electrode has a multi-level inclined portion, and the multi-level inclined portion includes a first inclined portion having a first inclination and a second inclined portion above the first inclination and having a second inclination different from the first inclination, and The horizontal width of the first inclined portion is wider than the horizontal width of the second inclined portion.

12. The display device according to claim 11, wherein The horizontal width of the first inclined portion is in the range of 3 μm to 5 μm, and The horizontal width of the second inclined portion is in a range of 1 μm to 3 μm.

13. The display device according to claim 12, wherein: The second inclination is smaller than the first inclination.

14. The display device according to claim 11, wherein The first inclination is in the range of 20° to 30°, and The second inclination is in the range of 5° to 15°.

15. The display device according to claim 11, wherein The first groove has a single-stage inclined structure, and Wherein, the second groove has a multi-level inclined structure.

16. The display device according to claim 11, wherein The second inclination is greater than the first inclination.

17. The display device according to claim 16, wherein: The first inclination is in the range of 10° to 30°, and Wherein, the second inclination is in the range of 30° to 60°.

18. The display device according to claim 11, wherein The second light emitting layer overlaps a bottom portion of the second pixel electrode, the first inclined portion, and the second inclined portion, and the bottom portion is connected to a bottom of the first inclined portion.

19. The display device according to claim 11, further comprising: a thin film encapsulation layer on the first light-emitting element and the second light-emitting element; a color filter layer on the thin film encapsulation layer; an outer coating layer and a touch electrode layer, between the thin film encapsulation layer and the color filter layer, The thin film encapsulation layer includes a first inorganic film layer, a second inorganic film layer, and an organic film layer between the first inorganic film layer and the second inorganic film layer.

20. The display device according to claim 19, wherein The color filter layer includes a first color filter overlapping the first light emitting area and a second color filter overlapping the second light emitting area, The first color filter is a blue color filter configured to transmit blue light or a red color filter configured to transmit red light, and the second color filter is a green color filter configured to transmit green light.

Images