Design method of TMDS signal test system

By using the LT6911C chip to analyze the timing of the TMDS signal, the problem of the existing technology that cannot detect whether the TMDS signal meets the display timing standard is solved, and more extensive and reliable TMDS signal detection is achieved. The system design is simple and low-cost.

CN120652247APending Publication Date: 2025-09-16HEFEI JUNZHENG TECH CO LTD
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Patent Information

Application Number
CN202410289111.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-03-14
Publication Date
2025-09-16

AI Technical Summary

Technical Problem

Existing technologies cannot detect whether TMDS signals meet display timing standards, and the test coverage and reliability are insufficient.

Method used

The LT6911C chip is used to receive the input TMDS signal, and the analysis and storage results are obtained through the IIC bus to achieve timing detection of the TMDS signal and support reading the detection results through the IIC communication bus.

Benefits of technology

It realizes comprehensive detection of TMDS signals, including timing detection, and improves the coverage and reliability of the test. The system is simple, easy to operate and low-cost.

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Abstract

The invention provides a TMDS signal test system. The system comprises an HDMI / DVI interface circuit (1) and a TMDS signal detection circuit (2) connected with the HDMI / DVI interface circuit (1), the HDMI / DVI interface circuit (1) comprises: positive and negative differential signal lines of DATA0-DATA2 of a TMDS signal, and a clock differential signal line; a DDC data line and a DDC clock line are used for DDC communication of the HDMI / DVI interface circuit; and a hot plug detection signal; and the TMDS signal detection circuit (2) adopts a main control chip of which the model is LT6911C.
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Description

Technical Field

[0001] The present invention belongs to the technical field of circuit control, and in particular relates to a TMDS signal testing system design method. Background Art

[0002] Transition Minimized Differential Signaling (TMDS) is a high-speed data transmission technology developed by Silicon Image, an American company, and can be used for DVI and HDMI video transmission interfaces.

[0003] TMDS uses a logic algorithm to convert 8-bit character data into 10-bit character data through minimal conversion. The first 8 bits are derived from the original signal through calculations. The ninth bit indicates the operation method: 1 for XOR and 0 for NOR. After DC balancing (bit 10), data is transmitted using differential signals. The 10th bit is an inversion flag: 1 indicates inversion and 0 indicates no inversion, thus achieving DC balance. The receiving end then performs the reverse operation after receiving the signal. TMDS has better electromagnetic compatibility than LVDS and TTL. This algorithm reduces overshoot and undershoot during signal transmission, and DC balancing reduces electromagnetic interference on transmission lines, enabling long-distance, high-quality digital signal transmission using low-cost, specialized cables.

[0004] The DVI data format is derived from PanelLink technology developed by the semiconductor manufacturer Silicon Image (first used in laptop computers). It uses Transition Minimized Differential Signaling (TMDS) to ensure the stability of high-speed serial data transmission. A "single-link" DVI channel consists of four twisted-pair cables (red, green, blue, and clock signals), with each pixel containing 24 bits of data.

[0005] HDMI was designed to replace older analog audio and video interfaces such as SCART and RCA. It supports a wide range of television and computer video formats, including SDTV and HDTV video, as well as multi-channel digital audio. HDMI, minus the audio transmission function, inherits DVI's core technology, "Transmission Minimized Differential Signaling" (TMDS), and is essentially an extension of DVI. Both DVI and HDMI transmit video content over a real-time, dedicated line, ensuring no congestion even with high video traffic. Each pixel carries 24 bits of data.

[0006] Generally speaking, an HDMI / DVI interface contains four TMDS channels: three data channels and one clock channel. Each channel uses differential level transmission, meaning each channel requires two wires: a positive and a negative line. The TMDS codec algorithm minimizes overshoot and undershoot during the transmitted signal transition, ensuring DC balance of the transmitted data. This reduces electromagnetic interference on the transmission line and improves signal transmission speed and reliability.

[0007] The prior art determines whether a TMDS signal exists on a transmission line by detecting the difference in the amplitude of a TMDS differential signal (a value determined by a related detection circuit and ultimately output to a comparator).

[0008] However, it is not possible to detect whether the TMDS signal meets the display timing standard, but only whether the TMDS signal is sent.

[0009] Additionally, commonly used technical terms include:

[0010] TMDS: TMDS stands for Transition Minimized Differential Signaling (TMDS), a high-speed data transmission technology developed by Silicon Image, an American company. It can be used for DVI and HDMI video transmission interfaces.

[0011] HDMI: High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission interface that can transmit uncompressed audio and video signals. DVI: DVI stands for Digital Visual Interface (DVI). It is a video interface standard designed to transmit uncompressed digital video.

[0012] IIC bus: Inter-Integrated Circuit, which can be translated into Chinese as: integrated circuit bus. It is a serial communication bus that uses a multi-master-slave architecture.

[0013] DC balance: DC balance, a description of the DC characteristics of a circuit. Summary of the Invention

[0014] In order to solve the above problems, the purpose of this application is to: the solution involved in this application can detect whether the TMDS signal meets the display timing standard, with wider test coverage and higher test reliability. That is, the TMDS signal detection system and method of this application can not only cover the content of the existing technology, that is, it can realize the function of determining whether there is a TMDS signal on the transmission line. Moreover, on the basis of the existing technology, the TMDS signal timing detection function and TMDS clock detection are added to have wider coverage. A chip model LT6911C is used to receive the TMDS signal input from the input end. This chip is a TMDS signal to MIPI signal chip, which supports parsing the timing of the input TMDS signal and saving the parsing results. Users can read the saved parsing results through the IIC communication bus.

[0015] Specifically, the present invention provides a TMDS signal testing system, the system comprising: an HDMI / DVI interface circuit, a TMDS signal detection circuit connected to the HDMI / DVI interface circuit;

[0016] The HDMI / DVI interface circuit comprises:

[0017] The positive and negative differential signal lines and clock differential signal line of DATA0-DATA2 of the TMDS signal; the DDC data line and DDC clock line used for DDC communication of the HDMI / DVI interface circuit; and the hot plug detection signal;

[0018] The main control chip used in the TMDS signal detection circuit is a TMDS signal to MIPI signal conversion chip, which supports parsing the timing of the input TMDS signal and saving the parsing results, and can read the saved parsing results through the IIC communication bus.

[0019] The system transmits TMDS signals via an HDMI interface. If a DVI interface is used, the test requirements are also met because the DVI interface can also transmit TMDS signals. The HDMI / DVI interface circuit further includes:

[0020] The positive and negative differential signal lines of DATA0 to DATA2 of the TMDS signal:

[0021] Signal lines HDMI_TX0N / HDMI_TX0P~HDMI_TX2N / HDMI_TX2P, and clock differential signal lines CLOCK- / CLOCK+: signal lines HDMI_TXCN and HDMI_TXCP; that is, there is a pair of clock differential signal lines, one positive polarity CLOCK+ and one negative polarity CLOCK-, corresponding to the positive polarity HDMI_TXCP and negative polarity HDMI_TXN signal lines respectively;

[0022] The DDC data line HDMI_SMB_SDA and the DDC clock line HDMI_SMB_SCK used for DDC communication of the HDMI / DVI interface circuit;

[0023] The hot plug detection signal is HDMI_HOTPLUG;

[0024] If the DVI interface is used above, the design method is the same as the HDMI interface, and the number, name, and order of signal lines required in the two are exactly the same.

[0025] The TMDS signal detection circuit comprises:

[0026] From the TMDS signal transmission end: the positive and negative differential signals of DATA0~DATA2: TMDS_D0+ / TMDS_D0-~TMDS_D2+ / TMDS_D2-, and the clock differential signal line CLOCK+ / CLOCK-: TMDS_CLK+ / TMDS_CLK-;

[0027] The DDC data line RX_SDA and DDC clock line RX_SCK used by the DDC communication of the HDMI / DVI interface circuit from the transmission end;

[0028] Hot plug detection signal RX_HPD from the transmitting end.

[0029] The TMDS signal testing system includes but is not limited to TMDS signal detection of the HDMI interface. The input interface of the TMDS signal can be flexibly replaced according to user needs, including being replaced with a DVI interface. The design methods of the HDMI interface and the DVI interface in this system are consistent.

[0030] The main control chip is LT6911C.

[0031] The present application also relates to a method for implementing TMDS signal testing, which is applicable to any of the above-mentioned systems. The method can detect and analyze the input TMDS signal to obtain the characteristic value of the TMDS signal transmitted by the transmission end.

[0032] The main control chip can detect and analyze the input TMDS signal to obtain the characteristic value of the TMDS signal transmitted by the transmission end, including a detailed description of the display timing, and can obtain the detection results through the IIC bus. The user or other automation platform can perform customized analysis based on the results.

[0033] The specific method of the analysis is: users can access the internal analysis results of the input TMDS signal of the LT6911C through the two signal lines HDMI_SMB0_SCK_PB30 and HDMI_SMB0_SDA_PB29 in the circuit as SCK and SDA in the IIC communication protocol. IIC is a commonly used communication protocol in embedded systems. Only the clock line SCK and data line SDA are required to complete the communication between the host and the slave.

[0034] Therefore, the advantages of this application are:

[0035] 1. The solution of this application can detect detailed information of the signal from the TMDS transmission end.

[0036] 2. The system described in the solution of this application is simple, easy to operate and low-cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings described herein are used to provide a further understanding of the present invention, constitute a part of this application, and do not constitute a limitation of the present invention.

[0038] Figure 1 1 is a schematic block diagram of the TMDS test system in this application.

[0039] Figure 2 This is a schematic diagram of an HDMI / DVI interface circuit, taking the HDMI interface as an example in this application.

[0040] Figure 3 This is a schematic diagram of the data line and clock line used in the DDC communication of the HDMI / DVI interface circuit in this application.

[0041] Figure 4 It is a schematic block diagram of the TMDS signal detection circuit in this application. DETAILED DESCRIPTION

[0042] In order to more clearly understand the technical content and advantages of the present invention, the present invention is now further described in detail with reference to the accompanying drawings.

[0043] The present invention discloses a TMDS signal detection system, comprising: an HDMI / DVI interface circuit and a detection circuit connected to the HDMI / DVI circuit. The system, consisting of the HDMI / DVI interface circuit and the detection circuit, has a simple structure, low cost, and high detection reliability.

[0044] Specifically, the system includes:

[0045] An HDMI / DVI interface circuit 1 and a TMDS signal detection circuit 2 connected to the HDMI / DVI interface circuit 1 .

[0046] The TMDS signal detection circuit 2 uses a main control chip model LT6911C. The LT6911C chip receives the TMDS signal from the input terminal. This chip is a TMDS signal to MIPI signal chip. It supports timing analysis of the input TMDS signal and saves the analysis results. Users can read the saved analysis results through the IIC communication bus.

[0047] like Figure 1 The TMDS signal testing system shown includes an HDMI / DVI interface circuit 1 and a TMDS signal detection circuit 2. The system part HDMI / DVI interface circuit (1) is connected to the TMDS signal detection circuit 2.

[0048] like Figure 2 As shown in the figure, the HDMI / DVI interface circuit 1 is shown. This demonstration system takes HDMI as the TMDS transmission interface as an example. If the DVI interface is used, the design method is the same as the HDMI interface. The number, name, and order of signal lines required in the two are exactly the same, including:

[0049] Positive and negative differential signal lines of DATA0 to DATA2 of the TMDS signal:

[0050] Figure 2 Middle signal lines HDMI_TX0N / HDMI_TX0P to HDMI_TX2N / HDMI_TX2P, and clock differential signal lines CLOCK+ / CLOCK-: Figure 2 Middle signal lines HDMI_TXCN and HDMI_TXCP; that is, there is a pair of clock differential signal lines, one positive polarity CLOCK+ and one negative polarity CLOCK-, corresponding to the positive polarity HDMI_TXCP and negative polarity HDMI_TXN signal lines respectively;

[0051] The signal lines HDMI_CLKP and HDMI_CLKN are connected to the signal lines HDMI_TXCN and HDMI_TXCP in the circuit diagram. The two are equal in signal description. This type of naming is often based on the signal names outside the electronic components.

[0052] Figure 3 The HDMI / DVI interface circuit shown uses the DDC data line HDMI_SMB_SDA and the DDC clock line HDMI_SMB_SCK for DDC communication;

[0053] Figure 2 The hot plug detection signal HDMI_HOTPLUG is shown.

[0054] The TMDS signal detection circuit 2 uses LT6911C as the main control chip for TMDS signal detection. Figure 4 As shown, the TMDS signal detection circuit 2 includes the positive and negative differential signals of DATA0 to DATA2 from the TMDS signal transmission end: Figure 4 TMDS_D0+ / TMDS_D0-~TMDS_D2+ / TMDS_D2-, and clock differential signal lines CLOCK+ / CLOCK-: TMDS_CLK+ / TMDS_CLK-;

[0055] Figure 4 The DDC data line RX_SDA and the DDC clock line RX_SCK used for DDC communication of the HDMI / DVI interface circuit from the transmission end are shown;

[0056] Figure 4 The hot plug detection signal RX_HPD from the transmitting end is shown.

[0057] The main control chip can detect the input TMDS signal and analyze it to obtain the TMDS signal characteristic value transmitted by the transmission end. Figure 4 The circuit diagram shown includes a detailed description of the display timing, and the detection results can be obtained through the IIC bus, and the user or other automation platform can perform customized analysis based on the results.

[0058] The TMDS signal testing system described above is only a specific detection method for the TMDS signal of the HDMI interface. This application includes but is not limited to the TMDS signal detection of the HDMI interface. The input interface of the TMDS signal can be flexibly replaced according to the user's needs, including being replaced with a DVI interface. The design methods of the HDMI interface and the DVI interface in this system are consistent.

[0059] The present application also relates to a method for implementing TMDS signal testing, which is applicable to any of the above-mentioned systems. The method can detect and analyze the input TMDS signal to obtain the characteristic value of the TMDS signal transmitted by the transmission end.

[0060] The main control chip can detect and analyze the input TMDS signal to obtain the characteristic value of the TMDS signal transmitted by the transmission end, including a detailed description of the display timing, and can obtain the detection results through the IIC bus. The user or other automation platform can perform customized analysis based on the results.

[0061] The specific method of the analysis is: the user can Figure 3The two signal lines HDMI_SMB0_SCK_PB30 and HDMI_SMB0_SDA_PB29 in the LT6911C are used as the SCK and SDA signal lines in the IIC communication protocol. They are connected to the RX_SCK and RX_SDA of the LT6911C. The IIC communication protocol is used to access the internal analysis results of the input TMDS signal of the LT6911C. IIC is a commonly used communication protocol in embedded systems. Only the clock line SCK and the data line SDA are required to complete the communication between the host and the slave.

[0062] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A TMDS signal testing system, characterized in that: The system comprises: An HDMI / DVI interface circuit (1), and a TMDS signal detection circuit (2) connected to the HDMI / DVI interface circuit (1); The HDMI / DVI interface circuit (1) comprises: The positive and negative differential signal lines and clock differential signal line of DATA0-DATA2 of the TMDS signal; the DDC data line and DDC clock line used for DDC communication of the HDMI / DVI interface circuit; and the hot plug detection signal; The main control chip used in the TMDS signal detection circuit (2) is a chip for converting TMDS signals to MIPI signals. The chip supports parsing the timing of the input TMDS signal and saving the parsing results. The saved parsing results can be read through the IIC communication bus.

2. A TMDS signal testing system according to claim 1, characterized in that: The system transmits TMDS signals via an HDMI interface. If a DVI interface is used, the test requirement is also met because the DVI interface can also transmit TMDS signals. The HDMI / DVI interface circuit (1) further includes: The positive and negative differential signal lines of DATA0 to DATA2 of the TMDS signal: Signal cable HDMI_TX0N / HDMI_TX0P~HDMI_TX2N / HDMI_TX2P, And the clock differential signal line CLOCK- / CLOCK+: signal lines HDMI_TXCN and HDMI_TXCP; that is, there is a pair of clock differential signal lines, one positive polarity CLOCK+ and one negative polarity CLOCK-, corresponding to the positive polarity HDMI_TXCP and negative polarity HDMI_TXN signal lines respectively; The DDC data line HDMI_SMB_SDA and the DDC clock line HDMI_SMB_SCK used for DDC communication of the HDMI / DVI interface circuit are as follows; the hot plug detection signal is HDMI_HOTPLUG; If the DVI interface is used above, the design method is the same as the HDMI interface, and the number, name, and order of signal lines required in the two are exactly the same.

3. A TMDS signal test system design method according to claim 1, characterized in that: The TMDS signal detection circuit (2) comprises: From the TMDS signal transmission end: the positive and negative differential signals of DATA0~DATA2: TMDS_D0+ / TMDS_D0-~TMDS_D2+ / TMDS_D2-, and the clock differential signal line CLOCK+ / CLOCK-: TMDS_CLK+ / TMDS_CLK-; The DDC data line RX_SDA and DDC clock line RX_SCK used by the DDC communication of the HDMI / DVI interface circuit from the transmission end; Hot plug detection signal RX_HPD from the transmitting end.

4. A TMDS signal test system design method according to claim 1, characterized in that: The TMDS signal testing system includes but is not limited to TMDS signal detection of the HDMI interface. The input interface of the TMDS signal can be flexibly replaced according to user needs, including being replaced with a DVI interface. The design methods of the HDMI interface and the DVI interface in this system are consistent.

5. A TMDS signal test system design method according to claim 1, characterized in that: The main control chip is LT6911C.

6. A method for implementing TMDS signal testing, characterized in that: Applicable to any system described in claims 1-5 above, the method can detect and analyze the input TMDS signal, thereby obtaining the characteristic value of the TMDS signal transmitted by the transmitting end.

7. A method for implementing TMDS signal testing according to claim 6, characterized in that: The main control chip can detect and analyze the input TMDS signal to obtain the characteristic value of the TMDS signal transmitted by the transmission end, including a detailed description of the display timing, and can obtain the detection results through the IIC bus. The user or other automation platform can perform customized analysis based on the results.

8. The method for implementing TMDS signal testing according to claim 7, wherein: The specific method of the analysis is: users can access the internal analysis results of the input TMDS signal of the LT6911C through the two signal lines HDMI_SMB0_SCK_PB30 and HDMI_SMB0_SDA_PB29 in the circuit as SCK and SDA in the IIC communication protocol. IIC is a commonly used communication protocol in embedded systems. Only the clock line SCK and data line SDA are required to complete the communication between the host and the slave.