Display panel and display device

Abstract

The embodiment of the invention provides a display panel and a display device, relates to the technical field of display, and can restrain the light leakage phenomenon of the display panel. The display panel comprises a substrate layer, a first conductive layer, a second conductive layer and a common electrode layer. The first conductive layer comprises a plurality of gate parts and a plurality of gate signal lines; the second conductive layer comprises a source electrode part, a drain electrode part and a data signal line; the common electrode layer comprises a plurality of sub-pixel areas, each sub-pixel area comprises a connecting part and an electrode part, the electrode parts are arranged in the sub-pixel areas, and the connecting parts are arranged between the adjacent sub-pixel areas in the second direction; the orthographic projection of the connecting part and the orthographic projection of the drain electrode part on the substrate layer are not overlapped, the orthographic projection edge of one side, close to the drain electrode part, of the connecting part is matched with the orthographic projection edge of one side, close to the connecting part, of the drain electrode part in shape, and an included angle is formed between the orthographic projection edge, matched with the drain electrode part, of the connecting part and the first direction; the connecting parts stretch across the edges of the adjacent sub-pixel areas in the second direction.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the advancement and development of transparent display technology, the requirements for the display performance of liquid crystal display panels are gradually increasing. The display principle of liquid crystal display panels is to control the deflection angle of liquid crystal molecules by controlling the voltage difference between the pixel electrode and the common electrode. This controls the amount of light emitted by the backlight module through the liquid crystal layer, and controls the brightness of each display pixel in the display panel to achieve the display image.

[0003] In the area covered by the shading structure inside the existing liquid crystal display panel, electric field disorder usually occurs, causing the actual deflection angle formed by the liquid crystal molecules to be different from the expected deflection angle of the liquid crystal molecules under the action of the pixel voltage. As a result, light is emitted from the area covered by the shading structure in the dark state, causing dark state light leakage in the display panel, affecting the display effect of the display image and the display performance of the display panel. Summary of the Invention

[0004] Embodiments of the present application provide a display panel and a display device, which can suppress light leakage of the display panel and improve the display effect of the display image and the display performance of the display panel.

[0005] According to a first aspect of an embodiment of the present application, a display panel is provided, comprising:

[0006] substrate layer;

[0007] a first conductive layer disposed on one side of the substrate layer, the first conductive layer comprising a plurality of gate portions and a plurality of gate signal lines, the gate portions being connected to the gate signal lines in a first direction, and the gate portions and the gate signal lines being alternately disposed in the first direction;

[0008] a second conductive layer disposed on a side of the first conductive layer away from the substrate layer, the second conductive layer comprising a source portion, a drain portion, and a data signal line, the data signal line being electrically connected to the drain portion, the data signal line extending along a second direction, the first direction intersecting the second direction;

[0009] a common electrode layer disposed on the same side of the substrate layer and the first conductive layer, the common electrode layer including a plurality of sub-pixel regions, the common electrode layer including a connecting portion and an electrode portion, the electrode portion being disposed in the sub-pixel regions, the connecting portion being disposed between adjacent sub-pixel regions in the second direction, and the connecting portion being connected to the electrode portion;

[0010] The orthographic projection of the connecting portion on the substrate layer does not overlap with the orthographic projection of the drain portion on the substrate layer, the orthographic projection edge of the connecting portion close to the drain portion matches the orthographic projection edge of the drain portion close to the connecting portion, and the orthographic projection edges of the connecting portion and the drain portion that match form an angle with the first direction;

[0011] The connecting portion spans across edges of the adjacent sub-pixel regions in the second direction.

[0012] In some embodiments, the display panel further includes:

[0013] a light shielding layer, the light shielding layer being arranged on a side of the common electrode layer away from the substrate layer, the light shielding layer comprising a plurality of openings, the orthographic projections of the openings on the substrate layer not overlapping with the orthographic projections of the source electrode portion on the substrate layer, the orthographic projections of the openings on the substrate layer not overlapping with the orthographic projections of the drain electrode portion on the substrate layer, and the orthographic projections of the openings on the substrate layer not overlapping with the orthographic projections of the data signal lines on the substrate layer;

[0014] The orthographic projection edge of the connecting portion on the substrate layer close to the drain portion matches the orthographic projection edge of the opening on the substrate layer close to the drain portion; and / or,

[0015] The shape of the orthographic projection edge of the gate portion on the substrate layer at a side close to the opening matches the shape of the orthographic projection edge of the opening on the substrate layer at a side close to the gate portion.

[0016] In some embodiments, the connecting portion includes a first hollow, and an orthographic projection edge of the gate signal line on the substrate layer falls inside an orthographic projection edge of the first hollow on the substrate layer.

[0017] In some embodiments, the orthographic projection edge of the first hollow portion on the substrate layer close to the drain portion matches the orthographic projection edge of the drain portion on the substrate layer close to the first hollow portion;

[0018] An orthographic projection edge of the first hollow matched with the drain portion forms an angle with the first direction.

[0019] In some embodiments, the display panel includes a light shielding layer, the light shielding layer is disposed on a side of the common electrode layer away from the substrate layer, and the light shielding layer includes a plurality of openings;

[0020] The orthographic projection edge of the first hollowing-out side close to the drain portion on the substrate layer matches the orthographic projection edge of the opening-close to the connecting portion on the substrate layer.

[0021] In some embodiments, the sub-pixel region corresponds to the region where the first hollowing is located in the second direction.

[0022] In some embodiments, the connecting portion includes a sub-connecting portion, and the sub-connecting portion is disposed close to one side or both sides of the sub-pixel region extending along the second direction;

[0023] A first hollow is formed between two of the sub-connection portions arranged on both sides of the sub-pixel region along the second direction.

[0024] In some embodiments, when the connection portion includes one sub-connection portion, the sub-connection portions arranged in the second direction are alternately disposed on different sides of the sub-pixel region.

[0025] In some embodiments, the extension directions of the two sub-connection portions disposed on both sides of the sub-pixel region along the second direction intersect.

[0026] In some embodiments, the connecting portion includes a second hollow, and an orthographic projection edge of the second hollow on the substrate layer coincides with an orthographic projection edge of the gate signal line on the substrate layer; or,

[0027] The orthographic projection edge of the second hollow on the substrate layer falls inside the orthographic projection edge of the gate signal line on the substrate layer.

[0028] In some embodiments, an orthographic projection of the connecting portion on the substrate layer completely covers an orthographic projection of the gate signal line between two adjacent gate portions in the first direction on the substrate layer.

[0029] In some embodiments, a minimum distance between an edge of the connection portion away from the source portion and the source portion is greater than a minimum distance between an edge of the gate signal line away from the source portion and the source portion.

[0030] In some embodiments, at least a portion of an edge of the gate portion away from the source portion is flush with an edge of the gate signal line away from the source portion; or

[0031] The gate portion includes a gate middle section, a first gate end, and a second gate end. The gate middle section is connected between the first gate end and the second gate end. The gate signal line is connected to the gate middle section. The first gate end and the second gate end are the two ends of the gate portion in the second direction. The edge of the first gate end away from the gate signal line exceeds the edge of the gate signal line close to the first gate end. The edge of the second gate end away from the gate signal line exceeds the edge of the gate signal line close to the second gate end.

[0032] In some embodiments, the display panel further includes:

[0033] A touch electrode layer, the touch electrode layer comprising a plurality of touch signal lines extending along the second direction, the touch signal lines being arranged between two adjacent gate portions in the first direction, the orthographic projection of the touch signal lines on the substrate layer overlapping with the orthographic projection of the gate signal lines on the substrate layer.

[0034] In some embodiments, when the distances between the touch signal line and two adjacent drain portions are not equal, and the connecting portion includes a first hollow, the orthographic projection of the first hollow on the substrate layer does not overlap with the orthographic projection of the touch signal line on the substrate layer.

[0035] In some embodiments, the orthographic projection edge of the first hollow on the substrate layer close to the touch signal line matches the orthographic projection edge of the touch signal line on the substrate layer close to the first hollow.

[0036] In some embodiments, the electrode portion includes a first sub-electrode and a second sub-electrode, the first sub-electrode and the second sub-electrode both extend along the second direction, the second sub-electrode is arranged between adjacent first sub-electrodes in the first direction, and a third hollow is defined between the second sub-electrode and the first sub-electrode; and / or,

[0037] A fourth hollow is formed between the adjacent second sub-electrodes in the first direction.

[0038] In some embodiments, an orthographic projection of the connecting portion on the substrate layer does not overlap with an orthographic projection of the data signal line on the substrate layer.

[0039] According to a second aspect of the embodiments of the present application, a display device is provided, including:

[0040] Any display panel as described in the first aspect above.

[0041] In the display panel provided by the embodiment of the present application, the orthographic projection edge of the gate portion on the substrate layer surrounds the orthographic projection edge of the drain portion on the substrate layer. By setting the orthographic projection edge of the connecting portion close to the drain portion to match the shape of the orthographic projection edge of the drain portion close to the connecting portion, the orthographic projection edges of the connecting portion and the drain portion have an angle with the first direction, so that the distance between the orthographic projection edge of the connecting portion close to the drain portion and the orthographic projection edge of the gate signal line close to the drain portion can be shortened, and the orthographic projection edge of the connecting portion close to the drain portion can fall inside the orthographic projection edge of the gate portion on the substrate layer, so that the two orthographic projection edges close to the connecting portion and the gate signal line can be shortened. The chaotic edge electric field formed between the shadow edges is close to the drain portion and away from the gate signal line. Therefore, while reducing the distance between the gate signal line and the edge of the light-emitting area in the sub-pixel area and increasing the light output of the sub-pixel area, the light leakage can be blocked by a shading structure with a larger shading area around the gate portion, which can suppress the dark state light leakage phenomenon of the display panel. In addition, the shape of the orthographic projection edge of the connecting portion close to the drain portion is matched with the shape of the orthographic projection edge of the drain portion close to the connecting portion, which can increase the distance between the light leakage area of ​​the chaotic edge electric field and the opening area, so that the shading structure can block the dark state light leakage, thereby improving the display effect of the display picture and the display performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solution of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0043] Figure 1 A schematic structural diagram of a display panel provided in an embodiment of the present application;

[0044] Figure 2 A schematic structural diagram of another display panel provided in an embodiment of the present application;

[0045] Figure 3 A schematic structural diagram of an existing display panel provided in an embodiment of the present application;

[0046] Figure 4 A schematic structural diagram of another display panel provided in an embodiment of the present application;

[0047] Figure 5 A schematic structural diagram of a common electrode layer provided in an embodiment of the present application;

[0048] Figure 6 A schematic structural diagram of another display panel provided in an embodiment of the present application;

[0049] Figure 7A schematic structural diagram of a display panel provided in an embodiment of the present application;

[0050] Figure 8 A schematic structural diagram of another display panel provided in an embodiment of the present application;

[0051] Figure 9 A schematic structural diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0052] The embodiments will be described in detail below, and examples thereof are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation methods described in the following embodiments do not represent all implementation methods consistent with the present application. They are only examples of systems and methods consistent with some aspects of the present application as detailed in the claims. In the several embodiments provided in the embodiments of the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways, and the device embodiments described below are merely exemplary.

[0053] In this application, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is only for the purpose of facilitating the description of this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, it should not be understood as a limitation on this application. The positional relationships of constituent elements are appropriately changed according to the direction in which the constituent elements are described. Therefore, the words and phrases are not limited to those described in the specification and can be appropriately replaced according to the circumstances.

[0054] This application describes exemplary embodiments with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0055] With the advancement and development of transparent display technology, the requirements for the display performance of liquid crystal display panels are gradually increasing. The display principle of liquid crystal display panels is to control the deflection angle of liquid crystal molecules by controlling the voltage difference between the pixel electrode and the common electrode. This controls the amount of light emitted by the backlight module through the liquid crystal layer, and controls the brightness of each display pixel in the display panel to achieve the display image.

[0056] A certain overlapping area is usually formed between the gate signal line and the common electrode inside the existing liquid crystal display panel, resulting in a disordered edge electric field at the edge of the overlapping area, causing the actual deflection angle formed by the liquid crystal molecules to be different from the deflection angle formed by the liquid crystal molecules under the action of the pixel voltage. As a result, the light emitted by the backlight module will be emitted through the edge of the overlapping area of ​​the common electrode layer, further weakening the shading effect of the shading structure in the display panel, causing dark state light leakage in the display panel, affecting the display effect of the display image and the display performance of the display panel.

[0057] In view of this, embodiments of the present application provide a display panel and a display device, which can suppress the dark-state light leakage phenomenon of the display panel, improve the display effect of the display image and the display performance of the display panel.

[0058] For example, Figure 1 This is a schematic structural diagram of a display panel provided in an embodiment of the present application. Figure 1 As shown, in a first aspect of an embodiment of the present application, a display panel is provided, comprising: a substrate layer 100, a first conductive layer 200, a second conductive layer 300, and a common electrode layer 400. The first conductive layer 200 is disposed on one side of the substrate layer 100, the second conductive layer 300 is disposed on a side of the first conductive layer 200 away from the substrate layer 100, and the common electrode layer 400 is disposed on a side of the second conductive layer 300 away from the substrate layer 100. The first conductive layer 200 includes a plurality of gate portions and a plurality of gate signal lines, wherein the gate portions are connected to the gate signal lines in a first direction X, and the gate portions and the gate signal lines are alternately disposed in the first direction X. The second conductive layer 300 includes a source portion, a drain portion, and a data signal line, wherein the data signal line extends along a second direction Y, and the first direction X intersects with the second direction Y.

[0059] For example, Figure 2 This is a schematic structural diagram of another display panel provided in an embodiment of the present application. Figure 2As shown, the first conductive layer 200 includes multiple gate portions 201 and multiple gate signal lines 202, the second conductive layer 300 includes a source portion 301, a drain portion 302 and a data signal line 303, the data signal line 303 is electrically connected to the drain portion 302, the common electrode layer 400 includes multiple sub-pixel regions 401, the sub-pixel region 401 is shown by a dotted line, the common electrode layer 400 includes a connecting portion 410 and an electrode portion 420, the electrode portion 420 is arranged in the sub-pixel region 401, the connecting portion 410 is arranged between adjacent sub-pixel regions 401 in the second direction Y, and the connecting portion 410 is connected to the electrode portion 420. The orthographic projection of the connecting portion 410 on the substrate layer 100 does not overlap with the orthographic projection of the drain portion 302 on the substrate layer 100. The orthographic projection edge of the connecting portion 410 on the side close to the drain portion 302 matches the orthographic projection edge of the drain portion 302 on the side close to the connecting portion 410. The orthographic projection edges of the connecting portion 410 and the drain portion 302 form an angle with the first direction X. The connecting portion 410 is connected to the electrode portion 420 at the edge of the sub-pixel region 401. The connecting portion 410 spans the edges of the adjacent sub-pixel regions 401 in the second direction Y. Figure 2 The source portion 301, the drain portion 302 and the gate portion 201 together form a U-shaped driving transistor. In practical applications, the source portion 301, the drain portion 302 and the gate portion 201 can be in other shapes.

[0060] refer to Figure 1 , L1 is the orthographic projection edge of the drain portion 302 close to the connecting portion 410 on the substrate layer 100 , L2 is the orthographic projection edge of the connecting portion 410 close to the drain portion 302 on the substrate layer 100 , and L1 and L2 are parallel to each other.

[0061] Exemplarily, the common electrode layer 400 can be disposed on a side of the first conductive layer 200 close to the substrate layer 100, or on a side of the first conductive layer 200 away from the substrate layer 100. The orthographic projection edge of the connecting portion 410 close to the drain portion 302 is matched in shape with the orthographic projection edge of the drain portion 302 close to the connecting portion 410. The orthographic projection edge of the connecting portion 410 close to the drain portion 302 and the orthographic projection edge of the drain portion 302 close to the connecting portion 410 can be parallel to, or overlap with, the orthographic projection edge of the drain portion 302 close to the connecting portion 410, or the angle between the two is less than a preset angle, so as to increase the minimum distance between the light leakage boundary of the connecting portion 410 and the drain portion 302 and the sub-pixel region 401, reduce the amount of light leakage in the opening area of ​​the display panel, and improve the display performance of the display panel.

[0062] For example, Figure 3 This is a schematic structural diagram of an existing display panel provided in an embodiment of the present application. Figure 3As shown, a conventional display panel includes: a substrate layer 100, a first conductive layer 200, a second conductive layer 300, a common electrode layer 400, and a touch signal line 600. The touch signal line 600 is disposed between two adjacent gate portions 201 in a first direction X. The orthographic projection of the touch signal line 600 on the substrate layer 100 overlaps with the orthographic projection of the gate signal line 202 on the substrate layer 100. The common electrode layer 400 includes a connecting portion 410 and an electrode portion 420. Within the portion indicated by the elliptical solid line, a portion of the orthographic projection edge of the connecting portion 410 on the substrate layer 100 falls within the orthographic projection edge of the gate signal line 202 on the substrate layer 100. Within the portion indicated by the rectangular dashed line, the orthographic projection edge of the connecting portion 410 near the drain portion 302 does not match the shape of the orthographic projection edge of the drain portion 302 near the connecting portion 410.

[0063] It should be noted that Figure 3 The portion indicated by the solid ellipse and the portion indicated by the dotted rectangular line are two light leakage points on the existing display panel. Within the portion indicated by the solid ellipse, the orthographic projection of one end of the gate signal line 202 in the first direction X on the substrate layer overlaps with the orthographic projection of the connecting portion 410 on the substrate layer, while the orthographic projection of the other end on the substrate layer does not overlap with the orthographic projection of the connecting portion 410 on the substrate layer. An electric field is formed between the gate signal line 202 and the connecting portion 410 in the region where the orthographic projections overlap, forming a uniform electrostatic field within the overlapping region and a disordered fringe electric field at the edge of the overlapping region. The deflection angles of the liquid crystal molecules in the fringe electric field are different from those in the electrostatic field environment, and the deflection angles of the liquid crystal molecules in the fringe electric field are difficult to control. This easily causes the light emitted by the backlight template through the liquid crystal molecules to have different light emission angles in the electrostatic field region and the fringe electric field region, resulting in the inability of the light shielding layer to effectively shield light, leading to dark-state light leakage in the display panel, affecting the display effect of the display image and the display performance of the display panel.

[0064] In the portion shown by the rectangular dotted line, in the second direction Y, a portion of the orthographic edge of the connecting portion 410 on the side close to the drain portion 302 on the substrate layer 100 falls within the orthographic edge of the first conductive layer 200 on the substrate layer 100, so that at the edge of the portion of the connecting portion 410 whose orthographic projection falls within the orthographic edge of the first conductive layer 200 on the substrate layer 100, a fringe electric field is formed between the connecting portion 410 and the first conductive layer 200, resulting in difficulty in controlling the deflection angle of the liquid crystal molecules. At the same time, since the distance between the connecting portion 410 with the presence of the fringe electric field in the portion shown by the rectangular dotted line and the sub-pixel area 401 is relatively close, the shading ability of the shading structure in the shading layer to the dark state light leakage area is limited, further causing dark state light leakage of the display panel.

[0065] Therefore, light leakage will occur at the edge of the intersection of the gate signal line 202 and the connecting portion 410 in the existing display panel, and the distance between the edge of the light leakage area and the edge of the opening area of ​​the shading layer is relatively close. Without increasing the size of the shading structure, the shading structure has limited ability to block light leakage, which will cause light leakage in the opening area, affecting the display effect of the display image and the display performance of the display panel.

[0066] It should be noted that the display panel provided in the embodiment of the present application can integrate the display driver and the touch driver in one driver circuit. For example, a TDDI driver chip is used, and the display driver and the touch driver are integrated in one driver chip. The display driver and the touch signal lines are arranged more densely, which makes it more likely to produce dark-state light leakage. The embodiment of the present application can improve the problem of dark-state light leakage by setting the structural shapes of the gate signal lines, common electrodes and touch signal lines to be coordinated, avoided or overlapped. The improvement of the light leakage problem of the display panel in which the display driver and the touch driver are integrated in one driver chip is particularly obvious.

[0067] In the display panel provided by the embodiment of the present application, the orthographic projection edge of the gate portion 201 on the substrate layer 100 surrounds the orthographic projection edge of the drain portion 302 on the substrate layer 100. By setting the orthographic projection edge of the connecting portion 410 close to the drain portion 302 to match the shape of the orthographic projection edge of the drain portion 302 close to the connecting portion 410, the orthographic projection edges of the connecting portion 410 and the drain portion 302 match each other at an angle with the first direction X, so that the distance between the orthographic projection edge of the connecting portion 410 close to the drain portion 302 and the orthographic projection edge of the gate signal line close to the drain portion 302 can be shortened, and the orthographic projection edge of the connecting portion 410 close to the drain portion 302 can fall inside the orthographic projection edge of the gate portion 201 on the substrate layer 100, thereby The chaotic edge electric field formed between the two orthographic projection edges of the connecting portion 410 and the gate signal line is close to the drain portion 302 and away from the gate signal line. As a result, the distance between the gate signal line and the edge of the light-emitting area in the sub-pixel area 401 can be reduced, and the light output of the sub-pixel area 401 can be increased. The light leakage is blocked by the shading structure with a larger shading area around the gate portion 201, which can suppress the dark state light leakage phenomenon of the display panel. The orthographic projection edge of the connecting portion close to the drain portion is matched with the orthographic projection edge shape of the drain portion close to the connecting portion, which can increase the distance between the light leakage area of ​​the chaotic edge electric field and the opening area, so that the shading structure can block the dark state light leakage, further improving the display effect of the display screen and the display performance of the display panel.

[0068] In some feasible embodiments, the display panel further includes: a light-shielding layer, which is arranged on the side of the common electrode layer 400 away from the substrate layer 100, and the light-shielding layer includes multiple openings, the orthographic projections of the openings on the substrate layer 100 do not overlap with the orthographic projections of the source portion 301 on the substrate layer 100, the orthographic projections of the openings on the substrate layer 100 do not overlap with the orthographic projections of the drain portion 302 on the substrate layer 100, and the orthographic projections of the openings on the substrate layer 100 do not overlap with the orthographic projections of the data signal line 303 on the substrate layer 100; the orthographic projection edge of the connecting portion 410 on the substrate layer 100 close to the drain portion 302 is matched with the shape of the orthographic projection edge of the opening on the substrate layer 100 close to the drain portion 302.

[0069] For example, Figure 4 This is a schematic structural diagram of another display panel provided in an embodiment of the present application. Figure 4 As shown, the display panel includes: a substrate layer 100, a first conductive layer 200, a second conductive layer 300, a common electrode layer 400 and a light shielding layer, wherein the light shielding layer is provided on the side of the common electrode layer 400 away from the substrate layer 100, and the light shielding layer includes a plurality of openings 500. The orthographic projection edge of the connecting portion 410 on the side close to the drain portion 302 on the substrate layer 100 matches the orthographic projection edge of the opening 500 on the side close to the drain portion 302 on the substrate layer 100. Among them, L3 is the orthographic projection edge of the opening 500 on the side close to the drain portion 302 on the substrate layer 100, combined with Figure 1 , L3 cooperates with L2.

[0070] Exemplarily, the display panel includes an array substrate and a color filter substrate. The array substrate is provided with an underlayer 100, a first conductive layer 200, a second conductive layer 300, and a common electrode layer 400. The color filter substrate is provided with a light shielding layer. The array substrate and the color filter substrate are aligned, with liquid crystal molecules disposed between them, so that the array substrate and the color filter substrate form a liquid crystal cell.

[0071] Exemplarily, the matching of the orthographic edge shapes includes that the orthographic edge of the connecting portion 410 on the substrate layer 100 close to the drain portion 302 is parallel to or coincides with the orthographic edge of the opening 500 on the substrate layer 100 close to the drain portion 302, or the angle between the two is less than a preset threshold.

[0072] It should be noted that the angle between the orthographic projection edge of the connecting portion 410 on the side close to the drain portion 302 on the substrate layer 100 and the orthographic projection edge of the opening 500 on the side close to the drain portion 302 on the substrate layer 100 is too large, which will cause the distance between at least one end point of the edge in its extension direction and the edge of the opening to be smaller, resulting in light leakage.

[0073] In the display panel provided by the embodiment of the present application, the shape of the orthographic projection edge of the connecting portion 410 on the substrate layer 100 close to the drain portion 302 is matched with the shape of the orthographic projection edge of the opening 500 on the substrate layer 100 close to the drain portion 302, which can further increase the distance between the light leakage edge and the edge of the opening 500, improve the shielding effect of the light shading structure in the light shading layer on the leakage light, and improve the display effect of the display picture and the display performance of the display panel.

[0074] In some feasible implementations, the orthographic projection edge of the gate portion 201 on the substrate layer 100 close to the opening 500 matches the orthographic projection edge of the opening 500 on the substrate layer 100 close to the gate portion 201 .

[0075] Illustratively, the orthographic projection edge of the drain portion 302 on the substrate layer 100 close to the gate portion 201 matches the orthographic projection edge of the gate portion 201 on the substrate layer 100 close to the drain portion 302 .

[0076] The display panel provided in the embodiment of the present application can further improve the shielding effect of the shading layer and enhance the display effect of the display screen by matching the shape of the orthographic projection edge of the gate portion 201 on the substrate layer 100 close to the opening 500 with the shape of the orthographic projection edge of the opening 500 on the substrate layer 100 close to the gate portion 201.

[0077] In some feasible implementations, the connecting portion 410 includes a first hollow, and the orthographic projection edge of the gate signal line 202 on the substrate layer 100 falls inside the orthographic projection edge of the first hollow on the substrate layer 100 .

[0078] For example, Figure 5 Schematic diagram of the structure of a common electrode layer 400 provided in an embodiment of the present application. Figure 5 As shown, the common electrode layer 400 includes a first hollow 431 .

[0079] Illustratively, in the second direction Y, the orthographic projection edge of the gate signal line 202 on the substrate layer 100 falls within the orthographic projection edge of the first hollow 431 on the substrate layer 100, and in the first direction X, the orthographic projection edge of the first hollow 431 on the substrate layer 100 falls within the orthographic projection edge of the gate portion 201 on the substrate layer 100. Therefore, the orthographic projection of the connecting portion 410 on the substrate layer 100 can completely fall within the orthographic projection edge of the gate portion 201 on the substrate layer 100, so that the gate portion 201 can form an electric field shielding for the connecting portion 410 without generating a fringe electric field and causing light leakage.

[0080] Illustratively, in the second direction Y, the orthographic projection edge of the gate signal line 202 on the substrate layer 100 falls inside the orthographic projection edge of the first hollow 431 on the substrate layer 100, and in the first direction X, the orthographic projection of the connecting portion 410 on the substrate layer 100 partially overlaps with the orthographic projection of the gate signal line 202 on the substrate layer 100.

[0081] In the display panel provided by the embodiment of the present application, the connection portion 410 and the gate signal line 202 have no overlapping area in their orthographic projections on the substrate layer 100, so that the edge of the overlapping electric field formed between the connection portion 410 and the first conductive layer 200 is closer to the drain portion 302, and an edge electric field is formed at the edge of the first hollow 431 on the side close to the drain portion 302, thereby increasing the distance between the light leakage area and the edge of the opening 500 area, improving the light shading ability of the light shading structure, suppressing light leakage, and improving the display effect of the display image and the display performance of the display panel.

[0082] In some feasible embodiments, the orthographic edge of the first hollow 431 on the side close to the drain portion 302 on the substrate layer 100 is matched with the shape of the orthographic edge of the drain portion 302 on the side close to the first hollow 431 on the substrate layer 100; the orthographic edge of the first hollow 431 matched with the drain portion 302 has an angle with the first direction X.

[0083] The display panel provided in the embodiment of the present application can shorten the distance between the orthographic edge of the first hollow 431 on the substrate layer 100 close to the drain portion 302 and the orthographic edge of the drain portion 302 on the substrate layer 100 by coordinating the shape of the orthographic edge of the first hollow 431 on the substrate layer 100 close to the drain portion 302, thereby further increasing the distance between the edge of the light leakage area and the edge of the opening 500 area, improving the light shading ability of the light shading structure, suppressing light leakage, and improving the display effect of the display image and the display performance of the display panel.

[0084] In some feasible embodiments, the display panel includes a light-shielding layer, which is arranged on the side of the common electrode layer 400 away from the substrate layer 100, and the light-shielding layer includes a plurality of openings 500; the orthographic projection edge of the first hollow 431 on the substrate layer 100 close to the drain portion 302 is matched with the shape of the orthographic projection edge of the opening 500 on the substrate layer 100 close to the connecting portion 410.

[0085] In the display panel provided by the embodiment of the present application, the orthographic projection edge of the first hollow 431 on the substrate layer 100 close to the drain portion 302 is matched with the orthographic projection edge shape of the opening 500 on the substrate layer 100 close to the connecting portion 410, which can further increase the distance between the edge of the light leakage area and the edge of the opening 500 area, improve the light shading ability of the shading structure, suppress light leakage, and improve the display effect of the display image and the display performance of the display panel.

[0086] In some feasible implementations, the sub-pixel region 401 corresponds to the region where the first hollow 431 is located in the second direction Y.

[0087] refer to Figure 4 In the first direction X, the connection portions 410 on both sides of the first hollow 431 span the edges of the adjacent sub-pixel regions 401 in the second direction Y and are connected to the electrode portions 420 at the edges of the sub-pixel regions 401 .

[0088] It should be noted that the connecting portions 410 on both sides of the first hollow 431 span the edges of the adjacent sub-pixel areas 401 in the second direction Y and are connected to the electrode portions 420 at the edges of the sub-pixel areas 401, which can further increase the distance between the two edges of the first hollow 431 in the first direction X, thereby further shortening the distance between the light leakage area and the drain electrode portion 302, increasing the distance between the edge of the light leakage area and the edge of the opening 500 area, improving the light shading ability of the light shading structure, suppressing light leakage, and improving the display effect of the display image and the display performance of the display panel.

[0089] In some feasible embodiments, the connecting portion 410 includes a sub-connecting portion, which is arranged on one or both sides of the sub-pixel area 401 extending along the second direction Y; and a first hollow 431 is provided between the two sub-connecting portions arranged on both sides of the sub-pixel area 401 along the second direction Y.

[0090] refer to Figure 5 The connecting portion 410 includes a first sub-connecting portion 411 and a second sub-connecting portion 412. The first sub-connecting portion 411 and the second sub-connecting portion 412 are respectively arranged on both sides of the sub-pixel area 401 extending along the second direction Y, and a first hollow 431 is provided between the first sub-connecting portion 411 and the second sub-connecting portion 412.

[0091] The display panel provided in the embodiment of the present application can improve the bonding ability of the connecting portion 410, reduce the risk of breakage of the connecting portion 410, improve the safety and reliability of the display panel, and improve the display performance of the display panel by setting two sub-connecting portions to connect two adjacent sub-pixel areas 401 in the second direction Y.

[0092] In some feasible implementations, when the connection portion 410 includes one sub-connection portion, the sub-connection portions arranged in the second direction Y are alternately disposed on different sides of the sub-pixel region 401 .

[0093] Exemplarily, among two adjacent connection portions 410 in the second direction Y, one connection portion 410 includes a first sub-connection portion 411 , and the other connection portion 410 includes a second sub-connection portion 412 .

[0094] Exemplarily, when the connection portion 410 includes one sub-connection portion, the sub-connection portions arranged in the second direction Y are all disposed on different sides of the sub-pixel region 401. For example, adjacent connection portions 410 in the second direction Y each include a first sub-connection portion 411, or adjacent connection portions 410 in the second direction Y each include a second sub-connection portion 412.

[0095] The display panel provided in the embodiment of the present application can reduce the number of sub-connection portions in the connection portion 410 by setting a sub-connection portion in the connection portion 410, thereby reducing the number of fringe electric fields between the connection portion 410 and the first conductive layer 200, reducing the light leakage area, and improving the display effect of the display panel. At the same time, by alternately setting the sub-connection portions arranged in the second direction Y on different sides of the sub-pixel area 401, the different connection portions 410 arranged in the second direction Y can be uniformly stressed, further reducing the risk of breakage of the common electrode layer 400, improving the safety and reliability of the display panel, and improving the display performance of the display panel.

[0096] In some feasible implementations, the extension directions of the two sub-connection portions disposed on both sides of the sub-pixel region 401 along the second direction Y intersect.

[0097] The display panel provided in the embodiment of the present application can form an angle between the edge of at least one sub-connection portion on the side close to the drain portion 302 and the first direction X by arranging the extension directions of the two sub-connection portions arranged on both sides near the sub-pixel area 401 along the second direction Y to intersect, so that the distance between the edge of the light leakage area and the edge of the opening 500 area can be increased when a fringe electric field exists between the sub-connection portion and the first conductive layer 200, thereby improving the light shading ability of the shading structure, suppressing light leakage, and improving the display effect of the display image and the display performance of the display panel.

[0098] In some feasible implementations, the connecting portion 410 includes a second hollow, and an orthographic projection edge of the second hollow on the substrate layer 100 coincides with an orthographic projection edge of the gate signal line 202 on the substrate layer 100 .

[0099] For example, Figure 6This is a schematic structural diagram of another display panel provided in an embodiment of the present application. Figure 6 As shown, the display panel includes: a substrate layer 100, a first conductive layer 200, a second conductive layer 300, and a common electrode layer 400. The common electrode layer 400 includes a connecting portion 410 and an electrode portion 420. The connecting portion 410 includes a second hollow 432. The orthographic projection edge of the second hollow 432 on the substrate layer 100 coincides with the orthographic projection edge of the gate signal line 202 on the substrate layer 100.

[0100] It should be noted that when the positive projection edge of the second hollow 432 on the substrate layer 100 coincides with the positive projection edge of the gate signal line 202 on the substrate layer 100, there is no electric field between the connecting portion 410 and the gate signal line 202, so no edge electric field will be generated to interfere with the deflection of the liquid crystal molecules, so no light leakage will occur, thereby improving the display effect of the display screen and the display performance of the display panel.

[0101] In some feasible implementations, the orthographic projection edge of the second hollow 432 on the substrate layer 100 falls inside the orthographic projection edge of the gate signal line 202 on the substrate layer 100 .

[0102] In the display panel provided in the embodiment of the present application, a partially overlapping electric field is formed between the connecting portion 410 and the gate signal line 202, and the orthographic projection of the electric field edge on the substrate layer 100 falls inside the orthographic projection edge of the gate signal line 202 on the substrate layer 100, and no light leakage occurs, thereby improving the display effect of the display screen and the display performance of the display panel.

[0103] In some feasible implementations, the orthographic projection of the connecting portion 410 on the substrate layer 100 completely covers the orthographic projection of the gate signal line 202 between two adjacent gate portions 201 in the first direction X on the substrate layer 100 .

[0104] For example, Figure 7 This is a schematic structural diagram of a display panel provided in an embodiment of the present application. Figure 7 As shown, the display panel includes: a substrate layer 100, a first conductive layer 200, a second conductive layer 300, and a common electrode layer 400. The common electrode layer 400 includes a connecting portion 410 and an electrode portion 420. The orthographic projection of the connecting portion 410 on the substrate layer 100 completely covers the orthographic projection of the gate signal line 202 between two adjacent gate portions 201 in the first direction X on the substrate layer 100.

[0105] It should be noted that in Figure 7In the illustrated case, the connecting portion 410 can form an electric field shield for the gate signal line 202, thereby preventing a fringe electric field from being generated to affect the deflection of the liquid crystal molecules, thereby improving the display effect of the display image and the display performance of the display panel.

[0106] In some feasible embodiments, the minimum distance between the edge of the connection portion 410 away from the source portion 301 and the source portion 301 is greater than the minimum distance between the edge of the gate signal line 202 away from the source portion 301 and the source portion 301 .

[0107] For example, Figure 8 This is a schematic structural diagram of another display panel provided in an embodiment of the present application. Figure 8 As shown, the display panel includes: a substrate layer 100, a first conductive layer 200, a second conductive layer 300, and a common electrode layer 400. The minimum distance between the edge of the gate signal line 202 away from the source portion 301 and the source portion 301 is H1, and the minimum distance between the edge of the connecting portion 410 away from the source portion 301 and the source portion 301 is H2, where H1 is smaller than H2.

[0108] The display panel provided in the embodiment of the present application is over-covered by the connecting portion 410 to form an electric field shielding for the gate signal line 202, thereby preventing the gate signal line 202 from being flush with the edge of the connecting portion 410 on the side away from the source portion 301, or the orthographic projection edge of the connecting portion 410 on the side away from the source portion 301 on the substrate layer 100 falls inside the orthographic projection edge of the gate signal line 202 on the substrate layer 100, resulting in the formation of a fringe electric field at the edge of the connecting portion 410 on the side away from the source portion 301, causing the deflection of liquid crystal molecules and causing light leakage in the display panel, thereby improving the display effect of the display image and the display performance of the display panel.

[0109] In some feasible implementations, at least a portion of an edge of the gate portion 201 away from the source portion 301 is flush with an edge of the gate signal line 202 away from the source portion 301 .

[0110] refer to Figure 7 The edge of the gate portion 201 away from the source portion 301 is flush with the edge of the gate signal line 202 away from the source portion 301 .

[0111] The display panel provided by the embodiment of the present application can increase the distance between the gate signal line 202 and the source portion 301, thereby preventing the gate signal line 202 from causing signal interference to other signal lines.

[0112] In some feasible embodiments, the gate portion 201 includes a gate middle section, a first gate end, and a second gate end. The gate middle section is connected between the first gate end and the second gate end. The gate signal line 202 is connected to the gate middle section. The first gate end and the second gate end are the two ends of the gate portion 201 in the second direction Y. The edge of the first gate end away from the gate signal line 202 exceeds the edge of the gate signal line 202 close to the first gate end. The edge of the second gate end away from the gate signal line 202 exceeds the edge of the gate signal line 202 close to the second gate end.

[0113] refer to Figure 8 The first conductive layer 200 includes a plurality of alternating gate portions 201 and gate signal lines 202. The gate portions 201 include a gate middle section, a first gate end, and a second gate end. The first gate end is the end of the gate portion 201 that is closer to the source portion 301 in the second direction Y, and the second gate end is the end of the gate portion 201 that is farther from the source portion in the second direction Y. The gate middle section is located between the first gate end and the second gate end. The edge of the first gate end that is closer to the source portion 301 extends beyond the edge of the gate signal line 202 that is closer to the source portion 301, and the edge of the second gate end that is farther from the source portion 301 extends beyond the edge of the gate signal line 202 that is farther from the source portion 301. The common electrode layer 400 includes a connecting portion 410 and an electrode portion 420. The orthographic projection of the connecting portion 410 on the substrate layer 100 completely covers the orthographic projection of the gate signal line 202 between two adjacent gate portions 201 in the first direction X on the substrate layer 100.

[0114] Exemplarily, the gate signal line 202 may be a segment of electrode lead extending entirely along the first direction, or may be formed by connecting multiple segments of lead extending along different directions, thereby facilitating avoidance of other components in the circuit.

[0115] The display panel provided by the embodiment of the present application increases the distance between the edge of the gate signal line 202 on the side away from the source portion 301 and the edge of the connecting portion 410 on the side away from the source portion 301 by arranging the gate signal line 202 toward the side close to the source portion 301. This can increase the distance between the edge of the opening 500 area on the side away from the source portion 301 and the edge of the gate signal line 202 on the side away from the source portion 301, further improving the light shading ability of the light shading structure, and further reducing the risk of light leakage of the display panel, thereby improving the display effect of the display image and the display performance of the display panel.

[0116] In some feasible embodiments, the display panel further includes: a touch electrode layer, the touch electrode layer including a plurality of touch signal lines extending along the second direction Y, the touch signal lines being arranged between two adjacent gate portions 201 in the first direction X, and the orthographic projection of the touch signal lines on the substrate layer 100 overlapping with the orthographic projection of the gate signal lines 202 on the substrate layer 100.

[0117] refer to Figure 1 The display panel further includes a touch signal line 600 extending along the second direction Y, and a plurality of touch signal lines 600 together form a touch electrode layer.

[0118] The display panel provided in the embodiment of the present application can realize touch control of the display panel by providing a touch electrode layer, thereby improving the practicality and display performance of the display panel.

[0119] In some feasible embodiments, when the distances between the touch signal line 600 and two adjacent drain portions 302 are not equal, and the connecting portion 410 includes a first hollow 431 , the orthographic projection of the first hollow 431 on the substrate layer 100 does not overlap with the orthographic projection of the touch signal line 600 on the substrate layer 100 .

[0120] refer to Figure 4 and Figure 6 The distances between the touch signal line 600 and the two adjacent source portions 301 in the first direction X are not equal, the connecting portion 410 includes a first hollow 431 , and the orthographic projection of the first hollow 431 on the substrate layer 100 does not overlap with the orthographic projection of the touch signal line 600 on the substrate layer 100 .

[0121] refer to Figure 7 , the distance between the touch signal line 600 and the two adjacent source portions 301 in the first direction X is equal, the orthographic projection of the touch signal line 600 on the substrate layer 100 partially overlaps with the orthographic projection of the gate signal line 202 on the substrate layer 100, the orthographic projection of the connecting portion 410 on the substrate layer 100 covers the overlapping portion of the orthographic projections of the touch signal line 600 and the gate signal line 202 on the substrate layer 100, and the orthographic projection of the connecting portion 410 on the substrate layer 100 covers the orthographic projection of the data signal line 202 on the substrate layer 100.

[0122] When the distances between the touch signal line 600 and the two adjacent drain portions 302 are equal, the area where the touch signal line 600 intersects the gate signal line 202 may also generate a fringe electric field. When a hollow structure is provided on the connecting portion 410 to shield the above-mentioned fringe electric field, the area where the hollow edge intersects the gate signal line 202 will be close to the center point of the line connecting the two drain portions 302, corresponding to the edge of the opening 500 area. Figure 4It can be seen that the edge of the opening 500 area is closer to the gate signal line 202 around the center point of the line connecting the two drain portions 302, and the distance between the edge of the shading structure away from the source portion 301 and the edge of the gate signal line 202 away from the source portion 301 is closer. The shading structure has insufficient shading ability around the center point of the line connecting the two drain portions 302, which will cause light leakage.

[0123] In the display panel provided in the embodiment of the present application, a fringe electric field may exist at the edge where the touch signal line 600 overlaps with the gate signal line 202, and a fringe electric field may also exist at the edge where the touch signal line 600 overlaps with the connecting portion 410. Therefore, when the connecting portion 410 includes a first hollow 431, the orthographic projection of the first hollow 431 on the substrate layer 100 and the orthographic projection of the touch signal line 600 on the substrate layer 100 do not overlap, which can avoid light leakage caused by the fringe electric field of the touch signal line 600, thereby improving the display effect of the display screen and the display performance of the display panel.

[0124] In some feasible implementations, the orthographic projection edge of the first hollow 431 on the substrate layer 100 close to the touch signal line 600 matches the orthographic projection edge of the touch signal line 600 on the substrate layer 100 close to the first hollow 431 .

[0125] refer to Figure 4 and Figure 6 The display panel provided by the embodiment of the present application can reduce the distance between the orthographic projection edge of the first hollow 431 on the side close to the touch signal line 600 on the substrate layer 100 and the orthographic projection edge of the touch signal line 600 on the side close to the first hollow 431 on the substrate layer 100, thereby increasing the distance between the edge of the light leakage area and the edge of the opening 500 area, improving the shielding ability of the shading structure on the light leakage area, and further improving the display effect of the display screen and the display performance of the display panel.

[0126] In some feasible embodiments, the electrode portion 420 includes a first sub-electrode and a second sub-electrode, both of which extend along the second direction Y, and the second sub-electrode is arranged between adjacent first sub-electrodes in the first direction X, and there is a third hollow space between the second sub-electrode and the first sub-electrode.

[0127] refer to Figure 5 The electrode portion 420 includes a first sub-electrode 421 and a second sub-electrode 422. The first sub-electrode 421 is arranged inside the sub-pixel area 401, and the second sub-electrode 422 is arranged at the edge area of ​​the sub-pixel area 401. A third hollow 433 is arranged between the first sub-electrode 421 and the second sub-electrode 422.

[0128] The display panel provided in the embodiment of the present application can drive the deflection of liquid crystal molecules by forming an electric field through the second sub-electrode 422 to realize the display of a display image.

[0129] In some feasible implementations, a fourth hollow 434 is provided between adjacent second sub-electrodes 422 in the first direction X.

[0130] refer to Figure 5 , a fourth hollow 434 is provided between the adjacent second sub-electrodes 422 in the first direction X.

[0131] The display panel provided in the embodiment of the present application forms a common electric field through the second sub-electrodes 422 to drive the deflection of liquid crystal molecules to display a display image.

[0132] In some feasible implementations, the orthographic projection of the connecting portion 410 on the substrate layer 100 does not overlap with the orthographic projection of the data signal line 303 on the substrate layer 100 .

[0133] The display panel provided in the embodiment of the present application can shield the data signal line 303 from the electric field by covering the orthographic projection of the data signal line 303 on the substrate layer 100 through the orthographic projection of the first sub-electrode 421 on the substrate layer 100, thereby improving the display effect of the display screen and the display performance of the display panel.

[0134] For example, Figure 9 A display device is provided in an embodiment of the present application. Figure 9 As shown, the display device includes a display panel 1000. According to a second aspect of the embodiments of the present application, a display device is provided, including: the display panel 1000 as described in any one of the first aspects above.

[0135] The display device provided by the embodiment of the present application has an orthographic projection edge of the gate portion 201 on the substrate layer 100 surrounding an orthographic projection edge of the drain portion 302 on the substrate layer 100. By setting the orthographic projection edge of the connecting portion 410 close to the drain portion 302 to match the shape of the orthographic projection edge of the drain portion 302 close to the connecting portion 410, the orthographic projection edge of the connecting portion 410 matched with the drain portion 302 has an angle with the first direction X, so that the distance between the orthographic projection edge of the connecting portion 410 close to the drain portion 302 and the orthographic projection edge of the gate signal line 202 close to the drain portion 302 can be shortened, and the orthographic projection edge of the connecting portion 410 close to the drain portion 302 can be shortened. The orthographic projection edge can fall inside the orthographic projection edge of the gate portion 201 on the substrate layer 100, so that the chaotic edge electric field formed between the two orthographic projection edges close to the connecting portion 410 and the gate signal line 202 can be close to the drain portion 302 and away from the gate signal line 202. In addition, while reducing the distance between the gate signal line 202 and the edge of the light-emitting area in the sub-pixel area 401 and increasing the light output of the sub-pixel area 401, the light leakage can be blocked by the shading structure with a larger shading area around the gate portion 201, thereby suppressing the light leakage phenomenon of the display panel 1000 and improving the display effect of the display screen and the display performance of the display panel 1000.

[0136] It should be noted that the display device provided in the embodiments of the present application may include a smart phone, a tablet computer, a laptop computer, a television, and a smart wearable display device, etc. The smart wearable display device may include a smart watch, etc., and the embodiments of the present application do not make specific limitations.

[0137] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0138] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that: include: substrate layer; a first conductive layer disposed on one side of the substrate layer, the first conductive layer comprising a plurality of gate portions and a plurality of gate signal lines, the gate portions being connected to the gate signal lines in a first direction, and the gate portions and the gate signal lines being alternately disposed in the first direction; a second conductive layer disposed on a side of the first conductive layer away from the substrate layer, the second conductive layer comprising a source portion, a drain portion, and a data signal line, the data signal line being electrically connected to the drain portion, the data signal line extending along a second direction, the first direction intersecting the second direction; a common electrode layer disposed on the same side of the substrate layer and the first conductive layer, the common electrode layer including a plurality of sub-pixel regions, the common electrode layer including a connecting portion and an electrode portion, the electrode portion being disposed in the sub-pixel regions, the connecting portion being disposed between adjacent sub-pixel regions in the second direction, and the connecting portion being connected to the electrode portion; The orthographic projection of the connecting portion on the substrate layer does not overlap with the orthographic projection of the drain portion on the substrate layer, the orthographic projection edge of the connecting portion close to the drain portion matches the orthographic projection edge of the drain portion close to the connecting portion, and the orthographic projection edges of the connecting portion and the drain portion that match form an angle with the first direction; The connecting portion is connected to the electrode portion at an edge of the sub-pixel region, and the connecting portion spans across edges of the adjacent sub-pixel regions in the second direction.

2. The display panel according to claim 1, wherein: Also includes: a light shielding layer, the light shielding layer being arranged on a side of the common electrode layer away from the substrate layer, the light shielding layer comprising a plurality of openings, the orthographic projections of the openings on the substrate layer not overlapping with the orthographic projections of the source electrode portion on the substrate layer, the orthographic projections of the openings on the substrate layer not overlapping with the orthographic projections of the drain electrode portion on the substrate layer, and the orthographic projections of the openings on the substrate layer not overlapping with the orthographic projections of the data signal lines on the substrate layer; The orthographic projection edge of the connecting portion on the substrate layer close to the drain portion matches the orthographic projection edge of the opening on the substrate layer close to the drain portion; and / or, The shape of the orthographic projection edge of the gate portion on the substrate layer at a side close to the opening matches the shape of the orthographic projection edge of the opening on the substrate layer at a side close to the gate portion.

3. The display panel according to claim 1, wherein: The connecting portion includes a first hollow, and an orthographic projection edge of the gate signal line on the substrate layer falls inside an orthographic projection edge of the first hollow on the substrate layer.

4. The display panel according to claim 3, wherein: The orthographic projection edge of the first hollow portion close to the drain portion on the substrate layer matches the orthographic projection edge of the drain portion close to the first hollow portion on the substrate layer; An orthographic projection edge of the first hollow matched with the drain portion forms an angle with the first direction.

5. The display panel according to claim 3, wherein: The display panel includes a light shielding layer, the light shielding layer is arranged on a side of the common electrode layer away from the substrate layer, and the light shielding layer includes a plurality of openings; The orthographic projection edge of the first hollowing-out side close to the drain portion on the substrate layer matches the orthographic projection edge of the opening-close to the connecting portion on the substrate layer.

6. The display panel according to claim 3, wherein: The sub-pixel area corresponds to the area where the first hollowing is located in the second direction.

7. The display panel according to claim 1, wherein: The connecting portion includes a sub-connecting portion, and the sub-connecting portion is arranged close to one side or both sides of the sub-pixel area extending along the second direction; A first hollow is formed between two of the sub-connection portions arranged on both sides of the sub-pixel region along the second direction.

8. The display panel according to claim 7, wherein: In a case where the connection portion includes one sub-connection portion, the sub-connection portions arranged in the second direction are alternately disposed on different sides of the sub-pixel region.

9. The display panel according to claim 8, wherein: The extension directions of the two sub-connection portions arranged on both sides of the sub-pixel region along the second direction intersect with each other.

10. The display panel according to claim 1, wherein The connecting portion includes a second hollow, and an orthographic projection edge of the second hollow on the substrate layer coincides with an orthographic projection edge of the gate signal line on the substrate layer; or, The orthographic projection edge of the second hollow on the substrate layer falls inside the orthographic projection edge of the gate signal line on the substrate layer.

11. The display panel according to claim 1, wherein The orthographic projection of the connecting portion on the substrate layer completely covers the orthographic projection of the gate signal line between two adjacent gate portions in the first direction on the substrate layer.

12. The display panel according to claim 11, wherein: A minimum distance between an edge of the connection portion away from the source portion and the source portion is greater than a minimum distance between an edge of the gate signal line away from the source portion and the source portion.

13. The display panel according to claim 12, wherein: At least a portion of the edge of the gate portion away from the source portion is flush with the edge of the gate signal line away from the source portion; or The gate portion includes a gate middle section, a first gate end, and a second gate end. The gate middle section is connected between the first gate end and the second gate end. The gate signal line is connected to the gate middle section. The first gate end and the second gate end are the two ends of the gate portion in the second direction. The edge of the first gate end away from the gate signal line exceeds the edge of the gate signal line close to the first gate end. The edge of the second gate end away from the gate signal line exceeds the edge of the gate signal line close to the second gate end.

14. The display panel according to claim 1 or 3, characterized in that: Also includes: A touch electrode layer, the touch electrode layer comprising a plurality of touch signal lines extending along the second direction, the touch signal lines being arranged between two adjacent gate portions in the first direction, the orthographic projection of the touch signal lines on the substrate layer overlapping with the orthographic projection of the gate signal lines on the substrate layer.

15. The display panel according to claim 14, wherein: When the distances between the touch signal line and two adjacent drain portions are unequal and the connecting portion includes a first hollow, the orthographic projection of the first hollow on the substrate layer does not overlap with the orthographic projection of the touch signal line on the substrate layer.

16. The display panel according to claim 15, wherein: The orthographic projection edge of the first hollow on the substrate layer close to the touch signal line matches the orthographic projection edge of the touch signal line on the substrate layer close to the first hollow.

17. The display panel according to claim 1, wherein: The electrode portion includes a first sub-electrode and a second sub-electrode, the first sub-electrode and the second sub-electrode both extend along the second direction, the second sub-electrode is arranged between adjacent first sub-electrodes in the first direction, and a third hollow is defined between the second sub-electrode and the first sub-electrode; and / or, A fourth hollow is formed between the adjacent second sub-electrodes in the first direction.

18. The display panel according to claim 1, wherein An orthographic projection of the connecting portion on the substrate layer does not overlap with an orthographic projection of the data signal line on the substrate layer.

19. A display device, characterized in that: include: The display panel according to any one of claims 1 to 18.

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