Semiconductor manufacturing apparatus and method for manufacturing semiconductor device

Abstract

The invention provides a technology capable of improving positioning accuracy. The semiconductor manufacturing apparatus includes: an imaging device including a first camera that captures an image of a substrate having a reference mark and a tab region on which a bare chip is placed, a second camera that captures an image of the reference mark, and a lens unit; and a coaxial lighting device. The lens unit has: a first lens serving as an objective lens of the first camera; a second lens serving as an objective lens of the second camera; and a beam splitter that branches reflected light from a subject toward the first lens and the second lens.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor manufacturing apparatus, and can be applied to, for example, a die mounter for processing bare chips and substrates having position identification marks. Background Art

[0002] As one of the steps in the manufacturing process of semiconductor devices, bare chips separated from wafers are picked up and mounted on substrates. For example, a camera may be used to capture an image of the bare chip or substrate, and the bare chip or substrate may be positioned based on the image.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2022-98312 Summary of the Invention

[0006] For example, in the above-mentioned positioning, the edge of a position identification mark formed on a substrate or a bare chip is sometimes used as a reference position. In this case, it is sometimes difficult to obtain the position of the edge (reference position) with high accuracy.

[0007] The present disclosure aims to provide a technique capable of improving positioning accuracy. Other objects and novel features will become apparent from the description of this specification and the accompanying drawings.

[0008] The following briefly describes the typical outlines of the present disclosure.

[0009] Specifically, a semiconductor manufacturing apparatus includes an imaging device comprising a first camera, a second camera, and a lens unit, wherein the first camera images a substrate having a fiducial mark and a bonding area for placing a bare chip, and the second camera images the fiducial mark; and a coaxial illumination device. The lens unit includes a first lens serving as an objective lens for the first camera, a second lens serving as an objective lens for the second camera, and a beam splitter for splitting reflected light from an object into the first and second lenses.

[0010] Effects of the Invention

[0011] According to the present disclosure, positioning accuracy can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a schematic plan view showing a configuration example of a die mounter in the embodiment.

[0013] Figure 2 It means from Figure 1 A diagram showing the schematic structure when viewed in the direction of arrow A.

[0014] Figure 3 It shows Figure 1 A block diagram showing the schematic configuration of a control system for a die mounter.

[0015] Figure 4 It shows that the Figure 1 A flow chart showing a method for manufacturing a semiconductor device using a die mounter.

[0016] Figure 5 This is a diagram showing an example of an optical system of a mounting unit.

[0017] Figure 6 This is a diagram showing position identification marks and mounting centers provided on a substrate.

[0018] Figure 7 It is a diagram showing a cross section of a substrate having leads.

[0019] Figure 8 It shows Figure 7 A diagram showing the relationship of the leads to the lighting device.

[0020] Figure 9 It is a diagram illustrating a lighting device in an embodiment.

[0021] Figure 10 This is a diagram explaining the teaching operation.

[0022] Figure 11 This is a diagram illustrating production operations.

[0023] Figure 12 1 is a diagram showing the arrangement of an optical system of a mounting section in a first modification.

[0024] Figure 13 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a second modification.

[0025] Figure 14 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a third modified example.

[0026] Figure 15 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a fourth modification.

[0027] Figure 16 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a fifth modification.

[0028] The description of the accompanying drawings is as follows:

[0029] 1Chip mounter (semiconductor manufacturing equipment)

[0030] 44 substrate recognition camera (camera device)

[0031] 441 First Camera

[0032] 442 Second Camera

[0033] 443 Lens

[0034] 443a First lens

[0035] 443b Second lens

[0036] 443c Half Mirror (Beam Splitter)

[0037] 45 lighting fixtures DETAILED DESCRIPTION

[0038] The following describes the embodiments and variations using the accompanying drawings. However, in the following description, identical components may be denoted by the same reference numerals, and repeated descriptions may be omitted. It should be noted that, to clarify the description, the widths, thicknesses, and shapes of various components in the drawings may be schematically illustrated, compared to their actual form. Furthermore, the dimensional relationships and ratios of the various components in the multiple drawings are not necessarily consistent.

[0039] use Figure 1 as well as Figure 2 The configuration of a die mounter as one embodiment of the mounting apparatus will be described. Figure 1 It is a schematic plan view showing a configuration example of a die mounter in the embodiment. Figure 2 It means from Figure 1 A diagram showing the schematic structure when viewed in the direction of arrow A.

[0040] The die bonder 1 generally comprises a wafer supply unit 10, a pickup unit 20, an intermediate stage 30, a placement unit 40, a conveyor unit 50, a substrate supply unit 60, a substrate unloading unit 70, and a control unit (control device) 80. The Y2-Y1 direction represents the front-to-back direction of the die bonder 1, the X2-X1 direction represents the left-to-right direction, and the Z1-Z2 direction represents the up-down direction. The wafer supply unit 10 is located at the front of the die bonder 1, and the placement unit 40 is located at the rear.

[0041] The wafer supply unit 10 includes a wafer cassette elevator 11 , a wafer holding table 12 , a peeling unit 13 , and a wafer recognition camera 14 .

[0042] The cassette elevator 11 moves a wafer cassette (not shown) that holds multiple wafer rings WR up and down to a wafer transfer height. A wafer alignment chute (not shown) aligns the wafer rings WR supplied from the cassette elevator 11. A wafer unloader (not shown) removes wafer rings WR from the cassette and supplies them to the wafer holding table 12, or removes them from the wafer holding table 12 and stores them in the cassette.

[0043] A wafer W is bonded (attached) to the dicing tape DT. This wafer W is divided into a plurality of bare chips D. The dicing tape DT is held by a wafer ring WR. The wafer W is, for example, a semiconductor wafer or a glass wafer, and the bare chips D are semiconductor chips or glass chips. A thin film of adhesive material DF, known as die attach film (DAF), may be bonded between the wafer W and the dicing tape DT. The adhesive material DF is cured by heating.

[0044] The wafer holding table 12 is moved in the X1-X2 and Y1-Y2 directions by a drive unit (not shown), moving the picked-up bare chip D to the position of the peeling unit 13. Furthermore, the wafer holding table 12 is rotated by a drive unit (not shown) within the XY plane by a drive unit (not shown). The peeling unit 13 is moved in the vertical direction by a drive unit (not shown). The peeling unit 13 peels the bare chip D from the dicing tape DT.

[0045] The wafer recognition camera 14 recognizes the pickup position of the bare chip D picked up from the wafer W or performs surface inspection of the bare chip D.

[0046] The pickup unit 20 includes a pickup head 21 and a pickup head worktable 23. The pickup head 21 is provided with a collet chuck 22 at the front end, which sucks and holds the peeled bare chip D. The pickup head 21 picks up the bare chip D from the wafer supply unit 10 and places it on the intermediate table 31. The pickup head worktable 23 moves the pickup head 21 in the Z1-Z2 direction, the Y1-Y2 direction, and the X1-X2 direction. It should be noted that the pickup head worktable 23 can also rotate the pickup head 21.

[0047] The intermediate stage unit 30 includes an intermediate stage 31 on which a bare chip D is placed, and a stage recognition camera 34 for identifying the bare chip D on the intermediate stage 31. The intermediate stage 31 has suction holes for attracting the placed bare chip D. The placed bare chip D is temporarily held on the intermediate stage 31. The intermediate stage 31 serves as a placement stage for placing the bare chip D and also as a pickup stage for picking up the bare chip D.

[0048] The mounting section 40 includes a mounting head 41, a mounting head workbench 43, a substrate recognition camera 44, and a mounting table 46. The mounting head 41 is provided with a collet portion 42 for adsorbing and holding the bare chip D at the front end. The mounting head workbench enables the mounting head 41 to move in the Z1-Z2 direction, the Y1-Y2 direction, and the X1-X2 direction. It should be noted that the mounting head workbench 43 can also rotate the mounting head 41. The substrate recognition camera 44 photographs the substrate S and identifies the mounting position. Here, the substrate S includes, for example, a wiring substrate, a lead frame, a glass substrate, etc. A plurality of product areas (hereinafter referred to as package areas P) that eventually become one package are formed on the substrate S. In addition, a position recognition mark (not shown) of the package area P is formed on the substrate S. The mounting table 46 rises when the bare chip D is placed on the substrate S and supports the substrate S from below. The mounting table 46 has a suction port (not shown) for vacuum adsorption of the substrate S, which can fix the substrate S. The mounting stage 46 includes a heating portion (not shown) for heating the substrate S.

[0049] With this configuration, the placement head 41 corrects the pickup position and posture based on the image data from the stage recognition camera 34 and picks up the bare chip D from the intermediate stage 31. The placement head 41 then places the bare chip D on the package area P of the substrate S, or places the bare chip on top of a bare chip already placed on the package area P of the substrate S, based on the image data from the substrate recognition camera 44.

[0050] The transport unit 50 includes a transport claw 51 that grips and transports a substrate S, and a transport path 52 along which the substrate S moves. A ball screw (not shown) provided along the transport path 52 drives a nut (not shown) on the transport claw 51 of the transport path 52, thereby moving the substrate S in the X1 direction. With this configuration, the substrate S moves from the substrate supply unit 60 along the transport path 52 to the placement position. After placement, the substrate S moves to the substrate removal unit 70, where it is delivered.

[0051] The substrate supply unit 60 takes out the substrate S stored and carried in by the conveying jig from the conveying jig and supplies it to the conveying unit 50. The substrate unloading unit 70 stores the substrate S conveyed by the conveying unit 50 on the conveying jig.

[0052] Next, use Figure 3 The control unit 80 will be described. Figure 3 It shows Figure 1 A block diagram showing the schematic configuration of a control system for a die mounter.

[0053] The control system 8 is configured to include a control unit (control device) 80, a drive unit 86, a signal unit 87, and an optical system 88. The control unit 80 is generally a computer composed mainly of a control / calculation unit 81 composed of a CPU (Central Processing Unit), a storage device 82, an input / output device 83, a bus 84, and a power supply unit 85. The storage device 82 includes a main storage device 82a and an auxiliary storage device 82b. The main storage device 82a is composed of a RAM (Random Access Memory) that stores processing programs, etc. The auxiliary storage device 82b is composed of an HDD (Hard Disk Drive) or an SSD (Solid State Drive) that stores control data and image data required for control. Furthermore, an external storage device can be connected to the control unit 80.

[0054] The input / output device 83 includes a monitor 83a for displaying device status and information, a touch panel 83b for inputting operator instructions, a pointing device such as a mouse 83c for operating the monitor 83a, and an image acquisition device 83d for acquiring image data from the optical system 88. The input / output device 83 also includes a motor control unit 83e and an I / O signal control unit 83f. The motor control unit 83e controls the drive unit 86 for the XY stage (not shown) of the wafer supply unit 10, the pickup head stage 23, and the placement head stage 43. The I / O signal control unit 83f acquires signals from various sensors in the signal unit 87 and controls switches or knobs for controlling the brightness of the signal unit 87's lighting devices and valves for controlling vacuum suction. The optical system 88 includes the wafer recognition camera 14, the stage recognition camera 34, and the substrate recognition camera 44. The wafer recognition camera 14, the stage recognition camera 34, and the substrate recognition camera 44 digitize light intensity or color. The control / calculation device 81 acquires necessary data via the bus 84 and performs calculations to control the pickup head 21 and the like, and transmits information to the monitor 83 a and the like.

[0055] The control unit 80 stores the image data captured by the wafer recognition camera 14, the stage recognition camera 34, and the substrate recognition camera 44 in the storage device 82 via the image acquisition device 83d. Using software programmed based on the stored image data, the control / computing unit 81 performs positioning of the bare chip D and the packaging area P of the substrate S, as well as visual inspection of the bare chip D and the substrate S. Based on the positions of the bare chip D and the packaging area P of the substrate S calculated by the control / computing unit 81, the software moves the drive unit 86 via the motor control unit 83e. This process positions the bare chip on the wafer, activates the pickup head stage 23 and the placement head stage 43, and places the bare chip D on the packaging area P of the substrate S.

[0056] The control unit 80 can be constructed by installing the above-mentioned program stored in an external storage device into a computer. The external storage device includes, for example, an HDD, a USB memory, an SSD, etc. The auxiliary storage device 82b and the external storage device are configured as a recording medium that can be read by a computer. Hereinafter, these will be collectively referred to as recording media. In this specification, when the term recording medium is used, there are cases where only the auxiliary storage device 82b is included, only the external storage device is included, or both are included. It should be noted that providing a program or data to a computer and providing a program or data from a computer to an external device can also be done without using an external storage device, but using communication means such as the Internet or a dedicated line.

[0057] use Figure 4 A part of the manufacturing process of a semiconductor device (a method of manufacturing a semiconductor device) using the die mounter 1 will be described. Figure 4 It shows that the Figure 1 Flowchart of a method for manufacturing a semiconductor device using a die mounter 1 is shown. In the following description, the operation of each component constituting the die mounter 1 is controlled by the control unit 80.

[0058] (Wafer loading process: process S1)

[0059] A wafer cassette storing a wafer ring WR is loaded onto the cassette elevator 11 . The loaded wafer ring WR is supplied (carried in) onto the wafer holding stage 12 .

[0060] (Substrate loading process: process S2)

[0061] The transport jig storing the substrate S is loaded into the substrate supply unit 60 . In the substrate supply unit 60 , the substrate S stored in the transport jig is taken out from the transport jig and then supplied (carried in) to the mounting unit 40 via the transport unit 50 .

[0062] (Picking process: process S3)

[0063] After step S1, the wafer holding table 12 is moved in a manner that enables the desired bare chip D to be picked up from the dicing tape DT. The bare chip D is photographed by the wafer recognition camera 14, and the positioning and surface inspection of the bare chip D are performed based on the image data obtained by the photographing. By performing image processing on the image data, the offset amount (X, Y, θ directions) of the bare chip D on the wafer holding table 12 relative to the bare chip position reference point of the chip mounter is calculated and positioned. It should be noted that, as the initial setting of the device, the specified position of the wafer holding table 12 is maintained as the bare chip position reference point in advance. By performing image processing on the image data, the surface inspection of the bare chip D is performed.

[0064] The positioned bare chip D is peeled from the dicing tape DT by the peeling unit 13 and the pickup head 21 . The bare chip D peeled from the dicing tape DT is sucked and held by the collet 22 provided on the pickup head 21 , and is transported and placed on the intermediate stage 31 .

[0065] The stage recognition camera 34 captures the bare chip D on the intermediate stage 31. Based on the captured image data, the bare chip D is positioned and inspected on the surface. Image processing is performed on the image data to calculate the offset (in the X, Y, and θ directions) of the bare chip D on the intermediate stage 31 relative to the die placement machine's bare chip position reference point, and then position the bare chip. It should be noted that the intermediate stage 31 is initially set to a predetermined position as the bare chip position reference point. Image processing is performed on the image data to inspect the surface of the bare chip D.

[0066] The pickup head 21 that has conveyed the bare chip D to the intermediate stage 31 returns to the wafer supply unit 10. The next bare chip D is peeled from the dicing tape DT in the above-described order, and thereafter, the bare chips D are peeled one by one from the dicing tape DT in the same order.

[0067] (Placement process: process S4)

[0068] The conveyor unit 50 conveys the substrate S to the placement table 46. The substrate recognition camera 44 captures the substrate S placed on the placement table 46 and acquires image data. Image processing is performed on the image data to calculate the amount of misalignment (in the X, Y, and θ directions) of the substrate S relative to the substrate position reference point of the die placement machine 1. It should be noted that, as an initial setting for the device, the placement unit 40 is previously set to a predetermined position as the substrate position reference point.

[0069] The suction position of the placement head 41 is corrected based on the amount of misalignment of the bare chip D on the intermediate stage 31 calculated in step S3, and the bare chip D is suctioned by the collet 42. The placement head 41, which has suctioned the bare chip D from the intermediate stage 31, places the bare chip D on a predetermined position of the substrate S supported by the placement stage 46. The bare chip D placed on the substrate S is imaged by the substrate recognition camera 44, and based on the image data obtained by the imaging, an inspection is performed to determine whether the bare chip D is placed at the desired position (inspection of the relative position of the bare chip D and the substrate S).

[0070] The placement head 41 that has placed the bare chip D on the substrate S returns to the intermediate stage 31. Following the above sequence, the next bare chip D is picked up from the intermediate stage 31 and placed on the substrate S. This sequence is repeated to place bare chips D on all the packaging areas P of the substrate S.

[0071] (Substrate Unloading Step: Step S5)

[0072] The substrate S with the bare chip D mounted thereon is transported from the mounting section 40 to the substrate unloading section 70 by the transport section 50. In the substrate unloading section 70, the substrate S is taken out and stored on a transport jig, and then unloaded. The transport jig storing the substrate S is unloaded from the die mounter 1.

[0073] As described above, the bare chip D is mounted on the substrate S and unloaded from the die mounter 1. Thereafter, for example, the transport jig holding the substrate S with the mounted bare chip D is transported in a wire bonding process, where the electrodes of the bare chip D are electrically connected to the electrodes of the substrate S via Au wires or the like. Subsequently, the substrate S is transported in an injection molding process, where the bare chip D and the Au wires are sealed with an injection resin (not shown), completing the semiconductor package.

[0074] Next, use Figure 5 The optical system of the mounting section 40 will be described. Figure 5 This is a diagram showing an example of an optical system of a mounting unit.

[0075] The substrate recognition camera 44, serving as an imaging device, includes a first camera 441, a second camera 442, and a lens unit 443 on which the first and second cameras 441, 442 are mounted. The first and second cameras 441, 442 are configured to capture images of the main surface (front surface, top surface) of the substrate S or the main surface of the bare chip D mounted on the substrate S through the lens unit 443. An illumination device 45 is disposed between the lens unit 443 and the substrate S, etc. The first camera 441 and the illumination device 45 are disposed directly above the packaging area P of the substrate S, which serves as the imaging target (subject).

[0076] The lens unit 443 includes a first lens 443a and a second lens 443b. The lens unit 443 also includes a half-mirror (beam splitter) 443c disposed between the first lens 443a and the lighting device 45, and a reflective mirror 443d disposed between the second camera 442 and the second lens 443b. The various components of the lens unit 443 are housed within a lens barrel (cylinder), and the first camera 441 and the second camera 442 may be separately fixed to the lens barrel.

[0077] For example, the first camera 441 is a camera that photographs the subject at a low magnification (low resolution). The second camera 442 is a camera that photographs the subject at a high magnification (high resolution). Here, low magnification refers to a magnification that can obtain a sufficient field of view required for positioning. High magnification refers to a magnification that can obtain a pixel resolution that can detect the edge of the reference lead described later with high precision. It should be noted that the first camera 441 can also be a camera that photographs the subject at a high magnification (high resolution), and the second camera 442 can also be a camera that photographs the subject at a low magnification (low resolution).

[0078] The first lens 443a is an objective lens located between the first camera 441 and the half-reflective mirror 443c. The second lens 443b is an objective lens located between the reflective mirror 443d and the half-reflective mirror 443c. The half-reflective mirror 443c splits light incident from the Z2 side to the Z1 side (optical axis OA) into transmitted light toward the Z1 side (optical axis OA1) and reflected light toward the X1 side (optical axis OA2). The reflective mirror 443d reflects the reflected light from the half-reflective mirror 443c toward the Z1 side.

[0079] The number of pixels of the first camera 441 and the second camera 442 is, for example, 300,000 to 60,000 pixels. For example, when the first camera 441 and the second camera 442 have the same number of pixels, the magnification of the first lens 443a is reduced to be smaller than the magnification of the second lens 443b. As a result, the resolution of the first camera 441 becomes smaller than the resolution of the second camera 442. When the number of pixels of the first camera 441 is reduced to be smaller than the number of pixels of the second camera 442, the magnification of the first lens 443a and the second lens 443b are made to be of the same degree. As a result, the resolution of the first camera 441 becomes smaller than the resolution of the second camera 442.

[0080] The lighting device 45 includes a surface-emitting light source 451 and a half-reflecting mirror 452 within the lens barrel. Light from the surface-emitting light source 451 is reflected by the half-reflecting mirror 452 toward the same optical axis as the first camera 441 and the second camera 442, illuminating the substrate S and the like. Light illuminating the substrate S and the like along the same optical axis OA as the first camera 441 and the second camera 442 is reflected by the substrate S and the like, and this reflected light passes through the half-reflecting mirror 452 and reaches the first camera 441 and the second camera 442, forming an image of the substrate S and the like. In other words, the lighting device 45 functions as a coaxial epi-illumination (coaxial illumination) device.

[0081] Next, use Figure 6 Describes the reference position used for positioning, etc. Figure 6 This is a diagram showing position identification marks and mounting centers provided on a substrate.

[0082] A position identification mark M is provided in each packaging area P of the substrate S. There is at least one position identification mark M on the outside of the area (tab area, carrier automatic bonding area, carrier automatic placement area) where the bare chip D is placed. It should be noted that, in the case of stacking, the position identification mark M is sometimes provided on the bare chip D. The position identification mark M is composed of, for example, a reference lead. Sometimes, when mounting the bare chip, the distance (dx, dy) from the edge (edge, boundary, reference position) of the reference lead is used to express the coordinates of the mounting center CB. There are also cases where the reference lead is simply called the lead LE. It should be noted that there are also cases where the coordinates of the mounting center CB are expressed by the distance from the center CM of the quasi-lead. The reference position of the position identification mark M can also be the center line in the width direction of the lead, or the center or center of gravity of the position identification mark M. In addition, sometimes, instead of the coordinates of the mounting center CB, the coordinates of the corner of the mounting pad provided on the bare chip D or the center of the mounting pad are used as the reference on the bare chip D side.

[0083] In this case, the chip mounter must use image processing to measure and detect the lead LE's width and center, thereby determining the coordinates of the reference position. Whether the reference lead's edge, center, or centerline is used as the reference, the board recognition camera 44 must use a high-magnification lens to achieve higher pixel resolution in order to more accurately detect the lead LE's edge.

[0084] On the other hand, the substrate recognition camera 44 performs recognition (positioning) of the mounting position and surface inspection of the bare chip or substrate S. Therefore, a low-magnification lens is required to be set to a wide field of view including at least one packaging area P.

[0085] The first camera 441 can capture images of the bare chip D and substrate S at low magnification, while the second camera 442 can capture images of the position identification mark M at high magnification. The first camera 441 can capture an area encompassing at least the splice area and the position identification mark M located outside the splice area. The second camera 442 captures the position identification mark M as its subject. Thus, the substrate recognition camera 44 can address both of the aforementioned issues.

[0086] Next, a method of more accurately detecting the position of the edge of the lead LE will be described.

[0087] First, the lead wires LE and the lighting device will be described. Figure 7 It is a diagram showing a cross section of a substrate having leads. Figure 8 It shows Figure 7 A diagram showing the relationship of the leads to the lighting device.

[0088] like Figure 7As shown in (A) in FIG, the surface (upper surface) of the lead LE only needs to be flush with (at the same height as) the surface (upper surface) of the substrate S. However, sometimes the surface of the lead LE is not flush with the surface of the substrate S, and the surface of the lead LE may protrude from the surface of the substrate S, or may be recessed, or the side surface may be rounded. For example, Figure 7 As shown in (B), the lead LE may be convex relative to the surface of the substrate S and may have a curved side surface.

[0089] exist Figure 7 In the state shown in (B), even if observation is performed at a high magnification, if coaxial illumination close to parallel light is used as the illumination device 45, Figure 8 As shown in (A), only the flat portion of the upper surface of the lead LE becomes bright, and therefore only the flat portion of the upper surface of the lead LE can be observed.

[0090] Alternatively, oblique light may be used as the lighting device 45 so that light is irradiated onto the side of the lead LE. However, since the reflected light of the lead LE has many specular reflection components, Figure 8 As shown in (B), only the edge of the lead LE is brightened, and only the side surfaces of the lead LE are emphasized, making edge detection difficult using image processing. This is because the shading distribution (brightness: BR) on the side surfaces of the lead LE forms a pair of pulses, and a rectangular wave shape is preferred.

[0091] Next, use Figure 9 Description Suitable Figure 7 (B) shows a lighting device of such a lead LE. Figure 9 It is a diagram illustrating a lighting device in an embodiment.

[0092] like Figure 9 As shown in (A), as the lighting device 45, it is preferred to use Figure 5 Alternatively, as the lighting device 45, Figure 9 As shown in (B), it is preferred to use a coaxial lighting device 453 and a dome lighting device 454 in combination. The coaxial lighting device 453 can be Figure 5 The illustrated surface-emitting coaxial lighting device can also be a parallel light type or a nearly parallel light type. Dome lighting device 454 has an opening in the center of its top, and coaxial lighting device 453 is installed above the opening. Since surface-emitting coaxial lighting and dome lighting have a larger incident light NA (the range of light reaching a certain point on the subject) from the perspective of the subject, light can also reach the sides of lead LE.

[0093] In this case, it is preferable to determine the incident light NA of the illumination in consideration of the following: The illumination may be applied over a wider range than the incident light NA determined under these conditions.

[0094] (a) Horizontal distance from the edge of the lead LE to the point where the bend begins ( Figure 7 (B) shows d)

[0095] (b) The amount of inclination of the side surface of the lead LE ( Figure 7 (B) shows θ)

[0096] (c) Light intensity of reflected light at the surface of lead LE

[0097] use Figure 10 as well as Figure 11 An example of positioning method is described. Figure 10 This is a diagram explaining the teaching operation. Figure 11 This is a diagram illustrating production operations.

[0098] The positioning algorithm primarily employs pattern matching based on a template model (a search algorithm using template matching), along with model matching using commonly known normalized correlation equations and geometric search techniques. The result is defined as the consistency rate. Template matching involves both teaching actions for reference learning and production actions for product assembly.

[0099] Take the positioning of the substrate as an example. Figure 4 The operations shown are performed before the bare chip mounting process.

[0100] The control unit 80 uses the first camera 441 of the substrate recognition camera 44 to capture the reference substrate S. Figure 10 The image PCr shown is obtained by capturing the position recognition mark M formed on the reference substrate S using the second camera 442 of the substrate recognition camera 44 .

[0101] The operator of the die mounter uses the human-machine interface (touch panel 83b, mouse 83c) to select a unique area UA including a characteristic pattern from the image PCr. Here, the characteristic pattern of the unique area UA is, for example, a position identification mark M. The position identification mark M is exemplified by a cross shape, but is not limited thereto. For example, a wiring (lead) having a characteristic pattern (e.g., an L-shaped pattern) formed in the wiring of the substrate S may be used. Figure 10 The circular lead line shown is used as a position identification mark M.

[0102] The control unit 80 stores the positional relationship (coordinates) between the selected unique area UA and the reference substrate S in the storage device 82. For example, the placement center C of the reference substrate S relative to the reference position of the position recognition mark M is stored. B The reference position coordinates of the bare chip side (see Figure 6 ).

[0103] The control unit 80 stores the image of the unique area UA serving as a reference (hereinafter referred to as the template image PT) and the coordinates thereof in the storage device 82. For example, the template image PT includes an image of the position identification mark M. The coordinates of the stored template image PT are the position coordinates of the center CM of the position identification mark M calculated based on the image of the position identification mark M and the reference position calculated based on the lead width of the reference lead constituting the position identification mark M (see Figure 6 ).

[0104] Next, explain Figure 4 The production operations in the bare chip mounting process are shown.

[0105] In step S4, the control unit 80 uses the first camera 441 of the substrate recognition camera 44 to photograph the product substrate S and obtain Figure 11 The image PCn is shown.

[0106] like Figure 11 As shown, the control unit 80 compares the template image PT stored during the teaching operation with the acquired image PCn of the product substrate S, and calculates the coordinates of the image PTn of the most similar portion.

[0107] The control unit 80 compares the coordinates of the image PTn with the coordinates measured using the reference substrate S, and calculates the position of the product substrate S (the amount of displacement between the image PTn and the template image PT).

[0108] Next, the effects of this embodiment will be described.

[0109] Even if the pixel resolution of the image system used for positioning is greater than the repetitive placement accuracy, it can achieve the positioning performance required for placement accuracy by using statistical calculations of image processing. However, this only achieves reproducibility accuracy. In order to accurately mount the bare chip to the desired location, it is necessary to feedback the results of the misalignment amount measured by another offline system after temporary placement. This system can guarantee the reproducibility of placement, but it is difficult to detect the reference surface of the workpiece (such as the edge of the reference lead (called the reference edge)) at a resolution lower than the pixel resolution. Therefore, it is difficult to implement a teaching action that specifies the offset amount relative to the reference surface.

[0110] Therefore, the above-mentioned problem can be solved by increasing the magnification to achieve higher pixel resolution. However, high magnification narrows the field of view, making it impossible to obtain a sufficient field of view required for positioning.

[0111] Zoom lenses or binocular optics can achieve both high magnification and a wide field of view, but they present the following challenges.

[0112] Zoom lenses can change their magnification, so the above-mentioned issues can be resolved. However, in the case of zoom lenses with a drive system, the accuracy of the field of view position reproducibility when switching magnifications will be affected. In other words, when returning to the original magnification after a magnification change, 100% coordinate reproducibility will not be achieved due to the mechanical movement error. Therefore, the offset between the template model used in positioning and the reference edge will contain deviations. In addition, it is also considered to prepare multiple cameras with different magnifications to resolve the above-mentioned issues, but the configuration will be such that one of the cameras is not vertical relative to the workpiece (the optical axis will be tilted).

[0113] According to this embodiment, at least one or more of the following effects are achieved.

[0114] (a) By arranging cameras of two magnifications on the same optical axis, it is possible to maintain high reproducibility of the field of view position during switching.

[0115] (b) The reference edge can be detected more accurately using a high-magnification optical system. This allows accurate detection of the offset of the template model relative to the reference edge, improving the accuracy of reference edge detection.

[0116] (c) Positioning using pattern matching can be performed using an optical system with a wide field of view (low magnification).

[0117] (d) According to the above method, the reference position of positioning designated at a high magnification and the offset of the model registered at a low magnification can be stably acquired (the offset can be accurately acquired even when re-teaching is performed).

[0118] (e) No need for offline offset measurement.

[0119] Modifications

[0120] The following illustrates several representative variations of the embodiments. In the following descriptions of the variations, components having the same configuration and functions as those described in the above embodiments are denoted by the same reference numerals as those in the above embodiments. The descriptions of the relevant components are appropriately incorporated into the descriptions of the above embodiments to the extent that they are not technically inconsistent. Furthermore, portions of the above embodiments, as well as all or portions of the various variations, may be appropriately incorporated into the descriptions to the extent that they are not technically inconsistent.

[0121] The arrangement of the reflectors and lenses in the lens unit 443 can also be changed. Furthermore, the arrangement of the camera can also be changed. Furthermore, the arrangement of the lighting device can also be changed. These are explained below.

[0122] (First Modification)

[0123] use Figure 12The optical system in the first modification will be described. Figure 12 1 is a diagram showing the arrangement of an optical system of a mounting section in a first modification.

[0124] In the first variant, the reflector 443d is provided on the Z1 side of the first lens 443a. It should be noted that the configuration of the first lens 443a, the second lens 443b, and the half-reflective mirror 443c is the same as in the embodiment. The first camera 441 is provided on the X1 side of the reflector 443d. The second camera 442 is provided on the X1 side of the second lens 443b. As in the embodiment, the half-reflective mirror 443c branches the light incident from the Z2 side to the Z1 side into transmitted light toward the Z1 side and reflected light toward the X1 side. The reflector 443d reflects the transmitted light from the half-reflective mirror 443c toward the X1 side.

[0125] (Second Modification)

[0126] use Figure 13 The optical system in the second modified example will be described. Figure 13 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a second modification.

[0127] In the second variant, the reflector 443d is not provided. It should be noted that the configuration of the first lens 443a, the second lens 443b, and the half-reflecting mirror 443c is the same as in the embodiment. The first camera 441 is provided on the Z1 side of the first lens 443a. The second camera 442 is provided on the X1 side of the second lens 443b. As in the embodiment, the half-reflecting mirror 443c splits light incident from the Z2 side to the Z1 side into transmitted light toward the Z1 side and reflected light toward the X1 side.

[0128] (Third Modification)

[0129] use Figure 14 The optical system in the third modified example will be described. Figure 14 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a third modified example.

[0130] In the third modification, the second lens 443b is provided between the second camera 442 and the reflector 443d. Other configurations are the same as those in the embodiment.

[0131] (Fourth Modification)

[0132] use Figure 15 The optical system in the fourth modification will be described. Figure 15 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a fourth modification.

[0133] In the fourth modification, an illumination device 47 is inserted into the lens portion 443 of the second modification. Illumination device 47 is an insertion-type coaxial illumination device comprising a light source 471 and a half mirror 472 disposed between a half mirror 443c and a second lens 443b. Light source 471 can emit either parallel light or diffuse light.

[0134] (Fifth Modification)

[0135] use Figure 16 The optical system in the fifth modification will be described. Figure 16 1 and 2 are diagrams showing the arrangement of an optical system of a mounting section in a fifth modification.

[0136] In the fifth modification, an illumination device 47 is inserted into the lens portion 443 of the second modification. Illumination device 47 is an insertion-type coaxial illumination device comprising a light source 471 and a half mirror 472 disposed between a half mirror 443c and a first lens 443a. Light source 471 can emit either parallel light or diffuse light.

[0137] As mentioned above, the disclosure proposed by the inventors of the present disclosure has been specifically described based on the embodiment and the modified examples. However, the present disclosure is not limited to the above-described embodiment and the modified examples, and various modifications are possible.

[0138] A lens having an NA that can accurately detect the edge of the lead can also be used. In this way, a coaxial lighting device that uses parallel light or nearly parallel light can also illuminate the side surfaces of the lead.

[0139] While the embodiment described an example using a die-bonding film, a pre-forming unit for applying adhesive to the substrate may be provided without using a die-bonding film. The pre-forming unit includes a pre-forming head for applying the paste adhesive and a pre-forming stage for driving the pre-forming head in the vertical and horizontal directions.

[0140] In the embodiment, a die mounter is described in which a pick-up head picks up bare chips from a wafer supply unit and places them on an intermediate stage, and a placement head places the bare chips placed on the intermediate stage on a substrate. However, the present invention is not limited to this embodiment and can also be applied to a die mounter in which a placement head picks up bare chips from a wafer supply unit and places them on a substrate.

[0141] For example, the present invention can also be applied to a die mounter that does not have an intermediate stage and a pickup head and mounts a bare chip of a wafer supply unit on a substrate using a placement head.

[0142] Furthermore, the present invention can be applied to a flip chip mounter without an intermediate stage, which picks up a bare chip from a wafer supply unit, turns a flip chip pickup head upside down, delivers the bare chip to a mounting head, and mounts the bare chip on a substrate using the mounting head.

[0143] In the embodiment, the die mounter is described as an example, but the present invention is also applicable to a mounting device that picks up a workpiece by suction and places the picked-up workpiece on a substrate or the like.

Claims

1. A semiconductor manufacturing device, characterized in that: have: An imaging device including a first camera, a second camera, and a lens unit, wherein the first camera images a substrate having a reference mark and a bonding area for placing a bare chip, and the second camera images the reference mark; as well as Coaxial lighting device, The lens portion has: a first lens serving as an objective lens of the first camera; a second lens serving as an objective lens of the second camera; as well as A beam splitter branches the reflected light from the subject toward the first lens and the second lens.

2. The semiconductor manufacturing apparatus according to claim 1, wherein The beam splitter is configured to split the reflected light from the subject into vertically upward transmitted light and horizontally reflected light, The coaxial lighting device is provided closer to the substrate than the lens portion.

3. The semiconductor manufacturing apparatus according to claim 1, wherein The beam splitter is configured to split the reflected light from the subject into vertically upward transmitted light and horizontally reflected light, The coaxial lighting device is inserted into the lens portion and is provided on the lens portion.

4. The semiconductor manufacturing apparatus according to claim 1, wherein The coaxial lighting device has a surface-emitting light source.

5. The semiconductor manufacturing apparatus according to claim 1, wherein A dome lighting device is further provided. The dome lighting device is provided closer to the substrate than the coaxial lighting device.

6. The semiconductor manufacturing apparatus according to claim 1, wherein The reference mark is formed by a lead wire.

7. The semiconductor manufacturing apparatus according to claim 1, wherein A control unit is provided, and the control unit is configured to perform positioning of the substrate based on the image acquired by imaging the substrate using the first camera and the image acquired by imaging the reference mark using the second camera.

8. A method for manufacturing a semiconductor device, characterized in that: The process includes the following steps: An imaging device of a semiconductor manufacturing apparatus is used to image a substrate, the semiconductor manufacturing apparatus comprising the imaging device and a coaxial lighting device, the imaging device including a first camera, a second camera, and a lens unit, the first camera imaging a substrate having a fiducial mark and a bonding area for mounting a bare chip, the second camera imaging the fiducial mark, the lens unit comprising a first lens serving as an objective lens of the first camera, a second lens serving as an objective lens of the second camera, and a beam splitter for branching reflected light from an object toward the first lens and the second lens; as well as The substrate is positioned based on an image acquired by photographing the substrate using the first camera and an image acquired by photographing the reference mark using the second camera.

Images