Power device packaging structure

Abstract

The invention provides a power device packaging structure, and relates to the technical field of semiconductor packaging, and the power device packaging structure comprises a cooling fin, the front surface of the cooling fin is provided with a chip carrying area, and a power chip is welded on the chip carrying area; an outer pin on one side of the lead frame is connected with the radiating fin, and an outer pin on the other side of the lead frame is insulated from the radiating fin; and the plastic package body wraps the radiating fin and the lead frame, each outer pin is led out of the plastic package body, and the connecting part of the outer pin on one side connected with the radiating fin and the radiating fin is led out of the plastic package body and then is bent. The packaging structure has the beneficial effects that the connecting part of the outer pin on one side connected with the radiating fin and the radiating fin is led out of the plastic package body and then is bent, so that the packaging structure has a larger chip carrying area under the same packaging size, further a chip with a larger specification can be packaged, the packaging appearance structure is more compact, the radiating area of the radiating fin is increased, and the packaging structure is more compact. Therefore, the thermal resistance is lower, energy conservation and consumption reduction are realized, and the method is suitable for high-density application scenarios.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a power device packaging structure. Background Art

[0002] In today's era of rapid development of electronic technology, power devices, as key components in electronic systems, have a performance and reliability that directly impacts the operating efficiency and stability of the entire system. Traditional power device heat dissipation methods typically rely on a heat sink at the bottom of the device. Heat is transferred through the thermal path inside the device to the bottom heat sink, which then dissipates the heat into the surrounding environment. However, this heat dissipation method has obvious limitations. As the power of power devices continues to increase, the heat generated also increases significantly. The bottom heat dissipation method is unable to quickly and effectively conduct heat away, causing the device temperature to rise, which in turn affects the performance and reliability of the device and shortens the device's service life. At the same time, to meet the heat dissipation requirements, it may be necessary to increase the size of the heat sink or adopt a more complex heat dissipation structure, which not only increases the cost of the system but also limits the miniaturization design of electronic equipment.

[0003] Surface-mount top-cooled power devices address the shortcomings of traditional heat dissipation methods through an innovative design. They bend the external leads to the side of the plastic package using a cutting and forming die, and form a heat sink on the top of the device. In device applications, the addition of an external heat sink allows heat to be conducted directly from the top of the device to a heat sink or the external environment. This heat dissipation method significantly shortens the heat conduction path and improves heat dissipation efficiency. Because heat can be dissipated more quickly, the device's operating temperature is effectively reduced, thereby extending its lifespan. Furthermore, top-cooling reduces reliance on bottom-cooling structures, lowering system costs and facilitating the design of smaller and more efficient electronic devices.

[0004] However, during the packaging process of surface-mount top-cooling power devices, the outer pins will generate large stress when bent. This stress may be transmitted to the interface between the lead frame and the plastic package, causing delamination or even cracking between the two. Delamination and cracking will seriously affect the packaging reliability of the device, reduce the electrical performance and mechanical strength of the device, and may even cause device failure. In order to solve this problem and improve product packaging reliability, packaging manufacturers have adopted a compromise solution, which is to encapsulate part of the pins inside the plastic package and then bend them outside the plastic package, such as Figure 1 As shown, a portion of the leads of the lead frame 3' are sealed in the plastic package 4'. Figure 1It can be seen that part of the pins on the side where the lead frame 3′ is connected to the heat sink 1′ are encapsulated in the plastic package 4′, which will result in a reduction in the area of ​​the chip carrier. Compared with other package shapes, the chip specifications that can be encapsulated under the same package size are smaller, and the product power density cannot be further improved. Summary of the Invention

[0005] In view of the problems existing in the prior art, the present invention provides a power device packaging structure, comprising:

[0006] A heat sink, wherein a chip carrier area is provided on the front side of the heat sink, and a power chip is welded on the chip carrier area;

[0007] a lead frame, wherein outer pins on one side of the lead frame are connected to the heat sink, and outer pins on the other side are insulated from the heat sink;

[0008] The plastic package body covers the heat sink and the lead frame. Each of the external pins is led out of the plastic package body. The external pin connected to the heat sink is bent after being led out of the plastic package body.

[0009] Preferably, each of the external pins comprises an electrode pin of a power device, and the electrode pins include a first pin, a second pin, a third pin, and a fourth pin connected to the heat sink, and a fifth pin, a seventh pin, and an eighth pin insulated from the heat sink;

[0010] The sum of the cross-sectional areas of the first pin, the second pin, the third pin, and the fourth pin is consistent with the sum of the cross-sectional areas of the seventh pin and the eighth pin.

[0011] Preferably, a hole is formed in the area of ​​the seventh pin and the eighth pin located inside the plastic package body.

[0012] Preferably, the external pins further include a sixth pin, and the sixth pin is a Kelvin source.

[0013] Preferably, at least one first anti-overflow groove is provided on the left and right sides and the lower side of the wafer carrier area, and at least one second anti-overflow groove is provided on the upper side of the wafer carrier area.

[0014] Preferably, the longitudinal cross-section of the first anti-overflow groove is V-shaped, and the longitudinal cross-section of the second anti-overflow groove is dovetail-shaped.

[0015] Preferably, a step is formed on the back edge of the heat sink.

[0016] Preferably, at least one V-shaped groove is provided at the connection between the lead-out portion of each external pin extending from the plastic package body and the plastic package body.

[0017] Preferably, an elliptical groove is provided on both sides of the plastic package body where the external pins are not led out, and the elliptical groove has a first opening facing the outside of the plastic package body and a second opening passing through the back edge area of ​​the heat sink.

[0018] Preferably, at least one U-shaped groove is formed on a side of the plastic package body facing the front side of the heat sink, and the U-shaped groove is close to the external pin on the side insulated from the heat sink.

[0019] The above technical solution has the following advantages or beneficial effects:

[0020] The external pins on the side connected to the heat sink are led out of the plastic package body and then bent to form a larger chip carrier area under the same package size, so that larger chips can be packaged, making the package structure more compact. At the same time, the heat dissipation area of ​​the heat sink is increased, thereby lowering the thermal resistance, achieving energy saving and consumption reduction, and being suitable for high-density application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A side cross-sectional view of an existing power device packaging structure;

[0022] Figure 2 A side cross-sectional view of a power device packaging structure in a preferred embodiment of the present invention;

[0023] Figure 3 This is a schematic diagram of the electrical connection of the power chip inside the power device package structure when a sixth pin is provided in a preferred embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of the electrical connection of the power chip inside the power device package structure when the sixth pin is not provided in a preferred embodiment of the present invention;

[0025] Figure 5 for Figure 3 or Figure 4 Left side view of the middle heat sink;

[0026] Figure 6 for Figure 5 Enlarged view of part A;

[0027] Figure 7 for Figure 3 or Figure 4 Front view of the middle heat sink;

[0028] Figure 8 for Figure 7 Enlarged view of part B;

[0029] Figure 9 This is a three-dimensional diagram of a power device packaging structure in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0030] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments. The present invention is not limited to this embodiment, and other embodiments may also fall within the scope of the present invention as long as they conform to the gist of the present invention.

[0031] In a preferred embodiment of the present invention, based on the above problems existing in the prior art, a power device packaging structure is provided. Figure 2 and Figure 3 Shown, including:

[0032] The heat sink 1 has a chip carrier area on its front side, and a power chip 2 is welded on the chip carrier area;

[0033] A lead frame 3, wherein one side of the outer pins of the lead frame 3 is connected to the heat sink 1, and the other side of the outer pins are insulated from the heat sink 1;

[0034] The plastic package body 4 covers the heat sink 1 and the lead frame 3. Each external pin is led out of the plastic package body 4. The external pin connected to the heat sink 1 is led out of the plastic package body 4 and then bent.

[0035] Specifically, in this embodiment, the power device packaging structure includes a heat sink 1, a power chip 2, a lead frame 3 and a plastic package 4. The power chip 2 is welded on the carrier area on the front of the heat sink 1. The power chip includes but is not limited to a MOSFET chip or an IGBT+FRD chip welded thereon. The external pins of the lead frame 3 are led out from both sides of the plastic package 4. The external pins on one side are connected to the heat sink 1, and the external pins on the other side are insulated from the heat sink 1. The plastic package 4 wraps the carrier area on the front of the heat sink 1, the power chip 2 and the external pins. The power chip 2 is connected to the external pins on the insulating side through metal wires to form internal electrical connections of the power device.

[0036] It can be seen that the present invention leads the outer pin connected to the heat sink 1 out of the plastic package 4 and then bends it, and the area of ​​the front surface of the heat sink 1 is smaller than that of the heat sink 1. Figure 1 It has a significantly larger chip carrier area. Under the same package size, the chip carrier area can be increased by 30%, which can package larger chips. At the same time, the heat dissipation area of ​​the heat sink 1 can be increased by 30%. According to the following thermal resistance calculation formula:

[0037] R=L / k*A

[0038] Wherein, R represents thermal resistance, L represents the length of the heat transfer path, k represents the thermal conductivity of the material, and A represents the heat transfer area, that is, the cross-sectional area (heat dissipation area) of the heat sink 1 .

[0039] On the basis of the increase in the heat dissipation area of ​​the heat sink 1 , the thermal resistance can be reduced by about 23.1%.

[0040] In summary, compared with other package shapes, the power device package structure of the present invention can package larger chips with the same package size. The package shape structure is more compact and has lower thermal resistance, which can achieve energy saving and consumption reduction, and is suitable for high-density application scenarios.

[0041] In a preferred embodiment of the present invention, each external pin includes an electrode pin of a power device, and the electrode pin includes a first pin 101, a second pin 102, a third pin 103, and a fourth pin 104 connected to the heat sink 1, and a fifth pin 105, a seventh pin 107, and an eighth pin 108 insulated from the heat sink 1;

[0042] The sum of the cross-sectional areas of the first pin 101 , the second pin 102 , the third pin 103 and the fourth pin 104 is consistent with the sum of the cross-sectional areas of the seventh pin 107 and the eighth pin 108 .

[0043] Specifically, in this embodiment, the first pin 101, the second pin 102, the third pin 103, and the fourth pin 104 are the drain or collector of the power device. Their combined cross-sectional area is consistent with the size of the seventh pin 107 and the eighth pin 108, which are the source or emitter of the power device, to ensure a more uniform current flow. Furthermore, their cross-sectional area is larger than that of similar competing products, and compared to the traditional TO-247, the cross-sectional area is increased by approximately 2.4 times. Furthermore, according to Joule's law:

[0044] Q=I 2 ρlt / S

[0045] Where Q is the heat, I is the current, ρ is the material resistivity, L is the material length, S is the material cross-sectional area, and t is the power-on time.

[0046] As can be seen from the above formula, for a given current I, duration t, conductor material resistivity ρ, and conductor length l, a larger conductor cross-sectional area S reduces the amount of heat generated Q. This reduces the amount of heat generated by approximately 70%. Simultaneously, thermal resistance is reduced by 70%, resulting in a better heat dissipation effect.

[0047] In a preferred embodiment of the present invention, the external pins further include a sixth pin 106 , which is a Kelvin source.

[0048] Specifically, in this embodiment, the first pin 101, the second pin 102, the third pin 103, and the fourth pin 104 connected to the heat sink 1 serve as the drain or collector of the power device. The fifth pin 105, insulated from the heat sink 1, serves as the gate of the power device. The seventh pin 107 and the eighth pin 108, also insulated from the heat sink 1, serve as the source or collector of the power device. These two pins are connected within the plastic package 4.

[0049] Among them, the fifth pin 105, the sixth pin 106, the seventh pin 107 and the eighth pin 108 are provided with areas for bonding, such as Figure 3 As shown, the gate electrode, Kelvin source electrode, and source / emitter electrode of the power chip 2 are connected to the fifth pin 105, the sixth pin 106, the seventh pin 107, and the eighth pin 108 via bonding wires 21, thereby completing the electrical connection within the power device. The bonding wires 21 can be metal wires such as gold wires, copper wires, and aluminum wires.

[0050] Furthermore, by setting the Kelvin source, the inductive reactance between the gate and the source is reduced, so that the gate-source voltage is higher when it is turned on, and the gate has stronger control over the current. Therefore, when a short circuit occurs, the short-circuit current is larger and rises faster, so the short-circuit tolerance is weaker.

[0051] As a preferred embodiment, the Kelvin source has a fast turn-off speed, which may result in a higher peak voltage and, consequently, a higher peak current. To meet the needs of low-frequency IGBT or MOS applications, improve short-circuit capability, and reduce peak voltage, the sixth pin 106 can also be removed during leadframe manufacturing, ensuring that the packaged design has no Kelvin pins.

[0052] Among them, the packaging equipment of the two schemes of setting the sixth pin 106 and not setting the sixth pin 106 is universal, and it can be realized by investing only in the lead frame mold component, reducing the development cost of products in different application scenarios. When the sixth pin 106 is not set, the electrical connection diagram of the power chip inside the power device packaging structure is as follows Figure 4 shown.

[0053] In a preferred embodiment of the present invention, a hole 5 is formed in the area of ​​the seventh pin 107 and the eighth pin 108 located inside the plastic package 4 .

[0054] Specifically, in this embodiment, the number of the above-mentioned holes 5 is not limited. By opening the holes 5 in the area of ​​the seventh pin 107 and the eighth pin 108 located inside the plastic package body 4, the plastic package material can be poured into the holes 5 during the plastic package process to form a fixing column, thereby increasing the bonding strength between the plastic package material and the lead frame, preventing the seventh pin 107 and the eighth pin 108 from being delaminated due to stress when being bent, and improving the reliability of the device.

[0055] In a preferred embodiment of the present invention, Figures 5 to 8 As shown, at least one first anti-overflow groove 6 is provided on the left and right sides and the lower side of the wafer loading area, and at least one second anti-overflow groove 7 is provided on the upper side of the wafer loading area.

[0056] In a preferred embodiment of the present invention, the longitudinal cross-section of the first anti-overflow groove 6 is V-shaped, and the longitudinal cross-section of the second anti-overflow groove 7 is dovetail-shaped.

[0057] Specifically, in this embodiment, by providing the first anti-overflow groove 6 and the second anti-overflow groove 7, the distance that water vapor enters the chip welding area along the bonding position of the plastic packaging body 4 and the lead frame 3 is increased, which can prevent water vapor from entering the chip welding area, and can also enhance the bonding strength between the plastic packaging material and the lead frame, prevent stratification between the plastic packaging body 4 and the lead frame 3, and improve device reliability.

[0058] In a preferred embodiment of the present invention, a step 8 is formed on the back edge of the heat sink 1 .

[0059] Specifically, in this embodiment, the above-mentioned step 8 is preferably formed by semi-stamping. After plastic packaging, the plastic packaging material will completely wrap the semi-stamped step structure. This structure increases the bonding area between the plastic packaging body and the lead frame, prevents delamination between the plastic packaging body 4 and the lead frame 5, and also increases the distance for water vapor to enter the chip welding area along the bonding position of the plastic packaging body 4 and the lead frame 3, which can not only prevent water vapor from entering the chip area, but also improve the reliability of the device.

[0060] In a preferred embodiment of the present invention, Figure 3 and Figure 4 As shown, at least one V-shaped groove 9 is provided at the connection between the lead-out portion of each external pin extending from the plastic package body 4 and the plastic package body 4 .

[0061] Specifically, in this embodiment, since the power chip 2 is soldered to the front chip carrier area of ​​the heat sink 1, the number of V-shaped grooves 9 provided on each external pin connected to the heat sink 1 is preferably greater than the number of V-shaped grooves 9 provided on each external pin insulated from the heat sink 1. For example, two V-shaped grooves 9 can be provided on each external pin connected to the heat sink 1, and one V-shaped groove 9 can be provided on each external pin insulated from the heat sink 1. By providing the above-mentioned V-shaped grooves 9, moisture can be prevented from entering the chip area, and delamination between the plastic package 4 and the lead frame 3 can be prevented, thereby improving device reliability.

[0062] In a preferred embodiment of the present invention, Figure 9 As shown, oval grooves 10 are provided on both sides of the plastic package body 4 where the external pins are not led out. The oval grooves 10 have a first opening facing the outside of the plastic package body 4 and a second opening passing through the back edge area of ​​the heat sink 1 .

[0063] Specifically, in this embodiment, by setting elliptical grooves 10 on both sides of the plastic packaging body 4, the mold parts can be pressed onto the back edge area of ​​the heat sink 1 during plastic packaging, thereby improving the overflow of the back side of the heat sink during the plastic packaging process, and avoiding the increase of thermal resistance and weakening of the heat dissipation effect due to the overflow of the back side of the heat sink when the device is used.

[0064] In a preferred embodiment of the present invention, Figure 9 As shown, at least one U-shaped groove 11 is formed on one side of the plastic package body 4 facing the front of the heat sink 1 , and the U-shaped groove 11 is close to the outer pin on one side insulated from the heat sink 1 .

[0065] Specifically, in this embodiment, in the application scenario of high-voltage power devices, the creepage distance between DS or CE is a factor that must be considered. In order to meet the requirements of high-voltage device application scenarios, one or more U-shaped grooves 11 can be opened on the side of the plastic package 4 facing the front of the heat sink 1 without changing the package size to increase the creepage distance between its electrodes. The specific number is set according to the product voltage level.

[0066] Among them, compared with the solution without the above-mentioned U-shaped groove 11, the solution with the above-mentioned U-shaped groove 11 has a common lead frame and most packaging equipment, and can be achieved by only investing in plastic molding mold parts, reducing the development cost of products in different application scenarios.

[0067] The above description is only a preferred embodiment of the present invention and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the content of this specification and illustrations should be included in the protection scope of the present invention.

Claims

1. A power device packaging structure, characterized in that: include: A heat sink, wherein a chip carrier area is provided on the front side of the heat sink, and a power chip is welded on the chip carrier area; a lead frame, wherein outer pins on one side of the lead frame are connected to the heat sink, and outer pins on the other side are insulated from the heat sink; The plastic package body covers the heat sink and the lead frame. Each of the external pins is led out of the plastic package body. The external pin connected to the heat sink is bent after being led out of the plastic package body.

2. The power device packaging structure according to claim 1, wherein: Each of the external pins comprises an electrode pin of a power device, and the electrode pins include a first pin, a second pin, a third pin, and a fourth pin connected to the heat sink, and a fifth pin, a seventh pin, and an eighth pin insulated from the heat sink; The sum of the cross-sectional areas of the first pin, the second pin, the third pin, and the fourth pin is consistent with the sum of the cross-sectional areas of the seventh pin and the eighth pin.

3. The power device packaging structure according to claim 2, wherein: The seventh pin and the eighth pin are provided with holes in the area inside the plastic package body.

4. The power device packaging structure according to claim 1, wherein: The external pins further include a sixth pin, and the sixth pin is a Kelvin source.

5. The power device packaging structure according to claim 1, wherein: At least one first anti-overflow groove is respectively provided on the left and right sides and the lower side of the wafer carrier area, and at least one second anti-overflow groove is provided on the upper side of the wafer carrier area.

6. The power device packaging structure according to claim 5, characterized in that: The longitudinal cross-section of the first anti-overflow groove is V-shaped, and the longitudinal cross-section of the second anti-overflow groove is dovetail-shaped.

7. The power device packaging structure according to claim 1, wherein: A step is formed on the back edge of the heat sink.

8. The power device packaging structure according to claim 1, wherein: At least one V-shaped groove is provided at the connection between the lead-out portion of each external pin extending from the plastic package body and the plastic package body.

9. The power device packaging structure according to claim 1, wherein: Elliptical grooves are formed on both sides of the plastic package body where the external pins are not led out. The elliptical grooves have a first opening facing the outside of the plastic package body and a second opening passing through the back edge area of ​​the heat sink.

10. The power device packaging structure according to claim 1, wherein: At least one U-shaped groove is provided on a side of the plastic package body facing the front of the heat sink, and the U-shaped groove is close to the outer pin on the side insulated from the heat sink.

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